Trigger a refresh of the non-volatile memory.

Abstract

This application relates to triggering a refresh of non-volatile memory. A host system can communicate with a memory system, wherein the host system and the memory system may be contained within a vehicle (e.g., an automotive system). The host system can receive an indication that the vehicle is powered off and can enter a power-off state in response to the indication. The host system can detect a trigger event (e.g., usage time or temperature input) that switches back to a power-on state when the vehicle is powered off, the trigger event being associated with performing a refresh operation at the memory system. The host system can enter the power-on state and send a power-on command to the memory system. The memory system can perform the refresh operation on one or more memory cells while the vehicle remains in a power-off state.

Description

[0001] Cross-references

[0002] This patent application claims priority to U.S. Patent Application No. 17 / 868,074, filed July 19, 2022, entitled “Triggering a Refresh for Non-Volatile Memory”, filed by Bueb et al., which claims the benefit of U.S. Provisional Patent Application No. 63 / 229,328, filed August 4, 2021, entitled “Triggering a Refresh for Non-Volatile Memory”, each of which is assigned to the assignee and each of which is expressly incorporated herein by reference. Technical Field

[0003] The technical field relates to triggering refreshes of non-volatile memory. Background Technology

[0004] Memory devices are widely used to store information in various electronic devices such as computers, user devices, cameras, and digital displays. Information is stored by programming memory cells within the memory device to various states. For example, a binary memory cell can be programmed to one of two supported states, typically corresponding to logic 1 or logic 0. In some instances, a single memory cell can support more than two possible states, any of which can be stored by the memory cell. To access the information stored by the memory device, a component can read or sense the state of one or more memory cells within the memory device. To store information, a component can write or program one or more memory cells within the memory device to corresponding states.

[0005] Various types of memory devices exist, including magnetic hard disks, random access memory (RAM), read-only memory (ROM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), static RAM (SRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), resistive RAM (RRAM), flash memory, phase-change memory (PCM), 3D crosspoint memory, NOR (Non-OR), and NAND (NAND) memory devices. Memory devices can be volatile or non-volatile. Volatile memory cells (e.g., DRAM cells) may lose their programmed state over time unless periodically refreshed by an external power supply. Non-volatile memory cells (e.g., NAND memory cells) can maintain their programmed state for a long period of time even without an external power supply. Summary of the Invention

[0006] A device is described. The device may include a controller configured to couple with a memory system associated with a vehicle. The controller may be configured to cause the device to: receive an indication that the vehicle is powered off; enter a power-off state based on the indication that the vehicle is powered off; detect a trigger event for switching to a power-on state when the vehicle is powered off and when in the power-off state, the trigger event being associated with performing a refresh operation at the memory system associated with the vehicle; enter the power-off state based on the detected trigger event; and, when the vehicle is powered off and when in the power-on state, transmit a command to the memory system to power on the memory system based on the trigger event associated with performing a refresh operation at the memory system.

[0007] Describe an apparatus. The apparatus may include a host system configured to couple with a memory system associated with a vehicle. The apparatus may also include a controller associated with the host system and the memory system. The controller may be configured to cause the apparatus to: detect a trigger event that switches the host system to a power-on state when the vehicle is powered off, the trigger event being associated with performing a refresh operation at the memory system; supply power to the host system and the memory system based on the detection of the trigger event; and perform a refresh operation on one or more non-volatile first blocks of the memory system when the vehicle is powered off and based on the supply of power to the host system and the memory system, the refresh operation including reprogramming data from one or more non-volatile first blocks of the memory system to one or more non-volatile second blocks of the memory system.

[0008] A non-transitory computer-readable medium is described. The non-transitory computer-readable medium may store code including instructions that, when executed by a processor of an electronic device, cause the electronic device to: receive an instruction to power off a vehicle; enter a power-off state based on the instruction to power off a vehicle; detect a trigger event for switching to a power-on state when the vehicle is powered off and when in the power-off state, the trigger event being associated with performing a refresh operation at a memory system associated with the vehicle; enter a power-on state based on the detected trigger event; and, when the vehicle is powered off and when in the power-on state, transmit a command to power on the memory system based on the trigger event associated with performing a refresh operation at the memory system.

[0009] A non-transitory computer-readable medium is described. The non-transitory computer-readable medium may store code including instructions that, when executed by a processor of an electronic device, cause the electronic device to: detect a trigger event that switches a host system for a memory system to a power-on state when the vehicle is powered off, the trigger event being associated with performing a refresh operation at the memory system; provide power to the host system and the memory system based on the detection of the trigger event; and perform a refresh operation on one or more non-volatile first blocks of the memory system when the vehicle is powered off and based on the power being provided to the host system and the memory system, the refresh operation including reprogramming data from one or more non-volatile first blocks of the memory system to one or more non-volatile second blocks of the memory system. Attached Figure Description

[0010] Figures 1 to 3 This describes an instance of a system that triggers a refresh of non-volatile memory based on the examples disclosed herein.

[0011] Figure 4 This describes an example of a process flow that triggers a refresh of non-volatile memory based on the examples disclosed herein.

[0012] Figure 5 A block diagram of a host system is shown, illustrating support for triggering refreshes of non-volatile memory based on examples disclosed herein.

[0013] Figure 6 A block diagram of a vehicle system that supports triggering a refresh of non-volatile memory based on examples disclosed herein is shown.

[0014] Figure 7 and 8 The flowchart illustrates one or more methods for triggering a refresh of non-volatile memory based on the examples disclosed herein. Detailed Implementation

[0015] A host system can communicate with a memory system containing memory devices configured to operate over an ambient temperature range. In some cases, operating a memory device at various temperatures can produce different operating characteristics of the memory device. For example, an automotive system (e.g., a vehicle, vehicle components, vehicle processor, or controller) can operate at a variety of temperatures, including temperatures relatively higher than the nominal temperature of the memory device (e.g., extreme temperatures), which support one or more performance characteristics for the memory device. In some cases, one or more non-volatile blocks of the memory device can be programmed at extreme temperatures, for example, when the automotive system is powered on (e.g., ambient heat attributable to the engine, battery, or any other heat source in the environment of the memory device). However, programming blocks of the memory device at extreme temperatures can result in relatively unreliable data storage. In some cases, due to the difference in operating characteristics between the programming temperature and the read temperature (e.g., the read temperature after the automotive system has been powered off for an extended period of time to allow the automotive system to cool down), the memory system may fail to read the blocks accurately. Alternatively, due to such read failures, the memory device may not retain data programmed at extreme temperatures for relatively long periods of time. For example, a vehicle system may be turned on after a relatively long period of time, and the memory system may fail to refresh the non-volatile blocks of the memory device, potentially leading to data loss. In some cases, if programmed at extreme temperatures, memory devices containing memory cells configured to store more than one bit per memory cell (e.g., multi-level cell (MLC) devices, three-level cell (TLC) devices, four-level cell (QLC) devices, or any other memory capable of storing more than one bit per memory cell) may be less reliable than memory devices containing single-level cell (SLC) devices, for example, due to smaller differences in the voltage thresholds that define the different states of memory cells storing more than one bit per cell.

[0016] Systems, apparatus, and techniques for supporting the triggering of refreshes to non-volatile memory in a memory device after a power outage of an automotive system are described. Refreshing non-volatile memory after a power outage of an automotive system mitigates the adverse effects of programming non-volatile memory at extreme temperatures (e.g., temperatures above a threshold temperature of the memory device). For example, in response to a power outage of the automotive system, the host system may enter a power-off state. In some cases, in the power-off state, the host system controller may monitor one or more inputs (e.g., environmental inputs such as temperature, time, or both) to determine whether to trigger a refresh operation at the memory system, for example, while the automotive system remains power-off. The host system may detect a trigger event to refresh the memory system based on (e.g., in response to) determining that one or more inputs satisfy a corresponding trigger condition. For example, a trigger event may cause the host system controller to re-enter a power-on state and send one or more refresh commands to the memory system when the automotive system is powered off (e.g., in a parked mode), thereby providing the memory system with a way to refresh the memory device (containing memory cells programmed at extreme temperatures) as the automotive system temperature relaxes toward a nominal temperature. Therefore, the memory system can perform a refresh operation in response to a refresh command from the host system controller. For example, the host system controller can issue a command to power on the memory system, and can issue a refresh command for the memory system to perform a refresh operation on one or more memory cells if the temperature value meets a temperature threshold for refreshing the memory system, if a threshold time has elapsed for refreshing the memory system, or both. Configuring the host system to detect refresh trigger events that support non-volatile memory refresh operations can lead to improved reliability of data retention and access operations at the memory system, as well as other enhancements to the cross-temperature behavior of the host system, the memory system, or both.

[0017] Original Reference Figures 1 to 3 Features of this disclosure are described in the context of systems and apparatuses. (Refer to...) Figure 4 The features of this disclosure are further described in the context of the process flow. (See references...) Figures 5 to 8 The context of the device diagrams and flowcharts relating to triggering refreshes of nonvolatile memory is further illustrated, and these and other features of this disclosure are described in the context of the device diagrams and flowcharts.

[0018] Figure 1 This describes an instance of system 100 that triggers a refresh of non-volatile memory based on the examples disclosed herein. System 100 includes a host system 105 coupled to memory system 110.

[0019] The memory system 110 may be or include any device or collection of devices, wherein the device or collection of devices includes at least one memory array. For example, the memory system 110 may be or include a Universal Flash Storage (UFS) device, an Embedded Multimedia Controller (eMMC) device, a flash device, a Universal Serial Bus (USB) flash device, a Secure Digital (SD) card, a Solid State Drive (SSD), a Hard Disk Drive (HDD), a Dual In-line Memory Module (DIMM), a Small Form-factor DIMM (SO-DIMM), or a Non-volatile DIMM (NVDIMM), and other possibilities.

[0020] System 100 may be included in a computing device, such as a desktop computer, laptop computer, web server, mobile device, vehicle (e.g., airplane, drone, train, car or other means of transport), device with Internet of Things (IoT) capabilities, embedded computer (e.g., embedded computer included in a vehicle, industrial equipment or networked business device), or any other computing device that includes memory and processing devices.

[0021] System 100 may include a host system 105 that can be coupled to a memory system 110. In some instances, this coupling may include an interface to a host system controller 106, which may be an instance of a controller or control component configured to cause the host system 105 to perform various operations as described herein. The host system 105 may include one or more devices, and in some cases, may include a processor chipset and a software stack executed by the processor chipset. For example, the host system 105 may include an application configured to communicate with the memory system 110 or devices therein. The processor chipset may include one or more cores, one or more caches (e.g., memory native to the host system 105 or included in the host system 105), a memory controller (e.g., an NVDIMM controller), and a storage protocol controller (e.g., a Peripheral Component Interconnect High Speed ​​(PCIe) controller, a Serial Advanced Technology Attachment (SATA) controller). The host system 105 may use the memory system 110, for example, to write data to and read data from the memory system 110. Although Figure 1 The diagram shows a memory system 110, but the host system 105 can be coupled to any number of memory systems 110.

[0022] Host system 105 may be coupled to memory system 110 via at least one physical host interface. In some cases, host system 105 and memory system 110 may be configured to communicate via the physical host interface using associated protocols (e.g., to exchange or otherwise convey control, address, data, and other signals between memory system 110 and host system 105). Examples of physical host interfaces may include, but are not limited to, SATA interfaces, UFS interfaces, eMMC interfaces, PCIe interfaces, USB interfaces, Fibre Channel interfaces, Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), Dual Data Rate (DDR) interfaces, DIMM interfaces (e.g., DDR-enabled DIMM sockets), Open NAND Flash Interface (ONFI), and Low Power Dual Data Rate (LPDDR) interfaces. In some instances, one or more of these interfaces may be contained in or otherwise supported between host system controller 106 of host system 105 and memory system controller 115 of memory system 110. In some instances, host system 105 may be coupled to memory system 110 via a corresponding physical host interface for each memory device 130 included in memory system 110, or via a corresponding physical host interface for each type of memory device 130 included in memory system 110 (e.g., host system controller 106 may be coupled to memory system controller 115).

[0023] Memory system 110 may include memory system controller 115 and one or more memory devices 130. Memory device 130 may include one or more memory arrays of any type of memory cells (e.g., non-volatile memory cells, volatile memory cells, or any combination thereof). Although in Figure 1 The example shows two memory devices 130-a and 130-b, but the memory system 110 may contain any number of memory devices 130. Furthermore, if the memory system 110 contains more than one memory device 130, then the different memory devices 130 within the memory system 110 may contain the same or different types of memory cells.

[0024] The memory system controller 115 may be coupled to and communicate with the host system 105 (e.g., via a physical host interface) and may be an example of a controller or control component configured to cause the memory system 110 to perform various operations as described herein. The memory system controller 115 may also be coupled to and communicate with the memory device 130 to perform operations at the memory device 130 that are generally referred to as access operations, such as reading data, writing data, erasing data, or refreshing data, and other such operations. In some cases, the memory system controller 115 may receive commands from the host system 105 and communicate with one or more memory devices 130 to execute such commands (e.g., at a memory array within one or more memory devices 130). For example, the memory system controller 115 may receive commands or operations from the host system 105 and may translate these commands or operations into instructions or appropriate commands to achieve the desired access to the memory device 130. In some cases, the memory system controller 115 may exchange data with the host system 105 and one or more memory devices 130 (e.g., in response to or otherwise in conjunction with commands from the host system 105). For example, the memory system controller 115 may translate responses (e.g., data packets or other signals) associated with the memory device 130 into corresponding signals for the host system 105.

[0025] The memory system controller 115 may be configured for other operations associated with the memory device 130. For example, the memory system controller 115 may perform or manage operations such as wear leveling, garbage collection, error control operations such as error detection or error correction, encryption, caching, media management, background refresh, health monitoring, and address translation between logical addresses (e.g., logical block addresses (LBAs)) associated with commands from the host system 105 and physical addresses (e.g., physical block addresses) associated with memory cells within the memory device 130.

[0026] The memory system controller 115 may include hardware, such as one or more integrated circuits or discrete components, buffer memories, or combinations thereof. The hardware may include circuitry with dedicated (e.g., hard-decoded) logic to perform the operations attributed herein to the memory system controller 115. The memory system controller 115 may be or include a microcontroller, a dedicated logic circuitry system (e.g., a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), a digital signal processor (DSP)), or any other suitable processor or processing circuitry.

[0027] The memory system controller 115 may also include local memory 120. In some cases, local memory 120 may include read-only memory (ROM) or other memory that can store operational code (e.g., executable instructions) that can be executed by the memory system controller 115 to perform the functions attributed herein to the memory system controller 115. In some cases, local memory 120 may additionally or alternatively include static random access memory (SRAM) or other memory used by the memory system controller 115 for, for example, internal storage or operations related to the functions attributed herein to the memory system controller 115. Additionally or alternatively, local memory 120 may act as a cache for the memory system controller 115. For example, when data is read from or written to memory device 130, data may be stored in local memory 120, and said data may be available within local memory 120 for subsequent retrieval or manipulation (e.g., updating) by the host system 105 according to a caching strategy (e.g., in the case of reduced latency relative to memory device 130).

[0028] although Figure 1 The example of memory system 110 described herein includes memory system controller 115, but in some cases, memory system 110 may not include memory system controller 115. For example, memory system 110 may additionally or alternatively rely on an external controller (e.g., implemented by host system 105) or one or more local controllers 135, each located within memory device 130, to perform the functions attributed herein to memory system controller 115. Generally, one or more functions attributed herein to memory system controller 115 may, in some cases, be performed by host system 105, local controller 135, or any combination thereof. In some cases, memory device 130, at least partially managed by memory system controller 115, may be referred to as a managed memory device. An example of a managed memory device is a managed NAND (MNAND) device.

[0029] Memory device 130 may include one or more arrays of non-volatile memory cells. For example, memory device 130 may include NAND (e.g., NAND flash) memory, ROM, phase-change memory (PCM), auto-select memory, other chalcogenide-based memories, ferroelectric random access memory (RAM) (FeRAM), magnetic RAM (MRAM), NOR (e.g., NOR flash) memory, spin-transfer torque (STT)-MRAM, conductive bridged RAM (CBRAM), resistive random access memory (RRAM), oxide-based RRAM (OxRAM), electrically erasable programmable ROM (EEPROM), or any combination thereof. Alternatively or additionally, memory device 130 may include one or more arrays of volatile memory cells. For example, memory device 130 may include RAM memory cells, such as dynamic RAM (DRAM) memory cells and synchronous DRAM (SDRAM) memory cells.

[0030] In some instances, memory device 130 may include (e.g., on the same die or within the same package) a local controller 135 that can operate on one or more memory cells of the respective memory device 130. The local controller 135 may operate in conjunction with memory system controller 115, or may perform one or more functions attributed herein to memory system controller 115. For example, such as Figure 1 As described herein, memory device 130-a may include local controller 135-a, and memory device 130-b may include local controller 135-b.

[0031] In some cases, memory device 130 may be or include a NAND device (e.g., a NAND flash device). Memory device 130 may be or include a memory die 160. For example, in some cases, memory device 130 may be a package containing one or more dies 160. In some instances, die 160 may be a block of electronic-grade semiconductor diced from a wafer (e.g., a silicon die diced from a silicon wafer). Each die 160 may include one or more planes 165, and each plane 165 may include a set of corresponding blocks 170, wherein each block 170 may include a set of corresponding pages 175, and each page 175 may include a set of memory cells.

[0032] In some cases, the NAND memory device 130 may include memory cells configured to each store one bit of information, which may be referred to as SLC. Alternatively, the NAND memory device 130 may include memory cells configured to each store multiple bits of information; if configured to store two bits of information, it may be referred to as MLC; if configured to store three bits of information, it may be referred to as TLC; if configured to store four bits of information, it may be referred to as QLC, or more generally, a multilevel memory cell. Multilevel memory cells can provide greater storage density compared to SLC memory cells, but in some cases, this may involve narrower read or write margins or greater complexity for supporting circuitry. For example, such narrow read or write margins can be relatively sensitive to temperature fluctuations. That is, in some cases, the cross-temperature behavior of multilevel memory cells may be relatively worse than that of SLC memory cells.

[0033] In some cases, plane 165 may refer to a group of blocks 170, and in some cases, parallel operations may occur within different planes 165. For example, parallel operations may be performed on memory cells within different blocks 170, provided that the different blocks 170 are in different planes 165. In some cases, individual blocks 170 may be referred to as physical blocks, and virtual blocks 180 may refer to a group of blocks 170 within which parallel operations may occur. For example, parallel operations may be performed on blocks 170-a, 170-b, 170-c, and 170-d respectively within planes 165-a, 170-b, 170-c, and 170-d, and blocks 170-a, 170-b, 170-c, and 170-d may be collectively referred to as virtual blocks 180. In some cases, a virtual block may contain blocks 170 from different memory devices 130 (e.g., blocks in one or more planes including memory devices 130-a and 130-b). In some cases, blocks 170 within a virtual block may have the same block address within their respective planes 165 (e.g., block 170-a may be “block 0” of plane 165-a, block 170-b may be “block 0” of plane 165-b, etc.). In some cases, performing parallel operations in different planes 165 may be subject to one or more restrictions, such as performing parallel operations on memory cells within different pages 175 that have the same page address within their respective planes 165 (e.g., regarding command decoding, page address decoding circuitry, and other circuitry shared across planes 165).

[0034] In some cases, block 170 may contain memory cells organized into rows (page 175) and columns (e.g., strings, not shown). For example, memory cells in the same page 175 may share a common word line (e.g., coupled thereto), and memory cells in the same string may share a common digital line (which may alternatively be called a bit line) (e.g., coupled thereto).

[0035] For some NAND architectures, memory cells can be read and programmed (e.g., written) at a first granularity level (e.g., at the page granularity level), but can be erased at a second granularity level (e.g., at the block granularity level). That is, page 175 may be the smallest unit of memory (e.g., a set of memory cells) that can be independently programmed or read (e.g., programmed or read simultaneously as part of a single programming or reading operation), and block 170 may be the smallest unit of memory (e.g., a set of memory cells) that can be independently erased (e.g., erased simultaneously as part of a single erase operation). Additionally, in some cases, NAND memory cells may be erased before they can be rewritten with new data. Therefore, for example, in some cases, page 175 may not be updated until the entire block 170 containing page 175 has been erased.

[0036] In some cases, to update some data within block 170 while retaining other data within block 170, memory device 130 may copy the data to be retained to a new block 170 and write the updated data to one or more remaining pages of the new block 170. Memory device 130 (e.g., local controller 135) or memory system controller 115 may mark or otherwise represent data held in the old block 170 as invalid or obsolete, and may update the logical-to-physical (L2P) mapping table so that the logical address (e.g., LBA) of the data is associated with the new valid block 170 instead of the old invalid block 170. In some cases, such as due to latency or wear considerations, this copying and remapping may be performed instead of erasing and rewriting the entire old block 170. In some cases, one or more copies of the L2P mapping table may be stored within memory cells of memory device 130 (e.g., within one or more blocks 170 or plane 165) for use by local controller 135 or memory system controller 115 (e.g., for reference and updating).

[0037] In some cases, the memory system controller 115 or the local controller 135 may perform operations on the memory device 130 (e.g., as part of one or more media management algorithms), such as wear leveling, background refresh, garbage collection, cleanup, block scanning, health monitoring, or other operations, or any combination thereof. For example, within the memory device 130, block 170 may have some pages 175 containing valid data and some pages 175 containing invalid data. To avoid waiting for all pages 175 in block 170 to have invalid data in order to erase and reuse block 170, an algorithm called “garbage collection” may be invoked to allow block 170 to be erased and freed up as a free block for subsequent write operations. Garbage collection may refer to a set of media management operations that include, for example, selecting block 170 containing valid and invalid data, selecting pages 175 in the block containing valid data, copying the valid data from the selected pages 175 to a new location (e.g., a free page 175 in another block 170), marking the data in the previously selected pages 175 as invalid, and erasing the selected block 170. Therefore, the number of erased blocks 170 can be increased, allowing more blocks 170 to be used to store subsequent data (e.g., data subsequently received from the host system 105).

[0038] System 100 may include any number of non-transitory computer-readable media that support triggering refreshes of non-volatile memory. For example, host system 105, memory system controller 115, or memory device 130 may include or otherwise have access to one or more non-transitory computer-readable media that store instructions (e.g., firmware) for performing the functions attributed herein to host system 105, memory system controller 115, or memory device 130. For example, if executed by host system 105 (e.g., by host system controller 106), memory system controller 115, or memory device 130 (e.g., by local controller 135), such instructions may cause host system 105, memory system controller 115, or memory device 130 to perform one or more associated functions as described herein.

[0039] In some cases, memory system 110 may utilize memory system controller 115 to provide a managed memory system, which may include, for example, one or more memory arrays and associated circuitry combined with a local (e.g., on-die or in-package) controller (e.g., local controller 135). An example of a managed memory system is an MNAND system.

[0040] In some instances, memory system 110 may include memory device 130 designed or configured to operate over an ambient temperature range. In some cases, operating memory device 130 at various temperatures can result in different operating characteristics of memory device 130. In some cases, one or more blocks 170 of memory device 130 may be programmed at extreme temperatures (e.g., temperatures above or below a threshold temperature range (e.g., nominal temperature range)), for example, when the automotive system power is on. However, due to the difference in operating characteristics at the programming temperature and the read temperature, memory system 110 may be unable to read block 170. For example, if memory system 110 programs data to block 170 at a first temperature above the threshold temperature but reads the data at a second temperature below the threshold temperature, then memory system 110 may be unable to read the data. Alternatively, memory device 110 may be unable to retain data programmed at extreme temperatures for a relatively long time period (e.g., longer than the threshold duration).

[0041] In some cases, memory devices 130 that include memory cells configured to store more than one bit per memory cell (e.g., MLC devices, TLC devices, QLC devices, or any other memory device 130 or portion thereof capable of storing more than one bit per memory cell) may be relatively more affected by extreme temperatures than SLC devices due to, for example, the smaller difference in voltage thresholds defining different states of the memory cells.

[0042] In some instances, host system 105 and memory system 110 may support triggering a refresh of non-volatile memory in memory device 130 after a power outage of the vehicle system. For example, host system 105 may receive an indication that the vehicle system (e.g., the vehicle) is powered off, wherein host system 105 and memory system 110 may enter a power-off state in response to the indication. Host system 105 may detect a trigger event that switches back to a power-on state when the vehicle system is powered off, the trigger event being associated with performing a refresh operation at memory system 110. For example, the trigger event may be associated with a threshold temperature for performing the refresh operation, a threshold time for performing the refresh operation thereafter, or both. Host system 105 may enter a power-on state and transmit a power-on command to memory system 110. Memory system 110 may perform one or more refresh operations on one or more memory cells when power is turned on in response to the command and while the vehicle remains in a power-off state. Configuring host system 105 and memory system 110 to trigger a refresh of nonvolatile memory during vehicle-off states can result in higher data retention at memory system 110 and improved reliability associated with access operations, as well as other enhancements to the cross-temperature behavior of host system 105, memory system 110, or both.

[0043] Figure 2 This describes an instance of system 200 that triggers a refresh of non-volatile memory based on the examples disclosed herein. System 200 may be as described in the references. Figure 1 An example of system 100 as described in the description of the present invention. System 200 may include a memory system 210 configured to store data received from host system 205 and to send data to host system 205 if requested by host system 205 using an access command (e.g., a read command or a write command). System 200 may be implemented with reference to the present invention. Figure 1 The described aspects of system 100. For example, memory system 210 and host system 205 may be instances of memory system 110 and host system 105, respectively.

[0044] As described herein, memory system 210 may include memory device 240 for storing, for example, data transferred between memory system 210 and host system 205 in response to receiving an access command from host system 205. Memory device 240 may include, as referenced... Figure 1 The memory device 240 may include one or more memory devices as described. For example, memory device 240 may include NAND memory, MNAND memory, PCM, self-select memory, 3D cross-point, other chalcogenide-based memory, FERAM, MRAM, NOR (e.g., NOR flash) memory, STT-MRAM, CBRAM, RRAM, or OxRAM.

[0045] Memory system 210 may include a memory controller 230 for controlling the transfer of data directly to and from memory device 240, such as for storing data, retrieving data, and determining memory locations where data is to be stored and retrieved. The memory controller 230 may communicate with memory device 240 directly or via a bus (not shown) using protocols specific to each type of memory device 240. In some cases, a single memory controller 230 may be used to control multiple memory devices 240 of the same or different types. In some cases, memory system 210 may include multiple memory controllers 230, for example, different memory controllers 230 for each type of memory device 240. In some cases, the memory controller 230 may be implemented as described in the reference. Figure 1 The aspects of the local controller 135 described.

[0046] The memory system 210 may additionally include an interface 220 for communicating with the host system 205, and a buffer 225 for temporarily storing data transferred between the host system 205 and the memory device 240. The interface 220, buffer 225, and memory controller 230 can be used, for example, to convert data between the host system 205 and the memory device 240 as illustrated by the data path 250, and may be collectively referred to as the data path components.

[0047] Temporarily storing data using buffer 225 during transmission allows data to be buffered while commands are being processed, thereby reducing latency between commands and allowing for arbitrary data sizes associated with commands. This also allows for processing bursts of commands, and once the burst stops, the buffered data can be stored or emitted (or both). Buffer 225 may contain relatively fast memory (e.g., some type of volatile memory such as SRAM or DRAM), or hardware accelerators, or both, to allow for rapid storage of data into and from buffer 225. Buffer 225 may include data path switching components for bidirectional data transfer between buffer 225 and other components.

[0048] Temporary storage of data within buffer 225 refers to the storage of data in buffer 225 during the execution of an access command. That is, after the access command is completed, the associated data may no longer be maintained in buffer 225 (e.g., data may be overwritten using additional access commands). Furthermore, buffer 225 can be a non-cached buffer. That is, the host system 205 may not read data directly from buffer 225. For example, a read command can be added to a queue without requiring an address to be matched against an address already in buffer 225 (e.g., no cached address matching or lookup operation is needed).

[0049] The memory system 210 may additionally include a memory system controller 215 for executing commands received from the host system 205 and controlling data path components when moving data. The memory system controller 215 may be as described in reference... Figure 1 An example of the described memory system controller 115. Bus 235 can be used for communication between system components.

[0050] In some cases, one or more queues (e.g., command queue 260, buffer queue 265, and storage queue 270) can be used to control the processing of access commands and the movement of corresponding data. This can be advantageous, for example, if more than one access command from host system 205 is processed in parallel by memory system 210. As examples of possible implementations, command queue 260, buffer queue 265, and storage queue 270 are depicted at interface 220, memory system controller 215, and storage controller 230, respectively. However, queues (if used) can be located anywhere within memory system 210.

[0051] Data transferred between host system 205 and memory device 240 may take a different path within memory system 210 than non-data information (e.g., commands, status information). For example, system components in memory system 210 may communicate with each other using bus 235, while data may use data path 250 via data path components instead of bus 235. Memory system controller 215 may control how and whether data is transferred between host system 205 and memory device 240 by communicating with data path components via bus 235 (e.g., using a protocol specific to memory system 210).

[0052] If host system 205 issues an access command to memory system 210, then interface 220 can receive the command, for example, according to a protocol (e.g., UFS protocol or eMMC protocol). Therefore, interface 220 can be considered as the front end of memory system 210. Upon receiving each access command, interface 220 can, for example, transmit the command to memory system controller 215 via bus 235. In some cases, each command can be added to command queue 260 via interface 220 to transmit the command to memory system controller 215.

[0053] The memory system controller 215 can determine that an access command has been received from interface 220. In some cases, the memory system controller 215 can determine that the access command has been received by retrieving the command from command queue 260. After, for example, the command has been retrieved from command queue 260 by memory system controller 215, the command can be removed from command queue 260. In some cases, the memory system controller 215 can cause interface 220 to remove the command from command queue 260, for example, via bus 235.

[0054] After confirming that an access command has been received, the memory system controller 215 can execute the access command. For a read command, this may mean obtaining data from the memory device 240 and transmitting the data to the host system 205. For a write command, this may mean receiving data from the host system 205 and moving the data to the memory device 240.

[0055] In either case, the memory system controller 215 may use the buffer 225, particularly for temporary storage of data received from or sent to the host system 205. The buffer 225 may be considered an intermediate point of the memory system 210. In some cases, buffer address management (e.g., pointers to address locations in the buffer 225) may be performed by hardware (e.g., dedicated circuitry) in the interface 220, the buffer 225, or the memory controller 230.

[0056] In order to process a write command received from host system 205, memory system controller 215 may first determine whether buffer 225 has sufficient available space to store the data associated with the command. For example, memory system controller 215 may determine the amount of space available in buffer 225 to store the data associated with the write command, for example via firmware (e.g., controller firmware).

[0057] In some cases, buffer queue 265 can be used to control a stream of commands associated with data stored in buffer 225, the stream of commands including write commands. Buffer queue 265 may contain access commands associated with data currently stored in buffer 225. In some cases, commands in command queue 260 can be moved to buffer queue 265 via memory system controller 215 and can remain in buffer queue 265 while the associated data is stored in buffer 225. In some cases, each command in buffer queue 265 may be associated with an address at buffer 225. That is, a pointer indicating the location in buffer 225 that stores data associated with each command can be maintained. Using buffer queue 265, multiple access commands can be received sequentially from host system 205 and at least a portion of the access commands can be processed in parallel.

[0058] If buffer 225 has sufficient space to store the write data, memory system controller 215 may cause interface 220 to transmit an availability indication (e.g., a "ready to transfer" indication) to host system 205, for example, according to a protocol (e.g., UFS protocol or eMMC protocol). When interface 220 subsequently receives data associated with the write command from host system 205, interface 220 may use data path 250 to transfer the data to buffer 225 for temporary storage. In some cases, interface 220 may obtain the location of the data to be stored within buffer 225 from buffer 225 or buffer queue 265. Interface 220 may indicate to memory system controller 215, for example, via bus 235 whether the data transfer to buffer 225 has been completed.

[0059] Once the written data has been stored in buffer 225 via interface 220, the data can be transferred from buffer 225 and stored in memory device 240. This can be accomplished using memory controller 230. For example, memory system controller 215 can cause memory controller 230 to retrieve data from buffer 225 using data path 250 and transfer the data to memory device 240. Memory controller 230 can be considered as the back-end of memory system 210. Memory controller 230 can, for example, indicate to memory system controller 215 via bus 235 that the data transfer to memory device 240 has been completed.

[0060] In some cases, memory queue 270 can be used to assist in the transfer of write data. For example, memory system controller 215 can push write commands from buffer queue 265 (e.g., via bus 235) to memory queue 270 for processing. Memory queue 270 may contain an entry for each access command. In some instances, memory queue 270 may additionally contain: a buffer pointer (e.g., an address) indicating the location in buffer 225 where data associated with the command is stored; and a memory pointer (e.g., an address) indicating the location in memory device 240 associated with the data. In some cases, memory controller 230 can obtain the location within buffer 225 from which data is to be retrieved, either from buffer 225, buffer queue 265, or memory queue 270. Memory controller 230 can manage the locations within memory device 240 used to store data (e.g., for performing wear leveling, garbage collection, etc.). Entries can be added to memory queue 270, for example, via memory system controller 215. After the data transfer is complete, the entry can be removed from the storage queue 270, for example, by the storage controller 230 or the memory system controller 215.

[0061] In order to process a read command received from host system 205, memory system controller 215 may again first determine whether buffer 225 has sufficient available space to store the data associated with the command. For example, memory system controller 215 may determine the amount of space available in buffer 225 to store the data associated with the read command, for example via firmware (e.g., controller firmware).

[0062] In some cases, buffer queue 265 can be used to supplement buffer storage of data associated with read commands in a manner similar to that discussed above regarding write commands. For example, if buffer 225 has sufficient space to store read data, memory system controller 215 can instruct memory controller 230 to retrieve the data associated with the read command from memory device 240 and store the data in buffer 225 for temporary storage using data path 250. Memory controller 230 can, for example, instruct memory system controller 215 after completing a data transfer to buffer 225 via bus 235.

[0063] In some cases, the storage queue 270 can be used to assist in the transfer of read data. For example, the memory system controller 215 can push a read command to the storage queue 270 for processing. In some cases, the storage controller 230 can obtain the location within the memory device 240 from which data is to be retrieved from, either from the buffer 225 or the storage queue 270. In some cases, the storage controller 230 can obtain the location within the buffer 225 from the buffer queue 265. In some cases, the storage controller 230 can obtain the location within the buffer 225 from the storage queue 270. In some cases, the memory system controller 215 can move a command processed by the storage queue 270 back to the command queue 260.

[0064] Once data has been stored in buffer 225 by storage controller 230, it can be transferred from buffer 225 to host system 205. For example, storage system controller 215 can enable interface 220 to retrieve data from buffer 225 using data path 250 and transmit the data to host system 205, for example, according to a protocol (e.g., UFS protocol or eMMC protocol). For example, interface 220 can process commands from command queue 260 and can indicate to storage system controller 215, for example, via bus 235, that data transmission to host system 205 has been completed.

[0065] The memory system controller 215 can execute received commands in a sequence (e.g., according to the first-in, first-out order of the command queue 260). For each command, the memory system controller 215 can move the data corresponding to the command in and out of buffer 225, as discussed above. While the data is moved into and stored in buffer 225, the command can remain in buffer queue 265. If the processing of the command has been completed (e.g., if the data corresponding to the access command has been transferred out of buffer 225), the command can be removed from buffer queue 265, for example, by the memory system controller 215. If the command is removed from buffer queue 265, the address where the data previously associated with the command was stored can be used to store the data associated with the new command.

[0066] The memory system controller 215 may be additionally configured for operations associated with the memory device 240. For example, the memory system controller 215 may perform or manage operations such as wear leveling, garbage collection, error control operations such as error detection or error correction, encryption, caching, media management, background refresh, health monitoring, and address translation between logical addresses (e.g., logical block addresses (LBAs)) associated with commands from the host system 205 and physical addresses (e.g., physical block addresses) associated with memory cells within the memory device 240. That is, the host system 205 may issue commands indicating one or more LBAs, and the memory system controller 215 may recognize one or more physical block addresses indicated by the LBAs. In some cases, one or more consecutive LBAs may correspond to non-consecutive physical block addresses. In some cases, the memory controller 230 may be configured to perform one or more of the above operations in conjunction with or in place of the memory system controller 215. In some cases, the memory system controller 215 may perform the functions of the memory controller 230, and the memory controller 230 may be omitted.

[0067] In some instances, memory system 210 may be additionally configured to support triggering refreshes of the non-volatile memory at memory device 240, for example, thereby providing additional functionality to a power-down vehicle system (e.g., a vehicle including host system 205 and memory system 210). For example, if the vehicle system is power-down, memory system 210 may receive a power-on command from host system 205, and in some cases, a refresh command, enabling memory system 210 to perform one or more refresh operations on the memory cells of memory device 240. In some cases, memory system 210 may transmit an indication of its refresh capability to host system 205. The refresh capability may include one or more parameters that can be used by host system 205 to determine whether to initiate a refresh operation on memory system 210 (e.g., the refresh capability may determine one or more trigger conditions for refreshing the non-volatile memory). For example, refresh capability may include the duration for performing a refresh operation at memory system 210, a threshold temperature for programming data to memory system 210, a target temperature range for programming data to memory system 210, data retention capability of memory system 210, cross-temperature handling information for memory system 210, the number of memory cell levels for memory system 210, or a combination thereof. In some instances, a refresh operation associated with a refresh command may target (or may otherwise correspond to) memory cells of memory device 240 that are programmed at extreme temperatures (e.g., temperatures above or below a threshold temperature) relative to the nominal temperature range of memory device 240. For example, if the vehicle system is powered on, memory system 210 may program one or more memory cells of memory device 240 while subjected to relatively high temperatures (e.g., due to ambient heat from the engine of the vehicle system, or due to any other heat source causing extreme temperatures at memory device 240) relative to the configured temperature range (e.g., nominal temperature range) of memory device 240.

[0068] To support such refresh operations, memory system 210 may be configured to track memory cells programmed at extreme temperatures (e.g., above a threshold temperature, or otherwise outside the threshold temperature range). Therefore, memory system 210 may store a block list 275, which it can use to record which blocks of memory device 240 (e.g., non-volatile blocks) contain memory cells programmed at extreme temperatures. For example, memory system 210 may identify one or more blocks of memory device 240 that meet one or more threshold criteria. In some cases, memory system 210 may add a block identifier for each block (e.g., a QLC block or other block) that meets the threshold criteria to the block list 275 stored in memory. In some cases, the threshold criteria may include a temperature threshold, such that if a block of memory device 240 has already been programmed at a temperature that meets the temperature threshold, then memory system 210 may add the block identifier associated with the block to the block list 275. Alternatively, the threshold criteria may include the number of errors associated with a number of blocks that meet a threshold number of errors. In some cases, memory system 210 may store block list 275 in volatile memory of memory system 210, for example, in local memory of memory system controller 215 (e.g., in SRAM).

[0069] In some instances, a refresh operation at memory system 210 may be associated with moving data from a first physical address to a second physical address (e.g., to a different physical address or to the same physical address at a different temperature). For example, upon receiving a refresh command, memory system 210 may read data from one or more memory cells of memory device 240, such as data associated with a block identifier in block list 275, and memory system 210 may write the data back to a different portion of memory device 240 (e.g., different non-volatile memory resources) or the same portion. In some instances, memory system 210 may reprogram this data from a first portion of memory device 240 to a second portion when the temperature of memory system 210, memory device 240, or both meet a target temperature range. For example, in response to the vehicle system entering a power-off mode, the ambient temperature of memory system 210 may be gradually reduced (e.g., due to engine shutdown, reduced battery usage, or any other reason for reducing heat from the environment of memory system 210). Therefore, the memory system 210 can perform a refresh operation in response to a refresh command, so that the memory system 210 can reprogram data previously programmed at extreme ambient temperatures (e.g., above a threshold temperature) at a lower ambient temperature (e.g., a temperature within the nominal temperature range of the memory system 210).

[0070] In some cases, memory system 210 can be configured to perform a complete shutdown, wherein memory system 210 may transfer data from volatile memory to non-volatile memory, for example, at memory device 240. Once memory system 210 loses power by moving data to non-volatile memory (e.g., which can maintain a programmed state without power input), a complete shutdown allows memory system 210 to retain the data originally stored in volatile memory.

[0071] Memory system 210 may perform a complete shutdown before performing a refresh operation. For example, memory system 210 may receive a power-off command from host system 205. In response to receiving the power-off command, memory system 210 may identify data stored in volatile memory and program the data into non-volatile memory (e.g., memory device 240). Memory system 210 may enter a shutdown state after programming the data into non-volatile memory (or otherwise in response to programming the data into non-volatile memory). In some instances, memory system 210 may store an indication of block list 275 to refresh in non-volatile memory during a complete shutdown. If a refresh operation is triggered when the vehicle is powered off, memory system 210 may use block list 275 held in non-volatile memory to determine which blocks to refresh. Alternatively, if the memory system 210 does not maintain the block list 275 in non-volatile memory, then the memory system 210 may re-determine the block list 275 to be refreshed in response to power-on, in response to receiving a refresh command, or both. Therefore, while the vehicle containing the memory system 210 remains powered off (e.g., the vehicle remains parked), the memory system 210 may support refreshing one or more non-volatile memory blocks.

[0072] Figure 3 This describes an instance of system 300 that triggers a refresh of non-volatile memory based on the examples disclosed herein. System 300 may be as described in the references. Figure 1 and 2 Examples of the described system 100, system 200, or combinations thereof. System 300 may include a host system 305 configured to trigger a refresh operation at memory system 310 in response to an automotive system (e.g., a vehicle including system 300) entering a power-down mode.

[0073] In some instances, host system 305 may include: host system controller 315, such as as referenced Figure 1The described host system controller 106; interface 320 for communicating with memory system 310; and power controller 325 for coupling components within host system 305 to power supply 330. Power supply 330 may be an example of a battery within system 300 or an automotive system (or may utilize said battery). For example, power supply 330 may be a component of host system 305 or may be external to host system 305. Interface 320 may communicate commands, data, or both between host system 305 and memory system 310. Memory system 310 may program data into or read data from one or more memory devices 350 in response to access commands received from host system 305. Host system 305 may include bus 335 to which components within host system 305 may communicate. Alternatively or additionally, power supply 330 may provide power to one or more other components according to commands or instructions from power controller 325. For example, power supply 330 may provide power to host system controller 315, interface 320, memory system 310, or any combination thereof (e.g., using connection 340).

[0074] The host system 305 may receive an indication of a power outage to the vehicle system (e.g., shutting off the engine, switching the battery from a high-power state to a low-power state, or any other means of disconnecting the vehicle from power). In some instances, in response to receiving an indication of a power outage to the vehicle system, the host system 305 may, as described in the reference... Figure 2 The described initial memory system 310 is completely shut down. Additionally, the host system 305 can be configured to enter a power-off state in response to receiving an instruction to power off the vehicle system, for example, to conserve power in system 300. When in the power-off state, the host system 305 can support refresh operations at the memory system 310, for example, to mitigate memory cell damage caused by programming or reading memory cells at extreme temperatures. For instance, when in the power-off state, the host system 305 can operate with a relatively small amount of power (e.g., compared to the power-on state) to support monitoring of one or more trigger events for refresh operations at the initial memory system 310.

[0075] As described herein, operating a vehicle system while powered on can result in relatively high ambient temperatures (or may also be associated with a relatively wide range of ambient temperatures, including relatively high ambient operating temperatures above a threshold temperature). For example, the ambient temperature near system 300 may be relatively high due to the operation of a vehicle engine relatively close to system 300 before receiving an indication that the vehicle system is powered off. In such an instance, system 300 may program one or more memory cells of memory device 350 at relatively high temperatures (e.g., compared to the nominal programming temperature or nominal temperature range). In some cases, programming such memory cells at extreme temperatures can result in relatively unreliable data storage. For example, memory system 310 may fail to accurately read memory cells due to the difference in operating characteristics between the programming and reading temperatures. Alternatively, memory device 350 may fail to retain data programmed at extreme temperatures for a relatively long period of time due to such read failures. If data refresh is not performed when the vehicle system is powered off, the vehicle system may be turned on after a relatively long period of time, and memory system 310 may fail to refresh the non-volatile blocks of the memory device, resulting in data loss in some cases.

[0076] In some instances, the ambient temperature near system 300 may decrease in response to a power outage of the vehicle (e.g., power loss to a heat source such as the engine, battery, or any other heat source). Therefore, to improve data retention, host system 305 and memory system 310 may support refresh operations when the vehicle is powered off and when system 300 can operate at nominal temperatures (e.g., temperatures within the nominal temperature range, temperatures below a temperature threshold).

[0077] To support refresh operations while operating in a power-off state, host system 305 can be configured to receive or determine one or more inputs, such as time input 355, temperature input 360, or both, to monitor one or more trigger conditions for refresh operations. Trigger conditions may be associated with a decrease in ambient temperature. For example, host system 205 can use the inputs to determine whether system 300 operates according to operating conditions that support reliable data programming (e.g., a nominal temperature that can be used to program data with relatively high reliability). In some instances, trigger conditions may include refresh capabilities at memory system 310, such as those described in reference [reference needed]. Figure 2 The refresh capability described (or may be determined using the refresh capability elsewhere).

[0078] In a first instance, the host system controller 315 may receive a time input 355 (e.g., from a device or component external to the host system 305), and the host system controller 315 may use the time input 355 to determine whether a threshold time has elapsed since receiving an indication of vehicle power failure. For example, a component that maintains a timing mechanism (e.g., a real-time clock (RTC) or other mechanism) during vehicle power failure may determine the amount of time that has elapsed since the vehicle power failure. In this instance, the threshold time may be associated with the duration of cooling corresponding to ambient temperature (e.g., the duration of vehicle power failure associated with a predicted ambient temperature dropping to a nominal temperature within a nominal temperature range, below a temperature threshold, or both). In some cases, the time input 355 may be an absolute time value, and the host system 305 may store the absolute time value of the vehicle power failure for comparison with the time input 355. In other cases, the time input 355 may be a relative time value (e.g., the time that has elapsed since the vehicle power failure). In some instances, time-based triggering conditions may be associated with the time since the vehicle was powered off, the time since the host system 305 was powered off, the time since the memory system 310 was powered off, or any combination thereof. The host system controller 315 may receive time input 355 periodically or in response to a triggering event (e.g., if time input 355 satisfies the triggering conditions for triggering a refresh operation at memory system 310, then an external component may send time input 355 to the host system controller 315).

[0079] Alternatively, the host system controller 315 may receive a temperature input 360 (e.g., from a device or component outside the host system 305), and the host system controller 315 may use the temperature input 360 to determine whether a threshold temperature has been met (e.g., after receiving an indication of vehicle power failure). For example, a component maintaining a temperature sensing mechanism during vehicle power failure may determine a temperature value associated with system 300. The temperature value may be a temperature sensed at the host system 305, at the memory system 310, at the memory device 350, or at any other component near system 300, such that the temperature value (e.g., within a threshold difference) is similar to the operating temperature of the memory device 350 for programming data into one or more non-volatile memory blocks. The host system controller 315 may receive the temperature input 360 periodically or in response to a triggering event (e.g., if the temperature input 360 meets a triggering condition for triggering a refresh operation at the memory system 310, then an external component may send the temperature input 360 to the host system controller 315).

[0080] Alternatively or concurrently, the host system 305 may include or be additionally configured with a clock 365, a temperature sensor 370, etc., to monitor such triggering conditions. For example, instead of receiving a time input 355, a temperature input 360, or both, the host system 305 may monitor a time input (e.g., using a clock 365), a temperature input (e.g., using a temperature sensor 370), or both. In some instances, when operating in a power-off state, the host system controller 315 may use the clock 365, the temperature sensor 370, or both to receive electrical power from the power supply 330 that meets thresholds for supporting the monitoring of time, temperature, or both. The clock 365 may be an instance of or include an RTC, or the clock 365 may track the relative time between operations performed by the host system controller 315. The temperature sensor 370 may be any type of temperature sensing mechanism, such as a thermal sensor, a temperature sensing circuit, a digital temperature sensor, or any other component capable of determining a current temperature value. The host system controller 315 may use a time input 355, a temperature input 360, a clock 365, a temperature sensor 370, or any combination thereof to determine whether to trigger a refresh operation for the memory system 310. In some cases, the host system 305 may trigger a refresh operation if a threshold time has elapsed, if the current temperature measurement meets a threshold temperature (e.g., below the threshold temperature, within the nominal temperature range), or both. The host system 305 may monitor the trigger event in a power-off state and may detect the trigger event using the time input 355, temperature input 360, clock 365, temperature sensor 370, or any combination thereof.

[0081] In some instances, if the host system 305 detects a trigger event (e.g., associated with performing a refresh operation at the memory system 310), the host system 305 may switch to a power-on state in response to determining that one or more trigger conditions are met, while the vehicle remains powered off. For example, the host system 305 may determine that a threshold time has elapsed, a threshold temperature has been met, or both. Therefore, the host system 305 may enter a power-on state in response to detecting a trigger event (e.g., meeting at least one trigger condition) and may issue a command to power on the memory system 310. In other words, the host system 305 may issue a command to power on the memory system 310 based on detecting a trigger event associated with performing a refresh operation at the memory system 310.

[0082] In some instances, the host system 305 can determine whether it is powered on because the vehicle is energized or because a trigger event for a refresh operation is met (e.g., when the vehicle is powered off). In some cases, the host system 305, memory system 310, or both may be powered on to a relatively low-power mode compared to a full-power mode when powered on due to a trigger event for a refresh operation. For example, if the host system 305 and memory system 310 are powered on to perform a refresh operation, then the power supply 330 may provide a relatively lower power to the host system 305, memory system 310, or both compared to the power provided during normal operation (e.g., when the vehicle is in motion). The relatively lower power may at least support refresh operations at the memory system 310. In some cases, the host system controller 315 may use a trigger event signal (e.g., from the power controller 325) to determine whether the host system 305 is powered on when the vehicle is parked. In some cases, the host system 305 may avoid performing the boot process and instead trigger a refresh command to be issued to the memory system 310 in response to a trigger event signal. In other cases, the host system 305 may perform the boot process and respond to the trigger event signal (e.g., issue a refresh command) after the boot process is complete. The host system 305, the memory system 310, or both may determine which refresh operations to perform based on the time input 355, the temperature input 360, the clock 365, the temperature sensor 370, or any combination thereof.

[0083] In some cases, host system 305 may allow memory system 310 to determine whether to refresh memory cells at memory system 310, for example, based on (e.g., in response to) memory system 310 determining that a threshold idle time has been met (e.g., as part of a startup procedure or otherwise). For example, memory system 310 may enter a power-on state in response to a power-on command from host system 305. After the threshold idle time of power-on, memory system 310 may determine to perform a refresh operation (e.g., according to one or more refresh criteria or parameters at memory system 310). That is, memory system 310 may internally trigger a refresh operation after the idle threshold duration. In some other cases, host system 305 may, for example, issue a refresh command to memory system 310 in response to determining that one or more trigger conditions are met (e.g., detecting a trigger event associated with executing a refresh command at memory system 310). Host system 305 may send the refresh command to memory system 310 (e.g., using interface 320), and memory system 310 may perform a refresh operation in response to the refresh command.

[0084] In some instances, host system 305 may issue a command to power off memory system 310 at a threshold time following the issuance of a command to power on memory system 310. The threshold time may correspond to an idle time for triggering a refresh operation at memory system 310, a duration for performing a refresh operation at memory system 310, or both. For example, host system 305 may issue a command to power off memory system 310 after a threshold time period during which memory system 310 may refresh one or more memory cells, for example, as referenced. Figure 2 The memory units within the block list described.

[0085] By supporting refresh triggering as described herein, host system 305 can support performing refresh operations at memory system 310 during periods when the vehicle, including host system 305 and memory system 310, is powered off. Therefore, if the vehicle is parked for an extended period (e.g., longer than a threshold time during which memory cells in memory system 310 may fail to maintain their state), host system 305 can continue to manage memory system 310 and refresh data (e.g., once, periodically, or intermittently) during that duration to support data retention at memory devices 350 of memory system 310.

[0086] Figure 4 This describes an example of a process flow 400 that triggers a refresh of non-volatile memory based on the examples disclosed herein. The operation of process flow 400 can be implemented by a host system, memory system, automotive system, or a component thereof as described herein. For example, the operation of process flow 400 can be implemented by, for instance, a system described in the references... Figures 1 to 3 The system described performs as follows. The host system can initiate a refresh operation at the memory system in response to a triggering event when the automotive system is powered off, allowing one or more units programmed at extreme temperatures to be reprogrammed at relatively low temperatures (e.g., compared to such extreme temperatures). Alternative instances of the following can be implemented, where some steps are performed in a different order or not at all. Additionally, some steps may include extra features not mentioned below.

[0087] Aspects of process flow 400 may be implemented by a controller and other components (e.g., a host system controller, a memory system controller, or an MNAND die for a memory device). Alternatively, aspects of process flow 400 may be implemented as instructions stored in memory (e.g., firmware stored in memory coupled to the memory device). For example, if the instructions are executed by a controller (e.g., a host system controller), then the controller may perform the operation of process flow 400.

[0088] At position 405, refresh capability can be received. For example, the memory system can transmit an indication of its refresh capability to the host system. The host system and memory system can be associated with a vehicle (e.g., a vehicle system including the host system and memory system). In some instances, the memory system can send the refresh capability indication as part of the startup procedure. In some cases, a triggering event (e.g., satisfying a condition as described in reference...) Figure 3 The described triggering conditions may be associated with refresh capabilities. Refresh capabilities may be as shown in the reference. Figure 2 An instance of one or more of the described refresh capabilities.

[0089] At 410, a power failure indication can be received. For example, the host system can receive a power failure indication from the vehicle (e.g., an automotive system that includes a host system and a memory system).

[0090] At point 415, a power-off instruction can be transmitted. For example, the host system can transmit a command to power off the memory system based on (e.g., in response to) receiving an instruction to power off the vehicle at point 410. The memory system can then perform a complete shutdown procedure in response to the power-off command.

[0091] At 420, the power can be switched off. For example, the host system can switch off based on (e.g., in response to receiving) an instruction to power off the vehicle at 410.

[0092] In some instances, at 425, time, temperature, or both can be detected. For example, the host system may be equipped with a temperature sensor that can detect the current temperature associated with the host system, memory system, or both. Alternatively, the host system may be configured to maintain an RTC, and the host system may use the RTC to determine the amount of time elapsed since receiving an indication of vehicle power failure. In some instances, at 430, indications of threshold time, threshold temperature, etc., can be received. For example, the host system may receive indications that a threshold time has elapsed since vehicle power failure, that the temperature meets a temperature threshold, or both (e.g., from reference...). Figure 3 (Described external components).

[0093] At 435, it is determined whether a trigger event for switching to a power-on state has been detected. For example, a system (e.g., including a vehicle system, a host system, a memory system, or any combination thereof) may detect a trigger event that switches the host system to a power-on state when the vehicle is powered off. This trigger event may be associated with performing a refresh operation at the memory system. In some instances, the host system may receive an indication that a threshold time has elapsed, a temperature threshold has been met, or both, wherein the trigger event is detected in response to receiving the indication. In some instances, the host system may determine whether a threshold temperature, threshold time, etc., has been met. For example, the host system may use a time detected at 425 or an indication received at 430 to determine whether a threshold time has elapsed after receiving the indication at 410, or a temperature detected at 425 or an indication received at 430 to determine whether a threshold temperature has been met, or a combination thereof. If the host system determines that the threshold time, threshold temperature, or both have not been met, then the host system may continue to monitor the trigger event, for example, by detecting time, temperature, or both at 425, or receiving one or more additional indications or both at 430.

[0094] In some cases, the host system may use machine learning, heuristics, or other techniques to determine one or more refresh criteria for the memory system using inputs such as environmental factors, temperature changes, temperature thresholds, RTC inputs, event logs, operational lifetime, driver usage history data, or any combination thereof. The host system may use such techniques to determine one or more triggering conditions for initiating a refresh operation. Triggering a refresh operation may additionally involve triggering a power-on state switch of the host system, memory system, or both, such that the memory system receives sufficient electrical power to perform the triggered refresh operation.

[0095] If a trigger event for switching to the power-on state is detected, the power-on state can be entered at 440. For example, the event could trigger a power-on operation at the host system when the vehicle system is parked. The vehicle system can then supply power to the host system and memory system in response to the detection of the trigger event at 435. The host system can then use the supplied power to enter the power-on state.

[0096] At 445, a command to power on the memory system can be issued. For example, the host system can issue a command to power on the memory system based on (e.g., in response to) detecting a trigger event at 435 and based on the host system's operation in a power-on state. To support powering on the memory system, the host system can be configured to, for example, use, as referenced... Figure 3The described power controller, power supply, etc., control the voltage applied to the memory system. In some cases, power can be supplied to the memory system via a system that supplies power to the host system and commands that turn on the power to the memory system.

[0097] In some instances, a refresh command may be issued at 450. For example, the host system may issue a refresh command to the memory system in response to detecting a trigger event at 435. Alternatively, for example, if the idle time of the memory system meets a threshold idle time after power is supplied to the memory system, the host system may allow the memory system to autonomously determine to refresh memory cells of the memory system. The memory system may perform a refresh operation in response to a refresh command or in response to determining that the idle time of the memory system meets the threshold idle time. In some instances, the system may perform a refresh operation on one or more non-volatile first blocks of the memory system when the vehicle is powered off and when power is supplied to the host system and the memory system. In such instances, the refresh operation may involve reprogramming data from one or more non-volatile first blocks to one or more non-volatile second blocks of the memory system (e.g., the same block or different blocks).

[0098] At position 455, a command to power off the memory system can be issued. For example, the host system can issue the command to power off the memory system after the memory system performs a refresh operation. In some instances, the host system can issue a command to power off the memory system for a threshold time after issuing the refresh command, after a threshold time associated with refreshing memory cells, or in response to any other triggering event that powers off the memory system. In some other instances, the memory system can send an indication that the refresh operation is complete to the host system, and the host system can issue a command to power off the memory system in response to the indication that the refresh operation is complete. The memory system can re-enter a power-off state in response to the command. Alternatively, the host system can re-enter a power-off state after issuing the command.

[0099] If the vehicle re-enters the on state, the host system can receive an indication that the vehicle is powered on. The temperature difference between the vehicle being off and on can be significant (e.g., greater than a threshold difference). However, due to the refresh operation performed when the vehicle is off, the memory system can mitigate the adverse effects of cross-temperature access operations against this temperature difference, as the data is reprogrammed at one or more temperatures closer to the temperature at which the vehicle was on. In other words, the host system can trigger a refresh event for the memory system using environmental input while the vehicle (e.g., a vehicle system including both the host system and the memory system) is parked.

[0100] Figure 5A block diagram 500 illustrates a host system 520 that supports triggering a refresh of non-volatile memory according to an example disclosed herein. The host system 520 may be as described in the reference... Figures 1 to 4 Examples of aspects of the described host system. The host system 520 or its various components may be examples of means for performing various aspects of triggering a refresh of non-volatile memory as described herein. For example, the host system 520 may include a power indicator receiver 525, a power manager 530, a trigger event detection component 535, a power indicator transmitter 540, a refresh command transmitter 545, a capability receiver 550, a trigger event determination component 555, a clock component 560, a temperature component 565, or any combination thereof. Each of these components may communicate with each other directly or indirectly (e.g., via one or more buses). The host system 520 may include a controller configured to couple to a memory system associated with a vehicle, wherein the controller may be configured to cause the host system 520 to perform one or more operations as described herein. The vehicle may include the host system 520 and the memory system.

[0101] The power indicator receiver 525 may be configured or otherwise supported to receive an indication of vehicle power failure. The power manager 530 may be configured or otherwise supported to enter a power-off state at least in part based on (e.g., in response to) an indication of vehicle power failure. The trigger event detection component 535 may be configured or otherwise supported to detect a trigger event for switching to a power-on state when the vehicle is powered off and in a power-off state, the trigger event being associated with performing a refresh operation at a memory system associated with the vehicle. In some instances, the power manager 530 may be configured or otherwise supported to enter a power-on state based on (e.g., in response to) detecting a trigger event. The power indicator transmitter 540 may be configured or otherwise supported to transmit a command to the memory system to power on the memory system when the vehicle is powered off and in a power-on state, based on (e.g., in response to) a trigger event associated with performing a refresh operation at the memory system.

[0102] In some instances, the power indicator transmitter 540 may be configured or otherwise supported to transmit a command to the memory system to power off the memory system based on (e.g., in response to) a threshold time elapsed after transmitting a command to power on the memory system, the threshold time corresponding to an idle time for triggering a refresh operation at the memory system, the duration for performing a refresh operation at the memory system, or both.

[0103] In some instances, refresh command transmitter 545 may be configured or otherwise supported to send a refresh command to the memory system based on (e.g., in response to) detecting a trigger event associated with performing a refresh operation at the memory system, and after sending a command to power on the memory system.

[0104] In some instances, the trigger event determination component 555 may be configured or otherwise supported for determining whether a trigger event is based on (e.g., in response to) vehicle power-on or associated with performing a refresh operation at the memory system, wherein issuing a refresh command is based on (e.g., in response to) determining that the trigger is associated with performing a refresh operation at the memory system.

[0105] In some instances, the power indicator transmitter 540 may be configured or otherwise support means for transmitting a command to the memory system to shut down the power of the memory system based on (e.g., in response to) a threshold time elapsed after the transmission of a refresh command, the threshold time corresponding to the duration for performing a refresh operation at the memory system.

[0106] In some instances, to support the detection of trigger events, the trigger event detection component 535 may be configured or otherwise supported to support means for determining whether a threshold time has elapsed after receiving an indication of vehicle power failure, wherein the trigger event is detected based on (e.g., in response to) determining that a threshold time has elapsed after receiving an indication of vehicle power failure.

[0107] In some instances, the clock component 560 may be configured or otherwise support means for maintaining the RTC, wherein determining whether a threshold time has elapsed after receiving an indication of vehicle power failure is based on (e.g., referenced to or otherwise used) the RTC.

[0108] In some instances, the trigger event detection component 535 may be configured or otherwise supported for means of determining whether a temperature meets a threshold temperature, wherein a trigger event is detected based on (e.g., in response to) determining that the temperature meets the threshold temperature. In some instances, the temperature component 565 may be configured or otherwise supported for means of detecting temperature using a temperature sensor.

[0109] In some instances, the trigger event detection component 535 may be configured or otherwise supported for receiving indications that a threshold time has elapsed since the vehicle was powered off, that the temperature meets a temperature threshold, or both, wherein the trigger event is detected based on (e.g., in response to) receiving the indication that the threshold time has elapsed, the temperature meets a temperature threshold, or both.

[0110] In some instances, the power indication transmitter 540 may be configured or otherwise supported to transmit a command to the memory system to shut down the memory system based on (e.g., in response to) an indication of a vehicle power failure, wherein a command to turn on the memory system is transmitted based on (e.g., in response to) a power failure of the memory system.

[0111] In some instances, the capability receiver 550 may be configured or otherwise supported for means of receiving refresh capabilities of the memory system from the memory system before entering a power-off state. In some instances, a triggering event may be further associated with the refresh capability. In some instances, the refresh capability may include a threshold duration between refresh operations of the memory system, a duration for performing a refresh operation at the memory system, a threshold temperature for programming data to the memory system, a target temperature range for programming data to the memory system, data retention capabilities of the memory system, cross-temperature handling information for the memory system, the type of memory cells contained in the memory system, or any combination thereof.

[0112] In some instances, the power manager 530 may be configured or otherwise supported for means of controlling the voltage applied to the memory system based on (e.g., in response to) detecting a trigger event associated with performing a refresh operation at the memory system.

[0113] In some instances, a refresh operation corresponds to one or more Level 4 Memory Cells (QLCs) of the memory system. In some instances, the memory system is configured to reprogram data from one or more first blocks corresponding to one or more QLCs to one or more second blocks corresponding to one or more QLCs when the temperature associated with the memory system meets a target temperature range, based on (e.g., in response to detecting) a trigger event associated with performing a refresh operation at the memory system, by issuing a command to power on the memory system.

[0114] Figure 6 A block diagram 600 illustrates a vehicle system 620 that supports triggering a refresh of non-volatile memory according to an example disclosed herein. The vehicle system 620 may be as described in the references... Figures 1 to 4Examples of aspects of the described vehicle, vehicle system, or automobile system. Vehicle system 620 or its various components may be examples of means for performing various aspects of triggering a refresh of non-volatile memory as described herein. For example, vehicle system 620 may include a trigger detection manager 625, a power controller 630, a refresh operation manager 635, an idle time manager 640, a command transmitter 645, a block list manager 650, or any combination thereof. Each of these components may communicate with each other directly or indirectly (e.g., via one or more buses). The vehicle system may include a host system configured to couple with a memory system associated with the vehicle (e.g., the vehicle system). The vehicle system may further include a controller associated with the host system and the memory system, wherein the controller may be configured to cause the vehicle system to perform one or more operations as described herein.

[0115] The trigger event detection manager 625 may be configured or otherwise supported to support means for detecting trigger events that switch the host system for the memory system to a power-on state when the vehicle is powered off, the trigger events being associated with performing a refresh operation at the memory system. The power controller 630 may be configured or otherwise supported to support means for providing power to the host system and memory system based on (e.g., in response to) the detection of a trigger event. The refresh operation manager 635 may be configured or otherwise supported to perform a refresh operation on one or more non-volatile first blocks of the memory system when the vehicle is powered off and based on (e.g., in response to) the provision of power to the host system and memory system, the refresh operation including reprogramming data from one or more non-volatile first blocks of the memory system to one or more non-volatile second blocks of the memory system.

[0116] In some instances, the idle time manager 640 may be configured or otherwise supported to provide means for determining whether the idle time of the memory system meets a threshold idle time after power has been supplied to the memory system, wherein performing a refresh operation is based on (e.g., in response to) determining that the idle time of the memory system meets the threshold idle time.

[0117] In some instances, command transmitter 645 may be configured or otherwise supported to publish refresh commands from the host system to the memory system based on (e.g., in response to) detecting a trigger event associated with performing a refresh operation at the memory system, wherein performing the refresh operation is based on (e.g., in response to) the refresh command.

[0118] In some instances, the block list manager 650 may be configured or otherwise supported for means of storing a list of non-volatile memory blocks at the memory system, wherein the list of non-volatile memory blocks indicates one or more non-volatile first blocks of the memory system refreshed during a refresh operation.

[0119] In some instances, the block list manager 650 may be configured or otherwise support means for adding a block identifier to the list of nonvolatile memory blocks based on (e.g., according to) programming of a nonvolatile memory block corresponding to a block identifier at a temperature that meets a threshold temperature, the number of errors detected for a nonvolatile memory block corresponding to a block identifier that meets a threshold number of errors, or both.

[0120] In some instances, the trigger event detection manager 625 may be configured or otherwise supported to determine whether a threshold time has elapsed since receiving an indication of vehicle power failure, whether the temperature meets a temperature threshold, or both, wherein the trigger event is detected based on (e.g., in response to) determining that a threshold time has elapsed since receiving an indication of vehicle power failure, whether the temperature meets a temperature threshold, or both.

[0121] In some instances, the trigger event detection manager 625 may be configured or otherwise supported to receive indications that a threshold time has elapsed since the vehicle was powered off, that the temperature meets a temperature threshold, or both, wherein a trigger event is detected based on (e.g., in response to) receiving the indication.

[0122] In some instances, command transmitter 645 may be configured or otherwise support means for issuing a command to power on the memory system from the host system to the memory system, wherein providing power to the memory system is based on (e.g., in response to) providing power to the host system and providing a command to power on the memory system.

[0123] Figure 7 The flowchart illustrates a method 700 for triggering a refresh of non-volatile memory based on the examples disclosed herein. The operation of method 700 can be implemented by a host system or its components as described herein. For example, the operation of method 700 can be implemented by, as referenced... Figures 1 to 5 The described host system performs the function. In some instances, the host system may execute a set of instructions to control the functional elements of the device to perform the described function. Alternatively, the host system may use dedicated hardware to perform aspects of the described function.

[0124] At 705, the method may include receiving an indication that the vehicle is powered off. The operation at 705 may be performed according to examples disclosed herein. In some instances, it may be performed by, as referenced... Figure 5 The described power indicator receiver 525 performs the operation of 705.

[0125] At 710, the method may include entering a power-off state based on (e.g., in response to) an indication of vehicle power failure. The operation of 710 may be performed according to examples disclosed herein. In some instances, it may be performed by, as referenced... Figure 5 The power manager 530 described performs the operation of 710.

[0126] At 715, the method may include detecting a trigger event for switching to a power-on state when the vehicle is powered off and is in a power-off state, the trigger event being associated with performing a refresh operation at a memory system associated with the vehicle. The operation at 715 may be performed according to examples disclosed herein. In some instances, it may be performed via, as referenced... Figure 5 The described aspect of triggering event detection component 535 to perform the operation of 715.

[0127] At 720, the method may include entering a power-on state based on (e.g., in response to) detecting a trigger event. The operation at 720 may be performed according to examples disclosed herein. In some instances, it may be performed by, as referenced... Figure 5 The power manager 530 described performs the operations of 720.

[0128] At 725, the method may include, when the vehicle is powered off and when it is powered on, sending a command to the memory system to power on the memory system based on (e.g., in response to detecting) a trigger event associated with performing a refresh operation at the memory system. The operation at 725 may be performed according to examples disclosed herein. In some instances, it may be performed by, as referenced... Figure 5 The described aspect of the operation of the power indicator transmitter 540 is to perform 725.

[0129] In some instances, the device as described herein may perform one or more methods, such as method 700. The device may include features, circuitry, logic, means, or instructions (e.g., a non-transitory computer-readable medium storing instructions executable by a processor) for performing the following operations: receiving an indication that the vehicle is powered off; entering a power-off state based on (e.g., in response to) the indication that the vehicle is powered off; detecting a trigger event for switching to a power-on state when the vehicle is powered off and when in the power-off state, the trigger event being associated with performing a refresh operation at a memory system associated with the vehicle; entering a power-on state based on (e.g., in response to) detecting the trigger event; and transmitting a command to power on the memory system based on (e.g., in response to detecting) the trigger event associated with performing a refresh operation at the memory system when the vehicle is powered off and when in the power-on state.

[0130] Method 700 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for sending a command to power off the memory system based on (e.g., in response to) a threshold time elapsed after a command to power on the memory system is sent, the threshold time corresponding to an idle time for triggering a refresh operation at the memory system, the duration for performing the refresh operation at the memory system, or both.

[0131] Method 700 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for issuing a refresh command to the memory system based on (e.g., in response to) detecting a trigger event associated with performing a refresh operation at the memory system, and after issuing a command to power on the memory system.

[0132] Method 700 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for determining whether a triggering event is based on (e.g., in response to) vehicle power-on or is associated with performing a refresh operation at the memory system, wherein issuing a refresh command may be based on (e.g., in response to) determining that the triggering event is associated with performing a refresh operation at the memory system.

[0133] Method 700 and some examples of the devices described herein may further include operations, features, circuitry, logic, means, or instructions for transmitting a command to the memory system to power off the memory system based on (e.g., in response to) a threshold time elapsed after the transmission of a refresh command, and after the transmission of the refresh command, the threshold time corresponding to the duration for performing the refresh operation at the memory system.

[0134] In some instances of method 700 and the apparatus described herein, the operation, feature, circuit, logic, means, or instruction for detecting a triggering event may include an operation, feature, circuit, logic, means, or instruction for determining whether a threshold time has elapsed after receiving an indication of vehicle power failure, wherein the triggering event may be detected based on (e.g., in response to) determining that a threshold time has elapsed after receiving an indication of vehicle power failure.

[0135] Method 700 and some examples of the devices described herein may further include features, circuitry, logic, means, or instructions for maintaining the operation of the RTC, wherein it may be determined, for example, based on (referencing) the RTC, whether a threshold time has elapsed after receiving an indication of vehicle power failure.

[0136] Method 700 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for determining whether a temperature meets a threshold temperature, wherein a triggering event may be detected based on (e.g., in response to) determining that the temperature meets the threshold temperature.

[0137] Method 700 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for detecting temperature using a temperature sensor.

[0138] Method 700 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for receiving indications that a threshold time has elapsed after a vehicle power failure, that the temperature meets a temperature threshold, or both, wherein a triggering event is detected based on (e.g., in response to) receiving an indication that a threshold time has elapsed, that the temperature meets a temperature threshold, or both.

[0139] Method 700 and some examples of the devices described herein may further include issuing a command to the memory system to power off the memory system based on (e.g., in response to) an indication of power off the vehicle, wherein a command to power on the memory system may be issued based on (e.g., in response to) a power off of the memory system.

[0140] Method 700 and some examples of the devices described herein may further include operations, features, circuitry, logic, means, or instructions for receiving a refresh capability of the memory system from the memory system before entering a power-off state, wherein a triggering event may be further associated with the refresh capability, and the refresh capability includes a threshold duration between refresh operations of the memory system, a duration for performing a refresh operation at the memory system, a threshold temperature for programming data to the memory system, a target temperature range for programming data to the memory system, data retention capability of the memory system, cross-temperature handling information for the memory system, the type of memory cells contained in the memory system, or any combination thereof.

[0141] Method 700 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for controlling the voltage applied to the memory system based on (e.g., in response to) detecting a trigger event associated with performing a refresh operation at the memory system.

[0142] In some instances of method 700 and the device described herein, the refresh operation corresponds to one or more four-level memory cells of the memory system, and the memory system is configured to reprogram data from one or more first blocks corresponding to one or more four-level memory cells to one or more second blocks corresponding to one or more four-level memory cells when the temperature associated with the memory system meets a target temperature range, based on (e.g., in response to detection) a trigger event associated with performing the refresh operation at the memory system.

[0143] Figure 8 The flowchart illustrates a method 800 for triggering a refresh of non-volatile memory based on the examples disclosed herein. The operation of method 800 can be implemented by a vehicle system or its components as described herein. For example, the operation of method 800 can be implemented by, as referenced... Figures 1 to 4 The vehicle system described in section 6 performs the functions described herein. In some instances, the vehicle system may execute a set of instructions to control the functional elements of the device to perform the described functions. Alternatively, the vehicle system may use dedicated hardware to perform aspects of the described functions.

[0144] At 805, the method may include detecting a trigger event that switches the host system for the memory system to a power-on state when the vehicle is powered off, the trigger event being associated with performing a refresh operation at the memory system. The operation at 805 may be performed according to examples disclosed herein. In some instances, it may be performed by, as referenced... Figure 6 The described aspect of the trigger event detection manager 625 performing operation 805.

[0145] At 810, the method may include providing power to the host system and memory system based on (e.g., in response to) detecting a trigger event. The operation of 810 may be performed according to examples disclosed herein. In some instances, it may be performed by, as referenced... Figure 6 The described power controller 630 performs the operation of 810.

[0146] At 815, the method may include performing a refresh operation on one or more non-volatile first blocks of the memory system when the vehicle is powered off and based on (e.g., in response to) providing power to the host system and the memory system, the refresh operation including reprogramming data from one or more non-volatile first blocks of the memory system to one or more non-volatile second blocks of the memory system. The operation at 815 may be performed according to examples disclosed herein. In some instances, it may be performed by, as referenced... Figure 6 The refresh operation manager 635 describes aspects of the operation performed by 815.

[0147] In some instances, the device as described herein may perform one or more methods, such as method 800. The device may include features, circuitry, logic, means, or instructions (e.g., a non-transitory computer-readable medium storing instructions executable by a processor) for performing the following: detecting a trigger event that switches a host system for the memory system to a power-on state when the vehicle is powered off, the trigger event being associated with performing a refresh operation at the memory system; providing power to the host system and the memory system based on (e.g., in response to) detecting the trigger event; and performing a refresh operation on one or more non-volatile first blocks of the memory system when the vehicle is powered off and based on (e.g., in response to) providing power to the host system and the memory system, the refresh operation comprising reprogramming data from one or more non-volatile first blocks of the memory system to one or more non-volatile second blocks of the memory system.

[0148] Method 800 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for determining whether the idle time of the memory system meets a threshold idle time after power is supplied to the memory system, wherein performing a refresh operation may be based on (e.g., in response to) determining that the idle time of the memory system meets the threshold idle time.

[0149] Method 800 and some instances of the devices described herein may further include operations, features, circuits, logic, means, or instructions for issuing a refresh command from the host system to the memory system based on (e.g., in response to) detecting a triggering event associated with performing a refresh operation at the memory system, wherein performing the refresh operation may be based on (e.g., in response to) the refresh command.

[0150] Method 800 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for storing a list of non-volatile memory blocks at a memory system, wherein the list of non-volatile memory blocks indicates one or more non-volatile first blocks of the memory system refreshed during a refresh operation.

[0151] Method 800 and some instances of the device described herein may further include operations, features, circuits, logic, means, or instructions for adding a block identifier to a list of non-volatile memory blocks based on (e.g., according to) programming of a non-volatile memory block corresponding to a block identifier at a temperature that meets a threshold temperature, detecting a number of errors that meet a threshold number of errors for a non-volatile memory block corresponding to a block identifier, or both.

[0152] Method 800 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for determining whether a threshold time has elapsed after receiving an indication of vehicle power failure, whether the temperature meets a temperature threshold, or both, wherein a triggering event may be detected based on (e.g., in response to) determining that a threshold time has elapsed after receiving an indication of vehicle power failure, whether the temperature meets a temperature threshold, or both.

[0153] Method 800 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for receiving an indication that a threshold time has elapsed after a power outage of the vehicle, that the temperature meets a temperature threshold, or both, wherein a triggering event may be detected based on (e.g., in response to) receiving the indication.

[0154] Method 800 and some examples of the devices described herein may further include operations, features, circuits, logic, means, or instructions for issuing a command to power on the memory system from the host system to the memory system, wherein power may be provided to the memory system based on (e.g., in response to) providing power to the host system and providing a command to power on the memory system.

[0155] It should be noted that the methods described above describe possible implementations, and the operations and steps can be rearranged or otherwise modified, and other implementations are possible. Furthermore, portions from two or more of the methods described may be combined.

[0156] Describe a device. An overview of aspects of the device as described herein is provided below:

[0157] Aspect 1: An apparatus comprising: a controller configured to couple with a memory system associated with a vehicle, wherein the controller is configured to cause the apparatus to: receive an indication of vehicle power failure; enter a power-off state at least in part based on the indication of vehicle power failure; detect, while the vehicle is powered off and while in the power-off state, a trigger event for switching to a power-on state, the trigger event being associated with performing a refresh operation at the memory system associated with the vehicle; enter a power-on state at least in part based on the detection of the trigger event; and, while the vehicle is powered off and while in the power-on state, transmit a command to the memory system to power on the memory system at least in part based on the trigger event associated with performing a refresh operation at the memory system.

[0158] Aspect 2: The device according to Aspect 1, wherein the controller is further configured to cause the device to perform the following operation: at least in part based on a threshold time elapsed after a command to power on the memory system is transmitted to the memory system, the threshold time corresponding to an idle time for triggering a refresh operation at the memory system, a duration for performing a refresh operation at the memory system, or both.

[0159] Aspect 3: The device according to any one of Aspects 1 to 2, wherein the controller is further configured to cause the device to: send a refresh command to the memory system based at least in part on detecting a trigger event associated with performing a refresh operation at the memory system, and after sending a command to power on the memory system.

[0160] Aspect 4: The device according to aspect 3, wherein the controller is further configured to cause the device to: determine whether the triggering event is at least partially based on vehicle power-on or associated with performing a refresh operation at the memory system, wherein the refresh command is issued at least partially based on determining that the triggering event is associated with performing a refresh operation at the memory system.

[0161] Aspect 5: The device according to any one of Aspects 3 to 4, wherein the controller is further configured to cause the device to: transmit a command to power off the memory system based at least in part on a threshold time elapsed after the transmission of a refresh command, wherein the threshold time corresponds to the duration for performing a refresh operation at the memory system after the transmission of the refresh command.

[0162] Aspect 6: The device according to any one of Aspects 1 to 5, wherein, in order to detect a triggering event, the controller is configured to cause the device to: determine whether a threshold time has elapsed after receiving an indication of vehicle power failure, wherein the triggering event is detected at least in part based on the determination that a threshold time has elapsed after receiving an indication of vehicle power failure.

[0163] Aspect 7: The device according to aspect 6, wherein the controller is further configured to cause the device to perform the following operation: maintain a real-time clock, wherein determining whether a threshold time has elapsed after receiving an indication of vehicle power failure is at least partially based on the real-time clock.

[0164] Aspect 8: The device according to any one of Aspects # to #, wherein the controller is further configured to cause the device to: determine whether the temperature meets a threshold temperature, wherein a trigger event is detected based at least in part on the determination that the temperature meets the threshold temperature.

[0165] Aspect 9: The device according to aspect 8, wherein the controller is further configured to enable the device to perform the following operation: detect temperature using a temperature sensor.

[0166] Aspect 10: The device according to any one of Aspects # to 9, wherein the controller is further configured to cause the device to: receive an indication that a threshold time has elapsed after the vehicle is powered off, that the temperature meets a temperature threshold, or both, wherein a triggering event is detected at least in part based on receiving the indication that the threshold time has elapsed, that the temperature meets a temperature threshold, or both.

[0167] Aspect 11: The device according to any one of Aspects # to 10, wherein the controller is further configured to cause the device to: transmit a command to shut down the power supply of the memory system at least in part based on an indication of vehicle power failure, wherein a command to turn on the power supply of the memory system is transmitted at least in part based on the power failure of the memory system.

[0168] Aspect 12: The device according to any one of Aspects # to 11, wherein the controller is further configured to cause the device to: receive a refresh capability of the memory system from the memory system before entering a power-off state, wherein: a triggering event is further associated with the refresh capability; and the refresh capability includes a threshold duration between refresh operations of the memory system, a duration for performing refresh operations at the memory system, a threshold temperature for programming data to the memory system, a target temperature range for programming data to the memory system, a data retention capability of the memory system, cross-temperature handling information for the memory system, the type of memory cells contained in the memory system, or any combination thereof.

[0169] Aspect 13: The device according to any one of aspects # to 12, wherein the controller is further configured to cause the device to control the voltage applied to the memory system based at least in part on detecting a trigger event associated with performing a refresh operation at the memory system.

[0170] Aspect 14: The device according to any one of aspects # to 13, wherein: the refresh operation corresponds to one or more four-level memory cells of the memory system; and the memory system is configured to reprogram data from one or more first blocks corresponding to one or more four-level memory cells to one or more second blocks corresponding to one or more four-level memory cells when the temperature associated with the memory system meets a target temperature range, based at least in part on a command to power on the memory system.

[0171] Describe a device. An overview of aspects of the device as described herein is provided below:

[0172] Aspect 15: An apparatus comprising: a host system configured to couple to a memory system associated with a vehicle; and a controller associated with the host system and the memory system, wherein the controller is configured to cause the apparatus to: detect, when the vehicle is powered off, a trigger event that switches the host system to a power-on state, the trigger event being associated with performing a refresh operation at the memory system; provide power to the host system and the memory system at least in part based on the detection of the trigger event; and, when the vehicle is powered off and at least in part based on the provision of power to the host system and the memory system, perform a refresh operation on one or more non-volatile first blocks of the memory system, the refresh operation comprising reprogramming data from one or more non-volatile first blocks of the memory system to one or more non-volatile second blocks of the memory system.

[0173] Aspect 16: The device according to aspect 15, wherein the controller is further configured to cause the device to perform the following operations: determine whether the idle time of the memory system satisfies a threshold idle time after power is supplied to the memory system, wherein the refresh operation is performed at least in part based on the determination that the idle time of the memory system satisfies the threshold idle time.

[0174] Aspect 17: The device according to any one of Aspects 15 to 16, wherein the controller is further configured to cause the device to: issue a refresh command from the host system to the memory system based at least in part on detecting a trigger event associated with performing a refresh operation at the memory system, wherein performing the refresh operation is based at least in part on the refresh command.

[0175] Aspect 18: The device according to any one of Aspects 15 to 17, wherein the controller is further configured to cause the device to: store a list of non-volatile memory blocks at the memory system, wherein the list of non-volatile memory blocks indicates one or more non-volatile first blocks of the memory system refreshed during a refresh operation.

[0176] Aspect 19: The device according to aspect 18, wherein the controller is further configured to cause the device to perform the following operations: adding a block identifier to a list of non-volatile memory blocks based at least in part on programming a non-volatile memory block corresponding to a block identifier at a temperature that meets a threshold temperature, detecting a number of errors that meet a threshold number of errors for a non-volatile memory block corresponding to a block identifier, or both.

[0177] Aspect 20: The device according to any one of Aspects 15 to 19, wherein the controller is further configured to cause the device to: determine whether a threshold time has elapsed after receiving an indication of vehicle power failure, whether the temperature meets a temperature threshold, or both, wherein the triggering event is detected at least in part based on the determination that a threshold time has elapsed after receiving an indication of vehicle power failure, whether the temperature meets a temperature threshold, or both.

[0178] Aspect 21: The device according to any one of Aspects 15 to 20, wherein the controller is further configured to cause the device to: receive an indication that a threshold time has elapsed after the vehicle is powered off, that the temperature meets a temperature threshold, or both, wherein a triggering event is detected at least in part based on the receipt of the indication.

[0179] Aspect 22: The device according to any one of Aspects 15 to 21, wherein the controller is further configured to cause the device to: issue a command from the host system to the memory system to power on the memory system, wherein powering the memory system is provided at least in part based on powering the host system and issuing the command to power on the memory system.

[0180] The information and signals disclosed herein can be represented using any of a variety of different techniques and methods. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the foregoing description can be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, light fields or light particles, or any combination thereof. Some figures may illustrate signals as single signals; however, signals may represent signal buses, which may have various bit widths.

[0181] The terms "electronic communication," "conductive contact," "connection," and "coupling" refer to the relationship between components that support the flow of signals between them. Components are considered to be in electronic communication with each other (or in conductive contact with each other, or connected to each other, or coupled to each other) if any conductive path exists between them that can support the flow of signals between them at any given time. At any given time, depending on the operation of the device containing the connected components, the conductive path between components that are in electronic communication with each other (or in conductive contact with each other, or connected to each other, or coupled to each other) can be an open circuit or a closed circuit. The conductive path between connected components can be a direct conductive path between the components, or an indirect conductive path between connected components that may include intermediate components such as switches, transistors, or other components. In some instances, one or more intermediate components, such as switches or transistors, can be used to interrupt the signal flow between connected components for a period of time.

[0182] The term "coupling" refers to a condition that moves from an open-circuit relationship between components to a closed-circuit relationship, in which a signal is currently not allowed to travel between the components via a conductive path, and in which a signal is allowed to travel between the components via the conductive path. If, for example, a component of a controller couples other components together, the component initiates a change that allows signals to flow between the other components via conductive paths that were previously not permitted.

[0183] The term "isolation" refers to a relationship between components where signals cannot currently flow between them. Components are isolated from each other if there is an open circuit between them. For example, components separated by a switch located between two components are isolated from each other when the switch is open. If a controller isolates two components, the controller achieves the following change: preventing signals from flowing between the components using previously permitted conductive paths.

[0184] As used in this article, the term “generally” means that a modified characteristic (e.g., a verb or adjective modified by the term “generally”) may not be absolute but can be close enough to obtain the advantages of the characteristic.

[0185] The term "in response to" can refer to a condition or action that occurs at least partially (if not completely) as a result of a preceding condition or action. For example, a first condition or action may be performed, and a second condition or action may occur at least partially as a result of the preceding condition or action (whether directly after the first condition or action or after one or more other intermediate conditions or actions following the first condition or action).

[0186] Additionally, the terms "directly in response to" or "directly in response to" can refer to a condition or action that occurs as a direct result of a preceding condition or action. In some instances, a first condition or action may be performed, and a second condition or action may occur directly as a result of a preceding condition or action that is independent of whether other conditions or actions occur. In some instances, a first condition or action may be performed, and a second condition or action may occur directly as a result of a preceding condition or action, such that no other intermediate conditions or actions occur between the earlier condition or action and the second condition or action, or a limited number of one or more intermediate steps or actions occur between the earlier condition or action and the second condition or action. Unless otherwise specified, any condition or action described herein as being performed "based on," "at least in part based on," or "in response to" a certain other step, action, event, or condition may additionally or alternatively (e.g., in alternative instances) be performed "directly in response to" or "directly in response to" such other condition or action.

[0187] The devices containing memory arrays discussed herein can be formed on semiconductor substrates, such as silicon, germanium, silicon-germanium alloys, gallium arsenide, gallium nitride, etc. In some instances, the substrate is a semiconductor wafer. In other instances, the substrate can be a silicon-on-insulator (SOI) substrate, such as silicon-on-glass (SOG) or silicon-on-sapphire (SOP), or an epitaxial layer of semiconductor material on another substrate. The conductivity of the substrate or subregions of the substrate can be controlled by doping with various chemicals containing, but not limited to, phosphorus, boron, or arsenic. Doping can be performed during the initial formation or growth of the substrate, either by ion implantation or by any other doping method.

[0188] The switching components or transistors discussed herein may represent field-effect transistors (FETs) and include a three-terminal device comprising a source, drain, and gate. The terminals may be connected to other electronic components via a conductive material (e.g., a metal). The source and drain may be conductive and may comprise heavily doped (e.g., degenerate) semiconductor regions. The source and drain may be separated via lightly doped semiconductor regions or channels. If the channel is n-type (i.e., the majority carriers are electrons), the FET may be called an n-type FET. If the channel is p-type (i.e., the majority carriers are holes), then the FET may be called a p-type FET. The channel may be capped by an insulating gate oxide. The channel conductivity can be controlled by applying a voltage to the gate. For example, applying a positive or negative voltage to an n-type FET or a p-type FET, respectively, makes the channel conductive. If a voltage greater than or equal to the transistor's threshold voltage is applied to the transistor's gate, the transistor may be "on" or "activated." If a voltage less than the transistor's threshold voltage is applied to the transistor's gate, the transistor may be "off" or "deactivated."

[0189] The descriptions herein, illustrated with reference to the accompanying drawings, depict exemplary configurations and do not represent all possible implementations or all instances within the scope of the claims. The term "exemplary" as used herein means "serving as an example, illustration, or description" and is not "preferred" or "advantageous" over other examples. The detailed description includes specific details that provide an understanding of the described techniques. However, these techniques can be practiced without these specific details. In some cases, well-known structures and apparatuses are shown in block diagram form to avoid obscuring the concepts of the described examples.

[0190] In the accompanying drawings, similar components or features may have the same reference numerals. Furthermore, various components of the same type can be distinguished by a hyphen following the reference numeral and a second numeral used to differentiate among similar components. If only the first reference numeral is used in the specification, the description applies to any of the similar components that have the same first reference numeral but are independent of the second reference numeral.

[0191] The functions described herein can be implemented in hardware, software executed by a processor, firmware, or any combination thereof. If implemented in software executed by a processor, the functions can be stored as one or more instructions or code on or transmitted via a computer-readable medium. Other examples and embodiments are within the scope of this disclosure and the appended claims. For example, due to the nature of software, the functions described above can be implemented using software executed by a processor, hardware, firmware, hardwired, or any combination thereof. Features implementing the functions can also be physically located in various locations, including distributed implementations such that different parts of the functions are implemented in different physical locations.

[0192] For example, the various illustrative blocks and components described in connection with the disclosure herein may be implemented or performed using a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but alternatively, the processor may be any processor, controller, microcontroller, or state machine. The processor may be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, a combination of multiple microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration).

[0193] As used herein, the word “or” used in a list of items contained in the claims (e.g., a list of items beginning with a phrase such as “at least one of” or “one or more of”) indicates an inclusive list such that a list of at least one of, for example, A, B or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C).

[0194] Computer-readable media includes both non-transitory computer storage media and communication media, with communication media encompassing any media that facilitates the transfer of a computer program from one place to another. Non-transitory storage media can be any available media accessible by a general-purpose or special-purpose computer. By way of example, and not limitation, non-transitory computer-readable media may include RAM, ROM, electrically erasable programmable read-only memory (EEPROM), optical disc (CD) ROM or other optical disc storage devices, magnetic disk storage devices or other magnetic storage devices, or any other non-transitory media that can be used to carry or store desired program code in the form of instructions or data structures and is accessible by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Furthermore, any connection is appropriately referred to as computer-readable media. For example, if software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or such technologies as infrared, radio, and microwave are included in the definition of media. As used in this article, disks and optical discs include CDs, laser discs, optical discs, digital multifunction discs (DVDs), floppy disks, and Blu-ray discs. Disks typically reproduce data magnetically, while optical discs reproduce data optically using lasers. Combinations of these are also included within the scope of computer-readable media.

[0195] This description is provided to enable those skilled in the art to make or use this disclosure. Those skilled in the art will appreciate the various modifications to this disclosure and can apply the general principles defined herein to other variations without departing from the scope of this disclosure. Therefore, this disclosure is not limited to the examples and designs described herein, but is given the broadest scope consistent with the principles and novel features disclosed herein.

Claims

1. An apparatus comprising: A controller configured to couple with a memory system associated with a vehicle, wherein the controller is configured to cause the device to perform the following operations: Receives an instruction to disconnect the vehicle's power; The vehicle enters a power-off state at least in part based on the indication that the vehicle has lost power; A trigger event for switching to the power-on state is detected when the vehicle is powered off and is in the power-off state, the trigger event being associated with performing a refresh operation at the memory system associated with the vehicle; The power-on state is entered at least in part based on the detection of the triggering event; When the vehicle is powered off and when it is powered on, a command to power on the memory system is sent to the memory system, at least in part based on the triggering event associated with performing the refresh operation at the memory system. and A command to power off the memory system is sent to the memory system at least in part based on a first threshold time elapsed, the first threshold time corresponding to an idle time for triggering the refresh operation at the memory system, a duration for performing the refresh operation at the memory system, or both.

2. The device of claim 1, wherein the first threshold time is after the command to power on the memory system is transmitted.

3. The device of claim 1, wherein the controller is further configured to cause the device to perform the following operations: The refresh command is sent to the memory system based at least in part on the detection of the triggering event associated with performing the refresh operation at the memory system, and after the command to power on the memory system is sent.

4. The device of claim 3, wherein the controller is further configured to cause the device to perform the following operations: Determine whether the triggering event is at least partially based on the vehicle being powered on or associated with performing the refresh operation at the memory system, wherein issuing the refresh command is at least partially based on determining that the triggering event is associated with performing the refresh operation at the memory system.

5. The device of claim 3, wherein the controller is further configured to cause the device to perform the following operations: The power supply to the memory system is at least partially based on the command to shut down the memory system after the first threshold time has elapsed following the issuance of the refresh command, and the first threshold time corresponds to the duration for performing the refresh operation at the memory system after the issuance of the refresh command.

6. The device of claim 1, wherein, in order to detect the trigger event, the controller is configured to cause the device to perform the following operations: Determine whether a second threshold time has elapsed after receiving the indication that the vehicle has been powered off, wherein the triggering event is detected based at least in part on the determination that the second threshold time has elapsed after receiving the indication that the vehicle has been powered off.

7. The device of claim 6, wherein the controller is further configured to cause the device to perform the following operations: Maintain a real-time clock, wherein determining whether a second threshold time has elapsed after receiving the indication that the vehicle has been powered down is at least in part based on the real-time clock.

8. The device of claim 1, wherein the controller is further configured to cause the device to perform the following operations: Determine whether the temperature meets a threshold temperature, wherein the triggering event is detected based at least in part on the determination that the temperature meets the threshold temperature.

9. The device of claim 8, wherein the controller is further configured to cause the device to perform the following operations: The temperature is detected using a temperature sensor.

10. The device of claim 1, wherein the controller is further configured to cause the device to perform the following operations: A command to turn off the power to the memory system is transmitted to the memory system at least in part based on the instruction that the vehicle is powered off, wherein a command to turn on the power to the memory system is transmitted at least in part based on the instruction that the memory system is powered off.

11. The device of claim 1, wherein the controller is further configured to cause the device to perform the following operations: The voltage applied to the memory system is controlled at least in part based on the detection of the triggering event associated with performing the refresh operation at the memory system.

12. The device according to claim 1, wherein: The refresh operation corresponds to one or more four-level memory cells in the memory system; and The command to power on the memory system, which is issued at least in part based on the triggering event associated with performing the refresh operation at the memory system, configures the memory system to reprogram data from one or more first blocks corresponding to the one or more four-level memory cells to one or more second blocks corresponding to the one or more four-level memory cells when the temperature associated with the memory system meets a target temperature range.

13. An apparatus comprising: A controller configured to couple with a memory system associated with a vehicle, wherein the controller is configured to cause the device to perform the following operations: Receives an instruction to disconnect the vehicle's power; The vehicle enters a power-off state at least in part based on the indication that the vehicle has lost power; When the vehicle is powered off and is in the power-off state, a trigger event for switching to the power-on state is detected, the trigger event being associated with performing a refresh operation at the memory system associated with the vehicle, wherein the trigger event is detected at least in part based on receiving an indication that a threshold time has elapsed, the temperature meets the temperature threshold, or both. The power-on state is entered at least in part based on the detection of the triggering event; and When the vehicle is powered off and when it is powered on, a command to power on the memory system is sent to the memory system, at least in part based on the triggering event associated with performing the refresh operation at the memory system.

14. An apparatus comprising: A controller configured to couple with a memory system associated with a vehicle, wherein the controller is configured to cause the device to perform the following operations: Receives an instruction to disconnect the vehicle's power; Receive the refresh capability of the memory system from the memory system; The vehicle enters a power-off state at least in part based on the indication that the vehicle has lost power; A trigger event for switching to a power-on state is detected when the vehicle is powered off and while in the power-off state. This trigger event is associated with performing a refresh operation at the memory system associated with the vehicle, wherein: the trigger event is further associated with the refresh capability, and the refresh capability includes a threshold duration between refresh operations for the memory system, a duration for performing the refresh operation at the memory system, a threshold temperature for programming data to the memory system, a target temperature range for programming the data to the memory system, data retention capability of the memory system, cross-temperature handling information for the memory system, the type of memory cells contained in the memory system, or any combination thereof; The power-on state is entered at least in part based on the detection of the triggering event; and When the vehicle is powered off and when it is powered on, a command to power on the memory system is sent to the memory system, at least in part based on the triggering event associated with performing the refresh operation at the memory system.

15. An apparatus comprising: A host system configured to be coupled to a memory system associated with the vehicle; and A controller, associated with the host system and the memory system, wherein the controller is configured to cause the device to perform the following operations: When the vehicle is powered off, a trigger event is detected that switches the host system to a power-on state, and the trigger event is associated with performing a refresh operation on the memory system; Power is supplied to the host system and the memory system at least in part based on the detection of the triggering event; Determine whether the idle time of the memory system meets the threshold idle time after power is supplied to the memory system; and When the vehicle is powered off, and based at least in part on providing power to the host system and the memory system and at least in part on determining that the idle time of the memory system meets the threshold idle time, the refresh operation is performed on one or more non-volatile first blocks of the memory system, the refresh operation including reprogramming data from the one or more non-volatile first blocks of the memory system to one or more non-volatile second blocks of the memory system.

16. The device of claim 15, wherein the controller is further configured to cause the device to perform the following operations: A refresh command is issued from the host system to the memory system based at least in part on the detection of a triggering event associated with performing the refresh operation at the memory system, wherein the refresh operation is performed based at least in part on the refresh command.

17. The device of claim 15, wherein the controller is further configured to cause the device to perform the following operations: A list of non-volatile memory blocks is stored in the memory system, wherein the list of non-volatile memory blocks indicates the one or more non-volatile first blocks of the memory system that are refreshed during the refresh operation.

18. The device of claim 17, wherein the controller is further configured to cause the device to perform the following operations: The block identifier is added to the list of non-volatile memory blocks based at least in part on the non-volatile memory block corresponding to the block identifier being programmed at a temperature that meets a threshold temperature, the number of errors that meet a threshold number of errors detected for the non-volatile memory block corresponding to the block identifier, or both.

19. The device of claim 15, wherein the controller is further configured to cause the device to perform the following operations: Determine whether a threshold time has elapsed since receiving the indication that the vehicle has been powered off, whether the temperature meets a temperature threshold, or both, wherein the triggering event is detected based at least in part on determining that the threshold time has elapsed since receiving the indication that the vehicle has been powered off, whether the temperature meets the temperature threshold, or both.

20. The device of claim 15, wherein the controller is further configured to cause the device to perform the following operations: The system receives an indication that a threshold time has elapsed since the vehicle was powered off, that the temperature meets a temperature threshold, or both, wherein the triggering event is detected at least in part based on receiving the indication.

21. The device of claim 15, wherein the controller is further configured to cause the device to perform the following operations: A command to power on the memory system is issued from the host system to the memory system, wherein providing power to the memory system is based at least in part on providing power to the host system and providing the command to power on the memory system.

22. A non-transitory computer-readable medium storing code comprising instructions that, when executed by a processor of an electronic device, cause the electronic device to perform the following operations: Receives a power outage notification from the vehicle; The vehicle enters a power-off state at least in part based on the indication that the vehicle has lost power; When the vehicle is powered off and is in the power-off state, a trigger event for switching to the power-on state is detected, the trigger event being associated with performing a refresh operation at the memory system associated with the vehicle; The power-on state is entered at least in part based on the detection of the triggering event; When the vehicle is powered off and when it is powered on, a command to power on the memory system is sent to the memory system, at least in part based on the triggering event associated with performing the refresh operation at the memory system. and A command to power off the memory system is sent to the memory system at least in part based on a first threshold time elapsed, the first threshold time corresponding to an idle time for triggering the refresh operation at the memory system, a duration for performing the refresh operation at the memory system, or both.

23. The non-transitory computer-readable medium of claim 22, wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to perform the following operations: The refresh command is sent to the memory system based at least in part on the detection of the triggering event associated with performing the refresh operation at the memory system, and after the command to power on the memory system is sent.

24. A non-transitory computer-readable medium storing code comprising instructions that, when executed by a processor of an electronic device, cause the electronic device to perform the following operations: When the vehicle is powered off, a trigger event is detected that switches the host system used for the memory system to a power-on state, the trigger event being associated with performing a refresh operation at the memory system; Power is supplied to the host system and the memory system at least in part based on the detection of the triggering event; Determine whether the idle time of the memory system meets the threshold idle time after power is supplied to the memory system; and When the vehicle is powered off, and based at least in part on providing power to the host system and the memory system and at least in part on determining that the idle time of the memory system meets the threshold idle time, the refresh operation is performed on one or more non-volatile first blocks of the memory system, the refresh operation including reprogramming data from the one or more non-volatile first blocks of the memory system to one or more non-volatile second blocks of the memory system.

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