Charge-guided amplifier circuit and control method thereof

Abstract

The present invention discloses a charge-steering amplifier circuit and a control method thereof. The charge-steering amplifier circuit is used to amplify a differential input signal and includes a sample-and-hold circuit, a charge-steering amplifier, a reference voltage generating circuit, and a switching circuit. The sample-and-hold circuit samples the differential input signal to generate first and second sampled signals. The charge-steering amplifier has a first input terminal, a second input terminal, a first output terminal, and a second output terminal, wherein the first and second input terminals receive the first and second sampled signals, respectively. The reference voltage generating circuit generates a reference voltage based on the differential input signal. The switching circuit couples the reference voltage to the first and second output terminals.

Description

Technical Field

[0001] The present invention relates to a charge-steering amplifier, and more particularly to an amplifier circuit implemented with the charge-steering amplifier. Background Art

[0002] Figure 1 This is a circuit diagram of a conventional charge-steering amplifier. Charge-steering amplifier 100, also known as a dynamic amplifier, is primarily composed of transistors 110 and 120, as well as switches 130, 140, 150, 160, capacitors 170, 180, and 190. The connections of these components are shown in the figure. Charge-steering amplifier 100 alternates between a reset phase (switches 130, 140, and 160 are on, and switch 150 is off, causing capacitors 170 and 180 to charge and capacitor 190 to discharge) and an amplification phase (switches 130, 140, and 160 are off, and switch 150 is on, causing capacitors 170 and 180 to discharge and capacitor 190 to charge). During the amplification phase, charge-steering amplifier 100 amplifies a differential input signal Vi (input from input terminals N1 and N2) and generates an output signal Vo (output from output terminals N3 and N4). The operation details of the charge-steering amplifier 100 are well known to those skilled in the art and will not be described in detail.

[0003] However, the transistors 110 and 120 are easily affected by perturbations in the common-mode voltage of the differential input signal Vi, which results in a decrease in the performance of the charge-steering amplifier 100 (eg, a deterioration in the effective number of bits (ENOB), ie, a deterioration in the gain linearity). Summary of the Invention

[0004] In view of the deficiencies in the prior art, an object of the present invention is to provide a charge-steering amplifier circuit and a control method thereof to improve the deficiencies in the prior art.

[0005] One embodiment of the present invention provides a charge-steering amplifier circuit for amplifying a differential input signal, comprising: a sample-and-hold circuit, a charge-steering amplifier, a reference voltage generating circuit, and a switching circuit. The sample-and-hold circuit samples the differential input signal to generate a first sampling signal and a second sampling signal. The charge-steering amplifier is coupled to the sample-and-hold circuit and has a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The first input terminal receives the first sampling signal, and the second input terminal receives the second sampling signal. The reference voltage generating circuit generates a reference voltage based on the differential input signal. The reference voltage is the result of a calculation of a common-mode voltage of the differential input signal and a DC voltage. The switching circuit is coupled to the charge-steering amplifier and the reference voltage generating circuit and couples the reference voltage to the first output terminal and the second output terminal.

[0006] Another embodiment of the present invention provides a control method for a charge-steering amplifier circuit. The charge-steering amplifier circuit includes a charge-steering amplifier and a sample-and-hold circuit. The charge-steering amplifier circuit operates in a reset phase or an amplification phase. During the amplification phase, the charge-steering amplifier performs an amplification operation on a first sampling signal and a second sampling signal. The method includes: obtaining a common-mode voltage of a differential input signal during the reset phase; providing the common-mode voltage and a DC voltage to an output terminal of the charge-steering amplifier during the reset phase; sampling the differential input signal using the sample-and-hold circuit during the reset phase to generate the first sampling signal and the second sampling signal; and inputting the first sampling signal and the second sampling signal into the charge-steering amplifier during the amplification phase.

[0007] Another embodiment of the present invention provides a charge-steering amplifier circuit for amplifying a differential input signal, comprising a sample-and-hold circuit, a charge-steering amplifier, a common-mode voltage generating circuit, and a switch circuit. The sample-and-hold circuit samples the differential input signal to generate a first sampled signal and a second sampled signal. The charge-steering amplifier is coupled to the sample-and-hold circuit and comprises a first input terminal, a second input terminal, a first output terminal, a second output terminal, a first switch, a second switch, a third switch, a fourth switch, a first load capacitor, and a second load capacitor. The first input terminal receives the first sampled signal. The second input terminal receives the second sampled signal. The first load capacitor has a first terminal and a second terminal, wherein the first terminal is coupled to the first output terminal via the first switch and to a first reference voltage via the second switch. The second load capacitor has a third terminal and a fourth terminal, wherein the third terminal is coupled to the second output terminal via the third switch and to the first reference voltage via the fourth switch. The common mode voltage generating circuit is used to generate a common mode voltage of the differential input signal according to the differential input signal. The switch circuit is coupled to the charge steering amplifier and the common mode voltage generating circuit and is used to couple the second terminal and the fourth terminal to the common mode voltage or a second reference voltage.

[0008] Another embodiment of the present invention provides a control method for a charge-steering amplifier circuit. The charge-steering amplifier circuit includes a charge-steering amplifier and a sample-and-hold circuit. The charge-steering amplifier circuit operates in a reset phase or an amplification phase. During the amplification phase, the charge-steering amplifier performs an amplification operation on a first sampling signal and a second sampling signal. The control method includes: obtaining a common-mode voltage of a differential input signal during the reset phase; coupling two terminals of a load capacitor of the charge-steering amplifier to a first reference voltage and a second reference voltage, respectively, during the reset phase; sampling the differential input signal using the sample-and-hold circuit to generate the first sampling signal and the second sampling signal during the reset phase; inputting the first sampling signal and the second sampling signal into the charge-steering amplifier during the amplification phase; and providing the common-mode voltage to one terminal of the load capacitor during the amplification phase, wherein the one terminal is not coupled to an output terminal of the charge-steering amplifier.

[0009] The charge-steering amplifier circuit and control method of the present invention can reduce the negative impact of common-mode voltage disturbances. Compared with conventional technologies, the charge-steering amplifier circuit of the present invention has better performance.

[0010] The features, implementation and technical effects of the present invention are described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1is a circuit diagram of an existing charge-steering amplifier;

[0012] Figure 2 is a functional block diagram of an embodiment of a charge-steering amplifier circuit according to the present invention;

[0013] Figure 3 show Figure 2 One embodiment of the operation timing of the charge-steering amplifier circuit;

[0014] Figures 4A to 4C A circuit diagram of an embodiment of a reference voltage generating circuit;

[0015] Figure 5 A flow chart showing an embodiment of a method for controlling a charge-steering amplifier circuit according to the present invention;

[0016] Figure 6 is a functional block diagram of another embodiment of the charge-steering amplifier circuit of the present invention;

[0017] Figure 7 is a flow chart of another embodiment of a control method for a charge-steering amplifier circuit according to the present invention;

[0018] Figure 8 A circuit diagram of another embodiment of a charge-steering amplifier;

[0019] Figure 9 A circuit diagram of another embodiment of a charge-steering amplifier;

[0020] Figure 10 A circuit diagram of another embodiment of a charge-steering amplifier; and

[0021] Figure 11 FIG. 4 is a circuit diagram of another embodiment of a charge-steering amplifier.

[0022] Explanation of symbols

[0023] 100, 210, 310, 410: Charge-guided amplifiers

[0024] 110, 120, 213, 214, 313, 314, 413P, 414P, 413N, 414N: transistors

[0025] 130,140,150,160,242,244,211,212,215,216,233,234,235,236,237,238,612,614,616,618,642,644,646,648: switch

[0026] 170, 180, 190, C1, C2, C3, 231, 232: capacitors

[0027] Vi: differential input signal

[0028] N1, N2: input terminals

[0029] Vo: output signal

[0030] N3, N4: output terminal

[0031] GND: Ground level

[0032] VDD: power supply voltage

[0033] 200,600: Charge-guided amplifier circuit

[0034] 220: Sample and hold circuit

[0035] 230: Reference voltage generation circuit

[0036] 240: Switching Circuit

[0037] Vip, Vin: input signal

[0038] Vip', Vin': sampling signal

[0039] Vr: reference voltage

[0040] CK: Clock

[0041] Phi_S: Reset Phase

[0042] Phi_H: Amplification stage

[0043] t1, t2, t3, t4: time points

[0044] 239: Buffer unit

[0045] Vb1, Vb2: voltage

[0046] N5, N6, N7: nodes

[0047] 510,610: Charge-guided amplifier

[0048] 630: Common-mode voltage generation circuit

[0049] 640: Switching Circuit

[0050] Vb3, Vb4: reference voltage

[0051] Vcm: common mode voltage

[0052] S510, S520, S525, S530, S540, S550: Steps DETAILED DESCRIPTION

[0053] The technical terms used in the following descriptions refer to the customary terms in this technical field. If this specification provides explanations or definitions for some terms, the interpretation of these terms shall be based on the explanations or definitions in this specification.

[0054] The present invention discloses a charge-steering amplifier circuit and a control method thereof. Because some components of the charge-steering amplifier circuit of the present invention may be individually known, details of known components will be omitted below without affecting the full disclosure and feasibility of the present invention.

[0055] Figure 2 This is a functional block diagram of an embodiment of a charge-steering amplifier circuit according to the present invention. The charge-steering amplifier circuit 200 includes a charge-steering amplifier 210, a sample-and-hold circuit 220, a reference voltage generator circuit 230, and a switch circuit 240. The charge-steering amplifier circuit 200 is used to amplify a differential input signal Vi (comprising input signal Vip and input signal Vin). The amplified signal (i.e., output signal Vo) is output from the output terminal of the charge-steering amplifier 210 (consisting of output terminal N3 and output terminal N4). The sample-and-hold circuit 220 is used to sample the input signals Vip and Vin and generate sampled signals Vip' and Vin'. The sample-and-hold circuit 220 is well known to those skilled in the art and will not be described in detail here. The sampled signals Vip' and Vin' are received by input terminals N1 and N2 of the charge-steering amplifier 210, respectively. The reference voltage generator circuit 230 generates a reference voltage Vr based on the differential input signal Vi. The switch circuit 240 (including switch 242 and switch 244) is coupled between the charge-steering amplifier 210 and the reference voltage generating circuit 230, and is used to couple the reference voltage Vr to the output terminal N3 and the output terminal N4 of the charge-steering amplifier 210. The charge-steering amplifier 210 includes a switch 211, a switch 212, a transistor 213, a transistor 214, a switch 215, a switch 216, a capacitor C1, a capacitor C2 and a capacitor C3. Capacitor C1 and capacitor C2 are load capacitors of the charge-steering amplifier 210. Capacitor C1 is coupled or electrically connected between the output terminal N3 and the ground level GND, and capacitor C2 is coupled or electrically connected between the output terminal N4 and the ground level GND. VDD is the power supply voltage. The operating principle of the charge-steering amplifier 210 is well known to those skilled in the art, so it will not be described in detail. Figure 2In the embodiment of the present invention, the transistor 213 and the transistor 214 are N-type metal-oxide-semiconductor field-effect transistors (MOSFETs) (hereinafter referred to as NMOS transistors). The input terminal N1 and the input terminal N2 are gates of the transistor 213 and the transistor 214, respectively, and the output terminal N3 and the output terminal N4 are drains of the transistor 213 and the transistor 214, respectively. In other words, the switch circuit 240 couples the reference voltage Vr to the drains of the transistor 213 and the transistor 214 (i.e., one end of the capacitor C1 and one end of the capacitor C2).

[0056] Figure 3 show Figure 2 One embodiment of the operation timing of the charge-steering amplifier circuit. Figure 3 The diagram shows that when the clock CK is at a first level (e.g., a high level), the charge-steering amplifier circuit 200 operates in a reset phase Phi_S (e.g., between time points t1 and t2, and between time points t3 and t4). Furthermore, when the clock CK is at a second level (e.g., a low level), the charge-steering amplifier circuit 200 operates in an amplification phase Phi_H (e.g., between time points t2 and t3). In other words, the charge-steering amplifier circuit 200 alternately operates in the reset phase Phi_S and the amplification phase Phi_H.

[0057] Figures 4A to 4C FIG. 2 is a circuit diagram of an embodiment of the reference voltage generating circuit 230. Figure 4A As shown, the reference voltage generating circuit 230 includes a capacitor 231, a capacitor 232, a switch 233, a switch 234, a switch 235, a switch 236, a switch 237, a switch 238, and a buffer unit 239 (implemented as an operational amplifier in this example, but not limited to this). In the amplification phase Phi_H, the switches 233, 234, and 238 are not conducting, and the switches 235, 236, and 237 are conducting, forming the following: Figure 4B The circuit shown in FIG. 1 shows a circuit in which the buffer unit 239 is in an idle state. At the end of the amplification phase Phi_H, the voltage across the capacitors 231 and 232 is the difference between the voltage Vb1 and the voltage Vb2. In the reset phase Phi_S, the switches 233, 234, and 238 are turned on, and the switches 235, 236, and 237 are turned off, forming the following example: Figure 4CThe circuit shown. The voltage at node N5 is the common-mode voltage Vcm of the differential input signal Vi plus the difference between voltages Vb1 and Vb2. In other words, the reference voltage Vr (=Vcm + Vb2 - Vb1) output by the reference voltage generation circuit 230 during the reset phase Phi_S is the result of calculating the common-mode voltage Vcm and the DC voltage (Vb2 - Vb1). That is, the reference voltage Vr is related to the common-mode voltage Vcm of the differential input signal Vi. In some embodiments, voltage Vb1 is equal to voltage Vb2, i.e., the DC voltage is zero.

[0058] Figure 5 A flow chart showing an embodiment of a control method for a charge-steering amplifier circuit of the present invention includes the following steps.

[0059] Step S510: In the reset phase Phi_S, obtain the common mode voltage Vcm of the differential input signal Vi. In some embodiments, step S510 may be performed using Figure 4A The reference voltage generating circuit 230 obtains the common mode voltage Vcm of the differential input signal Vi.

[0060] Step S520: In the reset phase Phi_S, the common mode voltage Vcm and the DC voltage are provided to an output terminal of the charge-steering amplifier. Figure 2 As shown, the output end of the charge-steering amplifier 210 is composed of an output end N3 and an output end N4, and the output end N3 and the output end N4 are drains of the transistor 213 and the transistor 214, respectively, and are also one end of the capacitor C1 and one end of the capacitor C2, respectively. In some embodiments, the DC voltage is Figure 4A The difference between the voltage Vb2 and the voltage Vb1 (can be positive, negative or zero). Step S520 can use Figure 2 The switch circuit 240 provides a reference voltage Vr to the output terminal N3 and the output terminal N4 of the charge-steering amplifier 210 (i.e., the drains of the transistors 213 and 214). In other words, the switches 242 and 244 are turned on in the reset phase Phi_S and are not turned on in the amplification phase Phi_H.

[0061] Step S530: In the reset phase Phi_S, the differential input signal is sampled by the sample-and-hold circuit to generate a sampled signal. Figure 2 As shown, in step S530 , the sample-and-hold circuit 220 may be used to sample the differential input signal Vi to generate a sampling signal Vip′ and a sampling signal Vin′.

[0062] Step S540: In the amplification phase Phi_H, the sampled signal is input to the charge-guided amplifier. For example, Figure 2As shown, the charge-steering amplifier 210 receives the sampling signal Vip′ and the sampling signal Vin′ through the input terminal N1 and the input terminal N2 during the amplification phase Phi_H, and performs an amplification operation on the sampling signal Vip′ and the sampling signal Vin′ to generate the output signal Vo.

[0063] Figure 6 FIG2 is a functional block diagram of another embodiment of a charge-steering amplifier circuit according to the present invention. The charge-steering amplifier circuit 600 includes a charge-steering amplifier 610, a sample-and-hold circuit 220, a common-mode voltage generating circuit 630, and a switching circuit 640 (including switches 642, 644, 646, and 648).

[0064] The common mode voltage generating circuit 630 is used to generate a common mode voltage Vcm according to the input signal Vip and the input signal Vin. In some embodiments, the common mode voltage generating circuit 630 can be composed of Figure 4A A circuit is implemented, wherein when the voltage Vb1 is equal to the voltage Vb2, the reference voltage Vr is equal to the common mode voltage Vcm.

[0065] Charge-steering amplifier 610 is similar to charge-steering amplifier 210, except that charge-steering amplifier 610 further includes switches 612, 614, 616, and 618. A first terminal of capacitor C1 is coupled to output terminal N3 via switch 612 and to reference voltage Vb3 via switch 616. A second terminal of capacitor C1 (i.e., node N6) is coupled to common-mode voltage generation circuit 630 via switch 642 and to reference voltage Vb4 via switch 646. A first terminal of capacitor C2 is coupled to output terminal N4 via switch 614 and to reference voltage Vb3 via switch 618. A second terminal of capacitor C2 (i.e., node N7) is coupled to common-mode voltage generation circuit 630 via switch 644 and to reference voltage Vb4 via switch 648. Reference voltage Vb3 may or may not be equal to reference voltage Vb4.

[0066] Figure 7 The flowchart of another embodiment of the control method of the charge-steering amplifier circuit of the present invention includes steps S510, S525, S530, S540 and S550. Steps S510, S530 and S540 have been discussed above and will not be repeated here.

[0067] Step S525: In the reset phase Phi_S, the load capacitors (i.e., capacitor C1 and capacitor C2) of the charge-steering amplifier are coupled to the reference voltage Vb3 and the reference voltage Vb4, respectively. Step S525 can be performed using switches 612, 614, 616, 618, and Figure 6More specifically, in the reset phase Phi_S, switches 616, 618, 646, and 648 are turned on, and switches 612, 614, 642, and 644 are not turned on.

[0068] Step S550: During the amplification phase Phi_H, the common-mode voltage Vcm is provided to one end of the output terminal of the uncoupled charge-steering amplifier 610 of the load capacitor. More specifically, step S550 provides the common-mode voltage Vcm to the node N6 and the node N7 during the amplification phase Phi_H; that is, during the amplification phase Phi_H, the capacitor C1 and the capacitor C2 receive the common-mode voltage Vcm through the switch 642 and the switch 644, respectively. Step S550 may use the switches 612, 614, 616, 618, and Figure 6 More specifically, in the amplification phase Phi_H, switches 612, 614, 642, and 644 are turned on, and switches 616, 618, 646, and 648 are turned off.

[0069] Figure 6 and Figure 7 The embodiment can also allow the output terminal of the charge-steering amplifier circuit 600 to track the common-mode voltage of the differential input signal.

[0070] The above-described method can significantly improve the performance of a charge-steering amplifier circuit. For example, some simulations show that when the output of the charge-steering amplifier circuit does not track the common-mode voltage of the differential input signal, its gain ranges from approximately 4.2 to 6.08; however, when the output of the charge-steering amplifier circuit tracks the common-mode voltage of the differential input signal (i.e., the present invention), its gain ranges from approximately 5.73 to 6.08. In other words, the gain of the charge-steering amplifier circuit of the present invention is more stable and less susceptible to the influence of the differential input signal (i.e., better linearity). In addition, when the threshold voltage of the transistor becomes smaller (for example, due to process influence), the above-mentioned advantages become more significant (the gain range changes from 3.0 to 6.02 to 5.62 to 5.97). However, applying the common-mode voltage of the differential input signal to other terminals of the transistor cannot achieve the same effect.

[0071] In other embodiments, Figure 2 The charge-steering amplifier 210 can be composed of Figure 8 Charge-steering amplifier 310 or Figure 9The charge-steering amplifier 410 is replaced by the charge-steering amplifier 310. The charge-steering amplifier 310 is a charge-steering amplifier implemented with P-type MOSFETs (hereinafter referred to as PMOS transistors) (that is, transistors 313 and 314 are PMOS transistors), while the charge-steering amplifier 410 is a charge-steering amplifier implemented with PMOS transistors (i.e., transistors 413P and 414P) and NMOS transistors (i.e., transistors 413N and 414N). Figure 8 As shown, the output terminal N3 and the output terminal N4 are the drains of the transistor 313 and the transistor 314 respectively. Figure 9 As shown, the output terminal N3 is the drain of the transistor 413P and the transistor 413N, and the output terminal N4 is the drain of the transistor 414P and the transistor 414N.

[0072] The operating principles of the charge-steering amplifier 310 and the charge-steering amplifier 410 are well known to those skilled in the art and are not described in detail herein.

[0073] In other embodiments, Figure 6 The charge-steering amplifier 610 can be composed of Figure 10 Charge-steering amplifier 510 or Figure 11 The charge-steering amplifier 510 and the charge-steering amplifier 610 are similar to the charge-steering amplifier 310 and the charge-steering amplifier 410, respectively, and thus are not described again.

[0074] In summary, the present invention extracts the common-mode voltage of the differential input signal and transmits it to the output of the charge-steering amplifier (i.e., the drain of the transistor, i.e., one end of the load capacitor) or one end of the load capacitor. This allows the output of the charge-steering amplifier to track the common-mode voltage of the differential input signal, thereby mitigating the negative impact of common-mode voltage fluctuations on the charge-steering amplifier circuit and improving the gain linearity of the charge-steering amplifier circuit.

[0075] Since those skilled in the art can understand the implementation details and variations of the method invention disclosed herein through the disclosure of the device invention disclosed herein, to avoid redundancy, repeated descriptions are omitted herein without affecting the disclosure requirements and feasibility of the method invention. Please note that the shapes, sizes, and proportions of the components in the aforementioned figures are merely illustrative and are provided for those skilled in the art to understand the present invention, and are not intended to limit the present invention. In addition, in some embodiments, the steps mentioned in the aforementioned flowcharts can be adjusted in order according to actual operations, and can even be executed simultaneously or partially simultaneously.

[0076] Although the embodiments of the present invention are described above, these embodiments are not intended to limit the present invention. Those skilled in the art may modify the technical features of the present invention based on the explicit or implicit content of the present invention. All such modifications may fall within the scope of patent protection sought by the present invention. In other words, the scope of patent protection of the present invention shall be determined by the claims of this specification.

Claims

1. A charge-steering amplifier circuit for amplifying a differential input signal, comprising: a sample-and-hold circuit for sampling the differential input signal to generate a first sampling signal and a second sampling signal; A charge-steering amplifier is coupled to the sample-and-hold circuit and has a first input terminal, a second input terminal, a first output terminal, and a second output terminal, wherein: The first input terminal receives the first sampling signal, and the second input terminal receives the second sampling signal; a reference voltage generating circuit for generating a reference voltage according to the differential input signal, wherein the reference voltage is a calculation result of a common mode voltage of the differential input signal and a DC voltage; as well as A switch circuit is coupled to the charge-steering amplifier and the reference voltage generating circuit, and is used for coupling the reference voltage to the first output terminal and the second output terminal.

2. The charge-guided amplifier circuit according to claim 1, wherein: The switching circuit includes: a first switch coupled between the reference voltage generating circuit and the first output terminal; and A second switch is coupled between the reference voltage generating circuit and the second output terminal.

3. The charge-guided amplifier circuit according to claim 2, wherein: The charge-steering amplifier circuit operates in a reset phase or an amplification phase. The charge-steering amplifier amplifies the first sampling signal and the second sampling signal in the amplification phase. The sample-and-hold circuit samples the differential input signal in the reset phase. The first switch and the second switch are turned on in the reset phase.

4. A control method for a charge-steering amplifier circuit, the charge-steering amplifier circuit comprising a charge-steering amplifier and a sample-and-hold circuit, the charge-steering amplifier circuit operating in a reset phase or an amplification phase, the charge-steering amplifier performing an amplification operation on a first sampling signal and a second sampling signal in the amplification phase, the method comprising: During the reset phase, a common mode voltage of a differential input signal is obtained; In the reset phase, the common mode voltage and the DC voltage are provided to an output terminal of the charge-steering amplifier; In the reset phase, the differential input signal is sampled by the sample-and-hold circuit to generate the first sampling signal and the second sampling signal; and In the amplification stage, the first sampling signal and the second sampling signal are input into the charge-guided amplifier.

5. A charge-steering amplifier circuit for amplifying a differential input signal, comprising: a sample-and-hold circuit for sampling the differential input signal to generate a first sampling signal and a second sampling signal; A charge-steering amplifier, coupled to the sample-and-hold circuit, comprises: a first input terminal, receiving the first sampling signal; a second input terminal, receiving the second sampling signal; a first output terminal; a second output terminal; a first switch; a second switch; a third switch; a fourth switch; A first load capacitor has a first terminal and a second terminal, wherein The first terminal is coupled to the first output terminal through the first switch and is coupled to a first reference voltage through the second switch; and a second load capacitor having a third terminal and a fourth terminal, wherein the third terminal is coupled to the second output terminal through the third switch and is coupled to the first reference voltage through the fourth switch; a common-mode voltage generating circuit for generating a common-mode voltage of the differential input signal according to the differential input signal; and A switch circuit is coupled to the charge-steering amplifier and the common-mode voltage generating circuit, and is used for coupling the second terminal and the fourth terminal to the common-mode voltage or a second reference voltage.

6. The charge-guided amplifier circuit according to claim 5, wherein: The switching circuit includes: a fifth switch, configured to couple the second end to the common mode voltage; a sixth switch, configured to couple the fourth terminal to the common mode voltage; a seventh switch, configured to couple the second end to the second reference voltage; as well as An eighth switch is used for coupling the fourth end to the second reference voltage.

7. The charge-guided amplifier circuit according to claim 6, wherein: The charge-steering amplifier circuit operates in a reset phase or an amplification phase. The charge-steering amplifier amplifies the first sampling signal and the second sampling signal in the amplification phase. The sample-and-hold circuit samples the differential input signal in the reset phase. The first switch, the third switch, the fifth switch, and the sixth switch are conductive in the amplification phase and non-conductive in the reset phase. The second switch, the fourth switch, the seventh switch, and the eighth switch are non-conductive in the amplification phase and conductive in the reset phase.

8. A control method for a charge-steering amplifier circuit, the charge-steering amplifier circuit comprising a charge-steering amplifier and a sample-and-hold circuit, the charge-steering amplifier circuit operating in a reset phase or an amplification phase, the charge-steering amplifier performing an amplification operation on a first sampling signal and a second sampling signal in the amplification phase, the method comprising: During the reset phase, a common mode voltage of a differential input signal is obtained; During the reset phase, two ends of a load capacitor of the charge-steering amplifier are coupled to a first reference voltage and a second reference voltage respectively; In the reset phase, the differential input signal is sampled by the sample-and-hold circuit to generate the first sampling signal and the second sampling signal; In the amplification stage, the first sampling signal and the second sampling signal are input to the charge-guided amplifier; and In the amplification stage, the common mode voltage is provided to one end of the load capacitor, wherein, The terminal is not coupled to an output terminal of the charge-steering amplifier.

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