Multilayer circuit board and method of manufacturing the same
By using solder to connect the sidewalls of conductive pillars in multilayer circuit boards, the problem of space occupation by conductive holes in existing technologies is solved, enabling thinner and higher-density circuit board manufacturing and simplifying the process.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HONGQISHENG PRECISION ELECTRONICS (QINHUANGDAO) CO LTD
- Filing Date
- 2021-08-12
- Publication Date
- 2026-05-12
AI Technical Summary
The existing multilayer circuit board manufacturing process is lengthy and the conductive holes occupy the surface space of the outer conductive lines, which cannot meet the product requirements under the trend of high density.
Solder is used to connect the sidewalls of the first and second conductive pillars to achieve electrical connection between multiple circuit boards, simplifying the drilling and copper plating processes and reducing the space occupied by the conductive pillars on the outer conductive layer.
It enables the thinning and high-density fabrication of multilayer circuit boards, simplifies the manufacturing process, and reduces the thickness of the circuit boards.
Smart Images
Figure CN115707199B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit boards, and more particularly to a multilayer circuit board capable of reducing thickness and a method for manufacturing the same. Background Technology
[0002] Consumer electronics are increasingly trending towards thinner, smaller, and smarter designs, with fully functional printed circuit boards (FPCs) being used extensively as a crucial component, leading to increasingly stringent requirements for FPC manufacturing. Current technologies for multilayer circuit board fabrication typically involve first providing an inner layer circuit board, then laminating a copper-clad laminate (CCL) onto it using adhesive. Through-holes or blind vias are then created on the CCL, which is then copper-plated to form conductive vias. Finally, the CCL is used to fabricate the outer layer conductive circuitry, which allows for communication between the outer and inner layers. However, this manufacturing process is lengthy, and the electroplating process for creating the conductive vias occupies space on the surface of the outer conductive circuitry, making it unsuitable for high-density applications. Summary of the Invention
[0003] In view of the above, the present invention provides a method for manufacturing a multilayer circuit board that solves the above-mentioned technical problems, and a multilayer circuit board formed by the method.
[0004] The first aspect of this application provides a multilayer circuit board, including a first circuit substrate, an adhesive layer stack, and a second circuit substrate stacked together. The first circuit substrate includes a first conductive layer and a first conductive post disposed on the first conductive layer. The second circuit substrate includes a second conductive layer and a second conductive post disposed on the second conductive layer. The adhesive layer stack has an opening for accommodating the first conductive post and the second conductive post. The sidewalls of the first conductive post and the sidewalls of the second conductive post are connected by solder to electrically connect the first conductive layer and the second conductive layer.
[0005] A second aspect of this application provides a method for manufacturing a multilayer circuit board, comprising the following steps:
[0006] A first circuit board is provided, including a first insulating layer and a first conductive layer stacked thereon, wherein the first conductive layer includes a connection pad;
[0007] A dry film is laminated on the side of the first conductive layer away from the first insulating layer, and the dry film is exposed and developed to form through holes to expose the connecting pad.
[0008] A first conductive post is formed on the connecting pad, and then the dry film is removed;
[0009] Solder is formed on the sidewall of the first conductive post;
[0010] A second circuit board is provided, including a second insulating layer and a second conductive layer stacked together, wherein a second conductive post is disposed on the second conductive layer;
[0011] Provides an adhesive laminate with openings;
[0012] The second circuit board, the adhesive layer stack, and the first circuit board are sequentially pressed together, wherein the first conductive post and the second conductive post pass through the opening and are respectively connected to the second insulating layer and the first insulating layer, and the first conductive post and the second conductive post are connected by the solder.
[0013] A third aspect of this application provides a method for manufacturing a multilayer circuit board, comprising the following steps:
[0014] A first circuit board is provided, including a first insulating layer and a first conductive layer stacked thereon, wherein the first conductive layer includes a connection pad;
[0015] A dry film is laminated on the side of the first conductive layer away from the first insulating layer, and the dry film is exposed and developed to form through holes to expose the connecting pad.
[0016] A first conductive post is formed on the connecting pad, and then the dry film is removed;
[0017] Solder is formed at the end of the first conductive post that is away from the connecting pad;
[0018] A second circuit board is provided, comprising a second insulating layer and a second conductive layer stacked together, wherein two second conductive pillars are spaced apart on the second conductive layer;
[0019] Provides an adhesive laminate with openings;
[0020] The second circuit board, the adhesive layer stack, and the first circuit board are sequentially pressed together, wherein the first conductive post and two second conductive posts pass through the opening and are respectively connected to the second insulating layer and the first insulating layer, the first conductive post is located between the two second conductive posts, and the first conductive post and the two second conductive posts are connected by the solder.
[0021] In the multilayer circuit board and its fabrication method provided in this application, the sidewalls of the first conductive pillar and the second conductive pillar are connected by soldering, thereby realizing the electrical connection between multiple circuit substrates. Compared with the vertical conductive structure (electroplated holes), the thickness of the multilayer circuit board of this application can be reduced, realizing thin-film fabrication. Moreover, when realizing the electrical connection between multiple circuit substrates, there is no need to perform drilling and copper plating processes, which simplifies the process. Furthermore, the first conductive pillar and the second conductive pillar do not occupy the space on the surface of the outer conductive layer, thus achieving high-density fabrication. Attached Figure Description
[0022] Figures 1 to 6 This is a cross-sectional schematic diagram of the manufacturing process of the circuit board according to the first embodiment of this application.
[0023] Figures 7 to 9 This is a cross-sectional schematic diagram of the manufacturing process of the circuit board according to the second embodiment of this application.
[0024] Explanation of main component symbols
[0025]
[0026] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation
[0027] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.
[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
[0029] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined or substituted with each other.
[0030] Please see Figures 1 to 6 The first embodiment of this application provides a method for manufacturing a multilayer circuit board 100, which includes the following steps:
[0031] Step S1, please refer to Figure 1 A first circuit board 10 is provided, including a first insulating layer 11 and a first conductive layer 12 and a third conductive layer 13 disposed on opposite surfaces of the first insulating layer 11. The third conductive layer 13 and the first conductive layer 12 are electrically connected through a first conductive structure 14 penetrating the first insulating layer 11. The first conductive structure 14 can be a conductive hole or a conductive post.
[0032] The third conductive layer 13 includes a first solder pad 131 for mounting electronic components (not shown). The first conductive layer 12 includes a first connection pad 121. In this embodiment, the first conductive layer 12 includes two first connection pads 121, but this application is not limiting.
[0033] The first insulating layer 11 is a dielectric material commonly used in the art, such as polyimide or epoxy resin. The materials of the third conductive layer 13 and the first conductive layer 12 may include, but are not limited to, copper, gold, silver, etc.
[0034] The first circuit board 10 can be manufactured using double-sided copper-clad laminates through RTR (roll-to-roll automated production) operations, but is not limited to this. The RTR process includes: surface treatment and cleaning, exposure, development, etching, punching, circuit surface treatment, and trimming.
[0035] For step S2, please refer to [link / reference]. Figure 2 A dry film 20 is laminated onto the surface of the first conductive layer 12 away from the first insulating layer 11, and the dry film 20 is exposed and developed to form through holes 201 to expose the first connecting pad 121.
[0036] The dry film 20 is a photosensitive dry film selectively electroplated or chemically plated. In this embodiment, the dry film 20 is of type LDF438, and its thickness is 25~40μm. The exposure process uses ultraviolet light, and the exposure energy is determined by the type and thickness of the dry film. The developing process uses a weak alkaline developer to develop the dry film. The developing power of the developer is 10~30μm.
[0037] It is understood that a dry film 20 may also be provided on the surface of the third conductive layer 13 opposite to the first insulating layer 11 to protect the third conductive layer 13 in subsequent electroplating processes.
[0038] Step S3, please refer to Figure 3 A first conductive post 31 is formed on the first connecting pad 121, and the dry film is removed to expose the third conductive layer 13 and the first conductive layer 12. The first conductive post 31 completely covers the first connecting pad 121, such that the sidewall of the first conductive post 31 is aligned with the sidewall of the first connecting pad 121.
[0039] The first conductive post 31 protrudes from the first conductive layer 12. The height of the first conductive post 31 is less than or equal to the depth of the through hole. The material of the first conductive post 31 may include, but is not limited to, copper, gold, silver, etc.
[0040] In this embodiment, a first conductive post 31 is formed on the first connecting pad 121 using a patterned electroplating process. The dry film can be directly peeled off, but is not limited to this.
[0041] For step S4, please refer to [link / reference]. Figure 4A solder resist layer 40 is formed on the side of the first circuit board 10 where the third conductive layer 13 is located, covering the third conductive layer 13 and the first insulating layer 11. The solder resist layer 40 has a solder resist opening 401 through which the first solder pad 131 is exposed.
[0042] In this embodiment, the solder resist layer 40 is formed by printing, baking, UV exposure, and developing liquid photosensitive solder resist ink.
[0043] For step S5, please refer to [link / reference]. Figure 4 A conductive anti-oxidation layer 50 is formed on the surface of the first solder pad 131 and on the same side of the first connecting pad 121 and the first conductive post 31. In this embodiment, the anti-oxidation layer 50 is formed on the surface of the first solder pad 131 exposed in the solder mask opening 401. In other embodiments, the anti-oxidation layer 50 may be omitted.
[0044] The anti-oxidation layer 50 is made by chemical deposition or electroplating of nickel-gold, nickel-palladium-gold, chemical tin, chemical tin-silver, chemical tin-silver-copper, electroplating of tin, electroplating of tin-silver, electroplating of tin-silver-copper, or chemical silver.
[0045] Step S6, please refer to Figure 5 Solder 80 is formed on the surface of the anti-oxidation layer 50 opposite to the first conductive post 31. The solder 80 can be formed by printing or ball-mounting processes.
[0046] For step S7, please refer to [link / reference]. Figure 5 It provides an adhesive layer stack 60 and a second circuit board 70.
[0047] The second circuit board 70 includes a second insulating layer 71 and a second conductive layer 72 and a fourth conductive layer 73 disposed on opposite surfaces of the second insulating layer 71. The second conductive layer 72 and the fourth conductive layer 73 are electrically connected through a second conductive structure 74 penetrating the second insulating layer 71. The second conductive structure 74 can be a conductive hole or a conductive post.
[0048] The second conductive layer 72 includes a second connecting pad 721. A second conductive post 32 is protruding from the second connecting pad 721, and the sidewall of the second conductive post 32 is flush with the sidewall of the second connecting pad 721.
[0049] The fourth conductive layer 73 includes a second solder pad 731. A solder resist layer 40 is also provided on the side of the fourth conductive layer 73 opposite to the second insulating layer, and the second solder pad 731 is not covered by the solder resist layer 40.
[0050] A conductive anti-oxidation layer 50 is provided on the same side of the second connecting pad 721 and the second conductive post 32, as well as on the exposed surface of the second solder pad 731.
[0051] The second circuit board 70 can be prepared by steps S1-S5, but this application is not limited thereto.
[0052] The adhesive layer stack 60 includes a third insulating layer 61 and a first adhesive layer 62 and a second adhesive layer 63 disposed on two opposite surfaces of the third insulating layer 61. The adhesive layer stack 60 has an opening 601 that penetrates the third insulating layer 61, the first adhesive layer 62, and the second adhesive layer 63. The opening 601 allows the first conductive post 31 and the second conductive post 32 to pass through during a subsequent lamination process.
[0053] The second insulating layer 71 and the third insulating layer 61 are both made of dielectric materials commonly used in the art, such as polyimide and epoxy resin. The first adhesive layer 62 and the second adhesive layer 63 are both adhesives commonly used in the art, such as thermally conductive pressure-sensitive adhesives. The thickness of the third insulating layer 61 is thinner than the thickness of the first insulating layer 11 and the second insulating layer 71. In this embodiment, the thickness of the third insulating layer 61 is 4 μm, which is beneficial for thinning.
[0054] Step S8, please refer to Figure 5 and Figure 6 The first circuit board 10, the adhesive layer stack 60 and the second circuit board 70 are sequentially pressed together to obtain a multilayer circuit board 100, wherein the first conductive post 31 and the second conductive post 32 pass through the opening 601 and are respectively connected to the second insulating layer 71 and the first insulating layer 11, and the first conductive post 31 and the second conductive post 32 are connected by the solder 80.
[0055] After lamination, the first adhesive layer 62 fills the line gaps on the first conductive layer 12 and covers the side of the first conductive layer 12 away from the first insulating layer 11. The second adhesive layer 63 fills the line gaps on the second conductive layer 72 and covers the side of the second conductive layer 72 away from the second insulating layer 71. The first conductive layer 12 and the second conductive layer 72 are spaced apart from the third insulating layer 61. The solder 80 fills the gap between the first conductive post 31 and the second conductive post 32 to achieve electrical connection between the first conductive layer 12 and the second conductive layer 72.
[0056] Please see Figure 1-3 and Figures 7-9 The second embodiment of this application provides a method for manufacturing a multilayer circuit board 100', which includes the following steps:
[0057] Please see Figure 1-3 Referring to the aforementioned steps S1-S4, a first circuit board 10 is provided.
[0058] For step S5', please refer to Figure 7 A conductive anti-oxidation layer 50 is formed on the end of the first conductive post 31 away from the first insulating layer 11 and on the exposed surface of the first solder pad 131.
[0059] For step S6', please refer to Figure 8 Solder 80' is formed on the surface of the anti-oxidation layer 50 opposite to the first conductive post 31.
[0060] For step S7', please refer to Figure 8 Provides an adhesive layer stack 60 and a second circuit board 70'.
[0061] The second circuit board 70' includes a second insulating layer 71 and a second conductive layer 72' and a fourth conductive layer 73 disposed on opposite surfaces of the second insulating layer 71. The second conductive layer 72' and the fourth conductive layer 73 are electrically connected through a second conductive structure 74 penetrating the second insulating layer 71. The second conductive structure 74 can be a conductive hole or a conductive post.
[0062] The second conductive layer 72' includes a plurality of second connecting pads 721'. Each second connecting pad 721' has a protruding second conductive post 32', the sidewall of the second conductive post 32' being flush with the sidewall of the second connecting pad 721'. There is a gap between two adjacent second connecting pads 721' that can accommodate the first conductive post 31.
[0063] The adhesive layer stack 60 includes a third insulating layer 61 and a first adhesive layer 62 and a second adhesive layer 63 disposed on two opposite surfaces of the third insulating layer 61. The adhesive layer stack 60 has an opening 601' that penetrates the third insulating layer 61, the first adhesive layer 62, and the second adhesive layer 63. The opening 601' allows the first conductive post 31 and the two second conductive posts 32' to pass through simultaneously in a subsequent lamination process.
[0064] For step S8', please refer to Figure 8 and Figure 9 The first circuit board 10, the adhesive layer stack 60 and the second circuit board 70' are sequentially pressed together to obtain a multilayer circuit board 100', wherein the first conductive post 31 and two second conductive posts 32' simultaneously pass through an opening 601, and the first conductive post 31 is located between the two second conductive posts 32.
[0065] During lamination, the solder 80' located at the end of the first conductive post 31 flows into the gap between the first conductive post 31 and the second conductive post 32. After lamination, the solder 80' surrounds the end and sidewall of the first conductive post 31 and connects to the sidewalls of the two second conductive posts 32' to achieve electrical connection between the first conductive layer 12 and the second conductive layer 72'. The first conductive layer 12 and the second conductive layer 72' are respectively connected to the two opposite surfaces of the third insulating layer 61.
[0066] In the multilayer circuit board and its fabrication method provided in this application, the sidewalls of the first conductive pillar and the second conductive pillar are connected by soldering, thereby realizing the electrical connection between multiple circuit substrates. Compared with the vertical conductive structure (electroplated holes), the thickness of the multilayer circuit board of this application can be reduced, realizing thin-film fabrication. Moreover, when realizing the electrical connection between multiple circuit substrates, there is no need to perform drilling and copper plating processes, which simplifies the process. Furthermore, the first conductive pillar and the second conductive pillar do not occupy the space on the surface of the outer conductive layer, thus achieving high-density fabrication.
[0067] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above as a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.
Claims
1. A multilayer circuit board, characterized in that, The device includes a first circuit board, an adhesive layer stack, and a second circuit board stacked together. The first circuit board includes a first conductive layer with a first conductive post disposed thereon. The second circuit board includes a second conductive layer with a second conductive post disposed thereon. The adhesive layer stack has an opening for accommodating the first and second conductive posts. The sidewalls of the first and second conductive posts are connected by solder to electrically connect the first and second conductive layers.
2. The multilayer circuit board as described in claim 1, characterized in that, Both the sidewalls of the first conductive post and the sidewalls of the second conductive post are provided with conductive anti-oxidation layers, and the solder is sandwiched between the two anti-oxidation layers.
3. The multilayer circuit board as described in claim 1, characterized in that, The first circuit board further includes a first insulating layer disposed on one side of the first conductive layer, and the second circuit board further includes a second insulating layer disposed on one side of the second conductive layer. The end of the first conductive post away from the first conductive layer is connected to the second insulating layer, and the end of the second conductive post away from the second conductive layer is connected to the first insulating layer.
4. The multilayer circuit board as described in claim 3, characterized in that, The first circuit board further includes a third conductive layer disposed on the side of the first insulating layer opposite to the first conductive layer, and the second circuit board further includes a fourth conductive layer disposed on the side of the second insulating layer opposite to the second conductive layer. Both the third conductive layer and the fourth conductive layer are provided with solder resist layers.
5. The multilayer circuit board as described in claim 1, characterized in that, The second conductive layer is provided with two second conductive pillars spaced apart from each other. The two second conductive pillars and the first conductive pillar are together accommodated in the opening. The solder is arranged around the end and side wall of the first conductive pillar and is connected to the side wall of the two second conductive pillars.
6. The multilayer circuit board as described in claim 5, characterized in that, The adhesive layer stack includes a third insulating layer and a first adhesive layer and a second adhesive layer disposed on two opposite surfaces of the third insulating layer. The first adhesive layer is bonded to a first circuit board, and the second adhesive layer is bonded to a second circuit board. The first conductive layer and the second conductive layer are in contact with the two opposite surfaces of the third insulating layer, respectively.
7. A method for manufacturing a multilayer circuit board, characterized in that, Includes the following steps: A first circuit board is provided, including a first insulating layer and a first conductive layer stacked thereon, wherein the first conductive layer includes a connection pad; A dry film is laminated on the side of the first conductive layer away from the first insulating layer, and the dry film is exposed and developed to form through holes to expose the connecting pad. A first conductive post is formed on the connecting pad, and then the dry film is removed; Solder is formed on the sidewall of the first conductive post; A second circuit board is provided, including a second insulating layer and a second conductive layer stacked together, wherein a second conductive post is disposed on the second conductive layer; Provides an adhesive laminate with openings; The second circuit board, the adhesive layer stack, and the first circuit board are sequentially pressed together, wherein the first conductive post and the second conductive post pass through the opening and are respectively connected to the second insulating layer and the first insulating layer, and the first conductive post and the second conductive post are connected by the solder.
8. The method for manufacturing a multilayer circuit board as described in claim 7, characterized in that, Before the step "forming solder on the same side of the connecting pad and the first conductive post", the method further includes the following step: forming a conductive anti-oxidation layer on the same side of the connecting pad and the first conductive post, wherein the solder is formed on the anti-oxidation layer.
9. A method for manufacturing a multilayer circuit board, characterized in that, Includes the following steps: A first circuit board is provided, including a first insulating layer and a first conductive layer stacked thereon, wherein the first conductive layer includes a connection pad; A dry film is laminated on the side of the first conductive layer away from the first insulating layer, and the dry film is exposed and developed to form through holes to expose the connecting pad. A first conductive post is formed on the connecting pad, and then the dry film is removed; Solder is formed at the end of the first conductive post that is away from the connecting pad; A second circuit board is provided, comprising a second insulating layer and a second conductive layer stacked together, wherein two second conductive pillars are spaced apart on the second conductive layer; Provides an adhesive laminate with openings; The second circuit board, the adhesive layer stack, and the first circuit board are sequentially pressed together, wherein the first conductive post and two second conductive posts pass through the opening and are respectively connected to the second insulating layer and the first insulating layer, the first conductive post is located between the two second conductive posts, and the first conductive post and the two second conductive posts are connected by the solder.
10. The method for manufacturing a multilayer circuit board as described in claim 9, characterized in that, Before the step "forming solder at the end of the first conductive post away from the connecting pad", the method further includes the following step: forming a conductive anti-oxidation layer at the end of the first conductive post away from the connecting pad, wherein the solder is formed on the anti-oxidation layer.