Sensor device and method of manufacturing thereof

Abstract

A method for fabricating a sensor includes: forming a first auxiliary layer with trenches on the surface of a transparent substrate; forming a mesh structure in the trenches of the first auxiliary layer by electroplating, or forming a conductive layer in the trenches of the first auxiliary layer by electroplating and etching the conductive layer to form the mesh structure. The linewidth of the mesh structure is less than or equal to 1.5 micrometers, and the thickness of the mesh structure is greater than or equal to 2 micrometers.

Description

Technical Field

[0001] This article relates to, but is not limited to, the field of display technology, and in particular to a sensor device and its fabrication method. Background Technology

[0002] With the development of wireless communication technology, mobile communication products have experienced rapid growth. Mobile communication products enable data transmission and resource sharing. Antennas are an essential component in mobile communication products. Among these, antenna-on-display (AoD) technology (i.e., placing a transparent antenna on the display screen) is an important development direction. Summary of the Invention

[0003] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0004] This disclosure provides a sensor device and a method for manufacturing the same.

[0005] On one hand, this disclosure provides a method for fabricating a sensor device, comprising: forming a first auxiliary layer with trenches on the surface of a transparent substrate; forming a mesh structure in the trenches of the first auxiliary layer by electroplating, or forming a conductive layer in the trenches of the first auxiliary layer by electroplating and etching the conductive layer to form a mesh structure. The linewidth of the mesh structure is less than or equal to 1.5 micrometers, and the thickness of the mesh structure is greater than or equal to 2 micrometers.

[0006] In some exemplary embodiments, etching the conductive layer includes etching the conductive layer using a wet etching process.

[0007] In some exemplary embodiments, forming a first auxiliary structure layer with trenches on the surface of a transparent substrate includes: coating a photoresist material on the surface of the transparent substrate, exposing and developing the photoresist material to form the first auxiliary structure layer with trenches; wherein the width of the trenches is greater than the linewidth of the mesh structure. After forming the conductive layer and before etching the conductive layer, the method further includes: removing the first auxiliary structure layer.

[0008] In some exemplary embodiments, before forming a first auxiliary layer with trenches on the surface of a transparent substrate, the method further includes: forming a seed layer on the surface of the transparent substrate by a deposition process; after forming the first auxiliary layer, the trenches of the first auxiliary layer expose the surface of the seed layer. After removing the first auxiliary layer and before etching the conductive layer, the method further includes: etching the seed layer to remove any portions of the seed layer not covered by the conductive layer.

[0009] In some exemplary embodiments, before forming a seed layer on the surface of the transparent substrate by a deposition process, the method further includes forming an adhesion layer on the surface of the transparent substrate by a deposition process. After etching the conductive layer, the method further includes etching the adhesion layer, retaining the adhesion layer covered by the etched conductive layer.

[0010] In some exemplary embodiments, after forming a first auxiliary layer with trenches on the surface of a transparent substrate, and before forming a conductive layer in the trenches of the first auxiliary layer by an electroplating process, the method further includes forming a seed layer on the surface of the first auxiliary layer away from the transparent substrate and in the trenches by a deposition process.

[0011] In some exemplary embodiments, forming a conductive layer in the trench of the first auxiliary structure layer by electroplating includes: forming a first electroplated layer and a second electroplated layer on the surface of the first auxiliary structure layer away from the transparent substrate and in the trench by electroplating; removing the second electroplated layer, the first electroplated layer and the seed layer of the first auxiliary structure layer away from the transparent substrate surface, and forming a conductive layer in the trench of the first auxiliary structure layer.

[0012] In some exemplary embodiments, forming a conductive layer in the trench of the first auxiliary patterning layer by electroplating includes: forming a first electroplated layer on the surface of the first auxiliary patterning layer away from the transparent substrate and in the trench by electroplating; removing the seed layer and the first electroplated layer of the first auxiliary patterning layer away from the surface of the transparent substrate, while retaining the seed layer and the first electroplated layer in the trench; and forming a second electroplated layer in the trench of the first auxiliary patterning layer by electroplating.

[0013] In some exemplary embodiments, before forming a first auxiliary patterning layer with trenches on the surface of a transparent substrate, the method further includes: sequentially forming a second auxiliary patterning film, a hard mask, and a patterned first photoresist layer on the surface of the transparent substrate; etching the second auxiliary patterning film and the hard mask using the patterned first photoresist layer to form a patterned second auxiliary patterning layer. Forming the first auxiliary patterning layer with trenches on the surface of the transparent substrate includes: forming the first auxiliary patterning layer on the surface of the second auxiliary patterning layer away from the transparent substrate, the surface of the first auxiliary patterning layer away from the transparent substrate being flush with the surface of the second auxiliary patterning layer away from the transparent substrate; removing the second auxiliary patterning layer to form trenches in the first auxiliary patterning layer, wherein the width of the trenches is approximately the same as the linewidth of the mesh structure.

[0014] In some exemplary embodiments, the first auxiliary patterning layer is made of a photoresist material. Before forming a second auxiliary patterning film on the surface of the transparent substrate, the method further includes forming a seed layer on the surface of the transparent substrate. After forming a mesh structure in the trenches of the first auxiliary patterning layer by an electroplating process, the method further includes removing the first auxiliary patterning layer, etching the seed layer, and removing the seed layer not covered by the mesh structure.

[0015] In some exemplary embodiments, the first auxiliary patterning layer is made of a photosensitive resin material. Before forming the second auxiliary patterning film on the surface of the transparent substrate, the method further includes forming a seed layer on the surface of the transparent substrate. After etching the second auxiliary patterning film and the hard mask using a patterned first photoresist layer to form a patterned second auxiliary patterning layer, the method further includes etching the seed layer to remove any portions of the seed layer not covered by the second auxiliary patterning layer.

[0016] In some exemplary embodiments, etching the conductive layer to form a mesh structure includes: forming a patterned second photoresist layer on the surface of the first auxiliary layer and the conductive layer away from the transparent substrate, the second photoresist layer exposing the conductive layer at the target location; and removing the conductive layer at the target location by an etching process to form a mesh structure.

[0017] In some exemplary embodiments, the first auxiliary configuration layer is made of a photosensitive resin material. After forming the first auxiliary configuration layer with trenches on the surface of the transparent substrate, before forming a mesh structure in the trenches of the first auxiliary configuration layer by electroplating, the method further includes: forming a seed layer on the surface of the first auxiliary configuration layer away from the transparent substrate and within the trenches by a deposition process. The step of forming a mesh structure in the trenches of the first auxiliary configuration layer by electroplating includes: forming a first electroplated layer and a second electroplated layer on the surface of the first auxiliary configuration layer away from the transparent substrate and within the trenches by electroplating; removing the second electroplated layer, the first electroplated layer, and the seed layer of the first auxiliary configuration layer away from the transparent substrate, and forming an antenna structure in the trenches of the first auxiliary configuration layer.

[0018] In some exemplary embodiments, the transparent substrate has an effective region and an ineffective region surrounding the effective region. The mesh structure is located in the effective region, and the ineffective region is provided with an ineffective mesh; the linewidth of the ineffective mesh is greater than or equal to the linewidth of the mesh structure in the effective region.

[0019] In some exemplary embodiments, the transparent substrate also has an electrified region surrounding the ineffective region, the electrified region being configured to provide plating current in the electroplating process.

[0020] In some exemplary embodiments, the effective area includes: an antenna area and a visual compensation area located on at least one side of the antenna area; the pattern of the grid structure of the antenna area is different from the pattern of the grid structure of the visual compensation area.

[0021] In some exemplary embodiments, the linewidth of the invalid grid gradually and continuously increases along the direction away from the valid area, or increases in steps.

[0022] In some exemplary embodiments, the thickness of the mesh structure is approximately 2 to 5 micrometers.

[0023] On the other hand, embodiments of this disclosure provide a sensor device manufactured using the method described above.

[0024] In some exemplary embodiments, the sensor is a transparent antenna.

[0025] After reading and understanding the accompanying diagrams and detailed descriptions, other aspects can be understood. Attached Figure Description

[0026] The accompanying drawings are provided to further illustrate the technical solutions of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the technical solutions of this disclosure and do not constitute a limitation on the technical solutions of this disclosure. The shape and size of one or more components in the drawings do not reflect actual proportions and are only intended to illustrate the content of this disclosure.

[0027] Figure 1 This is a cross-sectional topography of the metal line obtained by a two-step photolithography method;

[0028] Figure 2 This is a flowchart of a sensor fabrication method according to at least one embodiment of the present disclosure;

[0029] Figure 3 This is a plan view of an antenna substrate according to at least one embodiment of the present disclosure;

[0030] Figure 4 This is a schematic diagram of an antenna fabrication process according to at least one embodiment of the present disclosure;

[0031] Figure 5 for Figure 4 A partial planar schematic diagram of the antenna region during the antenna fabrication process shown;

[0032] Figure 6 To adopt Figure 4 A partial planar schematic diagram of the mesh structure obtained by the fabrication process shown in the image, viewed under an optical microscope.

[0033] Figure 7 and Figure 8 To adopt Figure 4A schematic cross-section of the metal wire obtained by the fabrication process shown in the diagram, viewed under a scanning electron microscope.

[0034] Figure 9 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure;

[0035] Figure 10 for Figure 9 A partial planar schematic diagram of the antenna region during the antenna fabrication process shown;

[0036] Figure 11 for Figure 9 A partial planar schematic diagram of the antenna region after the first electroplating layer is formed and high-pressure rinsing is performed in the fabrication process shown in the diagram, under an optical microscope.

[0037] Figure 12 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure;

[0038] Figure 13 for Figure 12 A partial planar schematic diagram of the antenna region during the antenna fabrication process shown;

[0039] Figure 14 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure;

[0040] Figure 15 for Figure 14 A partial planar schematic diagram of the antenna region during the antenna fabrication process shown;

[0041] Figure 16 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure;

[0042] Figure 17 for Figure 16 A partial planar schematic diagram of the antenna region during the antenna fabrication process shown;

[0043] Figure 18 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure;

[0044] Figure 19 for Figure 18 A partial planar schematic diagram of the antenna region during the antenna fabrication process shown;

[0045] Figure 20 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure;

[0046] Figure 21 for Figure 20 A partial planar schematic diagram of the antenna region during the antenna fabrication process shown;

[0047] Figure 22 This is a schematic diagram of an electronic device according to at least one embodiment of the present disclosure. Detailed Implementation

[0048] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. The implementation can be carried out in many different forms. Those skilled in the art will readily understand that the methods and content can be transformed into other forms without departing from the spirit and scope of this disclosure. Therefore, this disclosure should not be construed as limited to the content described in the following embodiments. Unless otherwise specified, the embodiments and features in the embodiments of this disclosure can be arbitrarily combined with each other.

[0049] In the accompanying drawings, the size of one or more constituent elements, the thickness of layers, or areas are sometimes exaggerated for clarity. Therefore, this disclosure is not necessarily limited to these dimensions, and the shape and size of one or more parts in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate ideal examples, and this disclosure is not limited to the shapes or values ​​shown in the drawings.

[0050] The ordinal numbers such as "first," "second," and "third" used in this specification are used to avoid confusion among the constituent elements, not to limit the quantity. The term "multiple" in this disclosure refers to two or more quantities.

[0051] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of the constituent elements being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.

[0052] In this specification, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they may refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or joint; a direct connection, an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the meaning of these terms in this disclosure as appropriate.

[0053] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other multifunctional elements.

[0054] In this specification, "parallel" refers to the state where the angle formed by two straight lines is greater than or equal to -10° and less than 10°, and therefore also includes the state where the angle is greater than or equal to -5° and less than 5°. Similarly, "perpendicular" refers to the state where the angle formed by two straight lines is greater than or equal to 80° and less than 100°, and therefore also includes the state where the angle is greater than or equal to 85° and less than 95°.

[0055] In this specification, the deposition process can be any one or more of sputtering, evaporation, and chemical vapor deposition (CVD); the coating can be any one or more of spraying, spin coating, and blade coating; and the etching process can be any one or more of dry etching and wet etching. "Thin film" refers to a thin film of a certain material fabricated on a substrate using a deposition or coating process.

[0056] In this specification, the complete steps of an electroplating process may include: pre-cleaning, deionized water spraying, immersion in electroplating solution, electroplating with a first current, electroplating with a second current, and rinsing with deionized water, wherein the first current is less than the second current. Surface electroplating is based on a full-surface seed layer. Line electroplating is based on a patterned seed layer (e.g., a seed layer with a grid pattern). The complete steps of a wet etching process may include: pre-cleaning, deionized water wetting, etching with an etchant, rinsing with deionized water, and drying with clean, dry compressed air (CDA). The etching with the etchant may be performed using either immersion or spraying methods.

[0057] In this disclosure, "thickness" can refer to the dimension of a film layer in the direction perpendicular to the substrate. "Width" can refer to the dimension in the direction perpendicular to the extension direction. "Linewidth" can refer to the dimension of a trace in the direction perpendicular to the extension direction.

[0058] In this disclosure, "about" and "approximately" refer to situations where there are no strict limits and the process and measurement errors are allowed. "Approximately the same" in this disclosure can refer to values ​​differing by less than 10%.

[0059] In some implementations, transparent conductive materials (e.g., indium tin oxide (ITO), multilayer films of metals and conductive oxides, or metal mesh films are commonly used to design transparent sensor devices (e.g., transparent antennas). Taking the fabrication of a transparent antenna using ITO as an example, although ITO possesses some conductivity, its resistance is insufficient to meet the radiated energy efficiency requirements of antennas used in the 5G band compared to metallic materials. While metallic materials have lower resistivity, their opacity necessitates that the linewidth of the metal wires ensure visual transparency at normal viewing distances for use in transparent antennas. Furthermore, the thickness of the metal wires must ensure that the resistivity meets the antenna's radiated energy efficiency requirements. However, current metal trace fabrication processes in glass-based transistor backplanes cannot meet the technological requirements of transparent antennas.

[0060] In some implementations, a two-step photolithography method can be used to fabricate metal lines for metal meshes. For example, a two-step photolithography method may include the following steps: (a) sputtering a metal layer with a thickness of approximately 7000 angstroms onto a transparent substrate; (b) coating a photoresist layer and forming a patterned photoresist layer through exposure and development; (c) etching the exposed metal layer using a wet etching process to form metal lines; repeating steps (a) to (c) above. Taking a mask with a designed linewidth of 1.5 micrometers (µm) as an example, the cross-sectional morphology of the metal lines obtained by the two-step photolithography method is as follows: Figure 1 As shown, the cross-section of the metal lines is an equilateral triangle. Along the direction away from the transparent substrate, the widths of the metal lines are 2.74 μm, 1.77 μm, and 640 nm, respectively; the thickness of the metal lines is approximately 1.58 μm. Although the design linewidth of the mask is 1.5 μm, the exposure of the photoresist by the mask cannot produce a mask pattern with a linewidth of 1.5 μm, resulting in the final metal linewidth being greater than the designed linewidth of 1.5 μm.

[0061] Figure 2 This is a flowchart illustrating a method for fabricating a sensor device according to at least one embodiment of this disclosure. Figure 2 As shown, the sensor fabrication method provided in this embodiment includes the following steps:

[0062] S1. A first auxiliary layer with trenches is formed on the surface of a transparent substrate;

[0063] S2. A mesh structure is formed in the trenches of the first auxiliary layer by electroplating; or, a conductive layer is formed in the trenches of the first auxiliary layer by electroplating, and the conductive layer is etched to form a mesh structure. The linewidth of the mesh structure is less than or equal to 1.5 μm, and the thickness of the mesh structure is greater than or equal to 2 μm.

[0064] The sensor fabrication method provided in this embodiment utilizes the grooves of a first auxiliary layer, combined with an electroplating process, or a combination of electroplating and etching processes, to form a grid structure with satisfactory linewidth and thickness, thereby fabricating a sensor device. In some examples, taking a transparent antenna as an example, the transparent antenna obtained by the fabrication method of this embodiment has good light transmittance and can meet the requirements of microwave circuit characteristics. For example, the transparent antenna fabricated in this embodiment can be disposed on the surface of a display screen, thereby effectively improving the performance of wireless signal transmission and reception. However, this embodiment is not limited to this. In some examples, the sensor fabrication method of this embodiment can obtain other types of sensor devices with grid structures.

[0065] In some exemplary embodiments, the linewidth of the mesh structure can be approximately 1 μm or 1.5 μm. The thickness of the mesh structure can be approximately 2 μm to 5 μm, for example, approximately 3 μm, 4 μm, or 5 μm. However, this embodiment is not limited in this respect. In some examples, the dimensions of the mesh structure of the sensor device prepared in this embodiment are only required to meet the characteristic requirements of the sensor device. For example, the dimensions of the mesh structure of the transparent antenna prepared in this embodiment are only required to meet the light transmittance and microwave circuit characteristic requirements of the transparent antenna.

[0066] In some exemplary embodiments, etching the conductive layer may include using a wet etching process. In some examples, the conductive layer may be etched once or multiple times using a wet etching process to narrow the linewidth and obtain a mesh structure that meets the linewidth and thickness requirements. However, this embodiment is not limited to this.

[0067] In some exemplary embodiments, the grooves of the first auxiliary layer are grid-like, and the shape and size of the grooves and grid structure are approximately the same. The width of the grooves in the first auxiliary layer can be approximately the same as the line width of the grid structure. In this example, the grid structure can be directly formed in the grooves of the first auxiliary layer by electroplating. By combining the groove preparation process with the electroplating process, a grid structure with the required dimensions can be obtained.

[0068] In some exemplary embodiments, the trenches of the first auxiliary layer can be grid-like, and the shape of the trenches can be approximately the same as the shape of the grid structure. The width of the trenches in the first auxiliary layer is greater than the linewidth of the grid structure. In this example, after a conductive layer is formed in the trenches by electroplating, the linewidth is narrowed by etching the conductive layer to obtain the grid structure. By combining electroplating and etching processes (e.g., wet etching), a grid structure with the required dimensions can be obtained.

[0069] In some exemplary embodiments, a seed layer may be formed before forming the first auxiliary layer, or after forming the trenches of the first auxiliary layer, to facilitate its use in subsequent electroplating processes. However, this embodiment is not limited to this.

[0070] In some exemplary embodiments, the first auxiliary layer can be a photoresist material (e.g., photoresist) or a photosensitive resin material (e.g., optical adhesive). In some examples, the first auxiliary layer can be a photoresist material, and after forming trenches in the first auxiliary layer using the second auxiliary layer, a mesh structure is directly formed in the trenches of the first auxiliary layer; or, after forming trenches in the first auxiliary layer using photolithography, a conductive layer is formed in the trenches of the first auxiliary layer, and after removing the first auxiliary layer, the conductive layer is etched to narrow the linewidth to form a mesh structure. In some examples, the first auxiliary layer can be a photosensitive resin material, and after forming trenches in the first auxiliary layer using the second auxiliary layer, a mesh structure is directly formed in the trenches of the first auxiliary layer, and the first auxiliary layer can be retained as an optical protective layer. However, this embodiment is not limited to this.

[0071] In some exemplary embodiments, before forming the first auxiliary patterning layer with trenches on the surface of the transparent substrate, the antenna fabrication method of this exemplary embodiment may further include: sequentially forming a second auxiliary patterning film, a hard mask, and a patterned first photoresist layer on the surface of the transparent substrate; etching the second auxiliary patterning film and the hard mask using the patterned first photoresist layer to form a patterned second auxiliary patterning layer. In this example, forming the first auxiliary patterning layer with trenches on the surface of the transparent substrate may include: forming the first auxiliary patterning layer on the surface of the second auxiliary patterning layer away from the transparent substrate, the surface of the first auxiliary patterning layer away from the transparent substrate being flush with the surface of the second auxiliary patterning layer away from the transparent substrate; removing the second auxiliary patterning layer to form the trenches of the first auxiliary patterning layer. In this exemplary embodiment, based on the principle of pattern complementarity, trenches with approximately the same shape and size as the mesh structure are formed using the second auxiliary patterning layer, and a mesh structure is formed within the trenches.

[0072] In some exemplary embodiments, the transparent substrate may have an effective region and an ineffective region surrounding the effective region. A mesh structure is located in the effective region, and an ineffective mesh is provided in the ineffective region. The linewidth of the ineffective mesh may be greater than or equal to the linewidth of the mesh structure in the effective region. In some examples, the linewidth of the ineffective mesh may gradually and continuously increase along a direction away from the effective region, or it may increase in steps. However, this embodiment is not limited to this.

[0073] In some exemplary embodiments, the transparent substrate also has an electrified region surrounding the invalid region. The electrified region is configured to provide plating current in the electroplating process. In some examples, during the fabrication of the sensor device in this example, after the fabrication of the sensor device film is completed, the invalid region and the electrified region are cut away to obtain the sensor device.

[0074] The following examples illustrate the solution of this embodiment. The examples below use a transparent antenna as an example of the fabricated sensor. However, this embodiment is not limited to this. In some examples, other types of sensor devices with grid structures can be obtained using the sensor fabrication method provided in this embodiment.

[0075] In some exemplary embodiments, the transparent antenna can be fabricated by first fabricating an antenna substrate, and then cutting the antenna substrate to obtain one or more transparent antennas. The transparent antenna can be bonded to a microwave signal control circuit, and electrically connected to the motherboard of an electronic device (e.g., a mobile phone) through the microwave signal control circuit. For example, the microwave signal control circuit can be a printed circuit board (PCB) or a flexible printed circuit board (FPC). The transparent antenna can be disposed on the surface of the electronic device (e.g., a display screen) to transmit and receive radio signals (e.g., microwave signals). For example, the transparent antenna can be attached above the touch layer of the display screen and located below the glass cover. However, this embodiment is not limited to this.

[0076] Figure 3 This is a schematic diagram of an antenna substrate according to at least one embodiment of the present disclosure. Figure 3 As shown, the example describes an antenna substrate comprising a single effective region. One effective region corresponds to one transparent antenna. However, this embodiment is not limited to this. In some examples, the antenna substrate may include multiple effective regions arranged in a periodic and regular pattern, and subsequent cutting of the antenna substrate can divide it into multiple transparent antennas.

[0077] In some exemplary implementations, such as Figure 3As shown, the antenna substrate includes an effective region, an ineffective region C, and a charged region D. The ineffective region C surrounds the outside of the effective region, and the charged region D surrounds the outside of the ineffective region C. The ineffective region C acts as a buffer zone between the charged region D and the effective region, isolating them and serving as a process buffer. The charged region D is the area where electrical connection between the seed layer and the power supply of the electroplating equipment is established during the electroplating process, and is configured to provide electroplating current during the electroplating process. A cutting channel can be provided within the ineffective region C. After the antenna substrate is fabricated, a cutting device can cut along the cutting channel, removing the charged region D and the ineffective region C, while retaining the effective region to obtain a transparent antenna. In some examples, the effective region can be rectangular, and the ineffective region C and the charged region D can form a rectangular ring. However, this embodiment is not limited to this. For example, the effective region can be circular or elliptical, and the ineffective region can be annular. In some examples, when the antenna substrate includes multiple effective regions, each effective region can be surrounded by an ineffective region, and the areas between adjacent ineffective regions can all be charged regions.

[0078] In some exemplary implementations, such as Figure 3 As shown, the effective area may include a visual compensation area B and at least one antenna area A. The area within the effective area, excluding antenna area A, is the visual compensation area B. Antenna area A may be located on one side of the visual compensation area B. For example, antenna area A may be located at the lower center of the visual compensation area B. The area of ​​antenna area A may be smaller than the area of ​​the visual compensation area B. However, this embodiment is not limited in this respect. For example, the effective area may include a visual compensation area and two antenna areas, which may be located on opposite sides of the visual compensation area, such as the left and right sides of the visual compensation area.

[0079] In some exemplary embodiments, the visual compensation area B can be cut during the cutting process to adapt to the shape of the electronic device. For example... Figure 3 As shown, the four corners of the visual compensation area B can be cut to form an effective area with rounded corners. For example, the transparent antenna prepared in this exemplary embodiment is placed behind the display device, and the orthographic projection of the effective area on the display device can overlap with the display area of ​​the display device. Since the effective area is transparent, it will not affect the display effect of the display device.

[0080] In some exemplary embodiments, the effective area is provided with a mesh structure. The mesh structure of antenna region A is configured to realize microwave transmission and reception, while the mesh structure of visual compensation region B is configured to reduce the visual difference between it and antenna region A. The mesh structure of antenna region A can be designed by modeling and simulation according to microwave characteristics. The linewidths at different positions of the mesh structure of antenna region A can be approximately the same, and the mesh intersections are natural overlaps of traces in two directions. The mesh structure of visual compensation region B is only used to reduce visual differences and does not need to realize microwave transmission and reception. The pattern of the mesh structure of antenna region A can be different from the pattern of the mesh structure of visual compensation region B. In some examples, the mesh structure of antenna region A can include multiple mesh patterns without intersections and multiple mesh patterns with intersections, while the mesh structure of visual compensation region B can include multiple mesh patterns with intersections. In some examples, antenna region A also has multiple bonding electrodes for bonding with microwave signal control circuitry. However, this embodiment is not limited in this respect.

[0081] In some exemplary embodiments, the linewidth of the mesh structure in the effective region can be less than or equal to 1.5 μm, and the thickness can be greater than or equal to 2 μm, for example, approximately 2 μm to 3 μm. In this way, the mesh structure in the effective region can ensure that the antenna region is optically transparent and that the antenna region meets the requirements of microwave circuit characteristics, thereby realizing a transparent antenna.

[0082] In some exemplary embodiments, the invalid region C may be provided with an invalid mesh. The pattern of the invalid mesh may be substantially the same as the pattern of the mesh structure of the valid region, and the linewidth of the invalid mesh may be greater than or equal to the linewidth of the mesh structure of the valid region. In some examples, the linewidth of the invalid mesh at different locations may be substantially the same, for example, the linewidth range may be approximately 2.5 μm to 4 μm. Alternatively, the linewidth of the invalid mesh may gradually increase along the direction away from the valid region; for example, the linewidth of the invalid mesh near the electrified region D may be approximately 4 μm, the linewidth of the invalid mesh near the valid region may be approximately 2.5 μm, and the linewidth of the invalid mesh may gradually decrease along the direction from the electrified region D to the valid region. Alternatively, the linewidth of the invalid mesh may increase in a stepwise manner along the direction away from the valid region; for example, along the direction away from the valid region, the linewidth of the invalid mesh may increase in the following four steps: 2.5 μm, 3 μm, 3.5 μm, and 4 μm. However, this embodiment is not limited in this respect.

[0083] Figure 4 This is a schematic diagram of an antenna fabrication process according to at least one embodiment of the present disclosure. Figure 5 for Figure 4 The diagram shows a partial planar view of the antenna region during the antenna fabrication process. Figure 5 (a) is a partial planar schematic diagram after the seed layer is formed. Figure 5(b) is a partial planar schematic diagram after the formation of the first auxiliary construction layer. Figure 5 (c) is a partial planar schematic diagram after the electroplating layer is formed. Figure 5 (d) is a partial planar schematic diagram of the seed layer after etching. Figure 5 (e) is a partial planar schematic diagram of the electroplated layer after etching. Figure 5 (f) is a partial planar schematic diagram of the adhesion layer after etching.

[0084] In some exemplary implementations, such as Figure 4 and Figure 5 As shown, the antenna fabrication process in this embodiment includes the following steps.

[0085] (1-1) Preparation of transparent substrate 12.

[0086] In some exemplary embodiments, after coating the transparent substrate 10 with optically clear adhesive (OCA) 11, a cyclic olefin polymer (COP) film is attached to form a flexible transparent substrate 12. In some examples, the transparent substrate 10 can be a rigid substrate such as glass or sapphire.

[0087] In some examples, the material of the transparent substrate 12 may include one of the following: glass, polyethylene terephthalate (PET), polycarbonate (PC), polyimide (PI), etc. However, this embodiment is not limited to this.

[0088] (1-2) A buffer layer 13 is formed on the transparent substrate 12.

[0089] In some exemplary embodiments, a buffer layer 13 is formed on the surface of the transparent substrate 12 away from the transparent substrate 10. In some examples, an inorganic material is deposited on the surface of the transparent substrate 12 away from the transparent substrate 10 to form the buffer layer 13. For example, silicon dioxide (SiO2) is deposited by a low-temperature CVD process to form the buffer layer 13. In some examples, the thickness of the buffer layer 13 can be approximately 10 nm to 100 nm.

[0090] (1-3) A seed layer 15 is formed on the buffer layer 13.

[0091] In some exemplary embodiments, an adhesion film is deposited on the surface of the buffer layer 13 away from the transparent substrate 10 to form an adhesion layer 14; subsequently, a metal film is deposited (e.g., sputtered deposition) on the adhesion layer 14 to form a seed layer 15, such as... Figure 5 As shown in (a), the adhesive layer 14 is configured to increase the adhesion between the seed layer 15 and the buffer layer 13.

[0092] In some examples, the adhesion layer 14 may be a metallic material, such as titanium (Ti) or molybdenum (Mo), or an alloy material, such as MTD (i.e., an alloy containing molybdenum (Mo) and titanium (Ti)). The seed layer 15 may be a metallic material, such as any one or more of copper (Cu), gold (Au), tin (Sn), nickel (Ni), silver (Ag), indium tin oxide (ITO), or an alloy of the above metals.

[0093] In some examples, the thickness of the adhesion layer 14 can be approximately 10 nm to 100 mm. The thickness of the seed layer 15 can be approximately 100 nm to 500 nm.

[0094] (1-4) Form the first auxiliary construction layer 16 on the seed layer 15.

[0095] In some exemplary embodiments, a photoresist (PR) is coated on the surface of the seed layer 15 away from the transparent substrate 10, and a patterned first auxiliary layer 16 is formed by a photolithography process involving mask exposure and development, such as... Figure 5 As shown in (b). In some examples, the surface of the seed layer 15 may be treated with hexamethyldisilazane (HMDS) before the photoresist is coated to enhance the adhesion of the photoresist to the metal surface.

[0096] In some exemplary embodiments, the first auxiliary layer 16 has a first trench K1 that exposes the surface of the seed layer 15. For example... Figure 5 As shown in (b), the first groove K1 of the first auxiliary layer 16 is grid-shaped in the effective region. The grid pattern of the first groove K1 in the effective region can be approximately the same as the pattern of the grid structure, and the width of the first groove K1 can be greater than the line width of the grid structure. The first groove of the first auxiliary layer 16 in the invalid region can also be grid-shaped. The grid pattern of the first groove in the invalid region can be approximately the same as the pattern of the invalid grid in the invalid region, and the width of the first groove in the invalid region can be greater than the line width of the invalid grid. The width of the first groove in the invalid region can be greater than or equal to the width of the first groove in the effective region. The first auxiliary layer 16 in the electrified region is completely removed, exposing the surface of the seed layer 15.

[0097] In some exemplary embodiments, the design width of the first trench K1 in the effective region can be less than 1.5 μm. After designing the exposure dose and development conditions, the bottom surface and sidewalls of the first trench K1 in the effective region can be substantially vertical, and the width of the first trench K1 can be, for example, less than 4 μm.

[0098] In some exemplary embodiments, the thickness of the first auxiliary layer 16 can be approximately 2µm to 5µm. The thickness of the first auxiliary layer 16 can be determined based on the thickness required for the mesh structure. By adjusting the thickness of the first auxiliary layer, the thickness of the mesh structure can be changed.

[0099] In some exemplary embodiments, the photoresist may be a low-temperature curing adhesive, and the curing temperature may not be higher than the tolerance temperature of the COP film and OCA, for example, the curing temperature may be about 140°C.

[0100] (1-5) Preparation of electroplated layer 17. In this example, electroplated layer 17 is the conductive layer in the above embodiments.

[0101] In some exemplary embodiments, an electroplated layer 17 is formed within the first trench K1 of the first auxiliary layer 16 by an electroplating process, such as... Figure 5 As shown in (c), the electroplated layer 17 can be in a mesh-like shape. The electroplated layer 17 is in direct contact with the surface of the seed layer 15 within the first trench K1. In some examples, a redistribution layer (RDL) electroplating process is used, employing an acidic plating solution (e.g., copper sulfate (CuSO4) + sulfuric acid (H2SO4) + additives) for spin plating, with the plating rate controlled between 0.03 μm / min and 0.2 μm / min. The thickness of the electroplated layer 17 can be approximately 3 μm to 5 μm.

[0102] In this example, such as Figure 4 As shown, the thickness of the electroplated layer 17 can be less than the thickness of the first auxiliary layer 16. The electroplated layer 17 in both the effective and ineffective areas can be located within the first trench of the first auxiliary layer 16, and the electroplated area can be covered by the electroplated layer 17.

[0103] (1-6) Remove the first auxiliary composition layer 16.

[0104] In some exemplary embodiments, a stripping solution is used to clean the photoresist, followed by deionized water cleaning and CDA drying to remove the first auxiliary layer 16, exposing the electroplated layer 17 and the seed layer 15.

[0105] (1-7) Etch the seed layer 15.

[0106] In some exemplary embodiments, a wet etching process is used to etch the seed layer 15 to remove the portion of the seed layer 15 not covered by the electroplated layer 17, i.e., retaining the seed layer 15 covered by the electroplated layer 17. Figure 5 As shown in (d). After this etching step, the seed layer 15 not covered by the electroplated layer 17 is etched away, exposing the adhesion layer 14, and a portion of the electroplated layer 17 away from the transparent substrate 10 is also etched.

[0107] In some examples, taking Cu as the material of seed layer 15, a hydrogen peroxide-based etching solution (e.g., the content of sulfuric acid (H2SO4) is about 2% to 3%, the content of additives is about 2% to 3%, and the concentration of hydrogen peroxide (H2O2) is about 0.1% to 1%) can be used to etch for a certain period of time until the color of seed layer 15 disappears, that is, the copper color disappears.

[0108] (1-8) Etching the electroplated layer 17.

[0109] In some exemplary embodiments, a wet etching process is used to etch the electroplated layer 17 to narrow the linewidth of the metal traces in the electroplated layer 17, forming a mesh structure 18, such as... Figure 5 As shown in (e).

[0110] In some examples, taking Cu as the material of the electroplated layer 17, a hydrogen peroxide-based etching solution (e.g., H2SO4 content of approximately 2% to 4%, additive content of approximately 2% to 3%, and H2O2 concentration of approximately 0.01% to 0.2%) can be used to etch for a certain period of time until the linewidth of the electroplated layer 17 reaches the target linewidth, for example, 1.5 μm. This step can use a lower hydrogen peroxide concentration to slowly etch the metal lines, thereby achieving over-etching of the metal lines to reach the target linewidth.

[0111] (1-9) Etch the adhesion layer 14.

[0112] In some exemplary embodiments, the adhesion layer 14 is etched to remove the portion of the adhesion layer 14 not covered by the mesh structure 18, i.e., the adhesion layer 14 covered by the mesh structure 18 is retained, such as... Figure 5 As shown in (f). In this example, by etching the adhesive layer 14, the adhesive layer 14 can be formed with the same pattern as the mesh structure 18. For example, the orthographic projection of the mesh structure 18 on the transparent substrate 10 can approximately coincide with the orthographic projection of the adhesive layer 14 on the transparent substrate 10.

[0113] In some examples, either wet etching or dry etching can be used to etch the adhesion layer 14. Taking the material of the adhesion layer 14 as metallic Ti as an example, in the wet etching process, a finely formulated etching solution can be selected that only corrodes Ti without damaging the Cu-plated layer 17. Taking the material of the adhesion layer 14 as MTD as an example, dry etching using ion beam etching (IBE) can be performed. However, this embodiment is not limited to this approach.

[0114] (1-10) Form an optical protective layer 19.

[0115] In some exemplary embodiments, an optical adhesive is coated on the transparent substrate 10 forming the aforementioned structure, and after planarization, an optical protective (OC, Over Coat) layer 19 is formed. The surface of the mesh structure 18 away from the transparent substrate 10 can be flush with the surface of the optical protective layer 19 away from the transparent substrate 10.

[0116] In some examples, the optical adhesive can be SOC-5004U. The thickness of the optical adhesive can be approximately 3µm to 4µm. The curing temperature of the optical adhesive can be no higher than the tolerance temperature of the COP film and OCA, for example, the curing temperature can be approximately 140°C. In other examples, the optical adhesive can be a UV-curable material.

[0117] (1-11), substrate peeling (Delami) and cutting process.

[0118] In some exemplary embodiments, a low-temperature (e.g., below -20°C) cold plate is used to cool the transparent substrate forming the aforementioned structure. Then, the flexible substrate 12 is peeled off from the transparent substrate 10 to obtain an antenna substrate. The antenna substrate is then cut using a cutting device, for example, by cutting along the cutting lines of the invalid region to remove the invalid region and the power-on region, thereby obtaining a transparent antenna.

[0119] The fabrication process of this exemplary embodiment employs only a single photolithography step, resulting in a simple fabrication process. Furthermore, it supports low-temperature (e.g., 140°C) processes, minimizing damage to the flexible transparent substrate. The fabrication process of this embodiment can be implemented using existing mature fabrication equipment, ensuring good compatibility with existing fabrication processes. The process is simple to implement, easy to execute, highly efficient, low-cost, and yields high-quality products.

[0120] Figure 6 To adopt Figure 4 The diagram shows a partial planar view of the mesh structure obtained by the fabrication process shown under an optical microscope (OM). Figure 7 and Figure 8 To adopt Figure 4 The diagram shows a cross-sectional view of the metal wire obtained by the fabrication process shown, obtained under a scanning electron microscope (SEM). Figure 7 The diagram shows a cross-sectional view of the metal wire along its width. Figure 8 The diagram shows a cross-sectional view of the metal wire in its extension direction.

[0121] In some exemplary implementations, such as Figure 6 As shown, the sensor fabrication method provided in this embodiment can control the linewidth of the metal wires in the mesh structure to be less than or equal to 1.5 μm, so that the transparent antenna has high optical transparency and can meet the requirement of visual transparency.

[0122] In some exemplary implementations, such as Figure 7 As shown, the cross-section of the metal lines in the mesh structure is approximately columnar in the width direction, and the bottom surface and sidewalls of the metal lines are approximately perpendicular to each other. After etching, the width of the seed layer near the transparent substrate is greater than that away from the transparent substrate; for example, the width near the transparent substrate is approximately 1.44 μm. The linewidth narrows significantly at the interface between the seed layer and the electroplated layer. After etching, the electroplated layer has a rough morphology due to liquid corrosion, and the linewidth of the metal lines gradually decreases away from the seed layer; for example, the linewidth near the seed layer is approximately 1.11 μm, and the linewidth away from the seed layer is approximately 1.01 μm. Figure 7 and Figure 8 As shown, the thickness of the metal line can be the sum of the average thicknesses of the etched electroplated layer and the seed layer, for example, about 2 to 3 μm. The thickness at different locations can be approximately the same along the extension direction of the metal line; for example, the thickness of the metal line in the middle region along the extension direction can be about 3.06 μm, and at the ends it can be about 2.79 μm.

[0123] Figure 9 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure. Figure 10 for Figure 9 The diagram shows a partial planar view of the antenna region during the antenna fabrication process. Figure 10 (a) is a partial planar schematic diagram after the buffer layer is formed. Figure 10 (b) is a partial planar schematic diagram after the formation of the first auxiliary construction layer. Figure 10 (c) is a partial planar schematic diagram after the seed layer is formed. Figure 10 (d) is a partial planar schematic diagram after the formation of the first electroplated layer and high-pressure rinsing. Figure 10 (e) is a partial planar schematic diagram after the formation of the second electroplating layer. Figure 10 (f) is a partial planar schematic diagram after the first auxiliary structure layer is removed and the conductive layer is etched. Figure 10 (g) is a partial planar schematic diagram after the formation of the second photoresist layer. Figure 10 (h) is a partial planar schematic diagram after the grid structure is formed.

[0124] In some exemplary implementations, such as Figure 9 and Figure 10 As shown, the antenna fabrication process in this embodiment includes the following steps.

[0125] (2-1) Preparation of transparent substrate 12.

[0126] In some exemplary embodiments, after coating the transparent substrate 10 with optically clear adhesive (OCA) 11, a cyclic olefin polymer (COP) film is attached to form a flexible transparent substrate 12. In some examples, the transparent substrate 10 can be a rigid substrate such as glass or sapphire.

[0127] (2-2) A buffer layer 13 is formed on the transparent substrate 12.

[0128] In some exemplary embodiments, a buffer layer 13 is formed on the surface of the transparent substrate 12 away from the transparent substrate 10, such as Figure 10 As shown in (a). In some examples, an inorganic material is deposited on the surface of the transparent substrate 12 away from the transparent substrate 10 to form a buffer layer 13. For example, silicon dioxide (SiO2) is deposited by a low-temperature CVD process to form the buffer layer 13. In some examples, the thickness of the buffer layer 13 can be from about 10 nm to 100 nm.

[0129] (2-3) A first auxiliary construction layer 24 is formed on the buffer layer 13.

[0130] In some exemplary embodiments, photoresist is coated on the surface of the buffer layer 13 away from the transparent substrate 10, and a patterned first auxiliary layer 24 is formed by a photolithography process involving mask exposure and development, such as... Figure 10 As shown in (b). In some examples, HMDS treatment can be performed on the surface of buffer layer 13 before photoresist coating to enhance photoresist adhesion.

[0131] In some exemplary embodiments, the first auxiliary layer 24 has a second groove K2 that exposes the surface of the buffer layer 13. For example... Figure 10 As shown in (b), the second groove K2 of the first auxiliary layer 24 is grid-shaped in the effective area. The grid pattern of the second groove K2 in the effective area can be approximately the same as the pattern of the grid structure, and the width of the second groove K2 can be greater than the line width of the grid structure. The second groove of the first auxiliary layer 24 in the invalid area can also be grid-shaped. The grid pattern of the second groove in the invalid area can be approximately the same as the pattern of the invalid grid in the invalid area, and the width of the second groove in the invalid area can be greater than the line width of the invalid grid. The width of the second groove in the invalid area can be greater than or equal to the width of the second groove in the effective area. The first auxiliary layer 24 in the electrified area is completely removed, exposing the surface of the buffer layer 13.

[0132] In some exemplary embodiments, the design width of the second trench K2 in the effective area can be less than 1.5 μm. After designing the exposure dose and development conditions, the bottom surface and sidewalls of the second trench K2 in the effective area can be substantially vertical, and the width of the second trench K2 can be, for example, less than 3 μm.

[0133] In some exemplary embodiments, the thickness of the first auxiliary layer 24 can be approximately 2µm to 5µm. The thickness of the first auxiliary layer 24 can be determined based on the thickness required for the mesh structure. By adjusting the thickness of the first auxiliary layer, the thickness of the mesh structure can be changed.

[0134] In some exemplary embodiments, the photoresist may be a low-temperature curing adhesive, and the curing temperature may not be higher than the tolerance temperature of the COP film and OCA, for example, the curing temperature may be about 140°C.

[0135] (2-4) Prepare seed layer 251, first electroplating layer 252 and third electroplating layer 253. In this example, conductive layer 25 may include seed layer 251, first electroplating layer 252 and second electroplating layer 253 stacked sequentially in the trench.

[0136] In some exemplary embodiments, a metal thin film is deposited on the transparent substrate 10 forming the aforementioned structure to form a seed layer 251 covering the entire transparent substrate 10, such as... Figure 10 (c) is shown. Then, a first electroplated layer 252 is formed on the seed layer 251 by an electroplating process, wherein the first electroplated layer 252 covers the entire transparent substrate 10. Then, the entire transparent substrate 10 is subjected to high-pressure rinsing or ultrasonic cleaning with deionized water to remove the first electroplated layer 252 and the seed layer 251 away from the surface of the first auxiliary layer 24, leaving only the first electroplated layer 252 and the seed layer 251 within the second trench K2. Then, a second electroplated layer 253 is formed in the second trench K2 by an electroplating process, the second electroplated layer 253 being in direct contact with the first electroplated layer 252, such as... Figure 10 As shown in (e), the conductive layer 25 has a grid shape. In some examples, the electroplating process for forming the first electroplated layer 252 is a surface electroplating process, which can use a current density matching the electroplating solution of 10% to 30%; the electroplating process for forming the second electroplated layer 253 is a line electroplating process, which can use a current density matching the electroplating solution.

[0137] Figure 11 for Figure 9 The diagram shows a partial planar view of the antenna area under an optical microscope after the formation of the first electroplated layer and high-pressure rinsing during the antenna fabrication process. Figure 11As shown, after the first electroplated layer 252 is formed and high-pressure rinsing is performed, the first electroplated layer 252 and seed layer 251 of the first auxiliary layer 24 away from the surface of the transparent substrate 10 are removed, while the seed layer 251 and the first electroplated layer 252 in the second groove K2 of the first auxiliary layer 24 can be retained.

[0138] (2-5) Remove the first auxiliary composition layer 24.

[0139] In some exemplary embodiments, a stripping solution is used to clean the photoresist, followed by deionized water cleaning and CDA drying to remove the first auxiliary layer 24, exposing the conductive layer 25 and the buffer layer 13.

[0140] (2-6) Etch the conductive layer 25.

[0141] In some exemplary embodiments, a wet etching process is used to etch the conductive layer 25 to narrow the linewidth of the metal traces in the conductive layer 25, such as... Figure 10 As shown in (f).

[0142] In some examples, taking Cu as the material of conductive layer 25, a hydrogen peroxide-based etching solution (e.g., H2SO4 content of approximately 2% to 4%, additive content of approximately 2% to 3%, and H2O2 concentration of approximately 0.01% to 0.2%) can be used to etch for a certain period of time until the linewidth of conductive layer 25 reaches the target linewidth, such as 1.5 μm. This step can use a lower hydrogen peroxide concentration to slowly etch the metal lines, thereby achieving over-etching of the metal lines to reach the target linewidth.

[0143] (2-7) Form an optical protective layer 26.

[0144] In some exemplary embodiments, an optical adhesive is coated on the transparent substrate 10 forming the aforementioned structure, and after planarization, an optical protective layer 26 is formed. The surface of the etched conductive layer 25 away from the transparent substrate 10 can be flush with the surface of the optical protective layer 26.

[0145] (2-8) Forming a second photoresist layer 27.

[0146] In some exemplary embodiments, photoresist is coated on the transparent substrate 10 forming the aforementioned structure, and a patterned second photoresist layer 27 is formed by mask exposure and development, such as... Figure 10 As shown in (g), the second photoresist layer 27 has a first via K22, which exposes the conductive layer 25 at the intersection of the traces.

[0147] (2-9) Etch the conductive layer 25.

[0148] In some exemplary embodiments, a wet etching process is used to etch the conductive layer 25 to remove the conductive layer 25 at the trace intersection positions exposed by the second photoresist layer 27, so as to remove the grid intersection points that need to be disconnected and form a grid structure 28.

[0149] (2-10) Remove the second photoresist layer 27, and perform substrate peeling and cutting.

[0150] In some exemplary embodiments, photoresist is cleaned using a resist remover, followed by deionized water rinsing and CDA drying to remove the second photoresist layer 27, exposing the mesh structure 28 and the optical protective layer 26, as shown. Figure 10 As shown in (h).

[0151] In some exemplary embodiments, a low-temperature (e.g., below -20°C) cold plate is used to cool the transparent substrate forming the aforementioned structure. Then, the flexible substrate 12 is peeled off from the transparent substrate 10 to obtain an antenna substrate. The antenna substrate is then cut using a cutting device, for example, by cutting along the cutting lines of the invalid region to remove the invalid region and the power-on region, thereby obtaining a transparent antenna.

[0152] In this exemplary embodiment, after high-pressure rinsing of the first electroplated layer and the seed layer, the seed layer and the first electroplated layer exist only in the second trench. Since a line plating process is used when forming the second electroplated layer, the seed layer and the first electroplated layer in the second trench become the only path for the plating current in the line plating process. The mesh structure in the effective region has a mesh pattern with intersecting breaks. To prepare a mesh pattern with intersecting breaks based on the line plating process, the mesh pattern of the second trench needs to adopt a connected design (i.e., a mesh pattern without intersecting breaks). After obtaining a mesh pattern without intersecting breaks through the line plating process, an etching process is used to form the intersecting breaks of the mesh (i.e., steps (2-8) and (2-9)). In other embodiments using a surface plating process, the trench pattern of the first auxiliary layer in the effective region can be approximately the same as the mesh structure pattern, without the need for an additional intersecting break etching process.

[0153] The fabrication method provided in this exemplary embodiment forms a first electroplated layer through full-surface pre-plating, and then performs line electroplating in the trenches after stripping away the metal outside the trenches. Intersections of the broken connections in the mesh structure are removed by a wet etching process after electroplating. This embodiment's fabrication method eliminates the need for a separate etching process for the seed layer, reducing fabrication steps and avoiding the risk of metal line stripping caused by seed layer etching.

[0154] Figure 12 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure. Figure 13 for Figure 12The diagram shows a partial planar view of the antenna region during the antenna fabrication process. Figure 13 (a) is a partial planar schematic diagram after the buffer layer is formed. Figure 13 (b) is a partial planar schematic diagram after the formation of the first auxiliary construction layer. Figure 13 (c) is a partial planar schematic diagram after the seed layer is formed. Figure 13 (d) is a partial planar schematic diagram after the formation of the second electroplating layer. Figure 13 (e) is a partial planar schematic diagram after etching the conductive layer. Figure 13 (f) is a partial planar schematic diagram of the conductive layer after removing the first auxiliary layer and etching to form a mesh structure.

[0155] In some exemplary implementations, such as Figure 12 and Figure 13 As shown, the antenna fabrication process in this embodiment includes the following steps.

[0156] (3-1) Preparation of transparent substrate 12.

[0157] In some exemplary embodiments, after coating the transparent substrate 10 with optically clear adhesive (OCA) 11, a cyclic olefin polymer (COP) film is attached to form a flexible transparent substrate 12. In some examples, the transparent substrate 10 can be a rigid substrate such as glass or sapphire.

[0158] (3-2) A buffer layer 13 is formed on the transparent substrate 12.

[0159] In some exemplary embodiments, a buffer layer 13 is formed on the surface of the transparent substrate 12 away from the transparent substrate 10, such as Figure 13 As shown in (a). In some examples, an inorganic material is deposited on the surface of the transparent substrate 12 away from the transparent substrate 10 to form a buffer layer 13. For example, silicon dioxide (SiO2) is deposited by a low-temperature CVD process to form the buffer layer 13. In some examples, the thickness of the buffer layer 13 can be from about 10 nm to 100 nm.

[0160] (3-3) A first auxiliary construction layer 34 is formed on the buffer layer 13.

[0161] In some exemplary embodiments, photoresist is coated on the surface of the buffer layer 13 away from the transparent substrate 10, and a patterned first auxiliary layer 34 is formed by a photolithography process involving mask exposure and development, such as... Figure 13 As shown in (b).

[0162] In some exemplary embodiments, the first auxiliary layer 34 has a third groove K3, and the second groove 23 exposes the surface of the buffer layer 13. A description of the first auxiliary layer 34 and the third groove K3 can be found in the description of the first auxiliary layer 24 and the second groove K2 in the previous embodiment, and therefore will not be repeated here.

[0163] (3-4) Prepare seed layer 351, first electroplating layer 352 and second electroplating layer 353. In this example, conductive layer 35 may include seed layer 351, first electroplating layer 352 and second electroplating layer 353 stacked sequentially in the trench.

[0164] In some exemplary embodiments, a metal thin film is deposited on the transparent substrate 10 forming the aforementioned structure to form a seed layer 351 covering the entire transparent substrate 10, such as... Figure 13 (c) is shown. Then, a first electroplated layer 352 and a second electroplated layer 353 are sequentially formed on the seed layer 351 by an electroplating process. Then, a wet etching process is used to etch the seed layer 351, the first electroplated layer 352 and the second electroplated layer 353 away from the surface of the transparent substrate 10 of the first auxiliary layer 34, removing the seed layer 351, the first electroplated layer 352 and the second electroplated layer 353 away from the surface of the transparent substrate 10 of the first auxiliary layer 35, leaving only the seed layer 351, the first electroplated layer 352 and the second electroplated layer 353 in the third trench K3 to form a conductive layer 35, as shown. Figure 13 As shown in (e), the conductive layer 35 has a mesh shape. However, this embodiment is not limited to this. In some other examples, taking Cu as an example, chemical mechanical polishing (CMP) can be used to thin the seed layer 351, the first electroplated layer 352, and the second electroplated layer 353 to remove the seed layer 351, the first electroplated layer 352, and the second electroplated layer 353 away from the surface of the transparent substrate 10 in the first auxiliary layer 35.

[0165] In some examples, the electroplating process for forming the first electroplated layer 352 is a surface electroplating process, which can use a current density that matches the electroplating solution of 10% to 30%; the electroplating process for forming the second electroplated layer 353 is a surface electroplating process, which can use a current density that matches the electroplating solution.

[0166] (3-5) Remove the first auxiliary composition layer 34.

[0167] In some exemplary embodiments, a photoresist remover is used for photoresist cleaning, followed by deionized water cleaning and CDA drying to remove the first auxiliary layer 34, exposing the conductive layer 35 and the buffer layer 13.

[0168] (3-6) Etch the conductive layer 35.

[0169] In some exemplary embodiments, a wet etching process is used to etch the conductive layer 35 to narrow the linewidth of the metal traces in the conductive layer 35, forming a mesh structure 36, such as... Figure 13 As shown in (f).

[0170] (3-7) Forming an optical protective layer 37.

[0171] In some exemplary embodiments, an optical adhesive is coated onto the transparent substrate 10 forming the aforementioned structure, and after planarization, an optical protective layer 37 is formed. The surface of the mesh structure 36 away from the transparent substrate 10 may be flush with the surface of the optical protective layer 37.

[0172] (3-8) Substrate peeling and cutting process.

[0173] In some exemplary embodiments, a low-temperature (e.g., below -20°C) cold plate is used to cool the transparent substrate forming the aforementioned structure. Then, the flexible substrate 12 is peeled off from the transparent substrate 10 to obtain an antenna substrate. The antenna substrate is then cut using a cutting device, for example, by cutting along the cutting lines of the invalid region to remove the invalid region and the power-on region, thereby obtaining a transparent antenna.

[0174] The fabrication method provided in this exemplary embodiment involves forming a first and second electroplated layer using a complete electroplating process, then etching the metal outside the trenches to form a conductive layer with a mesh shape. A wet etching process is then used to etch the conductive layer to achieve a mesh structure that meets the linewidth and thickness requirements. This embodiment eliminates the need for a separate etching process for the seed layer, reducing the number of fabrication steps and avoiding the risk of metal line stripping caused by seed layer etching. Furthermore, compared to the previous embodiment, this embodiment omits the line electroplating process and the line breakage process at intersections, reducing the complexity and risk of the fabrication process.

[0175] Figure 14 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure. Figure 15 for Figure 14 The diagram shows a partial planar view of the antenna region during the antenna fabrication process. Figure 15 (a) is a partial planar schematic diagram of the hard mask after etching. Figure 15 (b) is a partial planar schematic diagram after the formation of the second auxiliary construction layer. Figure 15 (c) is a partial planar schematic diagram after photoresist has been applied to the second auxiliary layer. Figure 15 (d) is a partial planar schematic diagram after the formation of the first auxiliary construction layer. Figure 15 (e) is a partial planar schematic diagram after removing the first auxiliary composition layer. Figure 15(f) is a partial planar schematic diagram after etching the seed layer.

[0176] In some exemplary implementations, such as Figure 14 and Figure 15 As shown, the antenna fabrication process in this embodiment includes the following steps.

[0177] (4-1) Preparation of transparent substrate 12.

[0178] In some exemplary embodiments, after coating the transparent substrate 10 with OCA 11, a COP film is attached to form a flexible transparent substrate 12. In some examples, the transparent substrate 10 can be a rigid substrate such as glass or sapphire.

[0179] (4-2) A buffer layer 13 is formed on the transparent substrate 12.

[0180] In some exemplary embodiments, a buffer layer 13 is formed on the surface of the transparent substrate 12 away from the transparent substrate 10. In some examples, an inorganic material is deposited on the surface of the transparent substrate 12 away from the transparent substrate 10 to form the buffer layer 13. For example, silicon dioxide (SiO2) is deposited by a low-temperature CVD process to form the buffer layer 13. In some examples, the thickness of the buffer layer 13 can be approximately 10 nm to 100 nm.

[0181] (4-3) A seed layer 41 is formed on the buffer layer 13.

[0182] In some exemplary embodiments, a metal thin film is deposited on the surface of the buffer layer 13 away from the transparent substrate 10 to form a seed layer 41. In some examples, the seed layer 41 may be a metallic material, such as any one or more of copper (Cu), gold (Au), tin (Sn), nickel (Ni), silver (Ag), indium tin oxide (ITO), or an alloy of the above metals. The thickness of the seed layer 41 may be approximately 100 nm to 500 nm.

[0183] (4-4) A second auxiliary patterning film 42, a hard mask 43 and a patterned first photoresist layer 44 are sequentially formed on the seed layer 41.

[0184] In some exemplary embodiments, a second auxiliary patterning film 42 and a hard mask 43 are sequentially formed on the surface of the seed layer 41 away from the transparent substrate 10. In some examples, silicon dioxide (SiO2) can be deposited on the surface of the seed layer 41 away from the transparent substrate 10 by low-temperature CVD to form the second auxiliary patterning film 42, and the hard mask 43 can be deposited on the second auxiliary patterning film 42 by low-temperature CVD. In some examples, the material of the hard mask 43 can be a metal or a conductive oxide (e.g., ITO). In some examples, the thickness of the second auxiliary patterning film 42 is approximately 2 μm. However, this embodiment is not limited to this.

[0185] In some exemplary embodiments, photoresist is coated on the surface of the hard mask 43 away from the transparent substrate 10, and a patterned first photoresist layer 44 is formed by a photolithography process involving mask exposure and development.

[0186] (4-5) The hard mask 43 and the second auxiliary patterning film 42 are etched using the first photoresist layer 44 to form the second auxiliary patterning layer 45.

[0187] In some exemplary embodiments, a wet etching process is used to etch the hard mask 43 to remove the portion of the hard mask 43 not covered by the first photoresist layer 44, such as... Figure 15 As shown in (a). Subsequently, a dry etching process (e.g., inductively coupled plasma (ICP) etching process) is used to etch the second auxiliary patterning film 42, etching away the second auxiliary patterning film 42 not covered by the hard mask 43, i.e., retaining the second auxiliary patterning film 42 covered by the hard mask 43, forming the second auxiliary patterning layer 45, as shown. Figure 15 As shown in (b). In this example, the second auxiliary patterning film is etched by setting a hard mask to obtain the second auxiliary patterning layer 45.

[0188] (4-6) Remove the first photoresist layer 44 and the hard mask 43.

[0189] In some exemplary embodiments, a photoresist remover is used for photoresist cleaning, followed by deionized water cleaning and CDA drying to remove the first photoresist layer 44 and expose the hard mask 43. Subsequently, a wet etching process is used to etch the hard mask 43 to remove it and expose the second auxiliary fabrication layer 45.

[0190] (4-7) Form the first auxiliary composition layer 46.

[0191] In some exemplary embodiments, photoresist is coated onto the transparent substrate 10 forming the aforementioned structure, and planarization and ashing treatments are performed to form a first auxiliary layer 46, such as... Figure 15As shown in (c), the surface of the first auxiliary layer 46 away from the transparent substrate 10 can be flush with the surface of the second auxiliary layer 45 away from the transparent substrate 10.

[0192] (4-8) Remove the second auxiliary composition layer 45.

[0193] In some exemplary embodiments, a wet etching process is used to etch the second auxiliary layer 45, removing the second auxiliary layer 45, and forming a fourth trench K4 in the first auxiliary layer 46, such as... Figure 15 As shown in (d), the fourth trench K4 exposes the surface of the seed layer 41. In this example, the shape and size of the fourth trench K4 can be approximately the same as the shape and size of the second auxiliary construction layer 45. In some examples, the width of the fourth trench K4 can be less than 1.5 μm, and the height can be greater than 2 μm.

[0194] (4-9) Forming a grid structure 47.

[0195] In some exemplary embodiments, a mesh structure 47 is formed within the fourth groove K4 of the first auxiliary layer 46 by an electroplating process, such as... Figure 15 As shown in (e), the mesh structure 47 is in direct contact with the surface of the seed layer 41 within the fourth trench K4. The surface of the mesh structure 47 away from the transparent substrate 10 can be flush with the surface of the first auxiliary layer 46 away from the transparent substrate 10.

[0196] (4-10) Remove the first auxiliary composition layer 46.

[0197] In some exemplary embodiments, a photoresist remover is used for photoresist cleaning, followed by deionized water cleaning and CDA drying to remove the first auxiliary fabrication layer 46, exposing the mesh structure 47 and the seed layer 41.

[0198] (4-11) Etch the seed layer 41.

[0199] In some exemplary embodiments, a wet etching process is used to etch the seed layer 41 to remove the seed layer 41 that is not covered by the mesh structure 47.

[0200] (4-12) Form an optical protective layer 48.

[0201] In some exemplary embodiments, an optical adhesive is coated onto the transparent substrate 10 forming the aforementioned structure, and after planarization, an optical protective layer 49 is formed, such as... Figure 15 As shown in (f), the surface of the mesh structure 47 away from the transparent substrate 10 can be flush with the surface of the optical protective layer 49 away from the transparent substrate 10.

[0202] (4-13) Substrate peeling and cutting.

[0203] In some exemplary embodiments, a low-temperature (e.g., below -20°C) cold plate is used to cool the transparent substrate forming the aforementioned structure. Then, the flexible substrate 12 is peeled off from the transparent substrate 10 to obtain an antenna substrate. The antenna substrate is then cut using a cutting device, for example, by cutting along the cutting lines of the invalid region to remove the invalid region and the power-on region, thereby obtaining a transparent antenna.

[0204] In this exemplary embodiment, the thickness of the mesh structure is controlled by controlling the thickness of the second auxiliary patterning film, and the linewidth of the mesh structure is controlled by the etching process of the hard mask.

[0205] The preparation method provided in this exemplary embodiment utilizes the principle of complementary graphics to transform the second auxiliary structure layer into grooves of the first auxiliary structure layer, and then forms a mesh structure through an electroplating process. The preparation process of this embodiment can be implemented using existing mature preparation equipment, is highly compatible with existing preparation processes, is simple to implement, has high production efficiency, low production cost, and a high yield.

[0206] Figure 16 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure. Figure 17 for Figure 16 The diagram shows a partial planar view of the antenna region during the antenna fabrication process. Figure 17 (a) is a partial planar schematic diagram of the hard mask after etching. Figure 17 (b) is a partial planar schematic diagram after the formation of the second auxiliary construction layer. Figure 17 (c) is a partial planar schematic diagram after the formation of the first auxiliary construction layer. Figure 17 (d) is a partial planar schematic diagram after the conductive layer is formed. Figure 17 (e) is a partial planar schematic diagram after the formation of the second photoresist layer. Figure 17 (f) is a partial planar schematic diagram after the grid structure is formed.

[0207] In some exemplary implementations, such as Figure 16 and Figure 17 As shown, the antenna fabrication process in this embodiment includes the following steps.

[0208] (5-1) Preparation of transparent substrate 12.

[0209] In some exemplary embodiments, after coating the transparent substrate 10 with OCA 11, a COP film is attached to form a flexible transparent substrate 12. In some examples, the transparent substrate 10 can be a rigid substrate such as glass or sapphire.

[0210] (5-2) A buffer layer 13 is formed on the transparent substrate 12.

[0211] In some exemplary embodiments, a buffer layer 13 is formed on the surface of the transparent substrate 12 away from the transparent substrate 10. In some examples, an inorganic material is deposited on the surface of the transparent substrate 12 away from the transparent substrate 10 to form the buffer layer 13. For example, silicon dioxide (SiO2) is deposited by a low-temperature CVD process to form the buffer layer 13. In some examples, the thickness of the buffer layer 13 can be approximately 10 nm to 100 nm.

[0212] (5-3) A seed layer 51 is formed on the buffer layer 13.

[0213] In some exemplary embodiments, a thin metal film is deposited on the surface of the buffer layer 13 away from the transparent substrate 10 to form a seed layer 51.

[0214] (5-4) A second auxiliary patterning film 52, a hard mask 53 and a patterned first photoresist layer 54 are sequentially formed on the seed layer 51.

[0215] (5-5) The hard mask 53 and the second auxiliary patterning film 52 are etched using the first photoresist layer 54 to form the second auxiliary patterning layer 55, as shown. Figure 17 (a) and Figure 17 As shown in (b).

[0216] (5-6) Etch the seed layer 51.

[0217] In some exemplary embodiments, a wet etching process is used to etch the seed layer 51 to remove the seed layer 51 that is not covered by the second auxiliary layer 55, that is, to retain the seed layer 51 covered by the second auxiliary layer 55.

[0218] (5-7) Remove the first photoresist layer 54 and the hard mask 53.

[0219] (5-8) Form the first auxiliary structure layer 56.

[0220] In some exemplary embodiments, a photosensitive resin material (e.g., optical adhesive) is coated onto the transparent substrate 10 forming the aforementioned structure, and planarization and ashing treatment are performed to form a first auxiliary layer 56. The surface of the first auxiliary layer 56 away from the transparent substrate 10 can be flush with the surface of the second auxiliary layer 55 away from the transparent substrate 10. In this example, the first auxiliary layer 56 can serve as an optical protective layer.

[0221] (5-9) Remove the second auxiliary composition layer 55.

[0222] In some exemplary embodiments, a wet etching process is used to etch the second auxiliary layer 55, removing the second auxiliary layer 55, and forming a fifth trench K5 in the first auxiliary layer 56, such as... Figure 17As shown in (c), the fifth trench K5 exposes the surface of the seed layer 51. In this example, the shape and size of the fifth trench K5 may be approximately the same as the shape and size of the second auxiliary construction layer 55. In some examples, the width of the fifth trench K5 may be less than 1.5 μm, and the height may be greater than 2 μm.

[0223] (5-10) Forming a conductive layer 57.

[0224] In some exemplary embodiments, a conductive layer 57 is formed within the fifth trench K5 of the first auxiliary layer 56 by an electroplating process, such as... Figure 15 As shown in (d). The conductive layer 57 in this example can be achieved using a wire plating process. The conductive layer 57 can have a mesh shape. The conductive layer 57 is in direct contact with the surface of the seed layer 51 within the fifth trench K5. The surface of the conductive layer 57 away from the transparent substrate 10 can be flush with the surface of the first auxiliary layer 56 away from the transparent substrate 10.

[0225] (5-11) Forming a second photoresist layer 58.

[0226] In some exemplary embodiments, photoresist is coated on the transparent substrate 10 forming the aforementioned structure, and a patterned second photoresist layer 58 is formed through a photolithography process involving mask exposure and development, such as... Figure 10 As shown in (e), the second photoresist layer 58 has a first via K52, which exposes the conductive layer 57 at the trace intersection.

[0227] (5-12) Etch the conductive layer 57.

[0228] In some exemplary embodiments, a wet etching process is used to etch the conductive layer 57 to remove the conductive layer 57 at the trace intersection positions exposed by the second photoresist layer 58, so as to remove the grid intersection points that need to be disconnected and form a grid structure 59.

[0229] (5-13) Remove the second photoresist layer 58, substrate peeling and cutting process.

[0230] In some exemplary embodiments, a photoresist remover is used for photoresist cleaning, followed by deionized water rinsing and CDA drying to remove the second photoresist layer 58, exposing the mesh structure 59 and the first auxiliary layer 56, as shown. Figure 17 As shown in (f).

[0231] In some exemplary embodiments, a low-temperature (e.g., below -20°C) cold plate is used to cool the transparent substrate forming the aforementioned structure. Then, the flexible substrate 12 is peeled off from the transparent substrate 10 to obtain an antenna substrate. The antenna substrate is then cut using a cutting device, for example, by cutting along the cutting lines of the invalid region to remove the invalid region and the power-on region, thereby obtaining a transparent antenna.

[0232] In this exemplary embodiment, the intersections of the broken connections in the mesh structure are removed by a wet etching process following electroplating. In this example, the seed layer is etched first, and then a conductive layer is formed by a line electroplating process. In this example, the thickness of the mesh structure is controlled by controlling the thickness of the second auxiliary patterning film, and the linewidth of the mesh structure is controlled by an etching process on the hard mask.

[0233] The fabrication method provided in this exemplary embodiment utilizes the principle of pattern complementarity to transform the second auxiliary structure layer into grooves of the first auxiliary structure layer. A conductive layer is then formed through electroplating, and the conductive layer is etched to form a mesh structure. The fabrication process of this embodiment can be implemented using existing mature fabrication equipment, is highly compatible with existing fabrication processes, is simple to implement, easy to carry out, has high production efficiency, low production cost, and a high yield.

[0234] For a detailed description of the steps involved in this exemplary embodiment, please refer to the description in the foregoing embodiments; therefore, it will not be repeated here.

[0235] Figure 18 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure. Figure 19 for Figure 18 The diagram shows a partial planar view of the antenna region during the antenna fabrication process. Figure 19 (a) is a partial planar schematic diagram of the hard mask after etching. Figure 19 (b) is a partial planar schematic diagram after the formation of the second auxiliary construction layer. Figure 19 (c) is a partial planar schematic diagram after the formation of the first auxiliary construction layer. Figure 19 (d) is a local planar schematic diagram after the seed layer is formed. Figure 19 (e) is a partial planar schematic diagram after the electroplating layer is formed. Figure 19 (f) is a partial planar schematic diagram after the grid structure is formed.

[0236] In some exemplary implementations, such as Figure 18 and Figure 19 As shown, the antenna fabrication process in this embodiment includes the following steps.

[0237] (6-1) Preparation of transparent substrate 12.

[0238] (6-2) A buffer layer 13 is formed on the transparent substrate 12.

[0239] (6-3) A second auxiliary patterning film 61, a hard mask 62 and a patterned first photoresist layer 63 are sequentially formed on the buffer layer 13.

[0240] (6-4) The hard mask 62 and the second auxiliary patterning film 61 are etched using the first photoresist layer 63 to form the second auxiliary patterning layer 64.

[0241] (6-5) Remove the first photoresist layer 63 and the hard mask 62.

[0242] (6-6) Forming a first auxiliary layer 65. In this example, the first auxiliary layer 65 can serve as an optical protection layer.

[0243] (6-7) Remove the second auxiliary composition layer 64.

[0244] (6-8) Preparation of mesh structure 67.

[0245] In some exemplary embodiments, a metal thin film is deposited on the transparent substrate 10 forming the aforementioned structure to form a seed layer 661 covering the entire transparent substrate 10. Then, an electroplated layer 662 is formed on the seed layer 661 through a complete electroplating process. Next, the seed layer 661 and the electroplated layer 662 are etched using a wet etching process to remove the portion of the first auxiliary layer 64 away from the surface of the transparent substrate 10, leaving only the seed layer 661 and the electroplated layer 662 within the sixth trench K6, forming a mesh structure 67. However, this embodiment is not limited to this. In other examples, taking Cu as an example, CMP can be used to thin the seed layer 661 and the electroplated layer 662 to remove the portion of the first auxiliary layer 65 away from the surface of the transparent substrate 10.

[0246] In some examples, the electroplating process for forming the electroplated layer 662 is a surface electroplating process, in which the entire surface can be pre-plated using 10% to 30% of the current density of the matching electroplating solution, and then the entire surface can be electroplated using the current density of the matching electroplating solution.

[0247] (6-9) Substrate peeling and cutting.

[0248] In some exemplary embodiments, a low-temperature (e.g., below -20°C) cold plate is used to cool the transparent substrate forming the aforementioned structure. Then, the flexible substrate 12 is peeled off from the transparent substrate 10 to obtain an antenna substrate. The antenna substrate is then cut using a cutting device, for example, by cutting along the cutting lines of the invalid region to remove the invalid region and the power-on region, thereby obtaining a transparent antenna.

[0249] In this example implementation, an optical protective layer is used as the first auxiliary layer, eliminating the need for an etching process that narrows the metal linewidth, simplifying the steps, and improving linewidth uniformity.

[0250] For a detailed description of the steps involved in this exemplary embodiment, please refer to the description in the foregoing embodiments; therefore, it will not be repeated here.

[0251] Figure 20 This is a schematic diagram of another antenna fabrication process according to at least one embodiment of the present disclosure. Figure 21 for Figure 20 The diagram shows a partial planar view of the antenna region during the antenna fabrication process. Figure 21 (a) is a partial planar schematic diagram after the conductive layer is formed. Figure 21 (b) is a partial planar schematic diagram after the formation of the third photoresist layer. Figure 21 (c) is a partial planar schematic diagram after etching the conductive layer using the third photoresist layer. Figure 21 (d) is a partial planar schematic diagram after the third photoresist layer has been removed. Figure 21 (e) is a partial planar schematic diagram after the first linewidth narrowing etching of the conductive layer. Figure 21 (f) is a partial planar schematic diagram after the second linewidth narrowing etching of the conductive layer.

[0252] In some exemplary implementations, such as Figure 20 and Figure 21 As shown, the antenna fabrication process in this embodiment includes the following steps.

[0253] (7-1) Preparation of transparent substrate 12.

[0254] In some exemplary embodiments, after coating the transparent substrate 10 with optically clear adhesive (OCA) 11, a cyclic olefin polymer (COP) film is attached to form a flexible transparent substrate 12. In some examples, the transparent substrate 10 can be a rigid substrate such as glass or sapphire.

[0255] (7-2) A buffer layer 13 is formed on the transparent substrate 12.

[0256] In some exemplary embodiments, a buffer layer 13 is formed on the surface of the transparent substrate 12 away from the transparent substrate 10. In some examples, an inorganic material is deposited on the surface of the transparent substrate 12 away from the transparent substrate 10 to form the buffer layer 13. For example, silicon dioxide (SiO2) is deposited by a low-temperature CVD process to form the buffer layer 13. In some examples, the thickness of the buffer layer 13 can be approximately 10 nm to 100 nm.

[0257] (7-3) A conductive layer 72 is formed on the buffer layer 13.

[0258] In some exemplary embodiments, an adhesion film is deposited on the surface of the buffer layer 13 away from the transparent substrate 10 to form an adhesion layer 71; subsequently, a conductive layer 72 is formed on the adhesion layer 71 by a vacuum deposition process (such as magnetron sputtering or evaporation) or a vacuum deposition and full-surface electroplating process, such as... Figure 21 As shown in (a), the adhesive layer 71 is configured to increase the adhesion between the conductive layer 72 and the buffer layer 13. In some examples, the thickness of the conductive layer 72 is approximately 2 μm to 3 μm.

[0259] (7-4) Forming a patterned third photoresist layer 73.

[0260] In some exemplary embodiments, photoresist is coated on the surface of the conductive layer 72 away from the transparent substrate 10, and a patterned third photoresist layer 73 is formed by a photolithography process involving mask exposure and development, such as... Figure 21 As shown in (b). In some examples, HMDS treatment can be performed on the surface of conductive layer 72 before the photoresist is applied to enhance the adhesion of the photoresist to the metal surface.

[0261] In some examples, the thickness of the third photoresist layer 73 is approximately 1µm to 3µm. The thickness of the third photoresist layer 73 is as thin as possible. The design linewidth of the mesh pattern formed by the third photoresist layer 73 can be approximately 3µm to 5µm.

[0262] In some exemplary embodiments, the photoresist may be a low-temperature curing adhesive, and the curing temperature may not be higher than the tolerance temperature of the COP film and OCA, for example, the curing temperature may be about 140°C.

[0263] (7-5) Etch the conductive layer 72 and the adhesive layer 71.

[0264] In some exemplary embodiments, a wet etching process is used to etch the conductive layer 72 and the adhesion layer 71, removing the conductive layer 72 and the adhesion layer 71 not covered by the third photoresist layer 73, i.e., retaining the conductive layer 72 and the adhesion layer 71 covered by the third photoresist layer 73, such as... Figure 21 As shown in (c), this forms a metal mesh with a relatively wide line width.

[0265] (7-6) Remove the third photoresist layer 73.

[0266] In some exemplary embodiments, a photoresist remover is used for photoresist cleaning, followed by deionized water rinsing and CDA drying to remove the third photoresist layer 73, exposing the etched conductive layer 72 and adhesion layer 71. Figure 21 As shown in (d).

[0267] (7-7) Perform the first linewidth narrowing etching on the conductive layer 72 and the adhesive layer 71.

[0268] In some exemplary embodiments, a wet etching process is used to etch the conductive layer 72 and the adhesion layer 71 to narrow the linewidth of the metal mesh, such as... Figure 21 As shown in (e).

[0269] In some examples, taking Cu as the material of conductive layer 72 and adhesion layer 71, a hydrogen peroxide-based etching solution (e.g., the content of sulfuric acid (H2SO4) is about 2% to 4%, the content of additives is about 2% to 3%, and the concentration of hydrogen peroxide (H2O2) is about 0.1% to 1%) can be used to etch for a certain period of time until the linewidth of the metal line reaches the target linewidth, such as 2.5 μm.

[0270] (7-8) Perform a second linewidth narrowing etching on conductive layer 72 and adhesive layer 71.

[0271] In some exemplary embodiments, a wet etching process is used to etch the conductive layer 72 and the adhesion layer 71 to further narrow the linewidth of the metal mesh, forming a mesh structure 74, such as... Figure 21 As shown in (f).

[0272] In some examples, taking Cu as the material for both conductive layer 72 and adhesion layer 71, a hydrogen peroxide-based etching solution (e.g., approximately 2% to 4% sulfuric acid (H2SO4), approximately 2% to 3% additives, and approximately 0.1% to 1% hydrogen peroxide (H2O2) concentration) can be used to etch for a certain period until the metal line width reaches the target line width, for example, 1.5 μm. This step can use a lower hydrogen peroxide concentration to slowly etch the metal line, thereby achieving over-etching of the metal line to reach the target line width.

[0273] (7-9) Form an optical protective layer 75.

[0274] In some exemplary embodiments, an optical adhesive is coated onto the transparent substrate 10 forming the aforementioned structure, and after planarization, an optical protective layer 75 is formed. The surface of the mesh structure 74 away from the transparent substrate 10 can be flush with the surface of the optical protective layer 75 away from the transparent substrate 10.

[0275] In some examples, the optical adhesive can be SOC-5004U. The thickness of the optical adhesive can be approximately 3µm to 4µm. The curing temperature of the optical adhesive can be no higher than the tolerance temperature of the COP film and OCA, for example, the curing temperature can be approximately 140°C. In other examples, the optical adhesive can be a UV-curable material.

[0276] (7-10) Substrate peeling and cutting.

[0277] In some exemplary embodiments, a low-temperature (e.g., below -20°C) cold plate is used to cool the transparent substrate forming the aforementioned structure. Then, the flexible substrate 12 is peeled off from the transparent substrate 10 to obtain an antenna substrate. The antenna substrate is then cut using a cutting device, for example, by cutting along the cutting lines of the invalid region to remove the invalid region and the power-on region, thereby obtaining a transparent antenna.

[0278] The fabrication method of this exemplary embodiment achieves a mesh structure that meets the linewidth requirements through a single photolithography process and multiple wet etching processes. The fabrication method provided by this exemplary embodiment uses only a single photolithography process, making the process simple. Furthermore, it supports low-temperature processes (e.g., 140°C), minimizing damage to the flexible transparent substrate. The fabrication process of this embodiment can be implemented using existing mature fabrication equipment, is highly compatible with existing fabrication processes, is simple to implement, easy to carry out, has high production efficiency, low production cost, and high yield.

[0279] At least one embodiment of this disclosure also provides a sensor device fabricated using the method described above. In some examples, the sensor device fabricated in the above manner includes at least: a transparent substrate and a grid structure disposed on the transparent substrate. In some examples, the sensor device can be a transparent antenna. However, this embodiment is not limited thereto.

[0280] In some exemplary embodiments, taking the aforementioned sensor as an example of a transparent antenna, the transparent antenna may include an antenna region and a visual compensation region in a plane parallel to the transparent antenna. The antenna region and the visual compensation region are provided with a mesh structure. In a plane perpendicular to the transparent antenna, the transparent antenna may include a transparent substrate, a buffer layer sequentially disposed on the transparent substrate, a mesh structure, and an optical protective layer. The mesh structure of the antenna region can be configured to enable microwave signal transmission and reception. The mesh structure of the visual compensation region is configured to reduce the visual difference between the antenna region and the visual compensation region. However, this embodiment is not limited in this respect.

[0281] At least one embodiment of this disclosure also provides an electronic device including the sensor device described above (e.g., a transparent antenna). In some exemplary embodiments, the electronic device can be any product or component with communication and display functions, such as a smartphone, navigation device, game console, television (TV), car audio system, tablet computer, personal multimedia player (PMP), or personal digital assistant (PDA). However, this embodiment is not limited thereto.

[0282] Figure 22 This is a schematic diagram of an electronic device according to at least one embodiment of the present disclosure. In some exemplary embodiments, such as Figure 22As shown, the electronic device of this embodiment includes a display panel 911 and a transparent antenna 910. The transparent antenna 910 may be located on the light-emitting side of the display panel 911. The orthographic projection of the transparent antenna 910 onto the display panel 911 overlaps with the display area of ​​the display panel 911. However, this embodiment is not limited in this respect.

[0283] The accompanying drawings in this disclosure only illustrate the structures relevant to this disclosure; other structures can be referenced to common designs. Unless otherwise specified, embodiments of this disclosure and features thereof can be combined to obtain new embodiments.

[0284] Those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions disclosed herein without departing from the spirit and scope of the technical solutions disclosed herein, and all such modifications and substitutions should be covered within the scope of the claims of this disclosure.

Claims

1. A method for fabricating a sensor device, characterized in that, include: A first auxiliary layer with trenches is formed on the surface of a transparent substrate; A mesh structure is formed in the grooves of the first auxiliary layer by electroplating. Alternatively, a conductive layer can be formed in the trenches of the first auxiliary layer by electroplating, and the conductive layer can be etched to form a mesh structure; Wherein, the line width of the mesh structure is less than or equal to 1.5 micrometers, and the thickness of the mesh structure is greater than or equal to 2 micrometers; Before forming a first auxiliary patterning layer with trenches on the surface of a transparent substrate, the method further includes: sequentially forming a second auxiliary patterning film, a hard mask, and a patterned first photoresist layer on the surface of the transparent substrate; etching the hard mask using a wet etching process to remove the hard mask not covered by the first photoresist layer; etching the second auxiliary patterning film using a dry etching process to remove the second auxiliary patterning film not covered by the hard mask, retaining the second auxiliary patterning film covered by the hard mask, to form a second auxiliary patterning layer; The step of forming a first auxiliary structure layer with grooves on the surface of a transparent substrate includes: forming a first auxiliary structure layer on the surface of a second auxiliary structure layer away from the transparent substrate, wherein the surface of the first auxiliary structure layer away from the transparent substrate is flush with the surface of the second auxiliary structure layer away from the transparent substrate; removing the second auxiliary structure layer to form a groove in the first auxiliary structure layer, wherein the width of the groove is the same as the line width of the mesh structure.

2. The method according to claim 1, characterized in that, The etching of the conductive layer includes: etching the conductive layer using a wet etching process.

3. The method according to claim 1, characterized in that, The process of forming a first auxiliary layer with trenches on the surface of a transparent substrate includes: A photoresist material is coated on the surface of the transparent substrate, and the photoresist material is exposed and developed to form a first auxiliary structure layer with trenches; wherein the width of the trenches is greater than the line width of the mesh structure. After the conductive layer is formed but before etching the conductive layer, the method further includes removing the first auxiliary fabrication layer.

4. The method according to claim 3, characterized in that, Before forming a first auxiliary structure layer with trenches on the surface of a transparent substrate, the method further includes: forming a seed layer on the surface of the transparent substrate by a deposition process; after forming the first auxiliary structure layer, the trenches of the first auxiliary structure layer expose the surface of the seed layer; After removing the first auxiliary layer and before etching the conductive layer, the method further includes: etching the seed layer to remove the seed layer not covered by the conductive layer.

5. The method according to claim 4, characterized in that, Before forming a seed layer on the surface of the transparent substrate by a deposition process, the method further includes: forming an adhesion layer on the surface of the transparent substrate by a deposition process; After etching the conductive layer, the method further includes etching the adhesive layer, retaining the adhesive layer covered by the etched conductive layer.

6. The method according to claim 3, characterized in that, After forming a first auxiliary layer with trenches on the surface of a transparent substrate, and before forming a conductive layer in the trenches of the first auxiliary layer by an electroplating process, the method further includes forming a seed layer on the surface of the first auxiliary layer away from the transparent substrate and in the trenches by a deposition process.

7. The method according to claim 6, characterized in that, The process of forming a conductive layer in the trenches of the first auxiliary layer by electroplating includes: A first electroplated layer and a second electroplated layer are formed on the surface of the first auxiliary layer away from the transparent substrate and in the trenches by an electroplating process. Remove the second electroplated layer, the first electroplated layer, and the seed layer of the first auxiliary layer away from the surface of the transparent substrate, and form a conductive layer in the trench of the first auxiliary layer.

8. The method according to claim 6, characterized in that, The process of forming a conductive layer in the trenches of the first auxiliary layer by electroplating includes: A first electroplating layer is formed on the surface of the first auxiliary layer away from the transparent substrate and in the trenches by an electroplating process; Remove the seed layer and the first electroplated layer that are away from the surface of the transparent substrate in the first auxiliary construction layer, and retain the seed layer and the first electroplated layer in the trench; A second electroplated layer is formed in the grooves of the first auxiliary layer by an electroplating process.

9. The method according to claim 1, characterized in that, The first auxiliary layer is made of photoresist material; Before forming a second auxiliary patterning film on the surface of the transparent substrate, the method further includes: forming a seed layer on the surface of the transparent substrate; After forming a mesh structure in the grooves of the first auxiliary layer by electroplating, the method further includes: removing the first auxiliary layer, etching the seed layer, and removing the seed layer not covered by the mesh structure.

10. The method according to claim 1, characterized in that, The first auxiliary layer is made of photosensitive resin material; Before forming a second auxiliary patterning film on the surface of the transparent substrate, the method further includes: forming a seed layer on the surface of the transparent substrate; After etching the second auxiliary patterning film and hard mask using a patterned first photoresist layer to form a patterned second auxiliary patterning layer, the method further includes: etching the seed layer to remove the seed layer not covered by the second auxiliary patterning layer.

11. The method according to claim 10, characterized in that, The etching of the conductive layer to form a mesh structure includes: A patterned second photoresist layer is formed on the surface of the first auxiliary layer and the conductive layer away from the transparent substrate, and the second photoresist layer exposes the conductive layer at the target location; The conductive layer at the target location is removed by etching to form a mesh structure.

12. The method according to claim 1, characterized in that, The first auxiliary layer is made of photosensitive resin material; After forming a first auxiliary structure layer with trenches on the surface of a transparent substrate, and before forming a mesh structure in the trenches of the first auxiliary structure layer by electroplating, the method further includes: forming a seed layer on the surface of the first auxiliary structure layer away from the transparent substrate and in the trenches by deposition. The process of forming a mesh structure in the trenches of the first auxiliary structure layer by electroplating includes: forming a first electroplating layer and a second electroplating layer on the surface of the first auxiliary structure layer away from the transparent substrate and in the trenches by electroplating; removing the second electroplating layer, the first electroplating layer and the seed layer on the surface of the first auxiliary structure layer away from the transparent substrate, and forming an antenna structure in the trenches of the first auxiliary structure layer.

13. The method according to claim 1, characterized in that, The transparent substrate has an effective region and an ineffective region surrounding the effective region; The mesh structure is located in the effective region, and the invalid region is provided with invalid meshes; the line width of the invalid meshes is greater than or equal to the line width of the mesh structure in the effective region.

14. The method according to claim 13, characterized in that, The transparent substrate also has an electrified region surrounding the ineffective region, the electrified region being configured to provide plating current in the electroplating process.

15. The method according to claim 13, characterized in that, The effective area includes: an antenna area and a visual compensation area located on at least one side of the antenna area; the pattern of the grid structure of the antenna area is different from the pattern of the grid structure of the visual compensation area.

16. The method according to claim 13, characterized in that, The line width of the invalid grid gradually and continuously increases along the direction away from the valid area, or increases in a stepwise manner.

17. The method according to claim 1, characterized in that, The thickness of the mesh structure is 2 to 5 micrometers.

18. A sensor device, characterized in that, It is prepared by the method described in any one of claims 1 to 17.

19. The sensor device according to claim 18, characterized in that, The sensor is a transparent antenna.

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