An interferometric measurement method, system, device, and medium
By defining components A and B, marking interference points and interfaces, and using the DPA automated inspection system, the problem of inconsistent manual operation in the measurement of seal interference was solved, improving measurement quality and efficiency, and facilitating digital storage.
Patent Information
- Application Number
- CN202211474292.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-23
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2042-11-23
AI Technical Summary
In existing technologies, the measurement of interference in sealing components suffers from inconsistent manual selection of measurement points and measurement methods, leading to variations in measurement results, low work efficiency, and an inability to guarantee measurement quality.
An interferometric measurement method is adopted, which defines components A and B, marks the interference points, defines the interference interface and normal, automatically identifies the point of maximum interference, and uses the DPA automated inspection system to achieve standardized measurement.
It has achieved the standardization of measurement point locations and measurement methods, improved the quality and efficiency of interference inspection work, and facilitated the database storage and digital redevelopment of inspection results.
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Figure CN115717874B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of automation measurement technology, in particular to an interference measurement method, system, device and medium. BACKGROUND
[0002] The sealing system needs to design the interference of the sealing part to ensure the sealing characteristics of the vehicle. The interference of the sealing strip and the vehicle body is shown in Figure 1 During the development process, the quality of the related parts of the sealing design needs to be checked to determine whether it meets the sealing requirements. The commonly used method is manual measurement method. The measurement personnel downloads the relevant data, opens the measurement software, performs section interception and measures the interference four steps to carry out related work. Because the sealing system involves many parts and interference points, the measurement work is relatively cumbersome, and repeated operation is needed, which is low in work efficiency. At the same time, when performing specific inspection operation, the measurement point position and measurement method selected by different personnel are not unified, and the measurement result will produce certain difference, and the quality of measurement cannot be guaranteed. SUMMARY
[0003] Therefore, the technical problem to be solved by the present application is to overcome the defects in the prior art that the manual operation selects the measurement point position and the measurement method are not unified, resulting in differences in the measurement results, so as to provide an interference measurement method, system, device and medium.
[0004] An interference measurement method, comprising the following steps:
[0005] S1: defining two interfering parts as part A and part B respectively;
[0006] S2: setting part B as the reference measurement part, and marking the interference points formed by part A and part B on the interface in order;
[0007] S3: defining the position of the maximum interference point of part A and part B as the maximum interference point 5, the centroid position of part A as 6, and the centroid position of part B as 7;
[0008] S4: connecting any two interference points, and defining the plane where the connecting line is as the interference interface;
[0009] S5: defining the normal line of the interference interface, and defining the direction away from the centroid point of part A as the interference direction;
[0010] S6: picking up and measuring the maximum distance from each point on part A to the centroid thereof in the interference direction respectively to obtain the maximum interference point 5;
[0011] S7: measuring the shortest distance h from the maximum interference point 5 to the interference interface, and the h is the interference to be solved.
[0012] Further, the number of interference points formed by the component A and the component B at the interface is two or four, when the number of interference points is two, the two interference points are marked as 1 and 2 respectively, and when the number of interference points is four, the four interference points are marked as 1, 2, 3 and 4 respectively.
[0013] Further, when the number of interference interfaces is n, the multiple interference interfaces are marked as interference interface a, interference interface b, … and interference interface n respectively, and steps S5-S7 are repeated to record the shortest distances of the interference maximum points 5 to the respective interference interfaces, marked as h a , h b , … and h n , and the measurement results are sorted, and the interference amount h = max(h a , h b , …, h n ) is obtained.
[0014] A DPA automatic inspection system, characterized in that the system comprises an interference inspection module, and the interference inspection module realizes the steps of any one of the methods when running.
[0015] An electronic device comprising a memory and a processor, wherein the memory stores a computer program, and the processor realizes the steps of any one of the methods when executing the computer program.
[0016] A computer readable storage medium for storing computer instructions, wherein the computer instructions realize the steps of any one of the methods when executed by a processor.
[0017] Compared with the conventional manual operation, the technical scheme of the present application unifies the measurement point position and the measurement method, realizes standardization, and based on the DPA automatic inspection system, realizes automatic identification, improves the quality and efficiency of the interference inspection work, and facilitates the structure storage and digital re-development of the inspection result database in the later period. BRIEF DESCRIPTION OF DRAWINGS
[0018] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the drawings needed in the specific embodiments or prior art description will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present application, and those skilled in the art can obtain other drawings according to these drawings without creative labor.
[0019] Figure 1 Schematic diagram of door seal strip height and interference amount;
[0020] Figure 2A flow chart of the method according to the present application;
[0021] Figure 3 A schematic diagram for the case of a single interference interface, four interference points;
[0022] Figure 4 A schematic diagram for the case of a single interference interface, two interference points;
[0023] Figure 5 A schematic diagram for the case of multiple interference interfaces, four interference points; DETAILED DESCRIPTION
[0024] The technical solutions of the present application will be described clearly and completely below with reference to the drawings. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.
[0025] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application. In addition, the terms "first", "second", "third" are only for the purpose of description, and cannot be understood as indicating or implying relative importance.
[0026] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium, or it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0027] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.
[0028] Please refer to Figure 2 An interference measurement method, comprising the following steps:
[0029] S1: defining two interference components as component A and component B, respectively;
[0030] S2: Set component B as the reference measurement component, and mark the interference points formed by components A and B on the interface in sequence;
[0031] S3: Define the position of the maximum interference point of component A and component B as the maximum interference point 5, mark the centroid position of component A as 6, and mark the centroid position of component B as 7;
[0032] S4: Connect any two interference points, and define the plane where the connecting line is located as the interference interface;
[0033] S5: Define the normal line of the interference interface, and define the direction away from the centroid point of component A as the interference direction;
[0034] S6: In the interference direction, respectively pick up and measure the maximum distance from each point on component A to the centroid thereof to obtain the maximum interference point 5;
[0035] S7: Measure the shortest distance h from the maximum interference point 5 to the interference interface, and the h is the interference amount to be obtained.
[0036] Please refer to Figure 3 and Figure 4 , the number of interference points formed by components A and B on the interface is two or four, when the number of interference points is two, the two interference points are marked as 1 and 2 respectively, and when the number of interference points is four, the four interference points are marked as 1, 2, 3 and 4 respectively.
[0037] According to the interference surface shape of the reference component B, multiple interference interfaces can be generated, when the number of interference interfaces is n, the multiple interference interfaces are respectively marked as interference interface a, interference interface b, … and interference interface n, and steps S5-S7 are repeated, the shortest distances from the maximum interference point 5 to each interference interface are recorded as h a , h b , … and h n , and the measurement results are sorted, and the interference amount h = max(h a , h b , …, h n ) is obtained. Figure 5 For the case of two interference interfaces.
[0038] The application also includes a DPA automatic inspection system, the system includes an interference inspection module, the interference inspection module realizes the steps of any one of the above-mentioned methods when running.
[0039] The application also includes an electronic device including a memory and a processor, the memory stores a computer program, and the processor realizes the steps of any one of the above-mentioned methods when executing the computer program.
[0040] The application also includes a computer readable storage medium for storing computer instructions, which, when executed by a processor, implement the steps of any of the above methods.
[0041] The memory in the embodiments of the present application can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read only memory (ROM), a programmable read only memory (PROM), an erasable programmable read only memory (EPROM), an electrically EPROM (EEPROM) or a flash memory. The volatile memory can be a random access memory (RAM) used as an external cache. By way of example, but not limitation, many forms of RAM can be used, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM) and direct rambus RAM (DR RAM). It should be noted that the memory of the method described in the present application is intended to include, but not limited to, these and any other suitable types of memory.
[0042] In the above embodiments, all or part of the method can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the method can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions can be transferred from one website, computer, server or data center to another website, computer, server or data center through wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) mode. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. integrated with one or more available media. The available media can be magnetic media (such as floppy disk, hard disk, magnetic tape), optical media (such as high-density digital video disc (digital video disc, DVD)), or semiconductor media (such as solid state disc (solid state disc, SSD)) and the like.
[0043] In the implementation process, each step of the above method can be completed by integrated logic circuit of hardware in the processor or instruction in the form of software. The steps of the method disclosed in the embodiments of the present application can be directly embodied as hardware processor execution or executed by combination of hardware and software modules in the processor. The software module can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, register or other mature storage medium in the art. The storage medium is located in the memory, and the processor reads the information in the memory and combines the hardware to complete the steps of the above method. To avoid repetition, it will not be described in detail here.
[0044] It should be noted that the processor in the embodiments of the present application can be an integrated circuit chip having a signal processing capability. In the implementation process, each step of the method embodiments can be completed by an integrated logic circuit or an instruction in the form of software in the processor. The processor can be a general processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. The disclosed methods, steps and logic block diagrams in the embodiments of the present application can be implemented or executed. The general processor can be a microprocessor or the processor can be any conventional processor. The steps of the method disclosed in conjunction with the embodiments of the present application can be directly embodied as a hardware code processor for execution, or a combination of hardware and software modules in the code processor for execution. The software module can be located in a random access memory, a flash memory, a read only memory, a programmable read only memory or an electrically erasable programmable memory, a register or other mature storage medium in the art. The storage medium is located in the memory, and the processor reads the information in the memory and combines the hardware to complete the steps of the above method.
[0045] Obviously, the above embodiments are only examples for clearly illustrating, not limiting the embodiments. For those skilled in the art, on the basis of the above description, other different forms of changes or variations can also be made. Here, all the embodiments need not and cannot be exhausted. The obvious changes or variations derived therefrom are still within the protection scope of the present application.
Claims
1. An interferometric measurement method, characterized by, The method comprises the following steps: S1: defining two interference components as component A and component B respectively; S2: setting component B as a reference measurement component, and marking interference points formed by component A and component B on an interface in sequence; S3: defining a position of a maximum interference point of component A and component B as a maximum interference point 5, marking a centroid position of component A as 6, and marking a centroid position of component B as 7; S4: connecting any two interference points, and the connection line is an interference interface; S5: defining a normal line of the interference interface, and defining a direction away from the centroid position of component A as an interference direction; S6: picking up and measuring a maximum distance of each point on component A to the centroid thereof in the interference direction to obtain the maximum interference point 5; S7: measuring a shortest distance h of the maximum interference point 5 to the interference interface, and the h is the interference amount.
2. The method of claim 1, wherein, The number of interference points formed by component A and component B on the interface is two or four, when the number of interference points is two, the two interference points are marked as 1 and 2 respectively, and when the number of interference points is four, the four interference points are marked as 1, 2, 3 and 4 respectively.
3. The method of claim 1, wherein, When the interference interface is n, the multiple interference interfaces are marked as interference interface a, interference interface b, …, and interference interface n, respectively, and steps S5-S7 are repeated to record the shortest distances from the interference maximum point 5 to each interference interface, marked as h a , h b , …, and h n , respectively, and the measurement results are sorted to obtain the interference amount h = max(h a , h b , …, h n ).
4. A DPA automated inspection system characterized by, The system comprises an interference checking module, and the interference checking module realizes the steps of the method according to any one of claims 1-3 when running. 5.An electronic device comprising a memory and a processor, the memory storing a computer program, wherein, The processor realizes the steps of the method according to any one of claims 1-3 when executing the computer program.
6. A computer readable storage medium for storing computer instructions, characterized in that, The computer instructions realize the steps of the method according to any one of claims 1-3 when executed by the processor.
Citation Information
Patent Citations
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CN113886943A
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CN113886954A