Image sensor and method of forming the same

By using etching and epitaxial processes to form trenches and coat dielectric layers in CMOS image sensors, the problems of substrate distortion and uneven isolation are solved, achieving efficient optical and electrical isolation and reducing light and electrical crosstalk.

CN115719752BActive Publication Date: 2026-04-21GALAXYCORE SHANGHAI
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
GALAXYCORE SHANGHAI
Filing Date
2021-08-26
Publication Date
2026-04-21

AI Technical Summary

Technical Problem

Existing CMOS image sensors are prone to distortion and deformation during the thinning process on the back side of the substrate wafer. Photolithography alignment errors lead to non-uniform isolation, etching processes damage sidewalls and are difficult to repair, and the isolation effect between adjacent pixel units is poor.

Method used

Trenches are formed in a semiconductor substrate through etching and epitaxy processes. A dielectric layer is coated and a lateral optical isolation structure is formed. The trench sidewalls are pinned by silicon nitride with a negative charge, and the trench opening is sealed by an epitaxial layer to form a mid-space gap structure to reduce light crosstalk.

Benefits of technology

It improves isolation performance, reduces optical and electrical crosstalk, enhances isolation uniformity and process compatibility, and reduces errors between adjacent pixel units.

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Abstract

The application discloses an image sensor and a forming method, which comprises the following steps: forming a groove in a semiconductor substrate through etching and epitaxial process; forming a first dielectric layer on the surface of the groove; forming a second dielectric layer on the surface of the first dielectric layer; removing part of the first dielectric layer and the second dielectric layer near the opening of the groove; forming a first epitaxial layer to close the opening of the groove; wherein the area corresponding to the groove is used to form a lateral optical isolation structure of the image sensor. The lateral optical isolation structure can comprise a middle space gap structure. When incident light is irradiated on the middle space gap structure, total reflection will occur, thereby effectively reducing the light crosstalk between adjacent pixel units. Through the epitaxial process, a lateral PN junction is formed on the sidewall of the groove, thereby realizing the electrical isolation between adjacent pixel units.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an image sensor and a method for forming the same. Background Technology

[0002] A CMOS image sensor (CIS) is a semiconductor device that converts optical images into electrical signals. A CIS consists of a photodiode (PD) for sensing light and logic circuitry for processing the sensed light into electrical signals.

[0003] Isolating the photosensitive area of ​​a CIS (CMOS Image Sensor) is commonly used in back-illuminated image sensor manufacturing processes. The typical method involves first thinning the back side of the substrate wafer, then using photolithography to form patterns on the wafer surface for isolating the photosensitive area. Next, deep trenches are formed on the back side of the substrate using etching, and finally, a dielectric material is filled into these trenches to complete the isolation of the photosensitive area of ​​the image sensor.

[0004] However, this traditional method still has the following problems: ① During the thinning process on the back side of the wafer, the wafer substrate is prone to distortion and deformation, and the alignment error of the photolithography itself will also cause a large error between the trench pattern on the back side of the wafer and the pixel center, resulting in unevenness of lateral isolation and affecting the isolation effect; ② The plasma used in the etching process will damage the sidewalls, and the back side process cannot withstand the high temperature process, making it difficult to repair the sidewall damage; ③ The difference in linewidth of the lateral isolation area and the diagonal intersection area of ​​two adjacent pixel units will lead to the depth difference in the lateral area and the diagonal intersection area of ​​adjacent pixels, affecting the isolation and noise reduction effect. Summary of the Invention

[0005] To address the technical problems existing in the prior art, the present invention provides a method for forming an image sensor, comprising: forming a trench in a semiconductor substrate by etching and epitaxial processes; forming a first dielectric layer on the surface of the trench; forming a second dielectric layer on the surface of the first dielectric layer; removing a portion of the first dielectric layer and the second dielectric layer near the opening of the trench; forming a first epitaxial layer to close the opening of the trench; wherein the region corresponding to the trench is used to form a lateral optical isolation structure of the image sensor.

[0006] Optionally, the first dielectric layer is silicon oxide; the second dielectric layer is silicon nitride or silicon oxynitride.

[0007] Optionally, by adjusting the silicon nitride growth process, the silicon nitride can be made to carry a negative charge, thereby pinning the trench sidewalls.

[0008] Optionally, the first dielectric layer or the second dielectric layer may serve as a stop layer for the backside thinning process of the semiconductor substrate.

[0009] Optionally, the semiconductor substrate includes a pixel region and a non-pixel region; the process of forming trenches in the semiconductor substrate through etching and epitaxy includes forming the trenches simultaneously in the pixel region and the non-pixel region through etching and epitaxy.

[0010] Optionally, forming a trench in a semiconductor substrate through etching and epitaxial processes includes: forming a patterned first mask layer on the semiconductor substrate; forming a first trench in the semiconductor substrate through etching; and forming at least one epitaxial layer on the surface of the first trench and forming a lateral PN junction through epitaxial processes, thereby narrowing the linewidth of the first trench and forming the trench.

[0011] Optionally, removing a portion of the first dielectric layer and the second dielectric layer near the trench opening includes: removing a portion of the second dielectric layer near the trench opening; filling the trench opening with a third dielectric layer to close it; covering the alignment area and the device isolation area with a second mask layer to remove the third dielectric layer in the pixel area and a portion of the first dielectric layer near the trench opening; forming a first epitaxial layer to close the trench opening includes: forming a first epitaxial layer to close the trench opening in the pixel area.

[0012] Optionally, after forming the first epitaxial layer to close the opening of the trench, the method further includes: removing the first mask layer and the second mask layer; and forming a transistor on the first epitaxial layer.

[0013] Optionally, the lateral optical isolation structure includes a mid-space gap structure.

[0014] The present invention also provides an image sensor formed by the above-described image sensor forming method.

[0015] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0016] The image sensor formation method provided by this invention involves forming trenches in a semiconductor substrate through etching and epitaxial processes; forming a first dielectric layer on the surface of the trenches; forming a second dielectric layer on the surface of the first dielectric layer; removing portions of the first and second dielectric layers near the trench openings; and forming a first epitaxial layer to close the trench openings. The region corresponding to the trenches is used to form a lateral optical isolation structure for the image sensor. This lateral optical isolation structure may include an airgap structure 16. Incident light irradiating the airgap structure 16 will undergo total internal reflection, thereby effectively reducing light crosstalk between adjacent pixel units. Implementing this structure before the gate of the image sensor is completed provides excellent process compatibility with existing processes.

[0017] By using epitaxial technology, lateral PN junctions are formed on the sidewalls of the trench, achieving electrical isolation between adjacent pixel units.

[0018] Furthermore, the second dielectric layer can be silicon nitride; by adjusting the silicon nitride growth process, the silicon nitride can be made to carry a negative charge, which will pin the trench sidewalls and further reduce electrical crosstalk between adjacent pixel units.

[0019] In the prior art, during the thinning process of the back side of the wafer in the grinding substrate process, the wafer substrate is prone to distortion and deformation. Moreover, the alignment error of the photolithography itself will also cause a large error between the trench pattern on the back side of the wafer and the pixel center, resulting in non-uniformity of lateral isolation and affecting the isolation effect. The technical solution of the present invention can reduce the alignment error, improve the non-uniformity of lateral isolation, and improve the isolation effect. Attached Figure Description

[0020] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments, taken in conjunction with the accompanying drawings.

[0021] Figure 1 This invention provides a method for forming an image sensor according to an embodiment of the present invention.

[0022] Figures 2 to 14 This is a schematic diagram of the structure during the formation process of an image sensor according to an embodiment of the present invention. Detailed Implementation

[0023] The following detailed description is illustrative and intended to provide further explanation of the invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0024] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the present invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when used in this specification, the words “comprising” and / or “including” indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0025] Figure 1 A method for forming an image sensor according to an embodiment of the present invention includes the following steps:

[0026] Step S1: Form trenches in the semiconductor substrate through etching and epitaxial processes;

[0027] Step S2: Form a first dielectric layer on the surface of the trench;

[0028] Step S3: Form a second dielectric layer on the surface of the first dielectric layer;

[0029] Step S4: Remove a portion of the first dielectric layer and the second dielectric layer near the trench opening;

[0030] Step S5: Form a first epitaxial layer to close the opening of the trench; wherein the area corresponding to the trench is used to form a lateral optical isolation structure for the image sensor.

[0031] The following is in conjunction with the appendix Figures 2 to 14 right Figure 1 The method for forming the image sensor is described in detail.

[0032] refer to Figures 2 to 5 Trench 131 is formed in semiconductor substrate 11 through etching and epitaxial processes.

[0033] Specifically, a semiconductor substrate 11 is provided. The semiconductor substrate 11 can be a doped or undoped semiconductor material, such as silicon, germanium, silicon-germanium, silicon-germanium-on-insulator (SGOI), or combinations thereof. The semiconductor substrate 11 may include a substrate with multiple epitaxial layers. By way of illustration only, in this embodiment, the semiconductor substrate 11 may have epitaxial layers 112 and 113 formed on a silicon wafer 111. Epitaxial layer 112 may be a lightly doped P-type buffer layer; epitaxial layer 113 may be an N-type epitaxial layer used to form a photosensitive unit, i.e., the N-type region of a photodiode.

[0034] refer to Figure 3 A patterned first mask layer 12 is formed on the semiconductor substrate 11. Optionally, the first mask layer 12 may include one or more combinations of silicon oxide, silicon nitride, and silicon oxynitride.

[0035] refer to Figure 4 A first trench 130 is formed in the semiconductor substrate 11 through an etching process.

[0036] refer to Figure 5 At least one epitaxial layer is formed on the surface of the first trench 130 through an epitaxial process, forming a lateral PN junction, thereby narrowing the linewidth of the first trench 130 to form trench 131. As an example only, epitaxial layers 141 and 142 can be sequentially formed on the surface of the first trench 130 through an epitaxial process. Epitaxial layer 141 can be an intrinsic semiconductor. Epitaxial layer 142 can be a P-type semiconductor.

[0037] refer to Figure 6 A first dielectric layer 151 is formed on the surface of the trench 131. The first dielectric layer 151 may be silicon oxide.

[0038] refer to Figure 6 A second dielectric layer 152 is formed on the surface of the first dielectric layer 151. The second dielectric layer 152 can be silicon nitride or silicon oxynitride. Optionally, the second dielectric layer 152 can be silicon nitride; and the silicon nitride growth process can be adjusted to make the silicon nitride negatively charged, thereby pinning the sidewalls of the trench 131.

[0039] refer to Figures 7 to 10 The portion of the first dielectric layer 151 and the second dielectric layer 152 near the opening of the trench 131 is removed. For example, a dry etching process can be used to remove the portion of the first dielectric layer 151 and the second dielectric layer 152 near the opening of the trench 131.

[0040] refer to Figure 7 Remove a portion of the second dielectric layer 152 near the opening of trench 131.

[0041] refer to Figure 8 The trench 131 opening is closed by filling it with a third dielectric layer 153. The third dielectric layer 153 can be silicon oxide.

[0042] refer to Figure 9 The alignment area and device isolation area in the non-pixel area are covered by the second mask layer 17.

[0043] refer to Figure 10 The third dielectric layer 153 in the pixel area and a portion of the first dielectric layer 151 near the opening of the trench 131 are removed. In this embodiment, after removing a portion of the first dielectric layer 151, its upper surface is made lower than the upper surface of the second dielectric layer 152. This can reduce stacking faults generated during subsequent epitaxial growth when forming the first epitaxial layer 181.

[0044] refer to Figures 11 to 14A first epitaxial layer 181 is formed to close the opening of the trench 131; wherein, the region corresponding to the trench 131 is used to form a lateral optical isolation structure for the image sensor. This lateral optical isolation structure includes a mid-airgap structure 16. Incident light illuminating the mid-airgap structure 16 will undergo total internal reflection, thereby effectively reducing light crosstalk between adjacent pixel units.

[0045] refer to Figure 11 The first epitaxial layer 181 is formed through an epitaxial process, which closes the opening of the trench 131 in the pixel area.

[0046] Further, refer to Figure 12 The first mask layer 12 and the second mask layer 17 are removed, and the substrate is subjected to chemical mechanical polishing (CMP).

[0047] Further, refer to Figure 13 P-type ion implantation can be performed on the first epitaxial layer 181 to form an ion-doped region 182. The ion-doped region 182 and the lateral optical isolation structure together serve as isolation between adjacent pixel units.

[0048] Further, refer to Figure 14 Transistors 19 can be formed on the first epitaxial layer 181.

[0049] In some embodiments, when performing the back-side process of a back-illuminated image sensor, the first dielectric layer 151 or the second dielectric layer 152 can serve as a stop layer for the back-side thinning process of the semiconductor substrate 11.

[0050] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method of forming an image sensor, characterized by, include: Trenches are formed in a semiconductor substrate through etching and epitaxial processes; A first dielectric layer is formed on the surface of the trench; A second dielectric layer is formed on the surface of the first dielectric layer; Remove a portion of the first dielectric layer and the second dielectric layer near the trench opening; A first epitaxial layer is formed to close the opening of the trench; The area corresponding to the groove is used to form a lateral optical isolation structure for the image sensor, including a mid-space gap structure.

2. The method for forming an image sensor according to claim 1, wherein The first dielectric layer is silicon oxide; the second dielectric layer is silicon nitride or silicon oxynitride.

3. The method for forming an image sensor according to claim 2, wherein the second dielectric layer is silicon nitride. By adjusting the silicon nitride growth process, the silicon nitride is made to carry a negative charge, which pins the sidewalls of the trench.

4. The method for forming an image sensor according to claim 1, wherein The first dielectric layer or the second dielectric layer serves as a stop layer for the backside thinning process of the semiconductor substrate.

5. The method for forming an image sensor as described in claim 1, characterized in that, The semiconductor substrate includes pixel areas and non-pixel areas; The process of forming trenches in a semiconductor substrate through etching and epitaxy includes: The trenches are formed simultaneously in the pixel area and the non-pixel area through etching and epitaxial processes.

6. The method for forming an image sensor according to claim 5, wherein The process of forming trenches in a semiconductor substrate through etching and epitaxy includes: A patterned first mask layer is formed on a semiconductor substrate; The first trench is formed in the semiconductor substrate through an etching process; At least one epitaxial layer is formed on the surface of the first trench through an epitaxial process, and a lateral PN junction is formed, thereby narrowing the linewidth of the first trench and forming the trench.

7. The method for forming an image sensor according to claim 6, wherein The removal of a portion of the first dielectric layer and the second dielectric layer near the trench opening includes: Remove a portion of the second dielectric layer near the trench opening; The trench opening is sealed by filling with a third dielectric layer; The alignment area and device isolation area are covered by a second mask layer, and the third dielectric layer of the pixel area and part of the first dielectric layer near the trench opening are removed; The process of forming the first epitaxial layer to close the opening of the trench includes: A first epitaxial layer is formed to close the trench openings in the pixel region.

8. The method for forming an image sensor according to claim 7, wherein After forming the first epitaxial layer to close the opening of the trench, the process further includes: Remove the first mask layer and the second mask layer; A transistor is formed on the first epitaxial layer.

9. An image sensor, characterized by The method for forming an image sensor as described in any one of claims 1 to 8.

Citation Information

Patent Citations

  • Backside illuminated complementary metal-oxide-semiconductor transistor (CMOS) imaging sensor and preparation method thereof

    CN103094298A

  • Deep trench isolation structure of CMOS optical sensor and forming method

    CN109713004A