An LED driving circuit system

Abstract

The present invention discloses an LED driving circuit system, which includes a main control chip, a first driving chip, and a second driving chip; the main control chip includes four groups of RGB output interfaces, and each group of RGB output interfaces includes an R data pin, a G data pin, and a B data pin; both the first driving chip and the second driving chip include A0 - A7 input pins, B0 - B7 output pins, DIR pins, VCC pins, and GND pins; wherein the A0 - A7 input pins of the first driving chip and the A0 - A3 input pins of the second driving chip are respectively connected in one-to-one correspondence with the R data pins, G data pins, and B data pins of the four groups of RGB output interfaces, the B0 - B5 output pins of the first driving chip are used to output two groups of RGB data, the B6 - B7 output pins of the first driving chip and the B0 output pin of the second driving chip are used to output one group of RGB data, and the B1 - B3 output pins of the second driving chip are used to output one group of RGB data. Thus, the present invention can provide four groups of RGB interfaces through two driving chips, which can reduce the number of chips and simplify the wiring.

Description

Technical Field

[0001] The present invention relates to the technical field of LED driving, and in particular, to an LED driving circuit system. Background Art

[0002] Due to characteristics such as high brightness, wide viewing angle, and long service life, LED displays are widely used in outdoor advertising screens, hospitals, stadiums, stations, etc. In the existing LED driving methods, usually each LED driving chip has only one set of RGB interfaces, that is, each LED driving chip drives one set of RGB channels (i.e., three LED lights) through one set of RGB interfaces. Therefore, when it is necessary to drive two or more sets of RGB channels, two or more LED driving chips are correspondingly required. The number of chips is large, the cost is high, and the wiring is complicated, and more space is needed to place the chips. Summary of the Invention

[0003] An embodiment of the present invention provides an LED driving circuit system, which can provide four sets of RGB interfaces through two driving chips, reduce the number of chips, simplify the wiring, reduce the cost, and reduce the space occupied by the chips.

[0004] To solve the above technical problems, on the one hand, the present invention provides an LED driving circuit system, including a main control chip, a first driving chip, and a second driving chip;

[0005] The main control chip includes a VDD33 pin, a VSS-DIG pin, four sets of RGB output interfaces, a GLCK pin for outputting a line clock signal, a DLCK pin for outputting a pixel clock signal, and an LE pin for data latching. Each set of the RGB output interfaces includes an R data pin, a G data pin, and a B data pin; both the first driving chip and the second driving chip include A0-A7 input pins, B0-B7 output pins, a DIR pin, a VCC pin, and a GND pin;

[0006] The A0 - A7 input pins of the first driving chip and the A0 - A3 input pins of the second driving chip are respectively and correspondingly connected to the R data pins, G data pins, and B data pins of the four groups of RGB output interfaces. The A4 input pin, A5 input pin, and A6 input pin of the second driving chip are respectively connected to the GLCK pin, LE pin, and DLCK pin of the main control chip, and the A7 input pin of the second driving chip is grounded. The B0 - B5 output pins of the first driving chip are used to output two groups of RGB data, the B6 - B7 output pins of the first driving chip and the B0 output pin of the second driving chip are used to output one group of RGB data, and the B1 - B3 output pins of the second driving chip are used to output one group of RGB data. The B4 - B6 output pins of the second driving chip are respectively used to output DE signal, LAT signal, and CLK signal, and the B7 output pin of the second driving chip is floating.

[0007] The VDD33 pin is connected to the first working voltage, the VSS - DIG is grounded, the DIR pin and the VCC pin are both connected to the second working voltage, and the GND pin is grounded. A first capacitor is also connected between the VCC pin and the GND pin of the first driving chip, and a second capacitor is also connected between the VCC pin and the GND pin of the second driving chip.

[0008] Further, the LED driving circuit system further includes a third capacitor, a fourth capacitor, and a fifth capacitor;

[0009] The first ends of the third capacitor, the fourth capacitor, and the fifth capacitor are all connected to the VDD33 pin, and the second ends of the third capacitor, the fourth capacitor, and the fifth capacitor are all grounded.

[0010] Further, the main control chip further includes a LINE pin, and the LED driving circuit system further includes an indicator light circuit. The indicator light circuit includes a first resistor and an LED indicator light. The first end of the first resistor is connected to the first working voltage, the second end of the first resistor and the positive electrode of the LED indicator light are both connected to the LINE pin, and the negative electrode of the LED indicator light is grounded.

[0011] Further, the LED driving circuit system further includes a voltage conversion circuit. The voltage conversion circuit includes a buck chip, a sixth capacitor, a seventh capacitor, an eighth capacitor, a second resistor, and a third resistor;

[0012] The step-down chip includes a Vin pin, a Vout pin, a GND pin, an EN pin, and a BTP pin; the Vin pin is connected to the second operating voltage, the Vout pin is connected to the first end of the seventh capacitor and the first end of the second resistor, the second end of the seventh capacitor is grounded, the second end of the second resistor is connected to the first end of the third resistor, the second end of the third resistor is grounded, the BTP pin is connected to the first end of the eighth capacitor, the second end of the eighth capacitor is grounded, the first end of the sixth capacitor and the EN pin are both connected to the Vin pin, the second end of the sixth capacitor and the GND pin of the step-down chip are both grounded, and the step-down chip is used to convert the second operating voltage into the first operating voltage and output the first operating voltage from the Vout pin.

[0013] Further, the first operating voltage is 3.3V and the second operating voltage is 5V.

[0014] Further, the main control chip further includes a RECLK pin for inputting a RECLK signal, and the LED driving circuit system further includes a clock signal generating circuit, and the clock signal generating circuit includes an oscillator chip, a fourth resistor, a fifth resistor, and a ninth capacitor;

[0015] The oscillator chip includes an EN pin, a VCC pin, a GND pin, and an OUT pin; the first end of the fourth resistor, the first end of the ninth capacitor, and the VCC pin of the oscillator chip are all connected to the first operating voltage, the second end of the fourth resistor is connected to the EN pin, the GND pin of the oscillator chip is grounded, the second end of the ninth capacitor is grounded, the first end of the fifth resistor is connected to the OUT pin of the oscillator chip, and the second end of the fifth resistor is connected to the RECLK pin of the main control chip for outputting a RECLK signal.

[0016] Further, the main control chip further includes a TEST-EN pin, an SPI-CLK pin, an SPI-CSN pin, an SPI-DOUT pin, and an SN-DIN pin, and the LED driving circuit system further includes a correction data storage circuit, and the correction data storage circuit includes a storage chip, a sixth resistor, a seventh resistor, and a tenth capacitor;

[0017] The storage chip includes pins, a DO pin, pins, a GND pin, a VCC pin, pins, a CLK pin, and a DI pin;

[0018] The The pin is connected to the SPI-CSN pin of the main control chip and is used to output the SPI-CSN signal. The first end of the sixth resistor is used to connect to the first working voltage, and the second end of the sixth resistor is connected to the pin; the DO pin is connected to the SPI-DOUT pin and is used to output the SPI-DO signal; the pin is used to input the first working voltage; the GND pin of the storage chip is grounded; the VCC pin of the storage chip and the pin are both connected to the first working voltage; the first end of the seventh resistor and the first end of the tenth capacitor are both connected to the VCC pin of the storage chip, and the second end of the seventh resistor and the second end of the tenth capacitor are grounded; the CLK pin of the storage chip is connected to the SPI-CLK pin and is used to output the SPI-CLK signal; the DI pin of the storage chip is connected to the SN-DIN pin and is used to output the SPI-DI signal.

[0019] Beneficial effects: In the LED driving circuit system of the present invention, it includes a main control chip, a first driving chip, and a second driving chip; the main control chip includes a VDD33 pin, a VSS-DIG pin, four groups of RGB output interfaces, a GLCK pin for outputting a line clock signal, a DLCK pin for outputting a pixel clock signal, and a LE pin for data latching, where each group of the RGB output interfaces includes an R data pin, a G data pin, and a B data pin; the first driving chip and the second driving chip both include A0-A7 input pins, B0-B7 output pins, a DIR pin, a VCC pin, and a GND pin; the A0-A7 input pins of the first driving chip and the A0-A3 input pins of the second driving chip are respectively connected to the R data pins, G data pins, and B data pins of the four groups of RGB output interfaces in one-to-one correspondence, the A4 input pin, A5 input pin, and A6 input pin of the second driving chip are respectively connected to the GLCK pin, LE pin, and DLCK pin of the main control chip, and the A7 input pin of the second driving chip is grounded; the B0-B5 output pins of the first driving chip are used to output two groups of RGB data, the B6-B7 output pins of the first driving chip and the B0 output pin of the second driving chip are used to output one group of RGB data, and the B1-B3 output pins of the second driving chip are used to output one group of RGB data. In this way, four groups of RGB interfaces can be provided by two driving chips, which can reduce the number of chips, simplify the wiring, reduce the cost, and reduce the space occupied by the chips. Description of the Drawings

[0020] The following will clearly show the technical solutions and their beneficial effects of the present invention by describing the specific embodiments of the present invention in detail in conjunction with the drawings.

[0021] Figure 1 is the circuit schematic diagram of the LED driving circuit system provided by the embodiment of the present invention;

[0022] Figure 2 is the circuit schematic diagram of the voltage conversion circuit provided by the embodiment of the present invention;

[0023] Figure 3 is the circuit schematic diagram of the clock signal generation circuit provided by the embodiment of the present invention;

[0024] Figure 4 is the circuit schematic diagram of the correction data storage circuit provided by the embodiment of the present invention. Detailed implementation manners

[0025] Please refer to the drawings, where the same component symbols represent the same components. The principle of the present invention is illustrated by being implemented in a suitable operating environment. The following description is based on the specific embodiments of the present invention illustrated, and it should not be regarded as limiting other specific embodiments of the present invention not detailed herein.

[0026] Refer to Figures 1 to 4 , a kind of LED driving circuit system provided by the embodiment of the present invention. The driving circuit includes a main control chip U1, a first driving chip U21, and a second driving chip U22.

[0027] The main control chip U1 includes a VDD33 pin, a VSS-DIG pin, four groups of RGB output interfaces, a GLCK pin for outputting a line clock signal, a DLCK pin for outputting a pixel clock signal, and a LE pin for data latching. Each group of the RGB output interfaces includes an R data pin, a G data pin, and a B data pin; both the first driving chip U21 and the second driving chip U22 include A0 - A7 input pins, B0 - B7 output pins, a DIR pin, a VCC pin, and a GND pin.

[0028] The A0 - A7 input pins of the first driving chip U21 and the A0 - A3 input pins of the second driving chip U22 are respectively and correspondingly connected to the R data pins, G data pins, and B data pins of the four groups of RGB output interfaces. The A4 input pin, A5 input pin, and A6 input pin of the second driving chip U22 are respectively connected to the GLCK pin, LE pin, and DLCK pin of the main control chip U1, and the A7 input pin of the second driving chip U22 is grounded; the B0 - B5 output pins of the first driving chip U21 are used to output two groups of RGB data, the B6 - B7 output pins of the first driving chip U21 and the B0 output pin of the second driving chip U22 are used to output one group of RGB data, and the B1 - B3 output pins of the second driving chip are used to output one group of RGB data; the B4 - B6 output pins of the second driving chip U22 are respectively used to output the DE signal, LAT signal, and CLK signal, and the B7 output pin of the second driving chip U22 is floating;

[0029] The VDD33 pin is connected to the first working voltage, the VSS - DIG is grounded, the DIR pin and VCC pin of the main control chip U1 are both connected to the second working voltage, and the GND pins of the first driving chip U21 and the second driving chip U22 are grounded. A first capacitor C1 is also connected between the VCC pin and the GND pin of the first driving chip U21, and a second capacitor C2 is also connected between the VCC pin and the GND pin of the second driving chip U22.

[0030] In the embodiment of the present invention, the main control chip U1 has four groups of RGB interfaces, and each group of RGB interfaces includes an R data pin, a G data pin, and a B data pin. Thus, four groups of RGB data can be output. The four groups of RGB data are output to two driving chips U21 and U22, and the two driving chips U21 and U22 jointly output four groups of RGB data to the display screen. Compared with the existing method, the number of chips can be reduced, the wiring can be simplified, the cost can be reduced, and the space occupied by the chips can be reduced.

[0031] The LED driving circuit system of the embodiment of the present invention further includes a third capacitor C3, a fourth capacitor C4, and a fifth capacitor C5.

[0032] The first ends of the third capacitor C3, the fourth capacitor C4, and the fifth capacitor C5 are all connected to the VDD33 pin, and the second ends of the third capacitor C3, the fourth capacitor C4, and the fifth capacitor C5 are all grounded. Through the functions of the capacitors C3, C4, and C5, the first working voltage can be filtered.

[0033] Among them, the main control chip U1 further includes a LINE pin, the LED driving circuit system further includes an indicator light circuit, the indicator light circuit includes a first resistor R1 and an LED indicator L. The first end of the first resistor R1 is connected to the first working voltage, the second end of the first resistor R1 and the positive electrode of the LED indicator L are both connected to the LINE pin, and the negative electrode of the LED indicator L is grounded.

[0034] Further, the LED driving circuit system further includes a voltage conversion circuit, and the voltage conversion circuit includes a buck chip U3, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a second resistor R2, and a third resistor R3.

[0035] The buck chip U3 includes a Vin pin, a Vout pin, a GND pin, an EN pin, and a BTP pin; the Vin pin is connected to the second working voltage, the Vout pin is connected to the first end of the seventh capacitor C7 and the first end of the second resistor R2, the second end of the seventh capacitor C7 is grounded, the second end of the second resistor R2 is connected to the first end of the third resistor R3, the second end of the third resistor R3 is grounded, the BTP pin is connected to the first end of the eighth capacitor C8, the second end of the eighth capacitor C8 is grounded, the first end of the sixth capacitor C6 and the EN pin are both connected to the Vin pin, the second end of the sixth capacitor C6 and the GND pin of the buck chip U3 are both grounded, and the buck chip U3 is used to convert the second working voltage into the first working voltage and output the first working voltage from the Vout pin.

[0036] Among them, the first working voltage is 3.3V and the second working voltage is 5V.

[0037] Among them, the main control chip U1 further includes a RECLK pin for inputting a RECLK signal, the LED driving circuit system further includes a clock signal generation circuit, and the clock signal generation circuit includes an oscillator chip u3, a fourth resistor R4, a fifth resistor R5, and a ninth capacitor C9.

[0038] The oscillation frequency of the oscillator chip U3 is 25MHz, and it includes an EN pin, a VCC pin, a GND pin, and an OUT pin; the first end of the fourth resistor R4, the first end of the ninth capacitor C9, and the VCC pin of the oscillator chip U3 are all connected to the first working voltage, the second end of the fourth resistor R4 is connected to the EN pin, the GND pin of the oscillator chip U3 is grounded, the second end of the ninth capacitor C9 is grounded, the first end of the fifth resistor R5 is connected to the OUT pin of the oscillator chip U3, and the second end of the fifth resistor R5 is connected to the RECLK pin of the main control chip U1 for outputting the RECLK signal.

[0039] Furthermore, the main control chip U1 further includes a TEST-EN pin, an SPI-CLK pin, an SPI-CSN pin, an SPI-DOUT pin, and an SN-DIN pin. The LED driving circuit system further includes a correction data storage circuit, and the correction data storage circuit includes a storage chip U4, a sixth resistor R6, a seventh resistor R7, and a tenth capacitor C10.

[0040] The storage chip U4 includes pins, a DO pin, pins, a GND pin, a VCC pin, pins, a CLK pin, and a DI pin.

[0041] The pin is connected to the SPI-CSN pin of the main control chip U1 for outputting an SPI-CSN signal. The first end of the sixth resistor R6 is used to connect to a first operating voltage, and the second end of the sixth resistor R6 is connected to the pin; the DO pin is connected to the SPI-DOUT pin for outputting an SPI-DO signal; the pin is used to input a first operating voltage; the GND pin of the storage chip U4 is grounded; the VCC pin of the storage chip U4 and the pin are both connected to a first operating voltage; the first end of the seventh resistor R7 and the first end of the tenth capacitor C10 are both connected to the VCC pin of the storage chip U4, and the second end of the seventh resistor R7 and the second end of the tenth capacitor C10 are grounded; the CLK pin of the storage chip U4 is connected to the SPI-CLK pin for outputting an SPI-CLK signal; the DI pin of the storage chip U4 is connected to the SN-DIN pin for outputting an SPI-DI signal.

[0042] In this article, specific examples are used to elaborate on the principles and implementation manners of the present invention. The descriptions of the above embodiments are only used to help understand the method and its core idea of the present invention; at the same time, for those skilled in the art, according to the idea of the present invention, there will be changes in the specific implementation manners and application scopes. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. An LED driving circuit system, characterized in that, It includes a main control chip, a first driving chip, and a second driving chip; The main control chip includes a VDD33 pin, a VSS-DIG pin, four groups of RGB output interfaces, a GLCK pin for outputting a line clock signal, a DLCK pin for outputting a pixel clock signal, and an LE pin for data latching. Each group of the RGB output interfaces includes an R data pin, a G data pin, and a B data pin. The first driving chip and the second driving chip both include A0 - A7 input pins, B0 - B7 output pins, a DIR pin, a VCC pin, and a GND pin; The A0 - A7 input pins of the first driving chip and the A0 - A3 input pins of the second driving chip are respectively and correspondingly connected to the R data pins, G data pins, and B data pins of the four groups of RGB output interfaces. The A4 input pin, A5 input pin, and A6 input pin of the second driving chip are respectively connected to the GLCK pin, LE pin, and DLCK pin of the main control chip. The A7 input pin of the second driving chip is grounded. The B0 - B5 output pins of the first driving chip are used to output two groups of RGB data. The B6 - B7 output pins of the first driving chip and the B0 output pin of the second driving chip are used to output one group of RGB data. The B1 - B3 output pins of the second driving chip are used to output one group of RGB data. The B4 - B6 output pins of the second driving chip are respectively used to output a DE signal, a LAT signal, and a CLK signal. The B7 output pin of the second driving chip is left floating; The VDD33 pin is connected to a first working voltage. The VSS-DIG pin is grounded. The DIR pin and the VCC pin are both connected to a second working voltage. The GND pin is grounded. A first capacitor is also connected between the VCC pin and the GND pin of the first driving chip. A second capacitor is also connected between the VCC pin and the GND pin of the second driving chip.

2. The LED driving circuit system according to claim 1, wherein It further includes a third capacitor, a fourth capacitor, and a fifth capacitor; The first ends of the third capacitor, the fourth capacitor, and the fifth capacitor are all connected to the VDD33 pin. The second ends of the third capacitor, the fourth capacitor, and the fifth capacitor are all grounded.

3. The LED driving circuit system according to claim 1, wherein The main control chip further includes a LINE pin. The LED driving circuit system further includes an indicator light circuit. The indicator light circuit includes a first resistor and an LED indicator light. The first end of the first resistor is connected to the first working voltage. The second end of the first resistor and the positive pole of the LED indicator light are both connected to the LINE pin. The negative pole of the LED indicator light is grounded.

4. The LED driving circuit system according to claim 1, wherein It further includes a voltage conversion circuit. The voltage conversion circuit includes a step-down chip, a sixth capacitor, a seventh capacitor, an eighth capacitor, a second resistor, and a third resistor; The step-down chip includes a Vin pin, a Vout pin, a GND pin, an EN pin, and a BTP pin; the Vin pin is connected to a second operating voltage, the Vout pin is connected to the first end of a seventh capacitor and the first end of a second resistor, the second end of the seventh capacitor is grounded, the second end of the second resistor is connected to the first end of the third resistor, the second end of the third resistor is grounded, the BTP pin is connected to the first end of an eighth capacitor, the second end of the eighth capacitor is grounded, the first end of the sixth capacitor and the EN pin are both connected to the Vin pin, the second end of the sixth capacitor and the GND pin of the step-down chip are both grounded, and the step-down chip is configured to convert the second operating voltage into a first operating voltage and output the first operating voltage from the Vout pin.

5. The LED driving circuit system according to claim 4, characterized in that, The first operating voltage is 3.3V and the second operating voltage is 5V.

6. The LED driving circuit system according to claim 1, wherein, The main control chip further includes a RECLK pin for inputting a RECLK signal, and the LED driving circuit system further includes a clock signal generating circuit, and the clock signal generating circuit includes an oscillator chip, a fourth resistor, a fifth resistor, and a ninth capacitor; The oscillator chip includes an EN pin, a VCC pin, a GND pin, and an OUT pin; the first end of the fourth resistor, the first end of the ninth capacitor, and the VCC pin of the oscillator chip are all connected to the first operating voltage, the second end of the fourth resistor is connected to the EN pin, the GND pin of the oscillator chip is grounded, the second end of the ninth capacitor is grounded, the first end of the fifth resistor is connected to the OUT pin of the oscillator chip, and the second end of the fifth resistor is connected to the RECLK pin of the main control chip for outputting the RECLK signal.

7. The LED driving circuit system according to claim 1, wherein The main control chip further includes a TEST-EN pin, a SPI-CLK pin, a SPI-CSN pin, a SPI-DOUT pin, and a SN-DIN pin, and the LED driving circuit system further includes a correction data storage circuit, and the correction data storage circuit includes a storage chip, a sixth resistor, a seventh resistor, and a tenth capacitor; The storage chip includes pin, DO pin, pin, GND pin, VCC pin, pin, CLK pin, and DI pin; The pin is connected to the SPI-CSN pin of the main control chip for outputting the SPI-CSN signal. The first end of the sixth resistor is used to connect to the first working voltage, and the second end of the sixth resistor is connected to the pin; the DO pin is connected to the SPI-DOUT pin for outputting the SPI-DO signal; the pin is used for inputting the first working voltage; the GND pin of the storage chip is grounded; the VCC pin of the storage chip and the pin are both connected to the first working voltage; the first ends of the seventh resistor and the tenth capacitor are both connected to the VCC pin of the storage chip, and the second ends of the seventh resistor and the tenth capacitor are grounded; the CLK pin of the storage chip is connected to the SPI-CLK pin for outputting the SPI-CLK signal; the DI pin of the storage chip is connected to the SN-DIN pin for outputting the SPI-DI signal.

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