Detection device

Abstract

The present application provides a detection device capable of improving detection sensitivity. The detection device has: a substrate; a plurality of photodiodes provided on the substrate and having an organic semiconductor; a plurality of transistors provided corresponding to the plurality of photodiodes respectively, the transistor including a semiconductor layer, a gate electrode, and a source electrode; a plurality of lower electrodes provided corresponding to the plurality of photodiodes respectively, the lower electrode being provided between the transistor and the photodiode in a direction perpendicular to the substrate; an upper electrode provided across the plurality of photodiodes; a first auxiliary capacitor electrode provided between the substrate and the photodiode in a direction perpendicular to the substrate; and a second auxiliary capacitor electrode provided in the same layer as the semiconductor layer or the source electrode and facing the first auxiliary capacitor electrode through an insulating film.

Description

[0001] This application claims priority to Japanese Patent Application No. 2021-135626, filed on August 23, 2021, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to a detection device. Background Technology

[0003] Optical sensors capable of detecting fingerprint patterns and vein patterns are known (e.g., Japanese Patent Application Publication No. 2009-32005). Such optical sensors have multiple photodiodes using organic semiconductor materials as active layers. The charge generated when light shines on the photodiodes is stored in a sensor capacitance formed between the anode and cathode of the photodiodes.

[0004] Increasing the area of ​​the lower electrode of the photodiode increases the sensor capacitance, but it may also increase the leakage current of the photodiode. Conversely, decreasing the area of ​​the lower electrode of the photodiode reduces the sensor capacitance, potentially decreasing the maximum output signal from the photodiode. Summary of the Invention

[0005] The purpose of this invention is to provide a detection device that can improve detection sensitivity.

[0006] A detection device according to one aspect of the present invention comprises: a substrate; a plurality of photodiodes disposed on the substrate and having an organic semiconductor; a plurality of transistors disposed corresponding to each of the plurality of photodiodes, the transistors including a semiconductor layer, a gate electrode, and a source electrode; a plurality of lower electrodes disposed corresponding to each of the plurality of photodiodes, the lower electrodes being disposed between the transistors and the photodiodes in a direction perpendicular to the substrate; an upper electrode disposed across the plurality of photodiodes; a first auxiliary capacitor electrode disposed between the substrate and the photodiodes in a direction perpendicular to the substrate; and a second auxiliary capacitor electrode disposed on the same layer as the semiconductor layer or the source electrode, and facing the first auxiliary capacitor electrode through an insulating film. Attached Figure Description

[0007] Figure 1 This is a top view showing the detection device involved in the embodiment.

[0008] Figure 2 This is a block diagram illustrating an example of the configuration of the detection device involved in the embodiment.

[0009] Figure 3 This is a circuit diagram representing the detection device.

[0010] Figure 4It is a circuit diagram representing multiple detection elements.

[0011] Figure 5 It is a circuit diagram that enlarges the representation of a detection element.

[0012] Figure 6 It is a graph that schematically shows the relationship between the amount of charge on a pixel capacitor and time.

[0013] Figure 7 This is a schematic top view illustrating the detection device involved in the embodiment.

[0014] Figure 8 yes Figure 7 Sectional view of VIII-VIII'.

[0015] Figure 9 This is a schematic top view of the detection device involved in the first modified example.

[0016] Figure 10 This is a schematic top view of the detection device involved in the second variation.

[0017] Figure 11 This is a schematic top view of the detection device involved in the third variation.

[0018] Figure 12 This is a schematic top view of the detection device involved in the fourth variation. Detailed Implementation

[0019] The embodiments for carrying out the present invention will be described in detail with reference to the accompanying drawings. This disclosure is not limited to the contents described in the following embodiments. Furthermore, the constituent elements described below include elements readily conceived by those skilled in the art, and substantially the same elements. Moreover, the constituent elements described below can be appropriately combined. It should be noted that this disclosure is merely an example, and appropriate modifications that can be readily conceived by those skilled in the art in relation to maintaining the spirit of this disclosure are naturally included within the scope of this disclosure. Additionally, in order to make the explanation clearer, the drawings may schematically show the width, thickness, shape, etc., of various parts compared to the actual embodiment; however, this is merely an example and does not limit the interpretation of this disclosure. Furthermore, in this disclosure and the various figures, sometimes the same reference numerals are used for elements that are the same as those described in the previously appeared figures, and detailed descriptions are appropriately omitted.

[0020] In this specification and claims, when describing the arrangement of other structures on top of a certain structure, the term "on top" includes, unless otherwise specified, both the case of arranging other structures immediately above and adjacent to a certain structure, and the case of arranging other structures above a certain structure with another structure in between.

[0021] (Implementation Method)

[0022] Figure 1 This is a top view showing the detection device involved in the embodiment. For example... Figure 1 As shown, the detection device 1 includes a substrate 21, a sensor unit 10, a gate line driving circuit 15, a signal line selection circuit 16, a detection circuit 48, a control circuit 122, a power supply circuit 123, a first light source substrate 51, a second light source substrate 52, a first light source 53, and a second light source 54. Multiple first light sources 53 are disposed on the first light source substrate 51. Multiple second light sources 54 are disposed on the second light source substrate 52.

[0023] The control board 121 is electrically connected to the board 21 via the wiring board 71. The wiring board 71 is, for example, a flexible printed circuit board or a rigid board. A detection circuit 48 is provided on the wiring board 71. A control circuit 122 and a power supply circuit 123 are provided on the control board 121. The control circuit 122 is, for example, an FPGA (Field Programmable Gate Array). The control circuit 122 supplies control signals to the sensor unit 10, the gate line driving circuit 15, and the signal line selection circuit 16 to control the detection operation of the sensor unit 10. In addition, the control circuit 122 supplies control signals to the first light source 53 and the second light source 54 to control the lighting or delighting of the first light source 53 and the second light source 54. The power supply circuit 123 transmits the sensor power signal VDDSNS (refer to...) to the sensor power supply circuit 123. Figure 4 The voltage signal is supplied to the sensor unit 10, the gate line drive circuit 15, and the signal line selection circuit 16. In addition, the power supply circuit 123 supplies power voltage to the first light source 53 and the second light source 54.

[0024] The substrate 21 has a detection area AA and a peripheral area GA. The detection area AA is provided with a plurality of photodiodes PD (see reference 10) of the sensor unit 10. Figure 4 The peripheral area GA is the area between the outer periphery of the detection area AA and the outer edge of the substrate 21, and is the area where multiple photodiodes PD are not disposed.

[0025] The gate line driving circuit 15 and the signal line selection circuit 16 are disposed in the peripheral region GA. Specifically, the gate line driving circuit 15 is disposed in the region of the peripheral region GA that extends along the second direction Dy. The signal line selection circuit 16 is disposed in the region of the peripheral region GA that extends along the first direction Dx, and is disposed between the sensor section 10 and the detection circuit 48.

[0026] It should be noted that in the following description, the first direction Dx is a direction within a plane parallel to the substrate 21. The second direction Dy is a direction within a plane parallel to the substrate 21, and is orthogonal to the first direction Dx. It should also be noted that the second direction Dy may not intersect the first direction Dx orthogonally. In addition, "top view" refers to the positional relationship when viewed from a direction perpendicular to the substrate 21.

[0027] A plurality of first light sources 53 are disposed on a first light source substrate 51 and arranged along a second direction Dy. A plurality of second light sources 54 are disposed on a second light source substrate 52 and arranged along a second direction Dy. The first light source substrate 51 and the second light source substrate 52 are electrically connected to the control circuit 122 and the power supply circuit 123 respectively via terminal portions 124 and 125 disposed on the control board 121.

[0028] Multiple first light sources 53 and multiple second light sources 54, such as inorganic LEDs (Light Emitting Diodes) and organic OLEDs (Organic Light Emitting Diodes), emit first light and second light of different wavelengths.

[0029] The first light emitted from the first light source 53 is mainly reflected off the surface of the object being detected, such as a finger, and then enters the sensor unit 10. Thus, the sensor unit 10 can detect fingerprints by detecting the irregular shape of the surface of the finger, etc. The second light emitted from the second light source 54 is mainly reflected from the inside of the finger, etc., or passes through the finger, etc., and then enters the sensor unit 10. Thus, the sensor unit 10 can detect information related to the biological structure inside the finger, etc. This biological information includes, for example, pulse waves, pulses, and vascular patterns of the finger or palm. That is, the detection device 1 can also be configured as a fingerprint detection device for detecting fingerprints, or a vein detection device for detecting vascular patterns such as veins.

[0030] The first light can have a wavelength of 500 nm or more and 600 nm or less, for example, around 550 nm, and the second light can have a wavelength of 780 nm or more and 950 nm or less, for example, around 850 nm. In this case, the first light is blue or green visible light, and the second light is infrared light. The sensor unit 10 can detect fingerprints based on the first light emitted from the first light source 53. The second light emitted from the second light source 54 is reflected inside the object being detected, such as a finger, or passes through / is absorbed by the finger and enters the sensor unit 10. Thus, the sensor unit 10 can detect pulse waves and vascular images (vascular patterns) as information related to the biological organism inside the finger, etc.

[0031] Alternatively, the first light may have a wavelength of 600 nm or more but less than 700 nm, for example, around 660 nm, and the second light may have a wavelength of 780 nm or more but less than 900 nm, for example, around 850 nm. In this case, the sensor unit 10 can detect blood oxygen saturation as biological information, in addition to pulse wave, pulse, and vascular image, based on the first light emitted from the first light source 53 and the second light emitted from the second light source 54. Thus, since the detection device 1 has the first light source 53 and multiple second light sources 54, it can detect various biological information by performing detection based on the first light and detection based on the second light.

[0032] It should be pointed out that, Figure 1 The configuration of the first light source 53 and the second light source 54 shown is merely an example and can be modified appropriately. The detection device 1 may be equipped with multiple light sources (first light source 53 and second light source 54). However, it is not limited to this; a single light source may suffice. For example, multiple first light sources 53 and multiple second light sources 54 may be configured on each of the first light source substrate 51 and the second light source substrate 52. Furthermore, the light source substrate on which the first light source 53 and the second light source 54 are configured may be one or more. Alternatively, at least one light source may be configured.

[0033] It should be pointed out that, Figure 1 The detection device 1 shown can be a transmission type detection device that detects light that has passed through the object being tested, or a reflection type detection device that detects light reflected by the object being tested.

[0034] Figure 2 This is a block diagram illustrating an example configuration of the detection device according to the embodiment. For example... Figure 2 As shown, the detection device 1 also includes a detection control unit 11 and a detection unit 40. Some or all of the functions of the detection control unit 11 are included in the control circuit 122. Furthermore, some or all of the functions of the detection unit 40 other than the detection circuit 48 are included in the control circuit 122.

[0035] The sensor unit 10 has multiple photodiodes PD. Each photodiode PD in the sensor unit 10 outputs an electrical signal corresponding to the irradiated light as a detection signal Vdet to the signal line selection circuit 16. Furthermore, the sensor unit 10 performs detection according to the gate drive signal Vgcl supplied from the gate line drive circuit 15.

[0036] The detection control unit 11 is a circuit that supplies control signals to the gate line drive circuit 15, the signal line selection circuit 16, and the detection unit 40 to control their operation. The detection control unit 11 supplies various control signals, such as the start signal STV, the clock signal CK, and the reset signal RST1, to the gate line drive circuit 15. Additionally, the detection control unit 11 supplies various control signals, such as the selection signal ASW, to the signal line selection circuit 16. Furthermore, the detection control unit 11 supplies various control signals to the first light source 53 and the second light source 54 to control their respective illumination and de-illumination.

[0037] Gate line drive circuit 15 drives multiple gate lines GCL based on various control signals (see reference). Figure 4 The gate line drive circuit 15 selects multiple gate lines GCL sequentially or simultaneously and supplies a gate drive signal Vgcl to the selected gate line GCL. Thus, the gate line drive circuit 15 selects multiple photodiodes PD connected to the gate line GCL.

[0038] Signal line selection circuit 16 selects multiple signal lines SGL sequentially or simultaneously (see reference). Figure 4 The switching circuit of the photodiode PD is as follows: The signal line selection circuit 16 is, for example, a multiplexer. Based on the selection signal ASW supplied from the detection control unit 11, the signal line selection circuit 16 connects the selected signal line SGL to the detection circuit 48. As a result, the signal line selection circuit 16 outputs the detection signal Vdet of the photodiode PD to the detection unit 40.

[0039] The detection unit 40 includes a detection circuit 48, a signal processing unit 44, a coordinate extraction unit 45, a storage unit 46, a detection timing control unit 47, an image processing unit 49, and an output processing unit 50. The detection timing control unit 47 controls the detection circuit 48, the signal processing unit 44, the coordinate extraction unit 45, and the image processing unit 49 to operate synchronously based on the control signal supplied from the detection control unit 11.

[0040] The detection circuit 48 is, for example, an analog front-end circuit (AFE). The detection circuit 48 is a signal processing circuit that at least has the functions of a detection signal amplification unit 42 and an A / D conversion unit 43. The detection signal amplification unit 42 amplifies the detection signal Vdet. The A / D conversion unit 43 converts the analog signal output from the detection signal amplification unit 42 into a digital signal.

[0041] The signal processing unit 44 is a logic circuit that detects a specified physical quantity input to the sensor unit 10 based on the output signal of the detection circuit 48. When a finger touches or approaches the detection surface, the signal processing unit 44 can detect the surface irregularities of the finger or palm based on the signal from the detection circuit 48. Furthermore, the signal processing unit 44 can detect biologically relevant information based on the signal from the detection circuit 48. Biologically relevant information includes, for example, images of blood vessels in the finger or palm, pulse waves, pulse rate, and blood oxygen concentration.

[0042] Additionally, the signal processing unit 44 can also acquire detection signals Vdet (information related to the organism) simultaneously detected by multiple photodiodes PDs and perform averaging processing. In this case, the detection unit 40 can suppress measurement errors caused by noise, fingers, or other relative positional shifts between the detected object and the sensor unit 10, thus achieving stable detection.

[0043] The storage unit 46 temporarily stores the signals processed by the signal processing unit 44. The storage unit 46 may be, for example, RAM (Random Access Memory), register circuitry, etc.

[0044] The coordinate extraction unit 45 is a logic circuit that calculates the detection coordinates of the surface irregularities of the fingers, etc., when the signal processing unit 44 detects the contact or proximity of a finger. Additionally, the coordinate extraction unit 45 is a logic circuit that calculates the detection coordinates of blood vessels in the fingers and palm. The image processing unit 49 combines the detection signals Vdet output from each photodiode PD of the sensor unit 10 to generate two-dimensional information representing the shape of the surface irregularities of the fingers, etc., and two-dimensional information representing the shape of blood vessels in the fingers and palm. It should be noted that the coordinate extraction unit 45 may also output the detection signal Vdet as the sensor output voltage Vo without calculating the detection coordinates. Furthermore, the coordinate extraction unit 45 and the image processing unit 49 may not be included in the detection unit 40.

[0045] The output processing unit 50 functions as a processing unit that performs processing based on the outputs from multiple photodiodes (PDs). The output processing unit 50 may also include the detection coordinates obtained by the coordinate extraction unit 45 and the two-dimensional information generated by the image processing unit 49 in the sensor output voltage Vo. Furthermore, the function of the output processing unit 50 may be integrated into other components (e.g., the image processing unit 49).

[0046] Next, an example of the circuit configuration of the detection device 1 will be explained. Figure 3 This is a circuit diagram representing the detection device. For example... Figure 3 As shown, the sensor unit 10 has multiple detection elements PAA arranged in a matrix. A photodiode PD is disposed in each of the multiple detection elements PAA. The multiple detection elements PAA, including the photodiode PD, are arranged on the substrate 21. The photodiode PD is an OPD (Organic Photodiode) using organic semiconductors.

[0047] Gate lines GCL extend along the first direction Dx and are connected to multiple detection elements PAA arranged along the first direction Dx. Additionally, multiple gate lines GCL(1), GCL(2), ..., GCL(8) are arranged along the second direction Dy and are respectively connected to the gate line drive circuit 15. It should be noted that in the following description, unless it is necessary to distinguish between multiple gate lines GCL(1), GCL(2), ..., GCL(8), they will be simply referred to as gate lines GCL. Furthermore, in Figure 3 For ease of understanding, eight gate lines GCL are shown in the diagram, but this is just an example. M gate lines GCL can also be arranged (M is 8 or more, for example, M = 256).

[0048] Signal line SGL extends along the second direction Dy and is connected to the photodiodes PD of the multiple detection elements PAA arranged along the second direction Dy. Additionally, multiple signal lines SGL(1), SGL(2), ..., SGL(12) are arranged along the first direction Dx and are connected to the signal line selection circuit 16 and the reset circuit 17, respectively. It should be noted that in the following description, unless it is necessary to distinguish between the multiple signal lines SGL(1), SGL(2), ..., SGL(12), they will be simply referred to as signal line SGL.

[0049] Additionally, for ease of explanation, 12 signal lines SGL are shown, but this is merely an example; the signal lines SGL can also be arranged with N lines (N is 12 or more, for example, N = 252). Furthermore, the sensor resolution is set to, for example, 508 dpi (dotper inch), and the number of elements is set to 252 × 256. Furthermore, in... Figure 3In this circuit, a sensor unit 10 is provided between the signal line selection circuit 16 and the reset circuit 17. However, this is not a limitation; the signal line selection circuit 16 and the reset circuit 17 may also be connected to the ends of the signal line SGL in the same direction.

[0050] Gate line drive circuit 15 is controlled by control circuit 122 (see reference). Figure 1 The gate line drive circuit 15 receives various control signals such as the start signal STV, clock signal CK, and reset signal RST1. Based on these control signals, the gate line drive circuit 15 sequentially selects multiple gate lines GCL(1), GCL(2), ..., GCL(8) in a time-division multiplexing manner. The gate line drive circuit 15 supplies a gate drive signal Vgcl to the selected gate line GCL. As a result, multiple first switching elements Tr connected to the gate line GCL are supplied with the gate drive signal Vgcl, and multiple detection elements PAA arranged in the first direction Dx are selected as detection objects.

[0051] The signal line selection circuit 16 has multiple selection signal lines Lsel, multiple output signal lines Lout, and third switching elements TrS. The multiple third switching elements TrS are respectively configured corresponding to the multiple signal lines SGL. Six signal lines SGL(1), SGL(2), ..., SGL(6) are connected to a common output signal line Lout1. Six signal lines SGL(7), SGL(8), ..., SGL(12) are connected to a common output signal line Lout2. Output signal lines Lout1 and Lout2 are respectively connected to the detection circuit 48.

[0052] Here, signal lines SGL(1), SGL(2), ..., SGL(6) are designated as the first signal line block, and signal lines SGL(7), SGL(8), ..., SGL(12) are designated as the second signal line block. Multiple select signal lines Lsel are each connected to the gate of the third switching element TrS included in one signal line block. Additionally, one select signal line Lsel is connected to the gate of the third switching element TrS of multiple signal line blocks.

[0053] Control circuit 122 (reference) Figure 1 The selection signal ASW is sequentially supplied to the selection signal line Lsel. Thus, the signal line selection circuit 16 selects the signal lines SGL sequentially within a signal line block in a time-division multiplexing manner through the operation of the third switching element TRS. Furthermore, the signal line selection circuit 16 selects one signal line SGL from each of the multiple signal line blocks. With this configuration, the detection device 1 can reduce the number of ICs (Integrated Circuits) or the number of IC terminals, including the detection circuit 48. It should be noted that the signal line selection circuit 16 can also bundle multiple signal lines SGL to the detection circuit 48.

[0054] like Figure 3 As shown, the reset circuit 17 has a reference signal line Lvr, a reset signal line Lrst, and a fourth switching element TrR. The fourth switching element TrR is configured corresponding to multiple signal lines SGL. The reference signal line Lvr is connected to one of the source and drain terminals of the multiple fourth switching elements TrR. The reset signal line Lrst is connected to the gate of the multiple fourth switching elements TrR.

[0055] Control circuit 122 supplies reset signal RST2 to reset signal line Lrst. This turns on multiple fourth switching elements TrR, and electrically connects multiple signal lines SGL to reference signal line Lvr. Power supply circuit 123 supplies reference signal COM to reference signal line Lvr. This, in turn, supplies power to the capacitor elements Ca (refer to) included in multiple detection elements PAA. Figure 4 ) Supply reference signal COM.

[0056] Figure 4 It is a circuit diagram representing multiple detection elements. Figure 5 This is a magnified representation of a circuit diagram showing a detection element. It should be noted that... Figure 4 The circuit configuration of the detection circuit 48 is also shown in the diagram. Additionally, in Figure 4 In the middle, with omission Figure 5 The auxiliary capacitor Cs is shown in the diagram. Figure 4 as well as Figure 5 As shown, the detection element PAA includes a photodiode PD, a capacitor element Ca, an auxiliary capacitor Cs, and a first switching element Tr. The capacitor element Ca is a capacitor (sensor capacitor) formed on the photodiode PD, and is equivalently connected in parallel with the photodiode PD. More specifically, the capacitor element Ca is formed on the lower electrode 23 of the photodiode PD (see reference). Figure 8 The capacitance between the upper electrode 24 and the upper electrode 24.

[0057] Figure 5 The auxiliary capacitor Cs shown is attached to the photodiode PD. One end of the auxiliary capacitor Cs is connected to one end of the capacitor element Ca and the cathode (lower electrode 23) of the photodiode PD. The other end of the auxiliary capacitor Cs is supplied with a reference potential VR1. The reference potential VR1 is a voltage signal with a fixed potential, such as ground potential or reset potential (reference signal COM). It should be noted that in Figure 7 The following diagrams illustrate specific examples of the configuration of the auxiliary capacitor Cs.

[0058] Figure 4The diagram shows two gate lines GCL(m) and GCL(m+1) arranged side-by-side in the second direction Dy among multiple gate lines GCL. Additionally, it shows two signal lines SGL(n) and SGL(n+1) arranged side-by-side in the first direction Dx among multiple signal lines SGL. The detection element PAA is the region surrounded by the gate lines GCL and the signal lines SGL.

[0059] The first switching element Tr is disposed correspondingly to the photodiode PD. The first switching element Tr is composed of a thin film transistor, and in this example, it is composed of an n-channel MOS (Metal Oxide Semiconductor) type TFT (Thin Film Transistor).

[0060] The gate of the first switching element Tr, belonging to the plurality of detection elements PAA arranged side-by-side in the first direction Dx, is connected to the gate line GCL. The source of the first switching element Tr, belonging to the plurality of detection elements PAA arranged side-by-side in the second direction Dy, is connected to the signal line SGL. The drain of the first switching element Tr is connected to the cathode of the photodiode PD and the capacitor element Ca.

[0061] The power supply circuit 123 supplies a sensor power signal VDDSNS to the anode of the photodiode PD. Additionally, the power supply circuit 123 supplies a reference signal COM, which serves as the initial potential of the signal line SGL and the capacitor element Ca, to the signal line SGL and the capacitor element Ca.

[0062] When light is shone onto the detection element PAA, a current corresponding to the amount of light flows in the photodiode PD, thereby inducing a current in the capacitor element Ca and the auxiliary capacitor Cs (refer to...). Figure 5 Charge is stored in the capacitor element Ca and the auxiliary capacitor Cs (refer to...). When the first switching element Tr is turned on, the charge is stored in the capacitor element Ca and the auxiliary capacitor Cs (refer to...). Figure 5 Correspondingly, the charge in the photodiode PD generates a current that flows through the signal line SGL. The signal line SGL is connected to the detection circuit 48 via the third switching element TRS of the signal line selection circuit 16. Thus, the detection device 1 can detect the output signal V corresponding to the amount of light illuminating the photodiode PD, either by each detection element PAA or by each unit PAG. out .

[0063] During readout, switch SSW is turned on, and detection circuit 48 is connected to signal line SGL. The detection signal amplification unit 42 of detection circuit 48 converts the current variation supplied from signal line SGL into a voltage variation and amplifies it. A reference potential (Vref) with a fixed potential is input to the non-inverting input (+) of detection signal amplification unit 42, and signal line SGL is connected to the inverting input terminal (-). In this embodiment, a signal identical to the reference signal COM is input as the reference potential (Vref) voltage. Signal processing unit 44 (see reference...) Figure 3 The difference between the detection signal Vdet under illumination and the detection signal Vdet without illumination is used as the sensor output voltage Vo for calculation. Furthermore, the detection signal amplification unit 42 includes a capacitor element Cb and a reset switch RSW. During reset, the reset switch RSW is turned on, and the charge on the capacitor element Cb is reset.

[0064] Figure 6 It is a graph that schematically shows the relationship between the amount of charge on a pixel capacitor and time. Figure 6 The vertical axis of the graph shows the total charge Qp of the capacitive element Ca and the auxiliary capacitor Cs. (The vertical axis represents the pixel capacitance of a single detection element PAA.) Figure 6 The horizontal axis of the graph shows the time from the moment t1 when the fourth switching element TrR is turned off to the moment t2 when the first switching element Tr is turned on. That is, Figure 6 This is a graph that schematically shows the change in charge Qp from the end of the reset period of the detection element PAA to the start of the readout period.

[0065] like Figure 6 As shown, ideally, during the readout period, the charge Qp (=Qa+Qs) accumulated in the capacitor element Ca and the auxiliary capacitor Cs at time t1 flows through the signal line SGL. The solid line represents the current Ip1 when the capacitor element Ca and the auxiliary capacitor Cs are provided. Furthermore, in Figure 6 In the example shown, the current Ip2 without the auxiliary capacitor Cs is represented by a dashed line. In this embodiment, due to the presence of the auxiliary capacitor Cs, a current Ip1, which is larger than the current Ip2, flows.

[0066] In fact, during the period from the end of the reset period at time t1 to the start of the readout period at time t2, the dark current Id1 (also known as leakage current) flows from the capacitor element Ca and the auxiliary capacitor Cs to the photodiode PD. As a result, the charge Qp (=Qa+Qs) at time t1 decreases by the charge ΔQp1 corresponding to the dark current Id1. At time t2, the sensor current Iout1 corresponding to the charge (Qa+Qs-ΔQp1) is output to the detection circuit 48 (see reference) via the signal line SGL. Figure 4 ).

[0067] In the comparative example without the auxiliary capacitor Cs, the dark current Id2 also flows from the capacitor element Ca to the photodiode PD. As a result, the charge Qa at time t1 decreases by the charge ΔQp2 corresponding to the dark current Id2. At time t2, the sensor current Iout2 corresponding to the charge (Qa - ΔQp2) is output to the detection circuit 48 (see reference) via the signal line SGL. Figure 4 ).

[0068] In this embodiment, because an auxiliary capacitor Cs is provided, the maximum value of the charge Qp (=Qa+Qs) accumulated in the capacitor element Ca and the auxiliary capacitor Cs is larger than that in the comparative example. As a result, even when the dark current Id1 flows in the same manner as in the comparative example, the charge Qp of the capacitor element Ca and the auxiliary capacitor Cs after a predetermined period is larger than that in the comparative example. That is, the sensor current Iout1 output from the detection element PAA during the readout period can be increased, thus increasing the output signal V. out (Refer to Figure 4 The maximum value of ) increases. Therefore, detection device 1 can improve detection sensitivity.

[0069] Next, the structure of the photodiode (PD) will be explained. Figure 7 This is a schematic top view illustrating the detection device involved in the embodiment. It should be noted that... Figure 7 In the accompanying drawings, the first auxiliary capacitor electrode 25 and the second auxiliary capacitor electrode 61t are indicated by shading lines. Additionally, the lower electrode 23 and the upper electrode 24 are indicated by double-dotted lines.

[0070] like Figure 7 As shown, the photodiode PD, the lower electrode 23, and the first switching element Tr are disposed in the region surrounded by the gate line GCL and the signal line SGL. The detection device 1 also includes a first auxiliary capacitor electrode 25, a second auxiliary capacitor electrode 61t, and a third auxiliary capacitor electrode 62t. The first auxiliary capacitor electrode 25, the second auxiliary capacitor electrode 61t, and the third auxiliary capacitor electrode 62t are disposed overlapping with the lower electrode 23 in the region surrounded by the gate line GCL and the signal line SGL. An auxiliary capacitor Cs is formed between the first auxiliary capacitor electrode 25, the second auxiliary capacitor electrode 61t, and the third auxiliary capacitor electrode 62t, which are opposed to each other through an insulating film. It should be noted that the stacked configuration of the first auxiliary capacitor electrode 25, the second auxiliary capacitor electrode 61t, and the third auxiliary capacitor electrode 62t will be described later.

[0071] The lower electrode 23 is the cathode electrode of the photodiode PD, and multiple photodiodes PD and multiple lower electrodes 23 are arranged in a matrix on the substrate 21. Figure 6As shown, the lower electrode 23 is formed with an area smaller than that defined by the gate line GCL and the signal line SGL, and is disposed overlapping at least a portion of the first switching element Tr. Figure 7 The lower electrode 23 shown is merely an example and can be appropriately modified according to the characteristics required by the photodiode PD. For example, the lower electrode 23 may also be disposed overlapping at least one of the gate line GCL and the signal line SGL. Alternatively, the lower electrode 23 may be formed in a manner that is more... Figure 7 The area shown is the smaller area. In this case, although the capacitance of the capacitor element Ca becomes smaller, leakage current can be suppressed.

[0072] like Figure 7 As shown, the first switching element Tr has a semiconductor layer 61, a source electrode 62, a drain electrode 63, and a gate electrode 64. The semiconductor layer 61 extends along the gate line GCL and intersects with the gate electrode 64 when viewed from above. The gate electrode 64 is connected to the gate line GCL and extends in a direction orthogonal to the gate line GCL. The two gate electrodes 64 are arranged side by side in a first direction Dx. The first switching element Tr of this embodiment has a dual-gate structure in which the two gate electrodes 64 overlap with the semiconductor layer 61.

[0073] One end of the semiconductor layer 61 is connected to the source electrode 62 via the second contact hole CH2. The lower electrode 23 is electrically connected to the source electrode 62 of the first switching element Tr via the first contact hole CH1. Thus, the first switching element Tr is electrically connected to the photodiode PD. The other end of the semiconductor layer 61 is connected to the drain electrode 63 via the third contact hole CH3. The drain electrode 63 is connected to the signal line SGL.

[0074] It should be pointed out that, Figure 7 The configuration and arrangement of the first switching element Tr shown are merely an example and can be modified as appropriate.

[0075] The first auxiliary capacitor electrode 25 is disposed on the same layer as the gate line GCL and the gate electrode 64. The first auxiliary capacitor electrode 25 is disposed separately from the gate line GCL and the gate electrode 64. When viewed from above, the first auxiliary capacitor electrode 25 overlaps with the second auxiliary capacitor electrode 61t and the third auxiliary capacitor electrode 62t. More specifically, the first auxiliary capacitor electrode 25 includes a first portion 25a, a second portion 25b, and a connecting portion 25s. The first portion 25a is disposed adjacent to the first switching element Tr in the second direction Dy and is a rectangular portion disposed in the area surrounded by the first switching element Tr, the gate line GCL, and the signal line SGL.

[0076] The second portion 25b is formed to protrude from the first portion 25a in the second direction Dy and is disposed adjacent to the first switching element Tr in the first direction Dx. The distance W1 between the first auxiliary capacitor electrode 25 (second portion 25b) adjacent in the second direction Dy and the gate line GCL is less than or equal to the width W2 of the gate line GCL in the second direction Dy.

[0077] When viewed from above, the connection portion 25s intersects with the signal line SGL and connects to the adjacent first auxiliary capacitor electrode 25 (first portion 25a) in the first direction Dx. The width of the connection portion 25s in the second direction Dy is smaller than the width of the first portion 25a in the second direction Dy. The width of the connection portion 25s in the second direction Dy is, for example, formed to be the same as the width W2 of the gate line GCL in the second direction Dy. The plurality of first auxiliary capacitor electrodes 25 connected by the connection portion 25s are at any point connected to the reference potential VR1 (reference). Figure 5 )connect.

[0078] The second auxiliary capacitor electrode 61t is disposed on the same layer as the semiconductor layer 61 and is connected to the semiconductor layer 61. The second auxiliary capacitor electrode 61t includes a first portion 61ta and a second portion 61tb. The first portion 61ta is disposed adjacent to the first switching element Tr in the second direction Dy and overlaps with the first portion 25a of the first auxiliary capacitor electrode 25.

[0079] The second portion 61tb is formed to protrude from the first portion 61ta in the second direction Dy. The second portion 61tb is disposed adjacent to the first switching element Tr in the first direction Dx and is connected to the semiconductor layer 61. The second auxiliary capacitor electrode 61t is disposed separately from the gate line GCL and the gate electrode 64 when viewed from above. In other words, the second auxiliary capacitor electrode 61t is arranged in an island shape according to each detection element PAA.

[0080] The third auxiliary capacitor electrode 62t is disposed on the same layer as the signal line SGL and the source electrode 62, and is connected to the source electrode 62. The third auxiliary capacitor electrode 62t is disposed in the region overlapping with the first auxiliary capacitor electrode 25 and the second auxiliary capacitor electrode 61t. Furthermore, the source electrode 62 includes an overlap portion 62s that overlaps with the gate electrode 64. The third auxiliary capacitor electrode 62t and the source electrode 62 (overlap portion 62s) are disposed covering a portion of the region defined by the gate line GCL and the signal line SGL, and are configured separately from the gate line GCL and the signal line SGL. Additionally, the first auxiliary capacitor electrode 25 and the second auxiliary capacitor electrode 61t, except for the region where the first switching element Tr is disposed, cover a portion of the region defined by the gate line GCL and the signal line SGL. Therefore, the capacitance value of the auxiliary capacitor Cs is large.

[0081] The area, when viewed from above, is formed in ascending order of the first auxiliary capacitor electrode 25, the second auxiliary capacitor electrode 61t, and the third auxiliary capacitor electrode 62t. However, Figure 7 This is just one example. The shape and area of ​​the first auxiliary capacitor electrode 25, the second auxiliary capacitor electrode 61t, and the third auxiliary capacitor electrode 62t can be appropriately changed according to the characteristics and detection sensitivity required by the detection device 1.

[0082] Figure 8 yes Figure 7 Sectional view VIII-VIII'. (See also...) Figure 8 As shown, the detection device 1 includes a substrate 21, a first switching element Tr, an organic insulating film 94, a lower electrode 23, a photodiode PD, and an upper electrode 24. A first auxiliary capacitor electrode 25, a second auxiliary capacitor electrode 61t, and a third auxiliary capacitor electrode 62t are disposed between the substrate 21 and the photodiode PD in a direction perpendicular to the substrate 21. It should be noted that although in Figure 8 The illustration is omitted, but a sealing film covering the photodiode PD and the upper electrode 24 is provided as needed.

[0083] The substrate 21 is an insulating material, such as glass or resin. The substrate 21 is not limited to a flat surface and may also have a curved surface. In this case, the substrate 21 may also be a film-like resin.

[0084] It should be noted that in this specification, the direction perpendicular to the surface of the substrate 21, from the substrate 21 toward the photodiode PD, is designated as "upper side" or simply "up". Furthermore, the direction from the photodiode PD toward the substrate 21 is designated as "lower side" or simply "lower".

[0085] The base coating films 91a and 91b are disposed on the substrate 21. The base coating films 91a and 91b are formed of inorganic insulating films such as silicon nitride films and silicon oxide films. It should be noted that the composition of the base coating films 91a and 91b is not limited to a stacked film of two inorganic insulating films, but can also be three or more layers, or can be a single layer film. In addition, a light-shielding film may be disposed between the substrate 21 and the semiconductor layer 61.

[0086] Multiple first switching elements Tr (transistors) are disposed on substrate 21. A semiconductor layer 61, a gate electrode 64, a source electrode 62, and a drain electrode 63 are sequentially stacked on substrate 21 for each of the multiple first switching elements Tr. More specifically, the semiconductor layer 61 is disposed on the undercoat film 91b. The semiconductor layer 61 is, for example, made of polycrystalline silicon. However, the semiconductor layer 61 is not limited to this; it can also be microcrystalline oxide semiconductor, amorphous oxide semiconductor, low-temperature polycrystalline silicon, etc. Only n-type TFTs are shown as the first switching elements Tr, but p-type TFTs can also be formed simultaneously.

[0087] A gate insulating film 92 covers the semiconductor layer 61 and is disposed on top of the base coating film 91b. The gate insulating film 92 is, for example, an inorganic insulating film such as silicon oxide. A gate electrode 64 is disposed on the gate insulating film 92. Figure 7 In the example shown, the first switching element Tr is a top-gate structure. However, it is not limited to this; the first switching element Tr can be a bottom-gate structure or a dual-gate structure with gate electrodes 64 disposed on both the upper and lower sides of the semiconductor layer 61.

[0088] An interlayer insulating film 93 covers the gate electrode 64 and is disposed on the gate insulating film 92. The interlayer insulating film 93 may have, for example, a stacked structure of silicon nitride and silicon oxide films. The source electrode 62 and the drain electrode 63 are disposed on the interlayer insulating film 93. The source electrode 62 is connected to the source region of the semiconductor layer 61 via a second contact hole CH2 disposed on the gate insulating film 92 and the interlayer insulating film 93. The drain electrode 63 is connected to the drain region of the semiconductor layer 61 via a third contact hole CH3 disposed on the gate insulating film 92 and the interlayer insulating film 93.

[0089] The first auxiliary capacitor electrode 25, the second auxiliary capacitor electrode 61t, and the third auxiliary capacitor electrode 62t forming the auxiliary capacitor Cs are disposed on the same layer as the first switching element Tr (transistor). Specifically, the second auxiliary capacitor electrode 61t is continuously formed on the same layer as the semiconductor layer 61. That is, the second auxiliary capacitor electrode 61t is disposed on the bottom coating film 91b.

[0090] The first auxiliary capacitor electrode 25 is disposed separately from the gate electrode 64 on the same layer as the gate electrode 64. That is, the first auxiliary capacitor electrode 25 is disposed on the gate insulating film 92 and is opposed to the second auxiliary capacitor electrode 61t across the gate insulating film 92 in a direction perpendicular to the substrate 21. Thus, an auxiliary capacitor Cs2 is formed between the first auxiliary capacitor electrode 25 and the second auxiliary capacitor electrode 61t.

[0091] The third auxiliary capacitor electrode 62t is continuously formed on the same layer as the source electrode 62. That is, the third auxiliary capacitor electrode 62t is disposed on the interlayer insulating film 93 and is positioned opposite the first auxiliary capacitor electrode 25 across the interlayer insulating film 93 in a direction perpendicular to the substrate 21. Thus, an auxiliary capacitor Cs1 is formed between the first auxiliary capacitor electrode 25 and the third auxiliary capacitor electrode 62t.

[0092] In this embodiment, a second auxiliary capacitor electrode 61t, a gate insulating film 92, a first auxiliary capacitor electrode 25, an interlayer insulating film 93, and a third auxiliary capacitor electrode 62t are sequentially stacked in a direction perpendicular to the substrate 21. The auxiliary capacitor Cs is the total capacitance of the auxiliary capacitors Cs1 and Cs2 formed between the layers.

[0093] The overlapping portion 62s is continuously formed on the same layer as the source electrode 62 and is disposed in the region overlapping with the gate electrode 64. In other words, the portion of the source electrode 62 that overlaps with the gate electrode 64 can be represented as the overlapping portion 62s. The overlapping portion 62s can suppress light from irradiating the semiconductor layer 61.

[0094] An organic insulating film 94 is disposed on the interlayer insulating film 93, covering the source electrode 62, the third auxiliary capacitor electrode 62t, and the drain electrode 63 of the first switching element Tr. The organic insulating film 94 is an organic planarization film, which has superior coverage of wiring steps and surface flatness compared with inorganic insulating materials formed by CVD or the like.

[0095] Multiple photodiodes (PDs) are disposed on the organic insulating film 94. The lower electrode 23 is disposed between the substrate 21, the organic insulating film 94, and the photodiodes (PDs) in a direction perpendicular to the surface of the substrate 21.

[0096] More specifically, the lower electrode 23 is disposed on the organic insulating film 94 and covers the bottom surface and inner surface of the first contact hole CH1 formed in the organic insulating film 94. The lower electrode 23 is connected to the source electrode 62 of the first switching element Tr on the bottom surface of the first contact hole CH1. The lower electrode 23 is the cathode electrode of the photodiode PD and is formed of a metallic material such as silver (Ag). Thus, the lower electrode 23 functions as a reflective electrode.

[0097] Multiple lower electrodes 23 are arranged separately from each detection element PAA (photodiode PD). The lower electrodes 23 are arranged overlapping with the first auxiliary capacitor electrode 25, the second auxiliary capacitor electrode 61t, and the third auxiliary capacitor electrode 62t. In addition, the photodiode PD has a larger area than the lower electrodes 23 when viewed from above, covering the upper surface and outer edge of the lower electrodes 23.

[0098] The photodiode PD is disposed by covering multiple lower electrodes 23 and an organic insulating film 94. Figure 7 Although the illustration is omitted, the photodiode PD, for example, has a structure in which an electron transport layer (first carrier transport layer), an active layer, and a hole transport layer (second carrier transport layer) are stacked between the lower electrode 23 and the upper electrode 24.

[0099] The electron transport layer is formed by coating with materials such as zinc acetate, polyethoxyethylene imide (PEIE), and polyethyleneimine (PEI).

[0100] The active layer uses a mixture of p-type and n-type organic semiconductors. Examples of p-type organic semiconductors include PMDPP3T(poly((2,5-bis(2-hexyldecyl)-2,3,5,6-tetrahydro-3,6-dioxopyrrolo(3,4-c)pyrrole-1,4-diyl)-alt-(3′,3″-dimethyl-2,2′﹕5′,2″-terthiophene)-5,5″-diyl):poly((2,5-bis(2-hexyldecyl)-2,3,5,6-tetrahydro-3,6-dioxopyrrolo(3,4-c)pyrrole-1,4-diyl)-alt-(3',3”-dimethyl-2,2':5',2”-p-thiophene)-5,5”-diyl)). In addition, examples of n-type organic semiconductors include PC61BM ([6,6]-phenyl C61-butyric acid methyl ester). Alternatively, the active layer can also be formed using materials such as P3HT:PC61BM and PTB7:PC71BM.

[0101] Hole transport layers can be, for example, tungsten oxide (WO3) or molybdenum oxide (MoOx) metal oxide layers. The hole transport layer is formed by vapor deposition or sputtering. Alternatively, the hole transport layer can also be formed by coating with materials such as PEDOT:PSS.

[0102] The electron transport layer, active layer, and hole transport layer forming the photodiode PD are continuously disposed over multiple lower electrodes 23. In other words, the photodiode PD includes a portion disposed overlapping the lower electrodes 23 and a portion disposed on the organic insulating film 94 in a region not overlapping the lower electrodes 23.

[0103] The upper electrode 24 is disposed across multiple photodiodes PD. The upper electrode 24 is the anode electrode of the photodiode PD and is continuously formed across multiple detection elements PAA (photodiode PD). The upper electrode 24 is formed, for example, from a light-transmitting conductive material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide).

[0104] As described above, the detection device 1 of this embodiment includes: a substrate 21; a plurality of photodiodes PD disposed on the substrate 21 and having organic semiconductors; a plurality of first switching elements Tr (transistors) disposed corresponding to each of the plurality of photodiodes PD, the first switching element Tr including a semiconductor layer 61, a gate electrode 64 and a source electrode 62; a plurality of lower electrodes 23 disposed in a direction perpendicular to the substrate 21 between the transistors and the photodiodes PD, and disposed corresponding to each of the plurality of photodiodes PD; an upper electrode 24 disposed across the plurality of photodiodes PD; a first auxiliary capacitor electrode 25 disposed in a direction perpendicular to the substrate 21 between the substrate 21 and the photodiodes PD; and a second auxiliary capacitor electrode (e.g., a second auxiliary capacitor electrode 61t on the same layer as the semiconductor layer 61), disposed on the same layer as the semiconductor layer 61 or the source electrode 62, and facing the first auxiliary capacitor electrode 25 across an insulating film.

[0105] In addition, the detection device 1 of this embodiment also has a third auxiliary capacitor electrode 62t, a second auxiliary capacitor electrode 61t and a semiconductor layer 61 are continuously disposed on the same layer as the semiconductor layer 61, a third auxiliary capacitor electrode 62t and a source electrode 62 are continuously disposed on the same layer as the source electrode 62, and a first auxiliary capacitor electrode 25 is disposed overlapping the second auxiliary capacitor electrode 61t and the third auxiliary capacitor electrode 62t when viewed from above.

[0106] Accordingly, in the detection device 1, an auxiliary capacitor Cs is added between the first auxiliary capacitor electrode 25, the second auxiliary capacitor electrode 61t, and the third auxiliary capacitor electrode 62t, which are opposed to each other and separated by an insulating film, to the capacitor element Ca formed between the lower electrode 23 and the upper electrode 24 of the photodiode PD. As a result, when light irradiates the photodiode PD, the maximum amount of charge stored in the capacitor element Ca and the auxiliary capacitor Cs can be increased. Consequently, even when dark current flows in the photodiode PD, compared to a configuration with only the capacitor element Ca, the amount of charge in the capacitor element Ca and the auxiliary capacitor Cs increases after a specified period, and the output signal V from the photodiode PD increases. out The maximum value increases. Therefore, detection device 1 can improve detection sensitivity.

[0107] (First variation)

[0108] Figure 9 This is a schematic top view illustrating the detection device involved in the first modified example. It should be noted that in the following description, the same reference numerals are used for components that are the same as those described in the above embodiments, and repeated descriptions are omitted.

[0109] like Figure 9 As shown, in the detection device 1A involved in the first modified example, the position of the connection portion 25s connecting the plurality of first auxiliary capacitor electrodes 25 is different compared with the above embodiment. For example... Figure 9 As shown, in the detection device 1A according to the first modified example, the connecting portion 25s is connected to the outer edge of the first portion 25a of the first auxiliary capacitor electrode 25 in the second direction Dy. More specifically, the connecting portion 25s is connected to one outer edge of the first portion 25a in the second direction Dy, and the second portion 25b is connected to another outer edge in the second direction Dy.

[0110] It should be noted that the connection part 25s can be changed to any position as long as it does not overlap with the gate line GCL and the gate electrode 64.

[0111] Furthermore, in the first modified example, the area of ​​the lower electrode 23 is larger when viewed from above compared to the embodiment described above. When viewed from above, the lower electrode 23 overlaps with both the gate line GCL and the signal line SGL. It should be noted that the lower electrode 23 may also overlap with at least one of the gate line GCL and the signal line SGL. By increasing the area of ​​the lower electrode 23, the capacitance value of the capacitor element Ca formed between the anode and cathode of the photodiode PD increases. As a result, the maximum amount of charge stored in the capacitor element Ca and the auxiliary capacitor Cs can be increased.

[0112] (Second variation)

[0113] Figure 10 This is a schematic top view illustrating the detection device involved in the second variation. For example... Figure 10 As shown, in the detection device 1B of the second modification, the area of ​​the first auxiliary capacitor electrode 25 is larger when viewed from above compared to the above-described embodiment and modifications. That is, the first auxiliary capacitor electrode 25, which is on the same layer as the gate line GCL, is disposed overlapping with the signal line SGL, but is disposed separately from the gate line GCL. More specifically, the first portion 25a of the first auxiliary capacitor electrode 25 extends along the first direction Dx throughout a plurality of detection elements PAA and is disposed overlapping with the signal line SGL. In other words, the connection portion 25s (refer to...) Figure 7 The auxiliary capacitor Cs is formed to have the same width as the first portion 25a. Therefore, in the second variation, the auxiliary capacitor Cs can be increased.

[0114] (Third variation)

[0115] Figure 11 This is a schematic top view illustrating the detection device involved in the third variation. For example... Figure 11 As shown, in the detection device 1C according to the third modification, compared with the above-described embodiment, the first modification, and the second modification, the areas of the first auxiliary capacitor electrode 25 and the second auxiliary capacitor electrode 61t are smaller when viewed from above. More specifically, the first auxiliary capacitor electrode 25 and the second auxiliary capacitor electrode 61t are disposed in approximately half of the region on the side of the first switching element Tr in the area divided by the gate line GCL and the signal line SGL. The first portion 25a of the first auxiliary capacitor electrode 25 and the first portion 61ta of the second auxiliary capacitor electrode 61t are similar to those in the above-described embodiment ( Figure 7 Compared to the first direction, the width in the second direction Dy is less than 1 / 2.

[0116] (Fourth variation)

[0117] Figure 12 This is a schematic top view illustrating the detection device involved in the fourth variation. For example... Figure 12 As shown, in the detection device 1D according to the fourth modification, compared with the above-described embodiment, the first modification, and the second modification, the areas of the first auxiliary capacitor electrode 25 and the second auxiliary capacitor electrode 61t are smaller when viewed from above. Specifically, the areas of the first auxiliary capacitor electrode 25 and the second auxiliary capacitor electrode 61t are smaller than those of the above-described embodiment (…). Figure 7 Compared to the previous method, the width in the first direction Dx is smaller. That is, the spacing between the first auxiliary capacitor electrode 25 and the second auxiliary capacitor electrode 61t and the signal line SGL in the first direction Dx is larger.

[0118] As shown in the detection device 1C of the third modification and the detection device 1D of the fourth modification, the shape, area, size, etc. of each auxiliary capacitor electrode can be changed according to the required characteristics (capacitance value, time constant).

[0119] It should be noted that in the above embodiments and various modifications, the example described is that the lower electrode 23 of the photodiode PD is the cathode electrode of the photodiode PD and the upper electrode 24 is the anode electrode of the photodiode PD. However, it is not limited to this, and it is also possible that the lower electrode 23 is the anode electrode of the photodiode PD and the upper electrode 24 is the cathode electrode of the photodiode PD.

[0120] Furthermore, while the above embodiments and variations have described a configuration with three layers of auxiliary capacitor electrodes, the implementation is not limited to this; any configuration with at least two layers of auxiliary capacitor electrodes is acceptable. For example, it could also be a configuration that includes a first auxiliary capacitor electrode 25 and any one of a second auxiliary capacitor electrode 61t and a third auxiliary capacitor electrode 62t.

[0121] Furthermore, in the above embodiments and various modifications, the first portion 25a and the second portion 25b of the first auxiliary capacitor electrode 25 are quadrilateral in shape when viewed from above, but this is not a limitation. The shapes of the first portion 25a and the second portion 25b can be appropriately changed depending on the configuration of the first switching element Tr and various wirings. The first portion 25a and the second portion 25b can be polygonal, or a portion of them can be curved. Similarly, the shapes of the second auxiliary capacitor electrode 61t and the third auxiliary capacitor electrode 62t when viewed from above can also be appropriately changed.

[0122] The preferred embodiments of the present invention have been described above, but the present invention is not limited to such embodiments. The content disclosed in the embodiments is merely an example, and various modifications can be made without departing from the spirit of the present invention. Appropriate modifications made without departing from the spirit of the present invention are of course also within the technical scope of the present invention. At least one of various omissions, substitutions, and modifications of the constituent elements can be made without departing from the spirit of the above embodiments and variations.

Claims

1. A detection device, comprising: substrate; Multiple photodiodes are disposed on the substrate and have organic semiconductors; Multiple transistors are disposed corresponding to multiple photodiodes, each transistor including a semiconductor layer, a gate electrode, and a source electrode; Multiple lower electrodes are disposed corresponding to multiple photodiodes, and the lower electrodes are disposed between the transistor and the photodiode in a direction perpendicular to the substrate; The upper electrode is disposed across the plurality of said photodiodes; A first auxiliary capacitor electrode is disposed between the substrate and the photodiode in a direction perpendicular to the substrate; The second auxiliary capacitor electrode is disposed on the same layer as the semiconductor layer and is opposite to the first auxiliary capacitor electrode through an insulating film; Multiple gate lines extend along a first direction; as well as Multiple signal lines extend along a second direction that intersects the first direction. In the region surrounded by two adjacent signal lines in the first direction and two adjacent gate lines in the second direction, a photodiode, a transistor, a first auxiliary capacitor electrode, and a second auxiliary capacitor electrode are respectively disposed. The second auxiliary capacitor electrode has: The first part is disposed between one of the two adjacent gate lines in the second direction and the transistor; as well as The second portion is disposed between one of the two adjacent signal lines in the first direction and the transistor, and is formed to protrude from the first portion in the second direction and be connected to the semiconductor layer. The width of the first portion in the first direction is greater than the width of the second portion in the first direction. The distance between one of the two gate lines and the first auxiliary capacitor electrode in the second direction is less than the width of the second portion in the second direction. The spacing between the other side of the two gate lines and the first auxiliary capacitor electrode in the second direction is less than the width of the other side of the two gate lines in the second direction.

2. The detection device according to claim 1, wherein, The detection device also has a third auxiliary capacitor electrode. The second auxiliary capacitor electrode is continuously disposed on the same layer as the semiconductor layer. The third auxiliary capacitor electrode is continuously disposed on the same layer as the source electrode. When viewed from above, the first auxiliary capacitor electrode is arranged to overlap with the second and third auxiliary capacitor electrodes.

3. The detection device according to claim 1 or 2, wherein, The first auxiliary capacitor electrode is disposed separately from the gate line on the same layer as the gate line.

4. The detection device according to claim 3, wherein, The first auxiliary capacitor electrode, which is on the same layer as the gate line, is disposed overlapping with the signal line, but is disposed separately from the gate line.

5. The detection device according to claim 4, wherein, The distance between the first auxiliary capacitor electrode, which is on the same layer as the gate line, and the gate line is less than or equal to the width of the gate line.

6. The detection device according to claim 1, wherein, The lower electrode is disposed overlapping at least one of the gate line and the signal line.

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