Detecting sensitivity faults in capacitive sensors by using a sucking functionality

Abstract

Embodiments of the invention relate to detecting sensitivity faults in a capacitive sensor by using a suck-in functionality. A capacitive sensor, comprising: a first electrode structure; a second electrode structure opposite the first electrode structure, wherein the second electrode structure is movable relative to the first electrode structure and is capacitively coupled with the first electrode structure to form a capacitor having a capacitance that varies with a change in a distance between the first electrode structure and the second electrode structure; a signal generator configured to apply an electrical signal at an input or an output of the capacitor to induce a voltage transient response at the output of the capacitor; and a diagnostic circuit configured to detect a fault in the capacitive sensor by measuring a time constant of the first voltage transient response and detecting the fault based on the time constant and based on whether the first electrical signal is a suck-in signal or a non-suck-in signal.

Description

TECHNICAL FIELD

[0001] Embodiments of the present invention relate to the diagnosis of electrical faults in capacitive sensors, and more precisely to the diagnosis of capacitance and sensitivity faults in micro-electro-mechanical system (MEMS) capacitive sensors. BACKGROUND

[0002] Capacitive sensors have many applications and can be used as pressure sensors, acoustic sensors, microphone sensors, etc. In any of the above applications, the capacitive sensor can be a micro-electro-mechanical system (MEMS) capacitive sensor having a flexible membrane. The flexible membrane is typically configured as one of the conductors of a capacitor that moves towards or away from the other conductor based on a sensed physical quantity (e.g. pressure, acoustic waves, vibrations, etc.).

[0003] Sensitivity faults are a known failure mode in capacitive sensors. Sensitivity faults can occur, for example, due to weakening (i.e. softening) of the membrane, hardening (i.e. stiffening) of the membrane, changes in MEMS asymmetry, and / or presence of non-conductive particles between the conductor structures of the capacitor. The above sensitivity faults can cause changes in the capacitance of the capacitive sensor and / or changes in the voltage dependence of the capacitance (i.e. sensor sensitivity). When a sensitivity fault is present, the sensor functionality can be impaired due to changes in the expected sensor sensitivity and / or an increase in noise level.

[0004] Therefore, there can be a need for an improved device capable of detecting and diagnosing sensitivity faults in capacitive sensors. SUMMARY

[0005] Embodiments provide a capacitive sensor comprising: a first electrode structure; a second electrode structure opposite the first electrode structure, wherein the second electrode structure is movable relative to the first electrode structure in response to an external force acting thereon, wherein the second electrode structure is capacitively coupled with the first electrode structure to form a first capacitor having a first capacitance that varies with a distance between the first electrode structure and the second electrode structure, wherein the first capacitance is indicative of the external force, wherein a snap-in event occurs when the first electrode structure is in direct contact with the second electrode structure resulting in the first capacitance being equal to or greater than a snap-in capacitance, and a non-snap-in event occurs when the first electrode structure is not in direct contact with the second electrode structure resulting in the first capacitance being less than the snap-in capacitance; a signal generator configured to apply a first electrical signal at an input or an output of the first capacitor to induce a first voltage transient response at an output of the first capacitor, wherein the first electrical signal is either a snap-in signal configured to induce the snap-in event without a fault or a non-snap-in signal configured to induce the non-snap-in event without a fault; a diagnostic circuit configured to detect a fault in the capacitive sensor by measuring a first time constant of the first voltage transient response and detecting the fault based on the first time constant and based on whether the first electrical signal is the snap-in signal or the non-snap-in signal.

[0006] Embodiments provide a capacitive sensor comprising: a first electrode structure; a second electrode structure opposite the first electrode structure, wherein the second electrode structure is movable relative to the first electrode structure in response to an external force acting thereon, wherein the second electrode structure is capacitively coupled with the first electrode structure to form a first capacitor having a first capacitance that varies with a distance between the first electrode structure and the second electrode structure, wherein the first capacitance is indicative of the external force, wherein a snap-in event occurs when the first electrode structure is in direct contact with the second electrode structure resulting in the first capacitance being equal to or greater than a snap-in capacitance, and a non-snap-in event occurs when the first electrode structure is not in direct contact with the second electrode structure resulting in the first capacitance being less than the snap-in capacitance; a signal generator configured to apply an alternating current (AC) signal at the first electrode structure or the second electrode structure of the first capacitor to induce an output response at an output of the first capacitor, wherein the AC signal is either a snap-in signal configured to induce the snap-in event without a fault or a non-snap-in signal configured to induce the non-snap-in event without a fault; and a diagnostic circuit configured to detect a fault in the capacitive sensor by evaluating the output response and detecting the fault based on the output response and based on whether the AC signal is the snap-in signal or the non-snap-in signal.

[0007] Embodiments provide a capacitive sensor comprising: a first electrode structure; a second electrode structure opposite the first electrode structure, wherein the second electrode structure is movable relative to the first electrode structure, wherein the second electrode structure is capacitively coupled with the first electrode structure to form a first capacitor having a first capacitance that varies with a distance between the first electrode structure and the second electrode structure; a third electrode structure opposite the first electrode structure, wherein the third electrode structure is movable relative to the first electrode structure, wherein the third electrode structure is capacitively coupled with the first electrode structure to form a second capacitor having a second capacitance that varies with a distance between the first electrode structure and the third electrode structure, wherein a snap event occurs when the first electrode structure is in direct contact with the second electrode structure resulting in the first capacitance being equal to or greater than a snap capacitance or when the third electrode structure is in direct contact with the second electrode structure resulting in the second capacitance being equal to or greater than the snap capacitance, wherein a non-snap event occurs when the first electrode structure is not in direct contact with the second electrode structure resulting in the first capacitance being less than the snap capacitance and when the third electrode structure is not in direct contact with the second electrode structure resulting in the second capacitance being less than the snap capacitance; a differential amplifier configured to receive a first output signal from the first capacitor and a second output signal from the second capacitor and generate a differential signal based on a difference between the first output signal and the second output signal; a signal generator configured to apply an AC signal at an input or an output of the first capacitor and at an input or an output of the second capacitor to induce a first output response at an output of the first capacitor and a second output response at an output of the second capacitor, respectively; a diagnostic circuit configured to detect a fault in the capacitive sensor by evaluating the differential signal and detecting the fault based on the differential signal and based on whether the AC signal is a snap signal or a non-snap signal. BRIEF DESCRIPTION OF DRAWINGS

[0008] Embodiments are described herein with reference to the accompanying drawings.

[0009] Figure 1 shows a cross-sectional view of a MEMS element of a capacitive sensor according to one or more embodiments;

[0010] Figure 2 is a block diagram of a capacitive sensor according to one or more embodiments;

[0011] Figure 3A is a schematic block diagram of a capacitive sensor readout circuit according to one or more embodiments;

[0012] Figure 3B and Figure 3C is a signal diagram derived from the capacitive sensor readout circuit of Figure 3A for different positions of the injection node according to one or more embodiments;

[0013] Figure 4A is a schematic block diagram of another capacitive sensor readout circuit according to one or more embodiments; and

[0014] Figures 4B-4M is a signal diagram derived from the capacitive sensor readout circuit of Figure 4A using different positions for the injection nodes according to one or more embodiments. DETAILED DESCRIPTION

[0015] In the following, details are set forth to provide a thorough explanation of the exemplary embodiments. It will be apparent, however, that the embodiments can be practiced without these specific details. In other instances, well-known structures and devices are not described in detail in order to avoid obscuring the embodiments. In addition, features of the different embodiments described hereinafter can be combined with each other, unless specifically noted otherwise.

[0016] Furthermore, in the following description, equivalent or similar elements or elements having equivalent or similar functionality are denoted by equivalent or similar reference signs. Since the same or functionally equivalent elements are given the same reference signs in the drawings, repeated description of the elements provided with the same reference signs can be omitted. Thus, the description provided for elements having the same or similar reference signs is exchangeable.

[0017] It is to be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements can be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present. Other words used to describe the relationship between elements should be interpreted in the same way (e.g., “between” versus “directly between,” “adjacent” versus “directly adjacent,” etc.).

[0018] In the embodiments described herein or shown in the drawings, any direct electrical connection or coupling, i.e., any connection or coupling without additional intervening elements, can also be realized by an indirect connection or coupling, i.e., a connection or coupling with one or more additional intervening elements, or vice versa, as long as the general purpose of the connection or coupling is substantially maintained, e.g., to transmit a certain signal or to transmit a certain information. Features from different embodiments can be combined to form additional embodiments. For example, unless otherwise stated, variants or modifications described with respect to one of the embodiments can also be applicable to other embodiments.

[0019] The term “substantially” can be used herein to account for small manufacturing tolerances that are considered acceptable in the industry, e.g., within 5%, without departing from aspects of the embodiments described herein.

[0020] In the disclosure, expressions including ordinal numbers such as "first," "second," etc. can modify various elements. However, such elements are not limited to the above expressions. For example, the above expressions do not limit the order and / or importance of the elements. The above expressions are merely used to distinguish one element from other elements. For example, a first block and a second block indicate different blocks, but they are both blocks. For another example, a first element can be referred to as a second element, and similarly, a second element can also be referred to as a first element without departing from the scope of the disclosure.

[0021] One or more aspects of the disclosure can be implemented as a non-transitory computer-readable recording medium having a program embodied thereon to instruct a processor to execute a method / algorithm. Accordingly, the non-transitory computer-readable recording medium can have an electronically readable control signal stored thereon, which cooperates with (or is capable of cooperating with) a programmable computer system to execute a corresponding method / algorithm. The non-transitory computer-readable recording medium can be, for example, a CD-ROM, a DVD, a Blu-ray disc, a RAM, a ROM, a PROM, an EPROM, an EEPROM, a flash memory, or an electronic memory device.

[0022] Each element of the disclosure can be configured by implementing a dedicated hardware or a software program on a memory that controls a processor to perform the function of any component or combination of components. Any component can be implemented as a central processing unit (CPU) or other processor that reads and executes software programs read from a recording medium such as a hard disk or a semiconductor memory device. For example, instructions can be executed by one or more processors such as one or more CPUs, digital signal processors (DSPs), general purpose microprocessors, application specific integrated circuits (ASICs), field programmable logic arrays (FPGAs), programmable logic controllers (PLCs), or other equivalent integrated or discrete logic circuitry.

[0023] Accordingly, the term "processor" as used herein refers to any of the foregoing structures or any other structure suitable for implementing the techniques described herein. Thus, the techniques described in this disclosure can be implemented, at least in part, in hardware, software, firmware, or any combination thereof. For example, various aspects of the described techniques can be implemented within one or more processors, including one or more microprocessors, DSPs, ASICs, or any other equivalent integrated or discrete logic circuitry, as well as any combinations of such components.

[0024] A controller, including hardware, can also perform one or more of the techniques of the present disclosure. A controller, including one or more processors, can use electrical signals and digital algorithms to perform its receiving, analyzing, and control functions, which can also include correction functions. Such hardware, software, and firmware can be implemented within the same device or within separate devices to support the various techniques described in the present disclosure. Software can be stored on a non-transitory computer readable medium, such that the non-transitory computer readable medium includes program code or program algorithms stored thereon that, when executed, cause the controller to perform the steps of the method.

[0025] Signal processing circuitry and / or signal conditioning circuitry can receive one or more signals from one or more components and perform signal conditioning or signal processing thereon, which can result in the generation or conditioning of one or more additional signals. As used herein, signal conditioning refers to manipulating a signal in such a way that the signal meets the requirements of the next stage for further processing. Signal conditioning can include analog to digital conversion (e.g., via an analog to digital converter), amplification, filtering, conversion, biasing, range matching, isolation, and any other processes necessary to make the signal suitable for processing after conditioning.

[0026] Accordingly, signal processing circuitry can include an analog to digital converter (ADC) that converts analog signals from one or more sensor elements into digital signals. Signal processing circuitry can also include a DSP that performs some processing on the digital signals.

[0027] Embodiments relate to the diagnosis of electrical faults in capacitive sensors, and more precisely to the diagnosis of capacitance and sensitivity faults in Micro-Electro-Mechanical System (MEMS) capacitive sensors, which are some key failure modes of such devices. The diagnosis can be applied to any capacitive sensor, including single capacitive sensors or those using two capacitors (e.g., a top capacitor C Top and a bottom capacitor C Bot ) to sense and generate a measurement signal representative of a physical quantity (e.g., pressure, acoustic waves, vibrations, or any other alternating current (AC) external force) measured by the capacitive sensor.

[0028] The diagnostic circuit performs its diagnosis by measuring some selected electrical parameters of the MEMS capacitive sensor, such as one or more time constants of the MEMS capacitive sensor, and then supplies this information as an output diagnosis. If there is a capacitance or sensitivity fault, it will cause a shift in one or more time constants beyond a tolerance range or threshold. The diagnostic circuit is configured to measure the time constants, and once they exceed the tolerance range, it supplies this information as an output diagnosis (e.g., as a fault indicator).

[0029] Figure 1A cross-sectional view of a MEMS element of a capacitive sensor is shown in accordance with one or more embodiments. Specifically, Figure 1 A MEMS element 11 of a double-plate capacitive sensor, which can be implemented as a MEMS microphone, is shown, although embodiments are not limited thereto. For example, the MEMS capacitive sensor can also be used as a pressure sensor.

[0030] The MEMS element 11 of the double-plate capacitive sensor includes three electrodes, including one conductive membrane 12 and two conductive plates 13 and 14. The membrane 12 is movable, and the two conductive plates 13 and 14 can be movably fixed in a stationary position. In other embodiments, one or more of the plates 13 and 14 can also be movable.

[0031] A top capacitor CTop is formed between the top plate 13 and the membrane 12, and a bottom capacitor CBot is formed between the bottom plate 14 and the membrane 12. As the distance between the respective electrodes, i.e., the thickness of the gap gl or g2, changes in response to an external force (e.g., pressure or acoustic waves (sound)) applied to the movable conductive structure (e.g., the membrane 12), the capacitance of each capacitor CTop and CBot changes. For example, the capacitance is calculated according to the formula Q = CV, where Q is the charge in coulombs, C is the capacitance in farads, and V is the potential difference between the electrodes of the capacitor in volts.

[0032] Different types of readout circuits can be used to measure the change in capacitance. For example, the readout circuit can utilize a constant change readout, during which the voltage V is measured while the charge Q remains constant. The change in capacitance resulting from the change in thickness of the gaps gl and g2 causes the voltage Vtop and Vbot stored across the capacitors to change, and the measurement circuit can measure these voltages as the sensor signal. Specifically, the voltage across each capacitor CTop and CBot represents a sensor signal that can be measured by the readout circuit and related to a physical quantity such as pressure or acoustic waves (sound). Thus, the voltage is the variable to be measured. Each capacitor can be read out independently, or the average of the capacitors can be read out using a common mode buffer.

[0033] In the present example, the membrane 12 can move closer to one plate as it moves away from the other plate, thereby changing the capacitance of each capacitor CTop and CBot. The movement of the membrane 12 is caused by an external force (e.g., pressure or acoustic waves (sound) or vibrations) applied to the membrane 12. These external forces are oscillatory or AC external forces that change polarity or direction over time.

[0034] It should also be appreciated that embodiments are not limited to dual-plate capacitive sensors, but can also be applied to single-capacitor sensors consisting of two electrodes or capacitive sensors having two or more capacitors, including dual-capacitive sensors in which two outer electrodes are movable and a middle electrode is fixedly movable. Regardless of the type of capacitive sensor, at least two electrodes are used to form at least one capacitor. Thus each capacitor is formed by two electrodes, at least one of the two electrodes being movable relative to the other in response to an external force applied thereto. One electrode of the capacitor can be referred to as a reference electrode, while the other electrode of the capacitor can be referred to as a counter electrode.

[0035] An insulating material 15 is also provided to provide electrical insulation between the conductive elements 12, 13 and 14. In this example, the insulating material 15 encapsulates the top plate 13 and the bottom plate 14. At least, the insulating material 15 is formed on a surface of the top plate 13 facing the membrane 12, such that the insulating material 15 can provide electrical insulation between the top plate 13 and the membrane 12, especially when a pull-in event occurs for the top capacitor CTop. Likewise, the insulating material 15 is formed on a surface of the bottom plate 14 facing the membrane 12, such that the insulating material 15 can provide electrical insulation between the bottom plate 13 and the membrane 12, especially when a pull-in event occurs for the bottom capacitor CBot. Thus, it can be said that the insulating material 15 and the top plate 13 form a first electrode structure, and the insulating material 15 and the bottom plate 13 form a second electrode structure. The membrane 12 is also a movable electrode structure opposite the other electrode structures.

[0036] A pull-in event is defined as a situation in which a voltage applied to at least one terminal of the capacitor CTop or CBot is at a sufficient level (e.g. high or low depending on the injection location) to cause the membrane 12 to be "pulled in" into contact with one of the electrode structures. In other words, a sufficiently high voltage (e.g. a voltage greater than a predetermined pull-in threshold - if an increasing signal is applied at the Vbias node in Figure 3A or a sufficiently low voltage (e.g. a voltage less than a predetermined pull-in threshold - if a decreasing signal is applied at the Vrefl node in Figure 3A triggers an attractive force that causes the membrane 12 to deflect towards the top plate 13 or towards the bottom plate 14.

[0037] The snap-in event of the first electrode structure occurs when the membrane 12 is snapped into direct contact with the insulating material 15 attached to the top plate 13. This results in the maximum capacitance value of the capacitor CTop, as the distance between the conductive elements 12 and 13 is at the minimum possible distance. Similarly, the snap-in event of the second electrode structure occurs when the membrane 12 is snapped into direct contact with the insulating material 15 attached to the bottom plate 14. This results in the maximum capacitance value of the capacitor CBot, as the distance between the conductive elements 12 and 14 is at the minimum possible distance.

[0038] Generally, a snap-in event occurs when one electrode structure is in direct contact with the other electrode structure resulting in a capacitance of the two electrode structures equal to or greater than the snap-in capacitance, while a non-snap-in event occurs when one electrode structure is not in direct contact with the other second electrode structure resulting in a capacitance of the two electrode structures less than the snap-in capacitance.

[0039] Non-conductive material can infiltrate the MEMS element 11 and interfere with the sensitivity of one or both capacitors. For example, a change in flexibility of the membrane 12 (i.e. softening or hardening) due to aging or damage can also cause a change in sensitivity such that the measurements are no longer in specification and thus unreliable. The above sensitivity faults can also cause a change in snap-in voltage (the snap-in voltage is the voltage at which the MEMS plates crash into each other resulting in a complete loss of sensitivity). The following embodiments provide additional readout circuitry that is used to detect sensitivity faults and can compensate for detected faults to restore or otherwise improve the functionality of the capacitive sensor.

[0040] Figure 2 is a block diagram of a capacitive sensor 200 according to one or more embodiments. The capacitive sensor 200 includes a MEMS element 11 and a signal processing circuit 20 configured to receive a sensor signal Ssense (e.g. voltages Vtop and Vbot) from the MEMS element 11, perform signal processing thereon, and output the processed sensor signal as a measurement signal Smeas at a signal output. A readout circuit is provided between the MEMS element 11 and the signal processing circuit 20. The readout circuit receives signals from the MEMS element 11 and can include a biasing circuit (e.g. a resistive biasing circuit) for providing the signals to the signal processing circuit 20. The readout circuit is shown in Figure 3A 、 Figure 4A and Figure 4B The capacitive sensor 200 also includes a fault diagnosis circuit 30 configured to receive the sensor signal Ssense during a diagnostic operation and detect one or more types of faults based thereon. The faults can include one or more sensitivity faults of the MEMS element 11. In response to detecting a fault, the fault diagnosis circuit 30 is configured to generate an error signal Serr and output the error signal Serr at an error output.

[0041] To detect an electrical fault, the fault diagnostic circuit 30 is configured to measure one of the electrical parameters affected by the sensitivity fault, compare the electrical parameter to a predetermined error threshold or a predetermined tolerance range having a minimum and maximum threshold, and generate an error signal Serr in response to the electrical parameter crossing (e.g., exceeding) the predetermined error threshold or deviating outside the predetermined tolerance range. In response to the capacitance diagnostic injection signal, the electrical parameter affected by the fault can be measured, the RC time constant of the capacitors CTop and CBot (e.g., corresponding to Rbiasl and Rbias2, respectively). The RC time constant is proportional and thus indicative of the capacitance of CTop and CBot. The capacitance diagnostic injection signal is configured to either induce or not induce a snap event, referred to as a snap injection signal and a non-snap injection signal, respectively. The capacitance diagnostic injection signal configured to induce a snap event (i.e., a snap injection signal) can be a signal having a voltage that meets or exceeds a predetermined snap voltage threshold, while the capacitance diagnostic injection signal configured to not induce a snap event (i.e., a non-snap injection signal) can be a signal having a voltage that is less than the predetermined snap voltage threshold.

[0042] The capacitance of CTop and CBot can then be evaluated relative to the snap capacitance threshold and the type of injection signal. For example, if a snap injection signal is applied, it can be expected that the capacitance of one of CTop and CBot will be maximized, thereby meeting or exceeding the snap capacitance threshold. If no snap capacitance is measured in response to the snap injection signal, then an error can be detected. If a non-snap capacitance is detected in this scenario, then the sensitivity is reduced due to, for example, a particle or hardening of the membrane 12.

[0043] Similarly, if a non-snap injection signal is applied, it can be expected that the capacitance at both CTop and CBot will not be maximized, and thus neither capacitance will meet or exceed the snap capacitance threshold. However, if a snap capacitance is measured at CTop or CBot in response to the non-snap injection signal, then an error can be detected. If a snap capacitance is detected in this scenario, then the sensitivity is increased, for example, the membrane 12 has been weakened.

[0044] In essence, if a snap is attempted via a snap injection signal, it should result in a snap event. Conversely, if a non-snap is attempted via a non-snap injection signal, it should not result in a snap event. It should be noted that a non-snap does not mean that the membrane 12 does not deflect towards one of the plates 13 or 14, but rather that it does not snap to the extent that the membrane 12 comes into contact with the insulating material 15 of one of the electrode structures. Thus, a snap means that the membrane 12 is fully snapped into contact with one of the electrode structures, while a non-snap means that the membrane 12 is not fully snapped into contact with either electrode structure.

[0045] In an alternative embodiment of the capacitive sensor, elements 13 and 14 can be flexible conductive films and element 12 can be a fixed conductive plate with an insulating material 15 encapsulating the conductive plate. In this embodiment, both films can experience a snap-in event at the same time as they are both pulled into contact with the insulating material 15 attached to element 12.

[0046] A fault will cause a corresponding electrical parameter measured at the output of MEMS element 11 to deviate, to deviate outside a predetermined range or to exceed an expected threshold. Fault diagnosis circuit 30 is configured to monitor and detect these types of faults during a diagnostic operation.

[0047] The error signal Serr can be provided to a further diagnostic circuit (not shown) configured to perform further analysis on capacitive sensor 200 to determine the cause or source of the fault.

[0048] Capacitive sensor 200 further comprises a controller 40 configured to perform a diagnostic operation on MEMS element 11. Controller 40 further comprises a signal generator 50 configured to inject one or more diagnostic signals Sinject into the MEMS circuitry (i.e. at its input or output). The injected signal Sinject elicits a response (e.g. a snap-in event or a non-snap-in event) at the output of capacitors CTop and CBot and fault diagnosis circuit 30 is configured to measure an electrical parameter indicative of a sensitivity fault based on the response to the injected signal Sinject. It will be appreciated that while signal generator 50 is shown as integrated with controller 40, the two can be separate elements.

[0049] The injected signal Sinject comprises at least one electrical signal step (e.g. a voltage step or a current step). Thus, the injected signal Sinject is a step signal, while the electrical signal step is a signal transition from one signal level to a second level, which elicits a response at the output of capacitors CTop and CBot. The signal transition can be a step-up transition (i.e. a rising edge) or a step-down transition (i.e. a falling edge).

[0050] To test for sensitivity faults, controller 40 can transmit to fault diagnosis circuit 30 the injected signal Sinject or timing information indicative of the injection time or the trigger time of the injected signal or components thereof. In particular, fault diagnosis circuit 30 detects the trigger time of the electrical step of the injected signal Sinject (i.e. the rising edge or the falling edge between the two predetermined signal levels) or receives this trigger time directly from controller 40. Alternatively, fault diagnosis circuit 30 can be integrated with controller 50 such that it automatically cognizes the trigger time.

[0051] In either case, the fault diagnostic circuit 30 can use the time of the trigger of the electrical signal step of the injection signal to calculate the relevant RC time constant. For example, the RC time constant can be calculated from the time of the trigger of the corresponding electrical step from the signal generator 50 to the time at which the measured signal reaches a predetermined threshold. Thus, the fault diagnostic circuit 30 receives information indicative of the time of the trigger of the electrical step.

[0052] The controller 40 can also control the predefined threshold used by the comparator circuitry for measuring the RC time constant. The time constant is the amount of time taken for the transient response of the capacitor to change from the first supply value to a particular percentage of the difference between the first supply value and the second supply value (i.e. a particular percentage of the supply change delta). In other words, it is the amount of time taken for the voltage across the capacitor to change from one extreme to a particular percentage of the difference between the first extreme and the second extreme. The predefined threshold is for the latter, and represents a particular percentage of the difference between the first extreme and the second extreme. For example, the predefined threshold can be set to approximately 63% of the supply change delta on the rising transient response of the time constant, and can be set to approximately 37% of the delta supply change on the falling response transient of the time constant. Thus, the controller 40 can control the predefined threshold used by the comparator circuitry for determining when the measured signal reaches a particular level after the time of the trigger for calculating the RC time constant.

[0053] Figure 3A is a schematic block diagram of a capacitance sensor readout circuit 300 according to one or more embodiments. Figure 3B and Figure 3C is a signal derived from the capacitance sensor readout circuit of Figure 3A using different positions for the injection node according to one or more embodiments.

[0054] Different detection techniques can be used by modifying the position of the injection node (injecting an injection signal (i.e. an electrical signal step) that elicits a response at Vtop and Vbot) and / or the type of injection signal (e.g. a voltage signal or a current signal). The readout circuit 300 is a constant charge (CC) readout circuit for reading out signals of a capacitive MEMS element (e.g. the MEMS element 11). Thus, the charge of each capacitor CTop and CBot remains constant, while the voltage across the capacitor varies based on the change in capacitance. As will be explained below, the injection signal Sinject can be applied at the input of the capacitor as a DC bias voltage Vbias, or at the output of the capacitor as a reference voltage Vrefi. From Figure 3B and Figure 3C It will be appreciated that the pattern of the stepped injection signal depends on the position of the injection node. The other voltages (i.e. Vbias or Vrefi) that are not applied the injection signal remain constant.

[0055] The DC bias voltage supply 10 supplies a DC bias voltage Vbias to the conductive structures (i.e., the plate(s) and the membrane(s)) of the MEMS element. The AC external force F AC1 and F AC2 represents an external force (e.g., pressure or acceleration) that is applied and acts on the conductive structures, resulting in a change in capacitance at the capacitors CTop and / or CBot.

[0056] A differential amplifier 21, such as a differential programmable gain amplifier or a differential buffer amplifier, is configured to receive the voltages Vtop and Vbot as sensor signals from the MEMS element and output a differential signal representing the difference between the voltages Vtop and Vbot. The differential amplifier 21 is part of the signal processing circuit 20 and can be the beginning of a signal processing chain of the signal processing circuit 20. For example, the differential amplifier 21 can be configured to receive the sensor signals (i.e., the voltages Vtop and Vbot) and provide an amplified sensor signal to a discrete-time ADC that is arranged downstream along the signal processing chain of the signal processing circuit 20.

[0057] The voltages Vtop and Vbot at the MEMS element output are set via very high ohmic bias resistors Rbiasl and Rbias2 and a reference voltage Vrefl, respectively. During the sensing operation, the bias resistors Rbiasl and Rbias2 are set at very high ohmic values to reduce the noise present at the input of the amplifier 21. For example, the bias resistors Rbiasl and Rbias2 can initially be set anywhere between 1 Gohm and 500 Gohms, depending on the noise rejection and bandwidth requirements of the readout circuit. The higher the resistance, the higher the noise rejection providing a higher SNR. However, it is conceivable that other resistances can be used. In this example, the bias resistors Rbiasl and Rbias2 are held equal or substantially equal and can be adjustable in order to reduce the sensor signal such that a capacitance fault and / or a sensitivity fault can be tested and detected.

[0058] A reference voltage Vrefl is input at a common node between two bias resistors Rbiasl and Rbias2. After a charging time given by the resistance values of Rbiasl and Rbias2 and the time constants of Ctop and Cbot, the Vtop and Vbot DC voltages at the MEMS outputs are set by the reference voltage Vrefl. However, if a sensitivity fault occurs at one of the capacitors Ctop or Cbot, the time constants of Ctop and Cbot can be affected. For example, larger capacitors generally have longer transient responses and thus higher time constants. In contrast, smaller capacitors generally have shorter transient responses and thus lower time constants. Thus, the fault diagnostic circuit 30 can measure and evaluate the time constants of Ctop and Cbot to detect a capacitance fault or a sensitivity fault. Specifically, the time constants of Ctop and Cbot can be evaluated by respectively inducing a signal response at Vtop and Vbot by an electrical signal step and measuring the rise time (i.e. charging time) or fall time (i.e. discharging time) of Vtop and Vbot relative to a corresponding time constant threshold Vref2. The measured capacitance or time constant of Ctop and Cbot can then be evaluated based on an expected value or expected range in view of whether a pull-in voltage is applied at one of the injection nodes.

[0059] The capacitance sensor readout circuit 300 includes a controller 40 and a signal generator 50 that generates various control signals and injection signals used to perform fault diagnostics. The controller 40 generates control signals including a clock signal SCLK, a time constant threshold signal Vref2 that sets the time constant threshold Vref2 used by threshold comparators 31 and 32, an electrical step timing signal Sstep that indicates the time at which an electrical step is triggered, a configuration signal Vbias that controls the supply of the DC bias voltage source 10 to the MEMS element 11, a reference voltage signal Vrefl that controls the voltage level of Vrefl, and configuration signals Rbiasl and Rbias2 that adjust the resistance values of bias resistors Rbiasl and Rbias2.

[0060] The controller 40 can adjust the time constant threshold Vref2 depending on the type of electrical signal step being injected and the injection point within the circuit. For example, Vref2 can be adjusted to Vref2_up for a transition of the injection signal that induces a capacitor charging function, and Vref2 can be adjusted to Vref2_down for a transition of the injection signal that induces a capacitor discharging function. It is also noted that while the controller 40 is shown as supplying the clock signal SCLK, a system clock can also generate and supply the clock signal SCLK.

[0061] The signal generator 50 generates an injection signal Sjnject having an electrical signal step that is either a step up or a step down. The injection signal Sjnject can be applied as a voltage step at the node Vrefi, as a voltage step at Vbias at the DC bias voltage source 10, or as a current step at the nodes Vtop and Vbot. Applying the injection signal Sjnject at the node Vrefi creates a low pass filter time evolution in the transient response of the capacitors Ctop and Cbot. Applying the injection signal Sjnject as Vbias at the DC bias voltage source 10 creates a high pass filter time evolution in the transient response of the capacitors Ctop and Cbot.

[0062] The signal generator 50 generates an injection signal Sjnject having one or more electrical signal steps. In Figure 3B In the example, a double step electrical signal step (i.e., a step up or a step down) is injected at the node of Vrefi. As used herein, a double step electrical signal includes an electrical step up from a first signal level to a second signal level and an electrical step down from the second signal level to the first signal level. The triggering of the two electrical signal steps is separated by a predetermined amount of time controlled by the controller 40.

[0063] In the case where Vrefi is used as the injection signal, the high voltage value corresponds to a non- snap voltage that should not induce a snap event at Ctop, Cbot, or both. In the case where the high voltage value is higher than the snap voltage threshold for Vrefi, the snap is turned off. On the other hand, the low voltage value corresponds to a snap voltage that should induce a snap event at Ctop, Cbot, or both. In the case where the low voltage value is equal to or less than the snap voltage threshold for Vrefi, the snap is turned on. Thus, the signal generator 50 can control Vrefi while keeping Vbias constant to induce a snap event or a non-snap event if the capacitive sensor is operating properly.

[0064] In Figure 3B In the example, a double step electrical signal step (i.e., a step up or a step down) is injected at the node of Vrefi. As used herein, a double step electrical signal includes an electrical step up from a first signal level to a second signal level and an electrical step down from the second signal level to the first signal level. The triggering of the two electrical signal steps is separated by a predetermined amount of time controlled by the controller 40.

[0065] The fault diagnostic circuit 30 includes a threshold comparator 31 that compares the output voltage Vtop to a time constant threshold Vref2_up set by the system controller 40. The time constant threshold Vref2_up can be set to a voltage value corresponding to the time constant of the capacitors Ctop and Cbot, which should be substantially equal in the absence of any fault. The threshold comparator 31 is configured to receive Vtop and Vref2_up and change its output to Vstopl when Vtop is equal to or greater than Vref2. For example, the threshold comparator 31 can change its output from 0 V to 5 V. The change in output indicates that the capacitor Ctop charged to a point in response to the injection signal (Vtop crossing the time constant threshold Vref2_up) that represents the time constant of the capacitor Ctop. The output of Vstopl stops the counter 34a assigned to the capacitor Ctop and used to measure its time constant.

[0066] Similarly, the fault diagnostic circuit 30 includes a threshold comparator 32 that compares the output voltage Vbot to a time constant threshold Vref2_up set by the system controller 40. The threshold comparator 31 is configured to receive Vbot and Vref2_up and change its output when Vbot is equal to or greater than Vref2_up. The threshold comparator 32 is configured to receive Vbot and Vref2_up and change its output to Vstop2 when Vbot is equal to or greater than Vref2. For example, the threshold comparator 32 can change its output from 0 V to 5 V. The change in output indicates that the capacitor Cbot charged to a point in response to the injection signal (Vbot crossing the time constant threshold Vref2_up) that represents the time constant of the capacitor Cbot. The output of Vstop2 stops the counter 34b assigned to the capacitor Cbot and used to measure its time constant.

[0067] The fault diagnostic circuit 30 also includes a processing circuit 33 that includes counters 34a, 34b that operate (i.e., increment count) based on a clock signal SCLK. The counters 34a, 34b start at the time the electrical signal step is triggered. Thus, the electrical step timing signal Sstep is the counter start signal received by the counters 34a, 34b to trigger the counters 34a, 34b to start counting.

[0068] Counter 34a is configured to stop counting when threshold comparator 31 outputs a voltage Vstopl, which indicates that Vtop crossed the time constant threshold Vref2_up. The timing value of counter 34a at the reception of voltage Vstopl represents the time constant TCtopl of capacitor Ctop. Counter 34b is configured to stop counting when threshold comparator 32 outputs a voltage Vstop2, which indicates that Vbot crossed the time constant threshold Vref2_up. The timing value of counter 34b at the reception of voltage Vstop2 represents the time constant TCbotl of capacitor Cbot.

[0069] The processing circuit 33 of fault diagnostic circuit 30 comprises a fault detector 35 configured to compare the measured time constants TCtopl and TCbotl (e.g., the final count value of the counters) with a predetermined threshold. If the time constant TCtopl or TCbotl is equal to or greater than the predetermined pull-in threshold, then a pull-in event is detected at that capacitor (i.e., at least one capacitor is in a fully pulled-in state). If either of the time constants TCtopl and TCbotl is less than the predetermined pull-in threshold, then no pull-in event is detected at that capacitor (i.e., the capacitor is not in a fully pulled-in state). In that case, a non-pull-in event is detected.

[0070] If fault detector 35 determines that either of the time constants TCtopl and TCbotl is equal to or greater than the predetermined pull-in threshold in response to Vrefl being set to the non-pull-in voltage, then fault detector 35 generates an error signal indicating a fault. Otherwise, fault detector 35 determines that there is no fault at capacitor Ctop or Cbot and can output a “no fault” signal.

[0071] In Figure 3B a second electrical step from a high value to a low value can be applied to attempt to induce a pull-in event at one or both of the capacitors Ctop and Cbot. Since the injection signal Sinject is a double-step electrical signal, fault diagnostic circuit 30 is configured to measure the time constants of capacitors Ctop and Cbot for each electrical signal step. As a result, fault diagnostic circuit 30 will determine a first time constant TCtopl for the electrical step up and a second time constant TCtop2 for the electrical step down for capacitor Ctop. Likewise, fault diagnostic circuit 30 will determine a first time constant TCbotl for the electrical step up and a second time constant TCbot2 for the electrical step down for capacitor Cbot.

[0072] Here, Vrefl, which is used as the injection signal, is reduced by the signal generator 50 from the second voltage level to a lower first voltage level and causes the capacitors Ctop and Cbot to start discharging. As a result, an electrical signal step as a transient response will induce an exponential signal drop at both outputs Vtop and Vbot of the capacitors Ctop and Cbot. Again, if the capacitance sensor is operating properly, at least one of the capacitors Ctop and Cbot is expected to be fully sunk, and at least one of the capacitors is in a sunk capacitance.

[0073] When a voltage step is applied on the Ctop or Cbottom structure, the Vref2 voltage threshold is adjusted depending on whether a positive or negative step is applied since two different voltages can be applied on the capacitors. The controller 40 can be configured to adjust the voltage threshold Vref2 depending on the different signal steps. For example, the controller 40 can set the voltage threshold Vref2 to a value Vref2_up for an increasing transient response, and can set the voltage threshold Vref2 to a value Vref2_down for a decreasing transient response. The values Vref2_up and Vref2_down can be set to approximately 63% of the final voltage value of the capacitors during a charging or discharging step. For example, the controller 40 can set the time constant threshold Vref2 to the appropriate value when the corresponding electrical signal step is triggered.

[0074] The threshold comparator 31 generates a counter stop value in response to the electrical step down when Vtop becomes equal to or less than Vref2_down. Likewise, the threshold comparator 32 generates a counter stop value in response to the electrical step down when Vbot becomes equal to or less than Vref2_down. In this scenario, the counter values at the counters 34a and 34b represent the corresponding time constants TCtop2 and TCbot2.

[0075] The fault detector 35 is configured to compare both measured time constants TCtop2 and TCbot2 (e.g., the final count values of the counters) to a predetermined threshold. If the time constant TCtop2 or TCbot2 is equal to or greater than the predetermined sink threshold, then a sink event is detected at that capacitor (i.e., at least one capacitor is in a fully sunk state). If any of the time constants TCtop2 and TCbot2 is less than the predetermined sink threshold, then no sink event is detected at that capacitor (i.e., the capacitor is not in a fully sunk state).

[0076] If fault detector 35 determines that both time constants TCtop2 and TCbot2 are less than the predetermined pull-in threshold in response to setting Vrefl to the pull-in voltage (i.e., indicating that no pull-in event occurred at either capacitor), fault detector 35 generates an error signal indicating a fault. Otherwise, fault detector 35 determines that no fault exists at capacitor Ctop or Cbot, and can output a “no fault” signal.

[0077] Figure 3C The case of using Vbias as the dual-step electrical injection signal is illustrated while Vrefl is held constant. In the case of using Vbias as the injection signal, the high voltage value corresponds to the pull-in voltage that should induce a pull-in event at Ctop, Cbot, or both. In the case that the high voltage value is above the pull-in voltage threshold for Vbias, pull-in is on. On the other hand, the low voltage value corresponds to the non-pull-in voltage that should not induce a pull-in event at Ctop or Cbot. In the case that the low voltage value is at or below the pull-in voltage threshold for Vrefl, pull-in is off. Thus, if the capacitance sensor is operating properly, signal generator 50 can control Vbias while holding Vrefl constant to induce a pull-in event or a non-pull-in event.

[0078] As previously mentioned, fault diagnosis circuit 30 uses threshold comparators 31 and 32 and counters 34a and 34b to measure the time constants of capacitors Ctop and Cbot for each electrical signal step of Vbias. The counter values at counters 34a and 34b represent the corresponding time constants TCtopl, TCtop2, TCbotl, and TCbot2. It is noted that capacitor charging occurs for step-up in Vbias, and capacitor discharging occurs for step-down in Vbias. Thus, reference voltage Vref2_down is used to determine time constants TCtopl and TCbotl, and reference voltage Vref2_up is used to determine time constants TCtop2 and TCbot2. However, the evaluation performed by fault detector 35 is conceptually the same as described above.

[0079] If either time constant is at or above the predetermined pull-in threshold, a pull-in event is detected at that capacitor (i.e., at least one capacitor is in a fully pulled-in state). If either time constant is below the predetermined pull-in threshold, a pull-in event is not detected at that capacitor (i.e., the capacitor is not in a fully pulled-in state).

[0080] If the fault detector 35 determines that either of the time constants TCtopl and TCbotl is equal to or greater than the predetermined pull-in threshold in response to Vbias being set to the pull-in voltage, the fault detector 35 determines that no fault has occurred at either of the capacitors Ctop or Cbot, and can output a "no fault" signal. On the other hand, if the fault detector 35 determines that both of the time constants TCtopl and TCbotl are less than the predetermined pull-in threshold in response to Vbias being set to the pull-in voltage, the fault detector 35 determines that a fault exists, and generates an error signal indicating the fault.

[0081] If the fault detector 35 determines that either of the time constants TCtop2 and TCbot2 is equal to or greater than the predetermined pull-in threshold in response to Vbias being set to the non-pull-in voltage, the fault detector 35 generates an error signal indicating a fault. Otherwise, the fault detector 35 determines that no fault exists at either of the capacitors Ctop or Cbot, and can output a "no fault" signal.

[0082] It should also be noted that TCtopl and TCbotl are expected to be less than Figure 3B TCtop2 and TCbot2 in because at the second signal step, a pull-in (i.e., pull-in is turned on) is expected to cause the capacitance to increase. In contrast, TCtopl and TCbotl are expected to be greater than Figure 3C TCtop2 and TCbot2 in because at the first signal step, a pull-in (i.e., pull-in is turned on) is expected to cause the capacitance to increase.

[0083] Figure 4A is a schematic block diagram of another capacitive sensor readout circuit 400 according to one or more embodiments. Figures 4B-4M is derived from the capacitive sensor readout circuit of Figure 4A according to one or more embodiments. Specifically, Figures 4B-4G involves using Vbias as the injection source (node), and Figures 4H-4M involves using Vrefl as the injection source (node). Figures 4B-4D further involves an alternating current (AC) non-pull-in injection signal, while Figure 4E Fig. -4G further involves an AC pull-in injection signal. Figures 4H-4J further involves an AC non-pull-in injection signal, while Figures 4K-4M further involves an AC pull-in injection signal.

[0084] in Figure 4AIn this context, if an AC injection signal is applied at Vbias, the AC signal at Vtop or Vbottom should typically be filtered—if Rbias1, Rbias2, Ctop, and Cbot are at their typical expected values ​​(Ctop and Rbias1 or Cbottom and Rbias2 form a high-pass filter). However, for large capacitances at Ctop, Cbot, or both, such as when pull-in occurs, the AC signal at Vtop or Vbottom is no longer filtered. Peak-to-peak measurements can be performed in the digital domain. Comparison of peak-to-peak measurements with predetermined maximum and minimum thresholds Vmax and Vmin can be used to detect whether, as expected, a pull-in injection signal leads to a pull-in event, and whether a non-pull-in injection signal leads to a non-pull-in event, or whether a deviation from the expected fault occurs.

[0085] exist Figure 4A In this configuration, if an AC injection signal is applied at Vref1, the AC signal at Vtop or Vbottom should generally not be filtered—if Rbias1, Rbias2, Ctop, and Cbot are at their typical expected values ​​(Ctop and Rbias1 or Cbottom and Rbias2 form a low-pass filter). However, for large capacitances at Ctop, Cbot, or both, such as when pull-in occurs, the AC signal at Vtop or Vbottom will be filtered (due to the increased capacitance). Peak-to-peak measurements can be performed in the digital domain. Comparison of peak-to-peak measurements with predetermined maximum and minimum thresholds Vmax and Vmin can be used to detect whether, as expected, a pull-in injection signal leads to a pull-in event, and whether a non-pull-in injection signal leads to a non-pull-in event, or whether a deviation from the expected fault has occurred.

[0086] When Vbias-Vrefl (i.e., the difference between Vbias and Vrefl) is always greater than the pull-in threshold voltage Vth, the AC injection signal is a pull-in injection signal, while when Vbias-Vrefl is always less than the pull-in threshold voltage Vth, the AC injection signal is a non-pull-in signal.

[0087] In this configuration, the fault diagnosis circuit 30 is integrated into the signal processing circuit 20. The signal processing circuit 20 includes a differential amplifier 20 that receives Vtop and Vbot at two input terminals and generates a differential signal representing the difference between the voltages Vtop and Vbot. This differential signal is provided to a discrete-time N-bit ADC 22, where N is an integer greater than 1. The ADC 22 converts the differential signal into a digital signal proportional to its amplitude (e.g., into a digital value or digital code).

[0088] The fault diagnostic circuit 30 is part of a signal processor of a signal processing chain that receives the digital signal from the ADC 22. The fault diagnostic circuit 30 comprises a fault detector 35 that evaluates the digital signal against predetermined maximum and minimum thresholds Vmax and Vmin provided by a system controller 40 in view of the location of the injection node and the type of generated injection signal (i.e. a pull-up injection signal or a pull-down injection signal at Vbias or at Vrefl).

[0089] If a pull-down injection signal is applied at Vbias or at Vrefl, the maximum peak value Vppmax of the digital signal should be smaller than the predetermined maximum threshold Vmax and the minimum peak value Vppmin of the digital signal should be larger than the predetermined minimum threshold Vmin. Alternatively, the difference between Vppmax and Vppmin should be smaller than a predetermined difference threshold. If any of these conditions is not fulfilled by the pull-down injection signal, the fault detector 35 is configured to detect an unexpected condition and to generate an error signal in response thereto.

[0090] If a pull-up injection signal is applied at Vbias or at Vrefl, the maximum peak value Vppmax of the digital signal should be equal to or larger than the predetermined maximum threshold Vmax and the minimum peak value Vppmin of the digital signal should be equal to or smaller than the predetermined minimum threshold Vmin. Alternatively, the difference between Vppmax and Vppmin should be equal to or larger than a predetermined difference threshold. If any of these conditions is not fulfilled by the pull-up injection signal, the fault detector 35 is configured to detect an unexpected condition and to generate an error signal in response thereto.

[0091] Figure 4B An AC injection signal (Vbias) is applied as a pull-down injection signal while Vrefl is kept at a fixed value, resulting in the output voltages Vtop and Vbot shown in Figure 4C and further resulting in the digital signal generated by the N-bit ADC 22 shown in Figure 4D .

[0092] Figure 4E An AC injection signal (Vbias) is applied as a pull-up injection signal, resulting in the output voltages Vtop and Vbot shown in Figure 4F and further resulting in the digital signal generated by the N-bit ADC 22 shown in Figure 4G . In Figure 4F , Cbot experiences a pull-up resulting in a larger peak-to-peak voltage of the output voltage Vbot.

[0093] Figure 4HThe AC injection signal (Vref1) is shown as a non-suck-in injection signal while Vbias is held at a fixed value, resulting in output voltages Vtop and Vbot shown in Figure 4I and further resulting in digital signals generated by N-bit ADC 22 shown in Figure 4J .

[0094] Figure 4K The AC injection signal (Vref1) is shown as a suck-in injection signal while Vbias is held at a fixed value, resulting in output voltages Vtop and Vbot shown in Figure 4L and further resulting in digital signals generated by N-bit ADC 22 shown in Figure 4M . In Figure 4L , Ctop experiences a suck-in resulting in a large peak-to-peak voltage of output voltage Vbot. In this case, Vtop and Vbot are the outputs of a low pass filter and the output ripple of Vtop will be smaller as the capacitor Ctop gets larger due to the suck-in.

[0095] Figure 4I and Figure 4L It is also shown that in a single capacitor configuration, the extreme values of the output voltage (e.g., Vbot or Vtop) can be compared to maximum and minimum thresholds for detecting a fault. For example, if the AC injection signal is a suck-in signal, the fault detection circuit 35 can detect a fault if the maximum peak voltage of the output voltage is less than the maximum threshold and the minimum peak voltage of the output voltage is greater than the minimum threshold. Further, if the AC signal is a non-suck-in signal, the fault detection circuit 35 can detect a fault if the maximum peak voltage of the output voltage is equal to or greater than the maximum threshold or the minimum peak voltage of the output voltage is equal to or less than the minimum threshold.

[0096] Figure 4D , Figure 4G , Figure 4J and Figure 4M The cases where the peak values Vppmax and Vppmin satisfy the expected conditions on Vmax and Vmin based on their respective AC injection signals are shown. Deviations from any of the expected conditions indicate an error that can be detected by the fault detector 35.

[0097] Figure 4C and Figure 4FIt is also shown that in the single capacitor configuration, the extreme values of the output voltage (e.g., Vbot or Vtop) can be compared to maximum and minimum thresholds for detecting a fault. For example, if the AC injection signal is a pull-in signal, the fault detection circuit 35 can detect a fault on the condition that the maximum peak voltage of the output voltage is less than the maximum threshold, and the minimum peak voltage of the output voltage is greater than the minimum threshold. Further, if the AC signal is a non-pull-in signal, the fault detection circuit 35 can detect a fault on the condition that the maximum peak voltage of the output voltage is equal to or greater than the maximum threshold, or the minimum peak voltage of the output voltage is equal to or less than the minimum threshold.

[0098] Figure 4I and Figure 4L It is also shown that in the single capacitor configuration, the extreme values of the output voltage (e.g., Vbot or Vtop) can be compared to maximum and minimum thresholds for detecting a fault. For example, if the AC injection signal is a pull-in signal, the fault detection circuit 35 can detect a fault on the condition that the maximum peak voltage of the output voltage is less than the maximum threshold, and the minimum peak voltage of the output voltage is greater than the minimum threshold. Further, if the AC signal is a non-pull-in signal, the fault detection circuit 35 can detect a fault on the condition that the maximum peak voltage of the output voltage is equal to or greater than the maximum threshold, or the minimum peak voltage of the output voltage is equal to or less than the minimum threshold.

[0099] Similarly, in the single capacitor configuration, the output voltage (e.g., Vbot or Vtop) in response to the AC injection signal is a periodic signal with a maximum peak and a minimum peak defining a peak-to-peak value (i.e., the difference between the maximum peak and the minimum peak). If the AC injection signal is a pull-in signal applied at Vbias, the fault detection circuit 35 is configured to detect a fault on a first condition that the peak-to-peak value is less than a pull-in threshold corresponding to the pull-in capacitance. If the AC signal is a non-pull-in signal applied at Vbias, the fault detection circuit 35 is configured to detect a fault on a second condition that the peak-to-peak value is equal to or greater than the pull-in threshold.

[0100] Similarly, in the single capacitor configuration, the output voltage (e.g., Vbot or Vtop) in response to the AC injection signal is a periodic signal with a maximum peak and a minimum peak defining a peak-to-peak value (i.e., the difference between the maximum peak and the minimum peak). If the AC injection signal is a pull-in signal applied at Vrefi, the fault detection circuit 35 is configured to detect a fault on a first condition that the peak-to-peak value is equal to or greater than a pull-in threshold corresponding to the pull-in capacitance. If the AC signal is a non-pull-in signal applied at Vrefi, the fault detection circuit 35 is configured to detect a fault on a second condition that the peak-to-peak value is less than the pull-in threshold.

[0101] While various embodiments have been described, it will be apparent to those of ordinary skill in the art that many more embodiments and implementations can be possible within the scope of the disclosure. Accordingly, the present application is not to be limited unless by the appended claims and their equivalents.

[0102] With respect to the various functions performed by the above-described components or structures (assemblies, devices, circuits, systems, etc.), unless otherwise specified, the terminology used to describe such components (including references to "means" for performing a specified function) is intended to correspond to any component or structure which performs the specified function, i.e., that is functionally equivalent, even if not structurally equivalent in the exemplary implementations of the application illustrated herein.

[0103] Further, the following claims are hereby incorporated into the detailed description, wherein each claim can stand as a separate example embodiment. While each claim can stand as a separate example embodiment, it is noted that although dependent claims can refer in the claims to a particular combination of one or more other claims, other example embodiments can include the combination of the dependent claim with the subject matter of each other dependent or independent claim. Such combinations are presented herein unless it is stated that a particular combination is not intended. Further, it is intended that features of one claim be included in any other independent claim even if the claim does not directly depend on the independent claim.

[0104] It should also be noted that the methods disclosed in the specification or claims can be implemented by a device having means for performing each of the various actions of the methods.

[0105] Further, it will be understood that the disclosure of a number of actions or functions in the specification or claims can not be interpreted as a requirement to perform the acts or functions in the specific order in which they are presented. Thus, unless expressly stated otherwise, the disclosure of a number of acts or functions in a specific order does not necessarily require that the acts or functions be performed in that specific order. Further, in some embodiments, a single act can include or can be broken up into multiple sub-acts. Unless expressly excluded, such sub-acts can be included in or part of the disclosure of the single act, and the disclosure of the single act should be interpreted to include the sub-acts unless expressly excluded.

[0106] In general, any number of methods can be used to implement the functions described herein. For example, the functions can be implemented in hardware, software, or a combination thereof. If implemented in software, the functions can be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media include both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media can be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code means in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or

Claims

1. A capacitive sensor, comprising: a first electrode structure; a second electrode structure opposite the first electrode structure, wherein the second electrode structure is movable relative to the first electrode structure in response to an external force acting thereon, wherein the second electrode structure is capacitively coupled with the first electrode structure to form a first capacitor having a first capacitance that varies with a distance between the first electrode structure and the second electrode structure, wherein the first capacitance is indicative of the external force, wherein a snap-in event occurs when the first electrode structure is in direct contact with the second electrode structure resulting in the first capacitance being equal to or greater than a snap-in capacitance, and a non-snap-in event occurs when the first electrode structure is not in direct contact with the second electrode structure resulting in the first capacitance being less than the snap-in capacitance; a signal generator configured to apply a first electrical signal at an input or an output of the first capacitor to induce a first voltage transient response at the output of the first capacitor, wherein the first electrical signal is either a snap-in signal configured to induce a snap-in event in the absence of a fault or a non-snap-in signal configured to induce a non-snap-in event in the absence of a fault; and a diagnostic circuit configured to detect a fault in the capacitive sensor by measuring a first time constant of the first voltage transient response and detecting the fault based on the first time constant and based on whether the first electrical signal is the snap-in signal or the non-snap-in signal.

2. The capacitive sensor of claim 1, wherein: the diagnostic circuit is configured to compare the first time constant to a snap-in threshold value corresponding to the snap-in capacitance, when the first electrical signal is a snap-in signal, the diagnostic circuit is configured to detect a first fault on a first condition that the first time constant is less than the snap-in threshold value, and when the first electrical signal is a non-snap-in signal, the diagnostic circuit is configured to detect a second fault on a second condition that the first time constant is equal to or greater than the snap-in threshold value.

3. The capacitive sensor of claim 1, wherein: the snap-in event results in the first capacitance being at a maximum capacitance and a non-snap-in event results in the first capacitance being less than the maximum capacitance, the diagnostic circuit is configured to determine whether the first time constant corresponds to the maximum capacitance, when the first electrical signal is a snap-in signal, the diagnostic circuit is configured to detect a first fault on a first condition that the first time constant does not correspond to the maximum capacitance, and when the first electrical signal is a non-snap-in signal, the diagnostic circuit is configured to detect a second fault on a second condition that the first time constant corresponds to the maximum capacitance.

4. The capacitive sensor of claim 1, wherein: the first electrical signal as the snap-in signal includes a first signal step from a non-snap-in value to a snap-in value, the first electrical signal as the non-snap-in signal includes a second signal step from the snap-in value to the non-snap-in value, and the diagnostic circuit is configured to detect the fault based on a ratio of the first time constant to a time constant of the second signal step. The suck-in value is configured to initiate the suck-in event in the absence of a fault, and the non-suck-in value is configured to initiate the non-suck-in event in the absence of a fault.

5. The capacitive sensor of claim 1, wherein the first electrode structure comprises a first conductive structure and an insulating layer disposed on a surface of the first conductive structure facing the second electrode structure, and the second electrode structure comprises a second conductive structure.

6. The capacitive sensor of claim 1, wherein the second electrode structure comprises a first conductive structure and an insulating layer disposed on a surface of the first conductive structure facing the first electrode structure, and the first electrode structure comprises a second conductive structure.

7. The capacitive sensor of claim 1, wherein the first electrical signal causes the first capacitor to charge to a maximum voltage or to discharge to a minimum voltage.

8. The capacitive sensor of claim 1, wherein: the diagnostic circuit comprises a comparator, a counter, and a fault detector, the comparator is configured to receive an output voltage representative of the first voltage transient response and to compare the output voltage to a reference threshold in order to generate a comparison result having one of two comparator values, the counter is configured to stop counting when the comparison result changes from a first comparator value to a second comparator value and to output a stop counter value representative of the first time constant, the fault detector is configured to compare the stop counter value to a suck-in threshold value corresponding to the suck-in capacitance, when the first electrical signal is a suck-in signal, the fault detector is configured to generate a first error signal in response to the stop counter value being less than the suck-in threshold value, and when the first electrical signal is a non-suck-in signal, the fault detector is configured to generate a second error signal in response to the stop counter value being equal to or greater than the suck-in threshold value.

9. The capacitive sensor of claim 1, wherein: the diagnostic circuit comprises a comparator and a fault detector, the comparator is configured to receive an output voltage representative of the first voltage transient response and to compare the output voltage to a reference threshold in order to detect the first time constant, and the fault detector is configured to compare the first time constant to a suck-in threshold value corresponding to the suck-in capacitance, when the first electrical signal is a suck-in signal, the fault detector is configured to generate a first error signal in response to the first time constant being less than the suck-in threshold value, and when the first electrical signal is a non-suck-in signal, the fault detector is configured to generate a second error signal in response to the first time constant being equal to or greater than the suck-in threshold value.

10. The capacitive sensor of claim 9, wherein the diagnostic circuit comprises a counter configured to output a first counter value representative of the detected first time constant, and the fault detector is configured to compare the first counter value to a suck-in threshold value corresponding to the suck-in capacitance, when the first electrical signal is a pull-in signal, the fault detector is configured to generate a first error signal in response to the first counter value being less than the pull-in threshold, and when the first electrical signal is a pull-out signal, the fault detector is configured to generate a second error signal in response to the first counter value being equal to or greater than the pull-in threshold.

11. The capacitive sensor of claim 1, wherein: the diagnostic circuit is configured to compare the first time constant to a pull-in threshold corresponding to the pull-in capacitance, when the first electrical signal is a pull-in signal, the diagnostic circuit is configured to generate an error signal in response to the first time constant being less than the pull-in threshold, and when the first electrical signal is a pull-out signal, the diagnostic circuit is configured to generate the error signal in response to the first time constant being equal to or greater than the pull-in threshold.

12. The capacitive sensor of claim 1, further comprising a controller, wherein the first capacitor comprises a first terminal coupled to a bias supply voltage and a second terminal coupled to a DC voltage set by a bias resistance circuit, and wherein the controller is configured to control the signal generator to apply the first electrical signal at the first terminal by modulating the bias supply voltage or at the second terminal by modulating the DC voltage to induce the first voltage transient response.

13. A capacitive sensor, comprising: a first electrode structure; a second electrode structure opposite the first electrode structure, wherein the second electrode structure is movable relative to the first electrode structure in response to an external force acting thereon, wherein the second electrode structure is capacitively coupled with the first electrode structure to form a first capacitor having a first capacitance that varies with a distance between the first electrode structure and the second electrode structure, wherein the first capacitance is indicative of the external force, wherein a pull-in event occurs when the first electrode structure is in direct contact with the second electrode structure resulting in the first capacitance being equal to or greater than a pull-in capacitance, and a pull-out event occurs when the first electrode structure is not in direct contact with the second electrode structure resulting in the first capacitance being less than the pull-in capacitance; a signal generator configured to apply an alternating current (AC) signal at the first electrode structure or the second electrode structure of the first capacitor to induce an output response at an output of the first capacitor, wherein the AC signal is a pull-in signal configured to induce a pull-in event in the absence of a fault or a pull-out signal configured to induce a pull-out event in the absence of a fault; and a diagnostic circuit configured to detect a fault in the capacitive sensor by evaluating the output response and detecting the fault based on the output response and based on whether the AC signal is the pull-in signal or the pull-out signal, wherein: the output response in response to the AC signal is a periodic voltage having a maximum peak voltage and a minimum peak voltage, when the AC signal is a pull-in signal, the diagnostic circuit is configured to detect a first fault under a first condition that the maximum peak voltage is less than a maximum threshold and the minimum peak voltage is greater than a minimum threshold, and when the AC signal is a pull-out signal, the diagnostic circuit is configured to detect a second fault under a second condition that the maximum peak voltage is equal to or greater than the maximum threshold or the minimum peak voltage is equal to or less than the minimum threshold.

14. The capacitive sensor of claim 13, wherein: the output response to the AC signal is a periodic signal having a maximum peak and a minimum peak defining a peak-to-peak value, when the AC signal is a pull-in signal, the diagnostic circuit is configured to detect a first fault under a first condition that the peak-to-peak value is less than a pull-in threshold corresponding to a pull-in capacitance, and when the AC signal is a pull-out signal, the diagnostic circuit is configured to detect a second fault under a second condition that the peak-to-peak value is equal to or greater than the pull-in threshold.

15. The capacitive sensor of claim 13, wherein: the output response to the AC signal is a periodic signal having a maximum peak and a minimum peak defining a peak-to-peak value, when the AC signal is a pull-in signal, the diagnostic circuit is configured to detect a first fault under a first condition that the peak-to-peak value is equal to or greater than a pull-in threshold corresponding to a pull-in capacitance, and when the AC signal is a pull-out signal, the diagnostic circuit is configured to detect a second fault under a second condition that the peak-to-peak value is equal to or less than the pull-in threshold.

16. A capacitive sensor, comprising: a first electrode structure; a second electrode structure opposite the first electrode structure, wherein the second electrode structure is movable relative to the first electrode structure, wherein the second electrode structure is capacitively coupled with the first electrode structure to form a first capacitor having a first capacitance that varies with a distance between the first electrode structure and the second electrode structure; a third electrode structure opposite the first electrode structure, wherein the third electrode structure is movable relative to the first electrode structure, wherein the third electrode structure is capacitively coupled with the first electrode structure to form a second capacitor having a second capacitance that varies with a distance between the first electrode structure and the third electrode structure, wherein a pull-in event occurs when the first electrode structure is in direct contact with the second electrode structure resulting in the first capacitance being equal to or greater than a pull-in capacitance, or when the third electrode structure is in direct contact with the second electrode structure resulting in the second capacitance being equal to or greater than the pull-in capacitance, wherein a pull-out event occurs when the first electrode structure is not in direct contact with the second electrode structure resulting in the first capacitance being less than the pull-in capacitance, and when the third electrode structure is not in direct contact with the second electrode structure resulting in the second capacitance being less than the pull-in capacitance. a differential amplifier configured to receive a first output signal from the first capacitor and a second output signal from the second capacitor, and to generate a differential signal based on a difference between the first output signal and the second output signal; a signal generator configured to apply an AC signal at an input or an output of the first capacitor and at an input or an output of the second capacitor to induce a first output response at an output of the first capacitor and a second output response at an output of the second capacitor, respectively; and a diagnostic circuit configured to detect a fault in the capacitive sensor by evaluating the differential signal and detecting the fault based on the differential signal and based on whether the AC signal is a pull-in signal or a pull-out signal.

17. The capacitive sensor of claim 16, wherein: the first capacitor comprises a first terminal coupled to a bias supply voltage and a second terminal coupled to a first DC voltage set by a bias resistance circuit, and the second capacitor comprises a first terminal coupled to the bias supply voltage and a second terminal coupled to a second DC voltage set by the bias resistance circuit.

18. The capacitive sensor of claim 16, wherein: the differential signal in response to the AC signal is a periodic voltage having a maximum peak voltage and a minimum peak voltage, when the AC signal is a pull-in signal, the diagnostic circuit is configured to detect a first fault on a first condition that the maximum peak voltage is less than a maximum threshold and the minimum peak voltage is greater than a minimum threshold, and when the AC signal is a pull-out signal, the diagnostic circuit is configured to detect a second fault on a second condition that the maximum peak voltage is equal to or greater than the maximum threshold or the minimum peak voltage is equal to or less than the minimum threshold.

19. The capacitive sensor of claim 16, wherein: the differential signal in response to the AC signal is a periodic signal having a maximum peak and a minimum peak, when the AC signal is a pull-in signal, the diagnostic circuit is configured to detect a first fault on a first condition that the maximum peak is less than a maximum threshold and the minimum peak is greater than a minimum threshold, and when the AC signal is a pull-out signal, the diagnostic circuit is configured to detect a second fault on a second condition that the maximum peak is equal to or greater than the maximum threshold or the minimum peak is equal to or less than the minimum threshold.

20. The capacitive sensor of claim 16, wherein: the differential signal in response to the AC signal is a periodic signal having a maximum peak and a minimum peak defining a peak-to-peak value, when the AC signal is a pull-in signal, the diagnostic circuit is configured to detect a first fault on a first condition that the peak-to-peak value is less than a pull-in threshold corresponding to a pull-in capacitance, and when the AC signal is a pull-out signal, the diagnostic circuit is configured to detect a second fault on a second condition that the peak-to-peak value is equal to or greater than the pull-in threshold.

21. The capacitive sensor of claim 16, further comprising: an analog-to-digital converter configured to receive the differential signal and convert it to a digital signal, wherein the digital signal in response to the AC signal is a periodic signal having a maximum peak and a minimum peak, wherein, when the AC signal is a draw signal, the diagnostic circuit is configured to detect a first fault on a first condition that the maximum peak is less than a maximum threshold and the minimum peak is greater than a minimum threshold, and wherein, when the AC signal is a non-draw signal, the diagnostic circuit is configured to detect a second fault on a second condition that the maximum peak is equal to or greater than the maximum threshold or the minimum peak is equal to or less than the minimum threshold.

22. The capacitive sensor of claim 16, further comprising: an analog-to-digital converter configured to receive the differential signal and convert it to a digital signal, wherein the digital signal in response to the AC signal is a periodic signal having a maximum peak and a minimum peak defining a peak-to-peak value, wherein, when the AC signal is a draw signal, the diagnostic circuit is configured to detect a first fault on a first condition that the peak-to-peak value is less than a draw threshold corresponding to a draw capacitance, and wherein, when the AC signal is a non-draw signal, the diagnostic circuit is configured to detect a second fault on a second condition that the peak-to-peak value is equal to or greater than the draw threshold.

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