Low sidelobe low sideband level time modulation phased array based on multi-stage ladder waveform

Abstract

The application discloses a low-sidelobe low-sideband level time modulation phased array based on a multi-stage ladder waveform. The phased array comprises an antenna array composed of N antenna units, N single-sideband time modulators based on the multi-stage ladder waveform, an FPGA control circuit and a 1-N power divider. The low-sidelobe low-sideband level of the time modulation phased array is realized by a low-sideband level amplitude weighting method of the single-sideband time modulator. The multi-stage ladder time modulation signal of each unit in the time modulation phased array is optimized, the sideband level is effectively suppressed while the amplitude weighting is met, the spectral characteristics of the time modulation phased array are optimized, the performance of the low-sidelobe low-sideband level is realized, and the application has important practical value.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of microwave technology and antenna engineering, and particularly relates to a low-sidelobe low-sideband level time modulation phased array based on a multi-stage ladder waveform. BACKGROUND

[0002] With the development of wireless systems, traditional array antennas are required to be more and more accurate in many fields such as precision guidance, aerospace and navigation. A phased array antenna is composed of a large number of identical antenna elements, and the radiation pattern of the array can be controlled by controlling the amplitude and phase of the feed of the antenna elements, so that the control of the beam pointing can be realized. However, the control accuracy is restricted by the cost. In recent years, time modulation array, a new technology, is applied to the phased array antenna. The time is added as the fourth design dimension to the traditional three-dimensional antenna design, so that the radiation characteristics of the antenna can be changed and controlled by time modulation, and low-cost high-precision beam scanning can be realized. In order to solve the influence of a large number of useless sidebands caused by time modulation, the time modulation phased array controls the time characteristics of the corresponding antenna elements by using a single sideband time modulator with a specific structure, so that the spectral performance and system efficiency are effectively improved.

[0003] At present, most of the single sideband time modulation phased arrays only have the function of phase weighting, but do not have the function of amplitude weighting. This is because the traditional amplitude weighting method of time modulation, that is, the corresponding amplitude weighting is realized by setting different duty cycles through the periodic on-off of the radio frequency switch, will cause the ability of the single sideband time modulator to suppress useless sidebands to decline, and the spectral performance will be significantly deteriorated. Therefore, based on the high degree of freedom of the single sideband time modulator with a multi-stage ladder waveform, a unit amplitude weighting method capable of maintaining a low sideband level is designed, a low-sidelobe low-sideband level time modulation phased array is realized, and the application value will be very high. SUMMARY

[0004] The application aims at the problems existing in the prior art, and provides a low-sidelobe low-sideband level time modulation phased array based on a multi-stage ladder waveform.

[0005] The technical solution for achieving the object of the application is: a low-sidelobe low-sideband time modulation phased array based on a multi-stage ladder waveform, which comprises an antenna array composed of N antenna units, N single-sideband time modulators based on a multi-stage ladder waveform, an FPGA control circuit, and a 1-N power divider, N being a natural number; when the time modulation phased array is used as a receiving antenna, a radio frequency signal reaches the 1-N power divider in turn from the antenna array, the single-sideband time modulator based on a multi-stage ladder waveform; when the time modulation phased array is used as a transmitting antenna, a radio frequency signal reaches the antenna array in turn from the 1-N power divider, the single-sideband time modulator based on a multi-stage ladder waveform; the FPGA control circuit is used to control the single-sideband time modulator based on a multi-stage ladder waveform to generate a ladder-shaped time modulation signal; and the low-sidelobe low-sideband level of the time modulation phased array is realized by amplitude weighting of the low-sideband level of the single-sideband time modulator.

[0006] Further, the single-sideband time modulator based on a multi-stage ladder waveform comprises a first Wilkinson power divider, a second Wilkinson power divider, a synchronization channel, a positive channel, a first port, and a second port; the first port is connected to the synchronization channel and the positive channel through the first Wilkinson power divider, and then reaches the second port through the second Wilkinson power divider; the synchronization channel and the positive channel generate a ladder-shaped time modulation signal under the control of a periodic time sequence from the FPGA control circuit.

[0007] Further, the synchronization channel comprises a first digital attenuator, a first single-pole double-throw RF switch, a first 0 / 180° phase shifter, and a second single-pole double-throw RF switch arranged in sequence along the direction from the first port to the second port.

[0008] Further, the positive channel comprises a second digital attenuator, a third single-pole double-throw RF switch, a second 0 / 180° phase shifter, a fourth single-pole double-throw RF switch, and a 90° phase shifter arranged in sequence along the direction from the first port to the second port.

[0009] Further, the ladder-shaped time modulation signal is a ladder-shaped modulation wave with S-stage ladder waveform, the period of which is T p , the amplitude and duration of the s-stage ladder are b s and τ s , respectively, and the amplitude b s is determined by the attenuation values of the first digital attenuator and the second digital attenuator.

[0010] Further, the low-sidelobe low-sideband level of the time modulation phased array is realized by amplitude weighting of the low-sideband level of the single-sideband time modulator, which comprises the following steps:

[0011] Step 1, according to the hardware structure of the single sideband time modulator, determine the step number S and the step amplitude b of the multi-step time modulation signal s ;

[0012] Step 2, optimize the step duration τ of each step of the time modulation signal s , obtain the time modulation signal with the lowest sideband level;

[0013] Step 3, according to the amplitude weighting distribution of the low sidelobe phased array, determine the target amplitude weighting value a of the single sideband time modulator;

[0014] Step 4, optimize the step duration τ of each step of the time modulation signal s , obtain the time modulation signal with the lowest sideband level that meets the target amplitude weighting value a;

[0015] Step 5, based on the time modulation signal that meets the target amplitude, determine the control program of the FPGA circuit.

[0016] Further, step 2 is specifically:

[0017] Based on the objective function

[0018]

[0019] Optimize the step duration τ of each step of the step-shaped time modulation signal = {τ1, τ2, …, τ S}, obtain the single sideband time modulation signal with the lowest sideband level;

[0020] Wherein, b s , b s-1 are the amplitudes of the s-th step and s-1-th step of the step-shaped time modulation signal.

[0021] Further, the target amplitude weighting value a in step 3 is Wherein τ s ' is the duration of the s-th step of the multi-step time modulation signal with the lowest sideband level that meets the target amplitude.

[0022] Further, step 4 is specifically:

[0023] Based on the objective function

[0024]

[0025] Optimize the step duration τ of each step of the step-shaped time modulation signal that meets the target amplitude weighting value = {τ1, τ2, …, τ S}, wherein w1 is the weighting value of the target amplitude weighting value, and w2 is the weighting value of the sideband level.

[0026] Compared with the prior art, the present application has the following advantages:

[0027] 1) The time modulation phased array based on the high degree of freedom of multi-stage stepped waveform can realize time modulation amplitude weighting, suppress unwanted sidebands and improve spectral performance, and is more practical.

[0028] 2) The amplitude weighting method with low sideband level is used in each single sideband time modulator, so that when the time modulation phased array performs beam scanning with low sidelobe and low sideband level, the control timing needs to be repeatedly optimized for different beam directions to meet the performance requirements, and only the time delay of the control signals between units needs to be adjusted, so that the control means of the system is greatly simplified.

[0029] The present application will be described in further detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 It is a structure schematic diagram of the low sidelobe and low sideband level time modulation phased array based on the multi-stage stepped waveform of the present application.

[0031] Figure 2 It is a hardware structure schematic diagram of the single sideband time modulator based on the multi-stage stepped waveform of the present application.

[0032] Figure 3 It is a stepped time modulation signal schematic diagram generated by the in-phase channel of the single sideband time modulator based on the multi-stage stepped waveform of the present application.

[0033] Figure 4 It is a stepped time modulation signal schematic diagram generated by the quadrature channel of the single sideband time modulator based on the multi-stage stepped waveform of the present application.

[0034] Figure 5 It is a flowchart of the low sideband level amplitude weighting control method of the single sideband time modulator based on the multi-stage stepped waveform of the present application.

[0035] Figure 6 It is a simulation and measured normalized pattern of the low sidelobe and low sideband level time modulation phased array based on the multi-stage stepped waveform of the embodiment of the present application.

[0036] Figure 7 It is a measured spectrum diagram of the low sidelobe and low sideband level time modulation phased array based on the multi-stage stepped waveform of the embodiment of the present application.

[0037] Figure 8 It is a measured beam scanning normalized pattern of the low sidelobe and low sideband level time modulation phased array based on the multi-stage stepped waveform of the embodiment of the present application. DETAILED DESCRIPTION

[0038] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0039] It should be noted that if the embodiments of the present invention involve descriptions such as "first" and "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" and "second" may explicitly or implicitly include at least one of those features. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.

[0040] Combination Figure 1 This invention proposes a low-sidelobe, low-sideband time-modulated phased array based on a multi-stage stepped waveform, comprising an antenna array 1 composed of N antenna elements, N single-sideband time modulators 2 based on a multi-stage stepped waveform, an FPGA control circuit 3, and a 1-N power divider 4, where N is a natural number. When the time-modulated phased array is used as a receiving antenna, the radio frequency signal sequentially flows from the antenna array 1, through the single-sideband time modulators 2 based on the multi-stage stepped waveform, to the 1-N power divider 4. When the time-modulated phased array is used as a transmitting antenna, the radio frequency signal sequentially flows from the 1-N power divider 4, through the single-sideband time modulators 2 based on the multi-stage stepped waveform, to the antenna array 1. The FPGA control circuit 3 controls the single-sideband time modulators 2 based on the multi-stage stepped waveform to generate a stepped time-modulated signal. The low-sidelobe, low-sideband level of this time-modulated phased array is achieved by weighting the low-sideband level amplitude of the single-sideband time modulators. The low sideband level of the time-modulated phased array is achieved by a low sideband level amplitude weighting method of a single-sideband time modulator.

[0041] Combination Figure 2A single-sideband time modulator based on a multi-level stepped waveform is the core component of time-modulated phase control, specifically including: a first Wilkinson power divider 6, a second Wilkinson power divider 9, a synchronization channel 7, a positive current channel 8, a first port 5, and a second port 10. The first port 5 is connected to the synchronization channel 7 and the positive current channel 8 through the first Wilkinson power divider 6, and then reaches the second port 10 through the second Wilkinson power divider 9. The synchronization channel 7 and the positive current channel 8 are controlled by a periodic time sequence from the FPGA control circuit to generate a stepped time-modulated signal. The synchronization channel 7 includes a first numerically controlled attenuator 11, a first single-pole double-throw RF switch 12, a first 0 / 180° phase shifter 13, and a second single-pole double-throw RF switch 14, arranged sequentially along the direction from the first port to the second port. The main traffic channel 8 includes a second digitally controlled attenuator 15, a third single-pole double-throw RF switch 16, a second 0 / 180° phase shifter 17, a fourth single-pole double-throw RF switch 18, and a 90° phase shifter 19, which are arranged sequentially along the direction from the first port to the second port.

[0042] Combination Figure 3 and Figure 4 The time-modulated signal is formed by superimposing the stepped time-modulated signals generated by the FPGA circuit through synchronization channel 3 and positive traffic channel 4 respectively. The stepped time-modulated signal has an S-level stepped waveform with a period of T. p The stepped modulation wave has an amplitude and duration of b for the s-th step. s and τ s .

[0043] Combination Figure 5 A low-sideband level amplitude weighted control method based on a single-sideband time modulator includes the following steps:

[0044] Step S1: Based on the hardware structure of the single-sideband time modulator, determine the number of steps S and the amplitude b of each step in the multi-stage stepped time modulation signal. s .

[0045] The number of steps S and the amplitude b of each step in a multi-stage time-modulated signal. s It depends on the amplitude that can be achieved by the first numerically controlled attenuator 11 and the second numerically controlled attenuator 15.

[0046] Step S2: Optimize the duration τ of each step in the time-modulated signal. s To obtain the time-modulated signal with the lowest sideband level.

[0047] To achieve single-sideband operation, retaining the +1 working sideband and suppressing other useless sidebands, the single-sideband time-modulated signal needs to be fitted with Euler's formula e. jωt=cos(ωt)+jsin(ωt), thus determining the amplitude b of each stage of the stepped time-modulated signal generated by synchronization channel 3 and positive traffic channel 4. s and duration τ s Generally, the stepped time-modulated signals generated by synchronization channel 3 and positive traffic channel 4 have the same waveform shape and exhibit T0. p / 4 time difference.

[0048] Because of the orthogonal modulation method, only m = 4k + 1 (k ≠ 0) useless sidebands are retained. To suppress these sidebands, based on the objective function... Optimize the duration τ={τ1,τ2,…,τ} of each stage of the stepped time modulation signal. S}, to obtain the single-sideband time-modulated signal with the lowest sideband level, where b s b s-1 These represent the amplitudes of the s-th and s-1-th steps of the stepped time-modulated signal, respectively.

[0049] Step S3: Determine the target amplitude weighting value 'a' for the single-sideband time modulator based on the amplitude weighting distribution of the low-sidelobe phased array.

[0050] Based on the amplitude weighting value corresponding to the low sidelobe phased array, and with the amplitude of the single-sideband time-modulated signal with the lowest sideband level as a reference, the target amplitude weighting value is equal to... Where τ s ′ is the duration of the s-th step of a multi-stage step-time modulated signal that satisfies the lowest sideband level of the target amplitude.

[0051] Step S4: Optimize the duration τ of each step of the time-modulated signal. s The time-modulated signal with the lowest sideband level that satisfies the target amplitude weighting value a is obtained.

[0052] Based on the objective function

[0053]

[0054] Optimize the duration τ = {τ1, τ2, ..., τ} of each stage of the stepped time-modulated signal that satisfies the target amplitude weighting value. S}. Where w1 is the weighted value of the target amplitude weighting, and w2 is the weighted value of the sideband level.

[0055] When the target amplitude weighting value 'a' is low, the duration τ of each stage of the step-time modulation signal is τ = {τ1, τ2, ..., τ...} S The fact that some parameters in} are 0 indicates that the number of stages in the actual stepped time-modulated signal is less than S, and the amplitude of the actual highest stage is reduced.

[0056] Step S5: Determine the control program for the FPGA circuit based on the time-modulated signal that meets the target amplitude.

[0057] The present invention will be further described in detail below with reference to specific embodiments.

[0058] Example

[0059] The low sidelobe, low sideband level time-modulated phased array based on multi-level stepped waveforms consists of N single-sideband time modulators, N connected antenna elements, FPGA control circuit, and 1-N power dividers.

[0060] For example, in this embodiment of the invention, the size of the entire time-modulated antenna array composed of N antenna elements can be any required one-dimensional or two-dimensional array. For example, in this embodiment, a one-dimensional 8-element antenna array is used and connected to 8 single-sideband time modulators. This embodiment of the invention does not limit this.

[0061] The measured hardware circuit in this embodiment operates at 2GHz, and the frequency of the multi-level stepped time modulation signal it generates is 100kHz.

[0062] For example, the embodiment of the present invention uses an 8-level stepped time modulation waveform (S=8). According to the amplitude distribution of the actual numerically controlled attenuator, the amplitude of each step of the multi-level stepped time modulation signal of the synchronization channel and the positive traffic channel of all time modulators satisfies b1=-14dB, b2=-12dB, b3=-10dB, b4=-8dB, b5=-6dB, b6=-4dB, b7=-2dB, b8=0dB.

[0063] Based on the objective function Optimize the duration τ={τ1,τ2,…,τ} of each stage of the stepped time modulation signal. S The durations of each step of the single-sideband time-modulated signal with the lowest sideband level are τ1 = 0.469, τ2 = 0.422, τ3 = 0.406, τ4 = 0.383, τ5 = 0.348, τ6 = 0.305, τ7 = 0.242, and τ8 = 0.148, with a sideband level of -35.57dB.

[0064] For example, in this embodiment of the invention, the time-modulated phased array is used to achieve a low sidelobe of -25dB. The amplitude weighting value of the antenna element adopts the Chepishev distribution, and the theoretical values ​​a are 0.38, 0.58, 0.84, 1, 1, 0.84, 0.58, and 0.38, respectively. The above amplitude weighting is achieved by using a single-sideband time modulator.

[0065] After optimization, the step durations of each step in the multi-stage step-time modulation signal with 8 single-sideband time modulators are shown in Table 1 below.

[0066] Table 1. Duration of each step in the multi-step time modulation signal.

[0067] Serial number [τ1] [tau2] [tau3] [tau4] [τ5] [tau]6 ​ [tau]8 1 0.414 0.313 0.203 0.102 0 0 0 0 2 0.449 0.367 0.352 0.285 0.215 0.066 0 0 3 0.469 0.410 0.406 0.367 0.324 0.270 0.184 0.008 4 0.469 0.430 0.410 0.391 0.348 0.301 0.242 0.148 5 0.469 0.430 0.410 0.391 0.348 0.301 0.242 0.148 6 0.469 0.410 0.406 0.367 0.324 0.270 0.184 0.008 7 0.449 0.367 0.352 0.285 0.215 0.066 0 0 8 0.414 0.313 0.203 0.102 0 0 0 0

[0068] The stepped time-modulated signals generated by the synchronization channel 3 and the positive traffic channel 4 of the same time modulator have the same waveform shape and exist in T. p / 4 time difference.

[0069] Finally, based on the step duration of each step of the multi-stage step-time modulation signal of the above 8 single-sideband time modulators, the control program of the FPGA circuit is determined to realize a time-modulated phased array with a sidelobe level of -25dB.

[0070] See Figure 6 The measured and simulated normalized radiation pattern of the low sidelobe low sideband level time-modulated phased array based on multi-level stepped waveform in this embodiment of the invention is shown. The measured sidelobe level is -23.53dB.

[0071] See Figure 7 The above are the measured and theoretical spectrum diagrams of the low sidelobe and low sideband level time-modulated phased array based on multi-level stepped waveforms in this embodiment of the invention. The measured sideband level is -33.34dB.

[0072] See Figure 8 This is a measured beam scanning normalized pattern of a low-sidelobe, low-sideband level time-modulated phased array based on a multi-level stepped waveform, according to an embodiment of the present invention. The beams point to 0°, ±15°, ±30°, and ±45°, respectively. Through FPGA circuit control, a time difference Δt′ is generated between the single-sideband time-modulated signals generated by adjacent single-sideband time modulators, satisfying:

[0073]

[0074] in, The phase difference generated by adjacent time modulation units, i.e., the phase difference between antenna elements; T p θ is the period of the stepped time-modulated pulse, β is the free space beam, d is the spacing between antenna elements, and θ0 is the beam pointing of the antenna array.

[0075] This invention optimizes the multi-level stepped time modulation signals of each unit in a time-modulated phased array, effectively suppressing sideband levels while satisfying amplitude weighting, thus optimizing the spectral characteristics of the time-modulated phased array and achieving performance with low sidelobes and low sideband levels, which has significant practical value.

[0076] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention without departing from its spirit and scope should be included within the protection scope of the present invention.

Claims

1. A low-sidelobe, low-sideband level time-modulated phased array based on multi-level stepped waveforms, characterized in that, The time-modulated phased array includes an antenna array (1) composed of N antenna elements, N single-sideband time modulators (2) based on multi-level stepped waveforms, an FPGA control circuit (3), and a 1-N power divider (4), where N is a natural number. When the time-modulated phased array is used as a receiving antenna, the radio frequency signal sequentially travels from the antenna array (1), the single-sideband time modulator (2) based on multi-level stepped waveforms, and then to the 1-N power divider (4). When the time-modulated phased array is used as a transmitting antenna, the radio frequency signal sequentially travels from the 1-N power divider (4), the single-sideband time modulator (2) based on multi-level stepped waveforms, and then to the antenna array (1). The FPGA control circuit (3) is used to control the single-sideband time modulator (2) based on multi-level stepped waveforms to generate a stepped time-modulated signal. The low sidelobe low sideband level of the time-modulated phased array is achieved by weighting the low sideband level amplitude of the single-sideband time modulator. The low sidelobe low sideband level of the time-modulated phased array is achieved by amplitude weighting of the low sideband level of the single-sideband time modulator, specifically including the following steps: Step 1: Based on the hardware structure of the single-sideband time modulator, determine the number of steps S and the amplitude b of each step in the multi-stage stepped time modulation signal. s ; Step 2: Optimize the duration τ of each step in the time-modulated signal. s Obtain the time-modulated signal with the lowest sideband level; Step 3: Determine the target amplitude weighting value 'a' for the single-sideband time modulator based on the amplitude weighting distribution of the low-sidelobe phased array. Step 4: Optimize the duration τ of each step in the time-modulated signal. s To obtain the time-modulated signal with the lowest sideband level that satisfies the target amplitude weighting value a; Step 5: Determine the control program for the FPGA circuit based on the time-modulated signal that meets the target amplitude; Step 2 is as follows: Based on the objective function Optimize the duration of each stage of the stepped time modulation signal τ = {τ1, τ2, …, τ S }, to obtain the single-sideband time-modulated signal with the lowest sideband level; in, T represents the amplitudes of the s-th and s-1-th steps of the stepped time-modulated signal, respectively. p This indicates the period of the S-level stepped waveform.

2. The low-sidelobe, low-sideband level time-modulated phased array based on multi-level stepped waveforms according to claim 1, characterized in that, The single-sideband time modulator (2) based on multi-level stepped waveform includes a first Wilkinson power divider (6), a second Wilkinson power divider (9), a synchronization channel (7), a positive communication channel (8), a first port (5), and a second port (10). The first port (5) is connected to the synchronization channel (7) and the positive communication channel (8) through the first Wilkinson power divider (6), and then reaches the second port (10) through the second Wilkinson power divider (9). The synchronization channel (7) and the positive communication channel (8) are controlled by the periodic time sequence from the FPGA control circuit to generate stepped time modulation signals.

3. The low-sidelobe, low-sideband level time-modulated phased array based on multi-level stepped waveforms according to claim 2, characterized in that, The synchronization channel (7) includes a first digitally controlled attenuator (11), a first single-pole double-throw RF switch (12), and a first 0 / 180° RF switch arranged sequentially along the direction from the first port to the second port. o Phase shifter (13) and second single-pole double-throw radio frequency switch (14).

4. The low-sidelobe, low-sideband level time-modulated phased array based on multi-level stepped waveforms according to claim 2, characterized in that, The main traffic channel (8) includes a second numerically controlled attenuator (15), a third single-pole double-throw RF switch (16), and a second 0 / 180° RF switch arranged sequentially along the direction from the first port to the second port. o Phase shifter (17), fourth single-pole double-throw RF switch (18) and 90 o Phase shifter (19).

5. The low-sidelobe, low-sideband level time-modulated phased array based on multi-level stepped waveforms according to claim 2, characterized in that, The stepped time-modulated signal has an S-level stepped waveform with a period of T. p The stepped modulation wave has an amplitude and duration of the s-th step as follows: and amplitude The attenuation value is determined by the attenuation value achievable by the first numerically controlled attenuator (11) and the second numerically controlled attenuator (15).

6. The low-sidelobe, low-sideband level time-modulated phased array based on multi-level stepped waveforms according to claim 1, characterized in that, The target amplitude weighted value mentioned in step 3 ,in The duration of the s-th step of the multi-stage step-time modulated signal that meets the minimum sideband level of the target amplitude.

7. The low-sidelobe, low-sideband level time-modulated phased array based on multi-level stepped waveforms according to claim 6, characterized in that, Step 4 specifically involves: Based on the objective function Optimize the duration of each stage of the stepped time-modulated signal to meet the target amplitude weighting value. τ = {τ1, τ2, …,τ S }, where w1 is the weighted value of the target amplitude weighting value and w2 is the weighted value of the sideband level.

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