Method for manufacturing a capacitive pressure sensor and capacitive pressure sensor

Abstract

This disclosure relates to a method for manufacturing microelectromechanical devices (MEMS). The method includes the following steps: forming a first protective layer of HF-impermeable crystalline alumina on a substrate; forming a sacrificial layer of HF-removable silicon oxide on the first protective layer; forming a second protective layer of crystalline alumina on the sacrificial layer; exposing a sacrificial portion of the sacrificial layer; forming a first film layer of HF-permeable porous material on the sacrificial portion; removing the sacrificial portion through the first film layer to form a cavity; and sealing the pores of the first film layer by forming a second film layer on the first film layer.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a method for manufacturing a microelectromechanical (MEMS) device and to a microelectromechanical device. BACKGROUND

[0002] Based on gluing / bonding of two substrates or on removal of a sacrificial layer, different techniques are used to form the membrane.

[0003] For example, US 6,521,965 provides for manufacturing a bottom electrode; forming a sacrificial area on the bottom electrode; epitaxially growing a membrane layer; forming an etching hole in the membrane layer; removing the sacrificial area through the etching hole; and closing the hole by filling with an oxide. US 6,527,961 also describes a similar process for manufacturing a pressure sensor. US 6,012,336 uses a metal or silicon nitride to fill the etching hole.

[0004] In the shown process, the filling of the etching hole is a critical step. In fact, the use of a conformal material is not possible, otherwise the conformal material would penetrate into the just formed cavity and would cause the cavity to be at least partially filled, resulting in a wrong capacitive coupling. On the other hand, the use of a non-conformal material would not allow it to close completely, also considering the geometry of the hole, which is narrow and deep for applications requiring a thick membrane. In fact, typically, the same hole closes close to the top opening, before the filling material completely fills the etching hole in the bottom.

[0005] The problem cannot be solved even if two different materials are used (a first non-conformal material narrows the top opening and prevents a second conformal material from penetrating inside the cavity). SUMMARY

[0006] Various embodiments of the present disclosure relate to a process and a device overcoming the drawbacks of the prior art.

[0007] According to the present disclosure, a method for manufacturing a MEMS device and a MEMS device as obtained thereby are provided. In particular, the present disclosure relates to the manufacturing of a capacitive pressure sensor and a capacitive pressure sensor as obtained thereby. The capacitive pressure sensor is provided with a suspended area or membrane, which is movable with respect to the rest of the structure. In particular, the membrane represents a variable electrode, which faces a fixed portion forming a fixed electrode and is separated from the fixed portion by a partially or completely buried cavity. BRIEF DESCRIPTION OF DRAWINGS

[0008] For a better understanding of the present disclosure, embodiments thereof will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which:

[0009] Figures 1-14 manufacturing steps of a microelectromechanical device, in particular of a capacitive pressure sensor, according to embodiments of the present disclosure are shown in a lateral cross-sectional view;

[0010] Figure 15A A differential capacitive pressure sensor according to another embodiment of the present disclosure is shown in a lateral cross-sectional view;

[0011] Figure 15B A package in which a pressure sensor of Figure 15A may be housed or can be housed is shown;

[0012] Figure 16 A capacitive pressure sensor according to another embodiment of the present disclosure is shown; and

[0013] Figure 17 A capacitive pressure sensor according to another embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0014] Figures 1-14 Subsequent manufacturing steps of a microelectromechanical (MEMS) device or system 30 according to an embodiment of the present disclosure are shown. In particular, the MEMS device 30 integrates a microelectromechanical structure for converting one or more environmental pressure signals into a corresponding electrical signal. In particular, the conversion is performed on the basis of a variation of a capacitance. Therefore, in the following, the MEMS device 30 is also referred to as a pressure sensor or a capacitive pressure sensor.

[0015] Figures 1-14 The wafer is shown in a lateral cross-sectional view in a three-axial reference system of axes X, Y, Z orthogonal to each other.

[0016] Figure 1 The wafer 1 is shown, having a front face la and a back face lb opposite each other along the axis Z, the wafer 1 comprising a substrate 2 of a semiconductor material, typically silicon. At the front face la, the substrate 2 is covered with an insulating layer 3, for example of silicon oxide (SiO2) with a thickness between 0.2 and 2 pm, typically 0.5 pm. The insulating layer 3 is formed, for example, by thermal oxidation.

[0017] In Figure 2 , a structural layer 4 of conductive material, for example of N-type doped polysilicon (for example, with a doping density between 1 · 1018and 2 · 1018ions / cm3), is formed on the insulating layer 3. In one embodiment, the structural layer 4 is formed by depositing polysilicon using the LPCVD technique. 19 20 3

[0018] With reference to a capacitive pressure sensor, the structural layer 4 forms a bottom electrode of the pressure sensor (i.e., the bottom plate of the capacitor).

[0019] Subsequently, Figure 3 ​​​The structural layer 4 is patterned (e.g. lithographically) to define the desired and / or intended shape during the design step of the bottom electrode of the pressure sensor.

[0020] The method then continues with, Figure 4 Above the structural layer 4 (and above the exposed part of the insulating layer 3), an etch stop layer 5 is formed. According to embodiments of the present disclosure, the etch stop layer 5 is aluminum oxide (AI2O3), also known as alumina. The thickness of the etch stop layer 5 is for example a few tens of nanometers, for example between 20 and 60 nm, in particular 40 nm.

[0021] The etch stop layer 5 is formed by an atomic layer deposition (ALD) technique. The deposition of AI2O3 by ALD technique is generally performed using trimethylaluminum (TMA, AI(CH3)3) and water (H2O) vapors as reactants. As an alternative to H2O vapor, ozone (O3) can be used. The deposition can occur for example using TMA as aluminum source and H2O as oxidizing agent. Possible methods for forming the etch stop layer 5 are described in the documents of Steven M. George, Chem. Rev. 2010, 110, p. 111-131, or Purunen, R. L., J. Appl. Phys. 2005, 97, p. 121-301.

[0022] The patent document WO 2013 / 061313 also describes a method for forming an AI2O3 etch stop layer that can be used in the context of the present disclosure. In particular, as described in WO 2013 / 061313, the etch stop layer 5 is formed with a process of ALD deposition providing two intermediate layers of AI2O3, both of which are crystallized. The following sequence: i) deposition of a first intermediate layer of AI2O3, ii) crystallization of the first intermediate layer, iii) deposition of a second intermediate layer of AI2O3, and iv) crystallization of the second intermediate layer, allows to form an AI2O3 etch stop layer 5 having the property of resistance to etching solutions containing hydrogen fluoride (HF), in particular the property of impermeability of the etch stop layer 5 to such HF-based solutions.

[0023] In addition, besides the resistance to HF etching and the HF impermeability, this etch stop layer 5 shows optimal static friction properties against the underlying silicon oxide layer 3 and against the polysilicon layer 4, shows optimal dielectric properties (which do not change with any subsequent heat treatment), shows a very small (negligible) variation of the warping radius of the wafer 1, and shows a high compatibility with heat treatments at high temperature (higher than 1000°C).

[0024] Then, Figure 5, a sacrificial layer 8 of, for example, silicon oxide is formed. The thickness of this sacrificial layer 8 at and above the structure layer 4 is between 0.4 and 2 pm (or in any case selected according to the capacitance value). In order to compensate for the presence of the "step" between the insulating layer 3 and the structure layer 4, and in order to form the sacrificial layer 8 with a flat top surface, after the formation of the sacrificial layer 8, a planarization step (for example via CMP) is performed.

[0025] Alternatively, the sacrificial layer 8 can be formed in two sub-steps, which follow one another, comprising:

[0026] a first sacrificial sub-layer 8a is formed, which here is silicon oxide deposited with a plasma-enhanced chemical vapor deposition (PECVD) technique (TEOS or silane-based oxide), until it completely covers the etch stop layer 5 in the region of the etch stop layer 5 extending above the structure layer 4; the thickness tox1 of the first sacrificial sub-layer 8a measured along the Z axis transversely to the structure layer 4 is greater than the sum of the thicknesses of the structure layer 4 and of the etch stop layer 5 (for example between 700 nm and 1.5 pm);

[0027] the first sacrificial sub-layer 8a is planarized, for example using a CMP technique, to obtain the same flat top surface, but without exposing the portion of the underlying etch stop layer 5;

[0028] a second sacrificial sub-layer 8b is formed above the first sacrificial sub-layer 8a, which here is silicon oxide deposited with a PECVD technique (TEOS or silane-based oxide); the thickness tox-c of the second sacrificial sub-layer 8b measured along the Z axis from the top surface of the first sacrificial sub-layer 8a is between 300 nm and 2 pm.

[0029] The first sacrificial sub-layer 8a and the second sacrificial sub-layer 8b together form the sacrificial layer 8. The thickness of this sacrificial layer 8 is selected according to the desired capacitance value (for example between 500 nm and 2.3 pm).

[0030] Then, Figure 6 an etching is performed on the sacrificial layer 8 to form a trench 10 which surrounds or internally delimits a region 8' of the sacrificial layer 8. The trench 10 extends along the axis Z over the entire thickness of the sacrificial layer 8. In this way, the region 8' is separated from the rest of the sacrificial layer 8 by the trench 10. The shape of the region 8' defined by the trench 10 corresponds to the desired shape of the cavity with the two conductive plates of the capacitor, which form the sensitive element of the pressure sensor and face each other through the cavity, as will be clearer from the following description.

[0031] Then, Figure 7The method continues with the formation of a further etch stop layer 15 over the sacrificial layer 8 (including the region 8') and in the trench 10. According to one embodiment of the present disclosure, the etch stop layer 15 is aluminum oxide (AI2O3) having a thickness of a few tens of nanometers, for example between 20 and 60 nm, in particular 40 nm.

[0032] The etch stop layer 15 is formed according to the same method as discussed above for the etch stop layer 5.

[0033] Then, Figure 8 the etch stop layer 15 is patterned by removing a selective portion thereof over the region 8' to form a cavity 15a through the etch stop layer 15 up to the surface of the region 8'. At least a portion of the surface of the region 8' is thus exposed through the cavity 15a. The region of the region 8' exposed in this process step (i.e. the cavity 15a) defines the shape and spatial extent of the top plate of the capacitor forming the active element of the pressure sensor, as will become clearer from the following description.

[0034] Then, Figure 9 the step of depositing a structural layer 16 over the etch stop layer 15 and in the cavity 15a is performed to cover the surface of the region 8'. In one embodiment, the structural layer 16 is an electrically conductive material, for example doped polysilicon (e.g. doped between 1-10 18 and 2-10 20 ions / cm 3 ). Alternatively, the structural layer 16 can be undoped polysilicon.

[0035] The structural layer 16 is for example deposited with an LPCVD technique. The thickness of the structural layer 16 is for example between 0.2 pm and 1 pm.

[0036] Subsequently, Figure 10 the structural layer 16 is defined, for example lithographically, to selectively remove the structural layer 16 at the cavity 15a. In particular, in one embodiment, the structural layer 16 is not completely removed at the cavity 15a so as to leave a region 16' which acts as an anchor for a subsequent layer (layer 20, Figure 11 as shown) which will be deposited later. Obviously, in other embodiments, if the anchor does not have to structurally support Figure 11 the layer 20, the region 16' is not formed and the structural layer 16 is completely removed at the cavity 15a.

[0037] Then, Figure 11 a permeable layer 20 is formed over the structural layer 16, the anchor region 16' (if any) and the region 8' exposed between the anchor region 16', as described above.

[0038] In one embodiment of the disclosure, the permeable layer 20 is polysilicon permeable to a chemical solution used to subsequently remove the regions 8'. For example, in the described embodiment where the regions 8' are silicon oxide, hydrofluoric acid (HF) or a solution containing HF can be used to selectively remove the regions 8'. In this case, the permeable layer 20 is provided with pores or openings to allow the hydrofluoric acid to flow through the permeable layer 20, reach and remove the regions 8', and form the buried cavity or chamber 22.

[0039] The permeable layer 20, in particular polysilicon, has pores (or porosities) with diameters in the range of 1 to 50 nm. The thickness of the permeable layer 20 is in the range of 50 to 150 nm, for example 100 nm. The permeable layer 20 is, for example, deposited by LPCVD technology. According to an exemplary, non-limiting embodiment, the deposition conditions are in a draw compression transition region, with a process window of about 600 °C using a silane source gas in a deposition environment with a pressure of about 550 mTorr. The size of the porosities of the permeable layer 20 is generally selected so that the chemical etching solution (liquid or gas) used to remove the regions 8' can penetrate the porosities until reaching the permeable layer 20.

[0040] In general, the permeable layer 20 can be a porous polysilicon, or a polysilicon with pores (openings) that are actively formed by selective removal of material after its deposition by mechanical or physicochemical action.

[0041] With reference to Figure 12 the etching step of the regions 8' (identified by the arrow 21) is performed using HF or a buffered mixture of HF or using HF in vapor form by a vapor etching technique. The material of the regions 8' is completely removed and the buried cavity 22 is formed. As mentioned above, the chemical reagent used for etching penetrates the openings or porosities of the permeable layer 20.

[0042] Then, Figure 13 a sealing layer 24 is formed on the permeable layer 20 (for example, by performing an epitaxial growth of amorphous silicon) to form a second electrode operatively coupled to the first electrode (i.e., the layer 4 formed in the Figure 3 substrate 2) through the cavity 22. The thickness of the sealing layer 24 is, for example, between 0.2 μιη and 2 μιη. The amorphous silicon of the sealing layer 24 can be deposited by PECVD technology at a deposition temperature between 200 and 400 °C using SiH4 / H2 or SiH4 / He as precursors. According to the application, the sealing layer 24 can be doped in situ with phosphine (PH3) or diborane (B2H6). In the context of the present disclosure, the sealing layer is electrically conductive (due to the doping).

[0043] One or more further layers 25 can be deposited or formed on the sealing layer 24, for example one or more layers of a respective material having a passivation or enhancement function, selected from: polysilicon, AI2O3, HfO2, SiN (PE).

[0044] The sealing of the permeable layer 20 (and therefore of the buried cavity 22) can be carried out in a controlled pressure environment (reaction chamber) so as to set a desired pressure value in the buried cavity 22. For example, this pressure value can vary between 0.09 mbar and 205 mbar.

[0045] However, alternatively, it is noted that the use of the PECVD technique for forming the sealing layer 24 by deposition of amorphous silicon allows to generate the desired pressure in the buried cavity 22. In fact, the product between the deposition temperature of the layer 24 (about 350°C) and the working pressure in the reaction chamber (about 1.5 Torr) allows to have a low pressure inside the cavity 22 once the layer 24 has cooled.

[0046] Then, with reference to Figure 14 , conductive pads 28, 29 are formed to allow the biasing from the outside of the sensing electrode of the pressure sensor thus manufactured. The conductive pad 28 is electrically coupled to the sealing layer 24, while the other conductive pad 29 is electrically coupled to the structural layer 4, on the side of the buried cavity 22. The pads 28, 29 are formed by depositing a conductive material (for example a metal, such as aluminum) and patterning it to achieve the desired extension of the pads.

[0047] In one embodiment, in order to bring the conductive pad 29 into contact with the structural layer 4, a step of selectively removing the layers 25, 24, 20, 16, 15 and possibly the layer 8 (if present in the area where the pad 29 is desired to be formed) is performed.

[0048] In order to protect the layers exposed through the opening thus formed, one or more layers 25, previously described, can be formed after the formation of such opening (and therefore also of the one or more layers 25 deposited within the opening) and before the formation of the pad 29.

[0049] Alternatively, the conductive pad 29 can be in electrical contact with the structural layer 4 through a conductive path extending between the structural layer 4 and the conductive pad 29.

[0050] The MEMS device 30, in particular a capacitive pressure sensor, even more in particular an absolute pressure sensor, is thus formed, configured to sense a pressure variation with respect to the pressure value (fixed value, as mentioned above, set during the manufacturing step) present inside the buried cavity 22, external to the sensor.

[0051] The pressure sensor 30 is provided with a support (the substrate 2 plus the layer 3) on which extends a first electrode (layer 4) of a capacitor for capacitive sensing. The first electrode faces the buried cavity 22 (with the interposed layer 5, in particular). A second electrode (layer 20 plus layer 24) extends above the buried cavity 22, opposite the first electrode 4. The first and second electrodes thus face each other through the buried cavity 22. The second electrode is a membrane configured to deflect along the Z axis. Changes in pressure in the environment outside the pressure sensor 30 cause deflection of the second electrode and consequent changes in the capacitance of the capacitor formed thereby, which is sensed by the conductive pads 28, 29 and processed by the circuitry.

[0052] According to different further embodiments Figure 15A ), the MEMS device is a differential capacitive pressure sensor 30', configured to provide a signal identifying the difference between two ambient pressures to which the same sensor is subjected. The pressure sensor 30' is manufactured according to the same steps previously described for the pressure sensor 30 Figures 1-14 ), with the difference that the cavity 22 must be connected to the outside in order to be able to operate the sensor 30' as a differential sensor. To this end, the cavity 22 is fluidically connected to the outside of the pressure sensor 30', for example through a suitably provided channel that allows the flow of air (or other gaseous fluid) to the cavity 22. The resulting deformation of the membrane (second electrode) is indicative of the difference between the first ambient pressure PI (outside the cavity 22) and the second ambient pressure P2 (inside the cavity 22), and the signal converted by the differential pressure sensor 30' is a differential pressure signal.

[0053] Reference is made to Figure 15BThe differential pressure sensor 30' is provided with a package 32 (common elements of the pressure sensor 30' with the pressure sensor 30 are identified with the same reference numerals). The package 32 comprises an inner housing 33 in which the differential pressure sensor 30' is housed or arranged. The package 32 has a first through opening 32a configured to put the membrane (second electrode) of the differential pressure sensor 30' in fluid communication with the environment outside the package 32 and to form an access channel to the membrane (and not to the cavity 22) for the pressure PI. The package 32 also has a second through opening 32b configured to put the cavity 22 in fluid communication with the environment outside the package 32 and to form an access channel to the cavity 22 (and not to the membrane) for the pressure P2. The first and second through openings 32a, 32b are thus formed and connected to the pressure sensor 30' so that, inside the package 32, the pressures PI and P2 remain separated in order to allow the correct operation of the pressure sensor in differential mode. In other words, the pressure sensor 30' is mounted in the package 32 so that the access channel to the cavity 22 is connected to the second through opening 32b by suitable fluid sealing (water-tight) means or systems to prevent the fluid connection of the second through opening 32b with the other areas of the inner cavity of the package 32.

[0054] The differential pressure sensor 30' is thus suitable to be mounted in a system / assembly in which the first through opening 32a is in communication with a first environment at the ambient pressure PI and the second through opening 32b is in communication with a second environment having the ambient pressure P2. The first through opening 32a thus forms a passage for the pressure PI that acts on the first side of the membrane (e.g. the outside of the cavity 22) to deform it. The second through opening 32b forms a corresponding passage for the pressure P2 that acts on the second side of the membrane opposite the first side (e.g. the inside of the cavity 22) to generate a force that deforms the membrane opposite the force generated by the pressure PI. The resulting deformation of the membrane represents the difference between the pressures PI and P2 and the signal converted by the differential pressure sensor 30' is a differential pressure signal.

[0055] The patent documents US 7,763,487 and US 8,008,738 describe packages that can be used in the context of the present disclosure to package the differential pressure sensor 30'.

[0056] Figure 16 Another embodiment of a MEMS device according to the present disclosure is shown, which is suitable for both the pressure sensor 30 and the pressure sensor 30'. Figure 16 The MEMS device shown comprises all the elements and technical features previously described in the respective embodiments.

[0057] Figure 16The MEMS device also comprises, below the first electrode (i.e. below layer 4), a further buried cavity or chamber 42 extending into the substrate 2. For example, this buried cavity 42 extends from the bottom of the cavity 22 by a distance di (measured along the axis Z) comprised between 20 pm and 60 pm. In this way, the portion of the wafer 1 above the buried cavity 42 forms a further membrane that can be deflected to release any residual stress generated during the manufacturing process, or that can occur during the use of the MEMS device 30, 30', thus preventing any structural problems, such as breakage, cracking, deformation.

[0058] For example, the buried cavity 42 can be formed according to the formation process of the buried cavity described in US 7,763,487 and US 8,008,738.

[0059] According to another embodiment of the present disclosure, as Figure 17 shown, both the MEMS device 30 and the MEMS device 30' comprise a respective anti-sticking layer 50 inside the buried cavity 22 and / or the buried cavity 42, if any. For the sake of simplicity of description and illustration, Figure 17 the buried cavity 42 is not shown, however, as mentioned above, what has been described applies also in the case where this buried cavity 42 is present.

[0060] The anti-sticking layer 50 can completely or partially cover the inner walls of the cavity 22 (and / or of the cavity 42).

[0061] The material of the anti-sticking layer 50 is selected to limit or prevent partial obstruction of the cavity 22 (and / or of the cavity 42) due to potential mutual sticking of the walls upwardly and downwardly delimiting the cavity 22 (and / or of the cavity 42). This undesired effect would cause the second electrode to not move correctly and cause malfunctioning of the MEMS device 30 / 30'.

[0062] To this end, the anti-sticking layer 50 can be introduced into the cavity 22 through a suitable opening that puts the cavity 22 in communication with the environment where the deposition of the anti-sticking layer 50 takes place. In the case of the absolute pressure sensor 30, this opening can be closed later, or in the case of the differential pressure sensor 30', this opening can be the opening for putting the cavity 22 in fluid communication with the external environment, thus remaining fluid accessible.

[0063] The deposition of the anti-sticking layer 50 can be carried out by a gas phase process.

[0064] Materials that can be used for the anti-sticking layer 50 include, but are not limited to, chlorosilanes, trichlorosilane, dichlorosilane, siloxanes or combinations thereof, etc., for example:

[0065] DDMS - "dimethyl dichlorosilane";

[0066] FOTS - "Perfluorooctyltrichlorosilane";

[0067] PF10TAS - "Perfluorodecyltris(dimethylamino)silane";

[0068] PFDA - "Perfluorodecanoic acid"; or

[0069] combinations thereof.

[0070] Available materials and their deposition processes can be found, for example, in "Vapor phase anti-stiction coatings for MEMS" by Ashurst, W. & Carraro, C. & Maboudian, Roya. (2004) Device and Materials Reliability, IEEE Transactions on. 3. 173-178. 10.1109 / TDMR.2003.821540.

[0071] According to various embodiments, the above manufacturing method and device have many advantages.

[0072] Thanks to the monolithic structure of the film, substantially free from empty spaces, the film is solid and therefore particularly suitable for providing different types of MEMS structures, thus reducing the risk of breakage, deformation or damage that would compromise their functionality.

[0073] The process is easy to perform, since it does not have any particular critical or execution difficulties, thus ensuring high productivity and reducing the final cost. It should also be noted that the manufacturing method uses a single wafer of semiconductor material, thus being economically advantageous and reducing the criticality since there are no gluing or bonding steps between wafers.

[0074] Furthermore, the manufacturing method is particularly flexible, since it allows to provide buried cavities and / or films with desired shape and dimensions in terms of area and thickness in a simple way. In particular, for applications as pressure sensors, films with high thickness can be obtained, to increase the accuracy of the same sensor.

[0075] The use of porous silicon can ensure to obtain films with regular shape and prevent unwanted formations that would compromise or in any case reduce the electrical / mechanical characteristics of the finished MEMS device.

[0076] The simultaneous presence of the two crystalline alumina layers prevents short circuits between the top and bottom electrodes of the capacitor and allows to define a film diameter that is independent of the etching time during the manufacturing steps.

[0077] Moreover, thanks to the use of two layers of crystalline alumina, the dimensions of the membrane can be precisely defined without the need to use timed etching. In fact, the crystalline alumina acts as a hard mask for the subsequent HF etching aimed at removing the oxide layer underneath the membrane.

[0078] The use of a polysilicon layer permeable to HF enables the formation of a porous mesh that allows the penetration and etching of the oxide by HF. The permeable polysilicon also acts as a support for the top layer.

[0079] The use of an amorphous silicon layer 24 (deposited by PECVD) also allows to define the desired pressure in the buried cavity 22, thanks to its fast closing of the porous polysilicon layer. In fact, the product between the deposition temperature (about 350°C) and the working pressure in the reaction chamber (about 1.5 Torr) allows to have a high vacuum inside the cavity 22 once the amorphous silicon layer 24 has cooled. Moreover, by using amorphous silicon and performing a PECVD deposition, the volume of the cavity 22 is not reduced by unwanted or waste products.

[0080] Finally, it is clear that modifications and changes can be made to the methods and the devices described and illustrated herein, without thereby departing from the scope of the present disclosure.

[0081] The teachings of the present disclosure can be used to provide different types of MEMS devices with respect to those described, such as accelerometers, gyroscopes, resonators, valves, jet print heads, etc., in which case the structures underneath and / or above the membrane are adjusted according to the intended application. In any case, the dimensions, shape and number of the channels are optimized according to the application and the MEMS device is completed with the structures and elements for its operability.

[0082] If it is necessary to integrate electronic components in the same wafer 1, this can be performed using the substrate 2 or a further epitaxial layer formed above the sealing layer 24.

[0083] A method for manufacturing a microelectromechanical device (30; 30') can be summarized as comprising the steps of: forming a first protective layer (5) of a material that is impermeable to an etching chemical solution on a substrate (2); forming a sacrificial layer (8, 8') of a material that is removable by the etching chemical solution on the first protective layer (5); forming a second protective layer (15) of a material that is impermeable to the etching chemical solution on the sacrificial layer (8, 8'); selectively removing a portion of the second protective layer (15) to expose a corresponding sacrificial portion (8') of the sacrificial layer (8, 8'); forming a first membrane layer (20) of a porous material on the sacrificial portion (8'), the first membrane layer (20) being permeable to the etching chemical solution; removing the sacrificial portion (8') through the first membrane layer (20) using the etching chemical solution to form a cavity (22); and sealing the porosity of the first membrane layer (20) by forming a second membrane layer (24) on the first membrane layer (20).

[0084] The etching chemical solution can comprise hydrofluoric acid HF, and the first protective layer (5) and the second protective layer (15) can comprise crystalline aluminum oxide.

[0085] The first membrane layer (20) can be porous silicon or silicon having a plurality of through-holes or porosities.

[0086] Forming the second membrane layer (24) can comprise depositing doped amorphous silicon by a PECVD technique.

[0087] The method can further comprise the step of forming an electrically conductive layer (4) on the substrate (2), wherein the step of forming the first protective layer (5) can comprise forming the first protective layer (5) over the electrically conductive layer (4), the electrically conductive layer (4) and the second membrane layer (24) being capacitively coupled to each other through the cavity (22).

[0088] The electrically conductive layer (4) can be doped polysilicon.

[0089] The method can further comprise the step of forming a buried cavity (42) in the substrate (2), the buried cavity (42) being below the cavity (22) and at least partially aligned with the cavity (22).

[0090] The method can further comprise the step of fluidly connecting the cavity (22) through the through-opening with an environment external to the microelectromechanical device (30; 30').

[0091] The method can further comprise the step of covering the cavity (22) internally by an anti-stiction layer, a chemical comprising a chlorosilane, a trichlorosilane, a dichlorosilane, a siloxane flowing through the through-opening.

[0092] The method can further comprise the steps of arranging the above-mentioned microelectromechanical device (30; 30') within a package (32) having an inner housing and provided with a first access channel (32a; 32b) and a second access channel (32b; 32a) towards the above-mentioned inner housing; and coupling the above-mentioned one of the first and second access channels (32a; 32b) to the through-opening by means of a fluid sealing device or system configured to prevent a fluid connection between the above-mentioned inner housing of the package (32) and the above-mentioned cavity (22).

[0093] The above-mentioned microelectromechanical device (30; 30') can be a capacitive pressure sensor.

[0094] A microelectromechanical device (30; 30') can be summarized as comprising: a substrate (2); a first protective layer (5) of a material that is not permeable to an etching chemical solution extending over the substrate (2); a sacrificial layer (8, 8') of a material that can be removed by the above-mentioned etching chemical solution extending over the first protective layer (5); a second protective layer (15) of a material that is not permeable to the above-mentioned etching chemical solution extending over the sacrificial layer (8, 8'); a first membrane layer (20) of a porous material that is permeable to the above-mentioned etching chemical solution; a cavity (22) extending between the first membrane layer (20) and the first protective layer (5); and a second membrane layer (24) on the first membrane layer (20) configured to seal pores of the first membrane layer (20).

[0095] The above-mentioned etching chemical solution can comprise hydrofluoric acid HF, and the above-mentioned first and second protective layers (5, 15) can comprise crystalline aluminum oxide.

[0096] The first membrane layer (20) can be porous silicon or silicon having a plurality of through-holes or pores.

[0097] The second membrane layer (24) can be doped amorphous silicon.

[0098] The device can further comprise an electrically conductive layer (4) on the substrate (2), wherein the first protective layer (5) extends over the electrically conductive layer (4), and wherein the above-mentioned electrically conductive layer (4) and the above-mentioned second membrane layer (24) can be capacitively coupled to each other through the cavity (22).

[0099] The electrically conductive layer (4) can be doped polysilicon.

[0100] The device can further comprise a buried cavity (42) in the substrate (2) below the cavity (22) and at least partially aligned with the cavity (22).

[0101] The device can further comprise a through-opening fluidly connecting the cavity (22) with an environment outside the above-mentioned microelectromechanical device (30; 30').

[0102] The device can also comprise an anti-adhesion layer inside the cavity (22), the anti-adhesion layer comprising a material selected from chlorosilane, trichlorosilane, dichlorosilane, siloxane.

[0103] The device can also comprise a package (32) having an internal housing and provided with a first access channel (32a; 32b) and a second access channel (32b; 32a) towards the internal housing, wherein one of the first and second access channels (32a; 32b) can be coupled to the through opening by means of a fluid sealing device or system configured to prevent a fluid connection between the internal housing of the package (32) and the cavity (22) described above.

[0104] The microelectromechanical device (30; 30') described above can be a capacitive pressure sensor.

[0105] The various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the above detailed description. In general, in the following claims, the used terms are not intended to be limited to the specific embodiments described herein, but can include all possible embodiments, and the scope of the claims shall include all reasonable interpretations of the claims. Thus, the claims are not limited to the embodiments disclosed in the disclosure.

Claims

1. A method for fabricating a microelectromechanical device, the method comprising: forming a first protective layer on a substrate that is impermeable to an etching chemical solution; forming a sacrificial layer of material on the first protective layer that is configured to be removed by the etching chemical solution; forming a second protective layer on the sacrificial layer that is impermeable to the etching chemical solution; exposing a sacrificial portion of the sacrificial layer by selectively removing a portion of the second protective layer; forming a first film layer of porous material on the sacrificial portion, the first film layer permeable to the etching chemical solution; forming a cavity by removing the sacrificial portion through the first film layer using the etching chemical solution; and sealing porosities of the first film layer by forming a second film layer on the first film layer.

2. The method of claim 1, wherein the etching chemical solution comprises hydrofluoric acid (HF), and the first protective layer and the second protective layer comprise crystalline aluminum oxide.

3. The method of claim 1, wherein the first film layer comprises porous silicon or silicon with a plurality of through-holes.

4. The method of claim 1, wherein forming the second film layer comprises depositing doped amorphous silicon by a plasma-enhanced chemical vapor deposition (PECVD) technique.

5. The method of claim 1, further comprising: forming a conductive layer on the substrate, wherein forming the first protective layer comprises forming the first protective layer on the conductive layer, and the conductive layer and the second film layer are capacitively coupled to each other.

6. The method of claim 5, wherein the conductive layer comprises doped polysilicon.

7. The method of claim 1, further comprising: forming a buried cavity in the substrate, the buried cavity being below the cavity and at least partially aligned with the cavity.

8. The method of claim 1, further comprising: a step of fluidly connecting the cavity with an environment external to the microelectromechanical device through a through-opening.

9. The method of claim 8, further comprising: interiorly covering the cavity with an anti-stiction layer by flowing a chemical comprising chlorosilane, trichlorosilane, dichlorosilane, siloxane, or a combination thereof through the through-opening.

10. The method of claim 8, further comprising: arranging the microelectromechanical device within a package, the package comprising an interior housing, a first access passage, and a second access passage; and fluidly coupling one of the first access passage or the second access passage to the through-opening without a fluid connection between the interior housing of the package and the cavity.

11. The method of claim 1, wherein the microelectromechanical device is a capacitive pressure sensor.

12. A microelectromechanical device comprising: a substrate; a first protective layer on the substrate that is impermeable to an etching chemical solution; a sacrificial layer of material on the first protective layer that is capable of being removed by the etching chemical solution; a second protective layer on the sacrificial layer that is impermeable to the etching chemical solution; a first film layer of porous material that is permeable to the etching chemical solution; ​ ​ a cavity between the first membrane layer and the first protective layer; and a second membrane layer on the first membrane layer configured to seal pores of the first membrane layer.

13. The device of claim 12, wherein the etch chemistry solution comprises hydrofluoric acid (HF), and the first protective layer and the second protective layer comprise crystalline aluminum oxide.

14. The device of claim 12, wherein the first membrane layer comprises porous silicon or silicon with a plurality of through-holes.

15. The device of claim 12, wherein the second membrane layer comprises doped amorphous silicon.

16. The device of claim 12, further comprising: a conductive layer on the substrate, wherein the first protective layer is on the conductive layer, and the conductive layer and the second membrane layer are capacitively coupled to each other.

17. The device of claim 16, wherein the conductive layer comprises doped polysilicon.

18. The device of claim 12, further comprising: a buried cavity in the substrate below and at least partially aligned with the cavity.

19. The device of claim 12, further comprising: a through-opening fluidically connecting between the cavity and an environment external to the microelectromechanical device.

20. The device of claim 19, further comprising: an anti-stiction layer internally covering the cavity, the anti-stiction layer comprising a material selected from a group of materials comprising chlorosilane, trichlorosilane, dichlorosilane, and siloxane.

21. The device of claim 19, further comprising: an encapsulation comprising an internal housing, a first access channel, and a second access channel, wherein one of the first access channel or the second access channel is fluidically coupled to the through-opening without a fluidic connection between the internal housing of the encapsulation and the cavity.

22. The device of claim 12, wherein the microelectromechanical device is a capacitive pressure sensor.

23. A method comprising: forming an insulating layer on a substrate; forming a first structural layer on the insulating layer; forming a first etch stop layer on the first structural layer; forming a sacrificial layer on the first etch stop layer, the sacrificial layer comprising a trench defining a portion of the sacrificial layer; forming a second etch stop layer on the sacrificial layer and in the trench, the second etch stop layer comprising an opening aligned with the portion of the sacrificial layer; forming a second structural layer on the second etch stop layer and in the opening, the second structural layer comprising a plurality of openings aligned with the portion of the sacrificial layer; forming a permeable layer on the second structural layer; and forming a cavity by removing the portion of the sacrificial layer.

24. The method of claim 23, further comprising: forming a sealing layer on the permeable layer.

25. The method of claim 23, further comprising: fluidically coupling the cavity to an ambient environment by forming a channel extending through the second etch stop layer, the second structural layer, the permeable layer.

26. The method of claim 23, further comprising: ​ An anti-sticking layer is formed on the walls of the chamber.

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