A signal processing circuit for high-precision leakage protector

Abstract

The application relates to the technical field of electronic circuits, in particular to a signal processing circuit for a high-precision leakage protector. The signal processing circuit comprises a switched capacitor full-differential amplifier unit, a voltage effective value sampling and holding unit, a zero-crossing comparator unit, a double-end to single-end amplifier unit, an overcurrent threshold comparator unit and a current source charging and discharging circuit unit. The direct current deviation caused by the full-differential amplifier can be filtered out through the switched capacitor in the application, so that the amplification precision of the signal can be effectively improved, the detection deviation can be reduced, the error of the leakage current detection can be reduced, the working temperature range of the circuit can be widened, the problem that the leakage current detection value fluctuates greatly with temperature can be solved, the circuit works more stably, meanwhile, the switched capacitor can effectively avoid high-frequency interference signals outside the switching frequency, and the electromagnetic compatibility of the circuit is improved.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and more specifically to a signal processing circuit for a high-precision leakage current protector. Background Technology

[0002] With the rapid development of my country's economic construction, the power grid structure is becoming increasingly complex, and people's requirements for the safety and reliability of electricity use are also increasing. In order to prevent electrical fires and protect people's lives and property, residual current devices (RCDs) are often installed at the output end of the power grid or at the input end of the load. Once a leakage occurs at the output end of the power grid, the RCD will disconnect the switch coupled between the input and output ends of the power grid, thereby cutting off the power to the load and ensuring electrical safety.

[0003] The internal components of a residual current device (RCD) are as follows: Figure 1 As shown, the system includes a magnetic ring 1 for detecting the current difference between the live and neutral wires, an electromagnet 2 and a thyristor 3 for controlling the on / off state of the load 4, and a leakage current protection circuit. The input to the leakage current protection circuit is the voltage difference generated on the magnetic ring 1 due to the current difference between the neutral and live wires. When leakage occurs, if the voltage difference generated by the leakage current exceeds a set voltage difference value, the TRIG terminal of the leakage current protection circuit outputs a signal to control the thyristor 3 to disconnect the load 4, thus achieving leakage current protection. The leakage current detected by the leakage current protector is in the milliampere range, and the voltage difference generated on the magnetic ring 1 is also only in the millivolt range. The leakage current protection circuit controls the thyristor 3 to disconnect the load 4 based on this voltage difference, outputting a signal from the TRIG terminal.

[0004] The leakage current protection circuit in the prior art uses, for example Figure 2 The diagram shows a bipolar leakage current protection circuit. However, the characteristics of the two transistors in a bipolar leakage current protection circuit are not exactly the same, resulting in a DC process deviation. This deviation is significantly affected by temperature. Therefore, even if there is no voltage difference across the collector ring 1, the two transistors in the bipolar leakage current protection circuit may still have a small differential output voltage. This voltage is amplified in subsequent stages and may deteriorate due to further mismatches, leading to detection errors in the bipolar leakage current protection circuit and falsely triggering the thyristor 3 to disconnect the load 4. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a signal processing circuit for a high-precision leakage current protector, which can eliminate DC deviation, reduce leakage current detection error, widen the operating temperature range of the circuit, and make the circuit work more stably.

[0006] The technical solution of the present invention to solve the above-mentioned technical problems is as follows: a signal processing circuit for a high-precision leakage current protector, including a differential signal first input terminal and a differential signal second input terminal for input differential signals, and further including a switched capacitor fully differential amplifier unit, a voltage effective value sampling and holding unit, a zero-crossing comparator unit, a dual-ended to single-ended amplifier unit, an overcurrent threshold comparator unit, and a current source charging and discharging circuit unit;

[0007] The switched capacitor fully differential amplifier unit is constructed from a switched capacitor and a fully differential amplifier. It is used to receive the differential signal through the first differential signal input terminal and the second differential signal input terminal, and to differentially amplify the received differential signal to obtain a differential amplified signal and output it.

[0008] The zero-crossing comparator unit is used to receive the differential amplified signal, compare the differential amplified signal, obtain the zero-crossing signal of the differential amplified signal, and output it.

[0009] The voltage RMS sampling and holding unit is used to receive the differential amplified signal and the zero-crossing signal, and to sample the differential voltage RMS of the differential amplified signal under the control of the zero-crossing signal to obtain and output the differential voltage RMS signal;

[0010] The dual-ended to single-ended amplifier unit is used to receive the differential voltage RMS signal, and to amplify the differential voltage RMS signal by converting it from dual-ended to single-ended, thereby obtaining an amplified voltage RMS signal and outputting it.

[0011] The overcurrent threshold comparator unit is used to receive the voltage RMS amplified signal and the preset overcurrent threshold voltage signal, and compare the voltage RMS amplified signal with the overcurrent threshold voltage signal to obtain a comparison signal and output it.

[0012] The current source charging and discharging circuit unit is used to receive the comparison signal and the overcurrent threshold voltage signal, and form a charging and discharging circuit based on the current source under the control of the comparison signal. The charging and discharging signal of the charging and discharging circuit is compared with the overcurrent threshold voltage signal to obtain a leakage protection control signal.

[0013] Based on the above technical solution, the present invention can be further improved as follows.

[0014] Furthermore, the switched capacitor fully differential amplifier unit includes a differential amplifier, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first linkage switch, a second linkage switch, a third linkage switch, a fourth linkage switch, a fifth linkage switch, and a sixth linkage switch;

[0015] The first capacitor and the first linkage switch are connected in series between the first input terminal of the differential signal and the positive input terminal of the differential amplifier; the second capacitor and the second linkage switch are connected in series between the second input terminal of the differential signal and the inverting input terminal of the differential amplifier; the third capacitor and the third linkage switch are connected in series between the positive input terminal and the inverting output terminal of the differential amplifier; the fourth capacitor and the fourth linkage switch are connected in series between the inverting input terminal and the positive output terminal of the differential amplifier; the two ends of the fifth linkage switch are connected between the positive input terminal and the inverting output terminal of the differential amplifier; the two ends of the sixth linkage switch are connected between the inverting input terminal and the positive output terminal of the differential amplifier, and the positive output terminal and the inverting output terminal of the differential amplifier are used to output the differential amplified signal.

[0016] Furthermore, the opening and closing of the first linkage switch, the second linkage switch, the third linkage switch, the fourth linkage switch, the fifth linkage switch, and the sixth linkage switch are all controlled by a high-frequency square wave signal;

[0017] When the high-frequency square wave signal is high, the first linkage switch, the second linkage switch, the fifth linkage switch, and the sixth linkage switch are all closed, and the third linkage switch and the fourth linkage switch are all open; when the high-frequency square wave signal is low, the first linkage switch, the second linkage switch, the fifth linkage switch, and the sixth linkage switch are all open, and the third linkage switch and the fourth linkage switch are all closed.

[0018] Alternatively, when the high-frequency square wave signal is low, the first linkage switch, the second linkage switch, the fifth linkage switch, and the sixth linkage switch are all closed, and the third linkage switch and the fourth linkage switch are all open; when the high-frequency square wave signal is high, the first linkage switch, the second linkage switch, the fifth linkage switch, and the sixth linkage switch are all open, and the third linkage switch and the fourth linkage switch are all closed.

[0019] Furthermore, the zero-crossing comparator unit has two input terminals and one output terminal, wherein the two output terminals are a positive input terminal and an inverting input terminal, respectively; the positive input terminal of the zero-crossing comparator unit is connected to the inverting output terminal of the differential amplifier, the inverting input terminal of the zero-crossing comparator unit is connected to the positive output terminal of the differential amplifier, and the output terminal of the zero-crossing comparator unit is used to output the zero-crossing signal;

[0020] Specifically, the zero-crossing signals include a first zero-crossing signal and a second zero-crossing signal with opposite levels; when the first voltage signal output from the inverting output terminal of the differential amplifier is greater than the second voltage signal output from the inverting output terminal of the differential amplifier, the output terminal of the zero-crossing comparator unit is used to output the first zero-crossing signal; when the first voltage signal output from the inverting output terminal of the differential amplifier is less than the second voltage signal output from the inverting output terminal of the differential amplifier, the output terminal of the zero-crossing comparator unit is used to output the second zero-crossing signal.

[0021] The first voltage signal and the second voltage signal together constitute the differential amplified signal.

[0022] Furthermore, the voltage RMS sample-and-hold unit has three input terminals and two output terminals, wherein the three input terminals are a positive input terminal, an inverting input terminal, and a controlled terminal, and the two output terminals are a positive output terminal and an inverting output terminal; the positive input terminal of the voltage RMS sample-and-hold unit is connected to the inverting output terminal of the differential amplifier, the inverting input terminal of the voltage RMS sample-and-hold unit is connected to the positive output terminal of the differential amplifier, the controlled terminal of the voltage RMS sample-and-hold unit is connected to the output terminal of the zero-crossing comparator unit, and the positive and inverting output terminals of the voltage RMS sample-and-hold unit are used to output the differential voltage RMS signal;

[0023] The voltage RMS sampling and holding unit is specifically used to: when the incoming zero-crossing signal is the first zero-crossing signal, directly sample the differential voltage RMS of the differential amplified signal; when the incoming zero-crossing signal is the second zero-crossing signal, flip the differential amplified signal and sample the differential voltage RMS.

[0024] Furthermore, the dual-ended to single-ended amplifier unit has two input terminals and one output terminal, wherein the two input terminals are a positive input terminal and an inverting input terminal, respectively; the positive input terminal of the dual-ended to single-ended amplifier unit is connected to the positive output terminal of the voltage RMS sample and hold unit, the inverting input terminal of the dual-ended to single-ended amplifier unit is connected to the inverting output terminal of the voltage RMS sample and hold unit, and the output terminal of the dual-ended to single-ended amplifier unit is used to output the voltage RMS amplified signal.

[0025] Furthermore, the overcurrent threshold comparator unit has two input terminals and one output terminal, wherein the two input terminals are a positive input terminal and an inverting input terminal, respectively; the positive input terminal of the overcurrent threshold comparator unit is used to receive the overcurrent threshold voltage signal, the inverting input terminal of the overcurrent threshold comparator unit is connected to the output terminal of the dual-ended to single-ended amplifier unit, the output terminal of the overcurrent threshold comparator unit is connected to the input terminal of the current source charging and discharging circuit unit, and the output terminal of the overcurrent threshold comparator unit is used to output the comparison signal;

[0026] Specifically, when the amplified signal of the effective voltage value is greater than the overcurrent threshold voltage signal, the comparison signal output by the output terminal of the overcurrent threshold comparator unit is high; when the amplified signal of the effective voltage value is less than the overcurrent threshold voltage signal, the comparison signal output by the output terminal of the overcurrent threshold comparator unit is low.

[0027] Furthermore, the current source charging and discharging circuit unit includes a current source, a comparator, a first resistor, a second resistor, a fifth capacitor, a seventh linkage switch, and an eighth linkage switch; the opening and closing of the seventh linkage switch and the eighth linkage switch are controlled by the comparison signal output by the overcurrent threshold comparator unit; one end of the first resistor is grounded through the seventh linkage switch, the other end of the first resistor is connected to the output terminal of the current source through the eighth linkage switch, the other end of the first resistor is also connected to the inverting input terminal of the comparator through the second resistor, the inverting input terminal of the comparator is also grounded through the fifth capacitor, the positive input terminal of the comparator is used to receive the overcurrent threshold voltage signal, and the output terminal of the comparator outputs the leakage protection control signal.

[0028] Furthermore, when the amplified signal of the effective voltage value is greater than the overcurrent threshold voltage signal, the comparison signal output by the overcurrent threshold comparator unit is high; when the amplified signal of the effective voltage value is less than the overcurrent threshold voltage signal, the comparison signal output by the overcurrent threshold comparator unit is low.

[0029] When the comparison signal is high, the seventh linkage switch is open and the eighth linkage switch is closed, then the second resistor and the fifth capacitor form a charging circuit, and the current source charges the fifth capacitor through the second resistor;

[0030] When the comparison signal is low, the seventh linkage switch is closed and the eighth linkage switch is open. Then, the first resistor, the second resistor, and the fifth capacitor form a discharge circuit, and the fifth capacitor discharges to the outside through the first resistor and the second resistor.

[0031] Furthermore, the voltage signal at the non-grounded terminal of the fifth capacitor changes as the fifth capacitor is charged or discharged;

[0032] When the voltage signal at the non-grounded terminal of the fifth capacitor is greater than the overcurrent threshold voltage signal, the leakage protection control signal output by the comparator is at a high level.

[0033] When the voltage signal at the ungrounded terminal of the fifth capacitor is less than the overcurrent threshold voltage signal, the leakage protection control signal output by the comparator is low.

[0034] The beneficial effects of this invention are as follows: the switched capacitor in this invention can filter out the DC deviation caused by the fully differential amplifier, thereby effectively improving the signal amplification accuracy, reducing detection deviation, reducing leakage current detection error, widening the circuit's operating temperature range, solving the problem of large fluctuations in leakage current detection value with temperature, and making the circuit work more stably; at the same time, the switched capacitor can effectively avoid high-frequency interference signals outside the switching frequency, improving the electromagnetic compatibility performance of the circuit. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of the structural principle of a residual current device (RCD) in the prior art.

[0036] Figure 2 This is a circuit diagram of a bipolar leakage current protection circuit in the prior art;

[0037] Figure 3 This is a structural block diagram of a signal processing circuit for a high-precision leakage current protector according to the present invention;

[0038] Figure 4 This is a circuit diagram of a signal processing circuit for a high-precision leakage current protector according to the present invention.

[0039] Figure 5 This is a timing diagram of a high-frequency square wave signal;

[0040] Figure 6 This is a schematic diagram of one operating state of a switched-capacitor fully differential amplifier unit;

[0041] Figure 7 This is a schematic diagram of another operating state of the switched capacitor fully differential amplifier unit;

[0042] Figure 8 The circuit diagram of the current source charging and discharging circuit unit;

[0043] Figure 9 This is a timing diagram of the signals at each node in a signal processing circuit for a high-precision leakage current protector according to the present invention. Detailed Implementation

[0044] The principles and features of the present invention are described below with reference to the accompanying drawings. The examples given are only for explaining the present invention and are not intended to limit the scope of the present invention.

[0045] like Figure 3 As shown, a signal processing circuit for a high-precision leakage current protector includes a differential signal first input terminal IN1 and a differential signal second input terminal IN2 for input differential signals, and also includes a switched capacitor fully differential amplifier unit 101, a voltage RMS value sampling and holding unit 102, a zero-crossing comparator unit 103, a dual-ended to single-ended amplifier unit 104, an overcurrent threshold comparator unit 105, and a current source charging and discharging circuit unit 106.

[0046] The switched capacitor fully differential amplifier unit 101 is constructed from a switched capacitor and a fully differential amplifier A1. It is used to receive the differential signal through the first differential signal input terminal IN1 and the second differential signal input terminal IN2, and to differentially amplify the received differential signal to obtain a differential amplified signal and output it.

[0047] The zero-crossing comparator unit 103 is used to receive the differential amplified signal, compare the differential amplified signal, obtain the zero-crossing signal of the differential amplified signal, and output it.

[0048] The voltage RMS sampling and holding unit 102 is used to receive the differential amplified signal and the zero-crossing signal, and to sample the differential voltage RMS of the differential amplified signal under the control of the zero-crossing signal to obtain and output the differential voltage RMS signal;

[0049] The dual-ended to single-ended amplifier unit 104 is used to receive the differential voltage RMS signal, and to amplify the differential voltage RMS signal by converting it from dual-ended to single-ended, thereby obtaining an amplified voltage RMS signal and outputting it.

[0050] The overcurrent threshold comparator unit 105 is used to receive the voltage RMS amplified signal and the preset overcurrent threshold voltage signal, and compare the voltage RMS amplified signal with the overcurrent threshold voltage signal to obtain a comparison signal and output it.

[0051] The current source charging and discharging circuit unit 106 is used to receive the comparison signal and the overcurrent threshold voltage signal, and to form a current source-based charging and discharging circuit 1061 under the control of the comparison signal. The charging and discharging signal of the charging and discharging circuit 1061 is compared with the overcurrent threshold voltage signal to obtain a leakage protection control signal.

[0052] This invention employs a fully differential amplifier based on switched capacitors to differentially amplify the input differential signal. The switched capacitors can filter out the DC deviation introduced by the differential amplifier, thereby effectively improving the signal amplification accuracy, reducing detection deviation, decreasing leakage current detection error, widening the circuit's operating temperature range, solving the problem of large fluctuations in leakage current detection values ​​with temperature, and making the circuit more stable. At the same time, the switched capacitors can effectively avoid high-frequency interference signals outside the switching frequency, improving the circuit's electromagnetic compatibility performance.

[0053] In this specific embodiment: as Figure 4 As shown, the switched capacitor fully differential amplifier unit 101 includes a differential amplifier A1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a first linkage switch S1, a second linkage switch S2, a third linkage switch S3, a fourth linkage switch S4, a fifth linkage switch S5, and a sixth linkage switch S6.

[0054] The first capacitor C1 and the first linkage switch S1 are connected in series between the first differential signal input terminal IN1 and the positive input terminal of the differential amplifier A1; the second capacitor C2 and the second linkage switch S2 are connected in series between the second differential signal input terminal IN2 and the inverting input terminal of the differential amplifier A1; the third capacitor C3 and the third linkage switch S3 are connected in series between the positive input terminal and the inverting output terminal of the differential amplifier A1; the fourth capacitor C4 and the fourth linkage switch S4 are connected in series between the inverting input terminal and the positive output terminal of the differential amplifier A1; the two ends of the fifth linkage switch S5 are connected between the positive input terminal and the inverting output terminal of the differential amplifier A1; the two ends of the sixth linkage switch S6 are connected between the inverting input terminal and the positive output terminal of the differential amplifier A1. The positive and inverting output terminals of the differential amplifier A1 are used to output the differential amplified signal.

[0055] Specifically: the opening and closing of the first linkage switch S1, the second linkage switch S2, the third linkage switch S3, the fourth linkage switch S4, the fifth linkage switch S5, and the sixth linkage switch S6 are all controlled by a high-frequency square wave signal;

[0056] When the high-frequency square wave signal is high, the first linkage switch S1, the second linkage switch S2, the fifth linkage switch S5, and the sixth linkage switch S6 are all closed, and the third linkage switch S3 and the fourth linkage switch S4 are all open; when the high-frequency square wave signal is low, the first linkage switch S1, the second linkage switch S2, the fifth linkage switch S5, and the sixth linkage switch S6 are all open, and the third linkage switch S3 and the fourth linkage switch S4 are all closed.

[0057] Alternatively, when the high-frequency square wave signal is low, the first linkage switch S1, the second linkage switch S2, the fifth linkage switch S5, and the sixth linkage switch S6 are all closed, and the third linkage switch S3 and the fourth linkage switch S4 are all open; when the high-frequency square wave signal is high, the first linkage switch S1, the second linkage switch S2, the fifth linkage switch S5, and the sixth linkage switch S6 are all open, and the third linkage switch S3 and the fourth linkage switch S4 are all closed.

[0058] Figure 5 This is a timing diagram of a high-frequency square wave signal. The high-frequency square wave signal is used to control the opening and closing of the linkage switches in the switched capacitor fully differential amplifier unit 101, thereby changing the operating state of the circuit. A high level represents the linkage switch being closed, and a low level represents the linkage switch being open. Here, n1 represents the timing of controlling the first linkage switch S1, the second linkage switch S2, the fifth linkage switch S5, and the sixth linkage switch S6; n2 represents the timing of controlling the third linkage switch S3 and the fourth linkage switch S4.

[0059] When the first linkage switch S1, the second linkage switch S2, the fifth linkage switch S5, and the sixth linkage switch S6 are all closed, and the third linkage switch S3 and the fourth linkage switch S4 are all open, the switched capacitor fully differential amplifier unit 101 is in the T1 stage state, and its equivalent circuit is as follows: Figure 6 As shown.

[0060] When the first linkage switch S1, the second linkage switch S2, the fifth linkage switch S5, and the sixth linkage switch S6 are all open, and the third linkage switch S3 and the fourth linkage switch S4 are all closed, the switched capacitor fully differential amplifier unit 101 is in the T2 stage state, and its equivalent circuit is as follows: Figure 7 As shown.

[0061] The equivalent inputs of the two input terminals of the fully differential amplifier A1 are V in+ and V in- And V in+ =(V IN1 -V IN2 )2,V in+ =(V IN2 -V IN1 )2, the two output terminals output V respectively OUT+ and V OUT- Among them, V IN1 V is the input to the first access terminal IN1 of the differential signal. IN2This is the input to the second input terminal IN2 of the differential signal. Additionally, the offset voltage of the fully differential amplifier A1 is defined as V. os .

[0062] Based on the superposition principle, first analyze and calculate the output of the fully differential amplifier A1 when only IN1 is input and IN2 is grounded, then analyze and calculate the output of the fully differential amplifier when only IN2 is input and IN1 is grounded. The superposition of the two is the output of the fully differential amplifier A1.

[0063] When only IN1 is input, and the switched-capacitor fully differential amplifier unit 101 is in the T1 stage, the capacitance of the first capacitor C1 is defined as C1, and the voltage across the first capacitor C1 is V1 = V in+ -V os For a fully differential amplifier A1, a virtual short circuit is applied to both input terminals. The input current at the positive input terminal is 0. Therefore, the charge Q1 on the right plate of the first capacitor C1 is equal to C1(V). in+ -Vo s The capacitance of the third capacitor C3 is defined as C3, and the voltage across the third capacitor C3 is V3 = V. in+ -V os Then the charge on the left plate of the third capacitor C3 is Q3 = -C3V. os The total charge on the plates of the first capacitor C1 and the third capacitor C3 is Q = Q1 + Q3 = C1(V). in+ -V os )-C3V os .

[0064] When only IN1 is input, and the switched-capacitor fully differential amplifier unit 101 is in stage T2, the two input terminals of the fully differential amplifier A1 are virtually open, and the voltage at the positive input terminal is 0. Therefore, the charge Q1′ on the right plate of the first capacitor C1 is -C1V. os The charge Q′3 on the left plate of the third capacitor C3 is equal to C3(V). out1 -V os The total charge on the plates of the first capacitor C1 and the third capacitor C3 is Q′=Q′1+Q′3=C3(V) out1- -V os )-C1V os .

[0065] The right plate of the first capacitor C1 is connected to the left plate of the third capacitor C3. During the transition from stage T1 to stage T2, the two plates are in a floating state, so the total charge on the two plates remains unchanged, i.e., Q = Q′. Solving for this, the reverse output voltage V can be obtained. out1- =V in+ (C1 / C3), the input voltages at the two input terminals are equal in value but opposite in direction, then the voltage V at its positive output terminal is... out1+=-V in+ (C1 / C3).

[0066] When only IN2 is input and the switched-capacitor fully differential amplifier unit 101 is in stage T1, the capacitance of the second capacitor C2 is defined as C2, and the voltage across it is V2 = V in- If the two input terminals of the fully differential amplifier A1 are virtual shorted and the inverting input current is 0, then the charge on the right plate of the second capacitor C2 is Q2 = C2V. in- Define the capacitance of the fourth capacitor C4 as C4, and the voltage across the fourth capacitor C4 as V4 = 0. Then the charge on the left plate of the fourth capacitor C4 is Q4 = 0. The total charge on the plates of the second capacitor C2 and the fourth capacitor C4 is Q = Q. 2+ +Q4=C2V in- .

[0067] When only IN2 is input, and the switched capacitor fully differential amplifier unit 101 is in the T2 stage, the two input terminals of the fully differential amplifier A1 are virtually open, and the voltage at the positive input terminal is 0. Therefore, the charge Q′2 on the right plate of the second capacitor C2 is 0, and the charge Q′4 on the left plate of the fourth capacitor C4 is C4V. out2+ The total charge on the plates of the second capacitor C2 and the fourth capacitor C4 is Q′=Q′2+Q′4=C4V out2+ .

[0068] The right plate of the second capacitor C2 is connected to the left plate of the fourth capacitor C4. During the transition from stage T1 to stage T2, the two plates are in a floating state, so the total charge on the two plates remains unchanged, i.e., Q = Q′. Solving for Q′, we can obtain the positive output voltage V. out2+ =V in- (C2 / C4), the input voltages at the two input terminals are equal in value but opposite in direction, then the voltage at the reverse output terminal V out2- =-V in- (C2 / C4).

[0069] According to the superposition principle, the output of the positive terminal of the fully differential amplifier A1 is V. OUT+ =V out1+ +V out2+ =-V in+ (C1 / C3)+V in- (C2 / C4), its inverting output is V. OUT- =V out1- +V out2- =V in+ (C1 / C3)-V in- (C2 / C4).

[0070] The differential output of the fully differential amplifier A1 is V OUT =VOUT- -V OUT+ =2V in+ (C1 / C3)-2V in- (C2 / C4)=(V IN1 -V IN2 (C1 / C3+C2 / C4). It can be seen that during the amplification process, the offset voltage V... os This is canceled out, resolving the DC bias problem caused by the fully differential amplifier A1 and reducing the circuit's detection bias; simultaneously, the typical offset voltage V os The offset voltage V is significantly affected by temperature. After adding a switched capacitor to the fully differential amplifier A1, the offset voltage V... os This is offset, thus widening the operating temperature range of the leakage current protector and enhancing circuit stability.

[0071] In this specific embodiment: the zero-crossing comparator unit 103 has two input terminals and one output terminal, wherein the two output terminals are a positive input terminal and an inverting input terminal, respectively; the positive input terminal of the zero-crossing comparator unit 103 is connected to the inverting output terminal of the differential amplifier A1, the inverting input terminal of the zero-crossing comparator unit 103 is connected to the positive output terminal of the differential amplifier A1, and the output terminal of the zero-crossing comparator unit 103 is used to output the zero-crossing signal;

[0072] Specifically, the zero-crossing signals include a first zero-crossing signal and a second zero-crossing signal with opposite levels; when the first voltage signal output from the inverting output terminal of the differential amplifier A1 is greater than the second voltage signal output from the inverting output terminal of the differential amplifier A1, the output terminal of the zero-crossing comparator unit 103 is used to output the first zero-crossing signal; when the first voltage signal output from the inverting output terminal of the differential amplifier A1 is less than the second voltage signal output from the inverting output terminal of the differential amplifier A1, the output terminal of the zero-crossing comparator unit 103 is used to output the second zero-crossing signal.

[0073] The first voltage signal and the second voltage signal together constitute the differential amplified signal.

[0074] In this specific embodiment: the voltage RMS value sampling and holding unit 102 has three input terminals and two output terminals, wherein the three input terminals are a positive input terminal, an inverting input terminal, and a controlled terminal, and the two output terminals are a positive output terminal and an inverting output terminal; the positive input terminal of the voltage RMS value sampling and holding unit 102 is connected to the inverting output terminal of the differential amplifier A1, the inverting input terminal of the voltage RMS value sampling and holding unit 102 is connected to the positive output terminal of the differential amplifier A1, the controlled terminal of the voltage RMS value sampling and holding unit 102 is connected to the output terminal of the zero-crossing comparator unit 103, and the positive and inverting output terminals of the voltage RMS value sampling and holding unit 102 are used to output the differential voltage RMS value signal;

[0075] The voltage RMS sampling and holding unit 102 is specifically used to: when the incoming zero-crossing signal is the first zero-crossing signal, directly sample the differential voltage RMS of the differential amplified signal; when the incoming zero-crossing signal is the second zero-crossing signal, flip the differential amplified signal and sample the differential voltage RMS.

[0076] In this specific embodiment: the dual-end to single-end amplifier unit 104 has two input terminals and one output terminal, wherein the two input terminals are a positive input terminal and an inverting input terminal, respectively; the positive input terminal of the dual-end to single-end amplifier unit 104 is connected to the positive output terminal of the voltage RMS value sampling and holding unit 102, the inverting input terminal of the dual-end to single-end amplifier unit 104 is connected to the inverting output terminal of the voltage RMS value sampling and holding unit 102, and the output terminal of the dual-end to single-end amplifier unit 104 is used to output the voltage RMS value amplified signal.

[0077] Specifically, the dual-ended to single-ended amplifier unit 104 can be a differential input single-ended output amplifier.

[0078] In this specific embodiment: the overcurrent threshold comparator unit 105 has two input terminals and one output terminal, wherein the two input terminals are a positive input terminal and an inverting input terminal, respectively; the positive input terminal of the overcurrent threshold comparator unit 105 is used to receive the overcurrent threshold voltage signal, the inverting input terminal of the overcurrent threshold comparator unit 105 is connected to the output terminal of the dual-ended to single-ended amplifier unit 104, the output terminal of the overcurrent threshold comparator unit 105 is connected to the input terminal of the current source charging and discharging circuit unit 106, and the output terminal of the overcurrent threshold comparator unit 105 is used to output the comparison signal;

[0079] Specifically, when the amplified signal of the effective voltage value is greater than the overcurrent threshold voltage signal, the comparison signal output by the output terminal of the overcurrent threshold comparator unit 105 is at a high level; when the amplified signal of the effective voltage value is less than the overcurrent threshold voltage signal, the comparison signal output by the output terminal of the overcurrent threshold comparator unit 105 is at a low level.

[0080] In this specific embodiment: as Figure 8 As shown, the current source charging and discharging circuit unit 106 includes a current source, comparator A2, a first resistor R1, a second resistor R2, a fifth capacitor C5, a seventh linkage switch S7, and an eighth linkage switch S8. The opening and closing of the seventh linkage switch S7 and the eighth linkage switch S8 are controlled by the comparison signal output by the overcurrent threshold comparator unit 105. One end of the first resistor R1 is grounded through the seventh linkage switch S7, and the other end of the first resistor R1 is connected to the output terminal of the current source through the eighth linkage switch S8. The other end of the first resistor R1 is also connected to the inverting input terminal of the comparator A2 through the second resistor R2. The inverting input terminal of the comparator A2 is also grounded through the fifth capacitor C5. The positive input terminal of the comparator A2 is used to receive the overcurrent threshold voltage signal, and the output terminal of the comparator A2 outputs the leakage protection control signal. Figure 8 V in ref The voltage supplied to the current source.

[0081] Specifically: when the amplified signal of the effective voltage value is greater than the overcurrent threshold voltage signal, the comparison signal output by the overcurrent threshold comparator unit 105 is high; when the amplified signal of the effective voltage value is less than the overcurrent threshold voltage signal, the comparison signal output by the overcurrent threshold comparator unit 105 is low.

[0082] The charging / discharging circuit 1061 comprises a first resistor R1, a second resistor R2, a fifth capacitor C5, a seventh linkage switch S7, and an eighth linkage switch S8. The charging / discharging circuit 1061 includes a charging circuit and a discharging circuit. When the comparison signal is high, the seventh linkage switch S7 is open and the eighth linkage switch S8 is closed. The eighth linkage switch S8, the second resistor R2, and the fifth capacitor C5 form a charging circuit, and the current source charges the fifth capacitor C5 through the second resistor R2. When the comparison signal is low, the seventh linkage switch S7 is closed and the eighth linkage switch S8 is open. The seventh linkage switch S7, the first resistor R1, the second resistor R2, and the fifth capacitor C5 form a discharging circuit, and the fifth capacitor C5 discharges externally through the first resistor R1 and the second resistor R2.

[0083] Specifically: the voltage signal at the non-grounded end of the fifth capacitor C5 changes as the fifth capacitor C5 is charged or discharged;

[0084] When the voltage signal at the non-grounded terminal of the fifth capacitor C5 is greater than the overcurrent threshold voltage signal, the leakage protection control signal output by the output terminal of the comparator A2 is at a high level.

[0085] When the voltage signal at the non-grounded end of the fifth capacitor C5 is less than the overcurrent threshold voltage signal, the leakage protection control signal output by the output terminal of the comparator A2 is low.

[0086] Since leakage current protectors are used not only for AC power supplied by the daily power grid, but also for AC rectifier equipment, electronic control equipment and other devices with pulsating DC loads, it is necessary to control the charging and discharging speed of the current source charging and discharging circuit unit 106 to avoid misjudging the leakage current.

[0087] Figure 9 This is a timing diagram of the signals at each node in a signal processing circuit for a high-precision leakage current protector according to the present invention. (Reference) Figure 4 and Figure 9 The working process of this invention is as follows:

[0088] The differential signals IN1 and IN2, input from the first differential signal input terminal IN1 and the second differential signal input terminal IN2, are amplified by the switched capacitor fully differential amplifier unit 101 and output as differential amplified signals to nodes n1 and n2. Then, under the synergistic action of the voltage RMS sampling and holding unit 102 and the zero-crossing comparator unit 103, the RMS value is sampled, and the differential voltage RMS value signal is output to nodes n3 and n4. Next, under the amplification action of the dual-ended to single-ended amplifier unit 104, the voltage RMS value amplified signal is output to node n5. The overcurrent threshold comparator unit 105 compares the voltage RMS value amplified signal with the overcurrent threshold voltage VCMP and controls the output of the current source charging circuit unit 106, the TRIG output terminal.

[0089] When the overcurrent threshold comparator unit 105 outputs the first high level, the TRIG output of the current source charging circuit unit 106 will not immediately become high level. Since the charging rate of the fifth capacitor C5 is greater than the discharging rate, the voltage across its terminals will increase in a tortuous process. One signal cycle is about 20ms. The voltage signal at the non-grounded terminal of the fifth capacitor C5 reaches and exceeds VCMP within several signal cycles, and the TRIG terminal outputs a high-level signal to control the load to disconnect from power.

[0090] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A signal processing circuit for a high precision leakage protector, characterized by: The differential signal first access end (IN1) and the differential signal second access end (IN2) are used for inputting a differential signal, and the switch capacitor full differential amplifier unit (101), the voltage effective value sampling and holding unit (102), the zero-crossing comparator unit (103), the differential-to-single-ended amplifier unit (104), the overcurrent threshold comparator unit (105) and the current source charging and discharging circuit unit (106) are further included. The switch capacitor full differential amplifier unit (101) is built by a switch capacitor and a full differential amplifier (A1), which is used for accessing the differential signal through the differential signal first access end (IN1) and the differential signal second access end (IN2), differentially amplifying the accessed differential signal, obtaining a differential amplified signal and outputting the differential amplified signal. The zero-crossing comparator unit (103) is used for accessing the differential amplified signal, comparing the differential amplified signal, obtaining a zero-crossing point signal of the differential amplified signal and outputting the zero-crossing point signal. The voltage effective value sampling and holding unit (102) is used for accessing the differential amplified signal and the zero-crossing point signal, differentially sampling the voltage effective value of the differential amplified signal under the control of the zero-crossing point signal, obtaining a differential voltage effective value signal and outputting the differential voltage effective value signal. The differential-to-single-ended amplifier unit (104) is used for accessing the differential voltage effective value signal, differentially-to-single-ended amplifying the differential voltage effective value signal, obtaining a voltage effective value amplified signal and outputting the voltage effective value amplified signal. The overcurrent threshold comparator unit (105) is used for accessing the voltage effective value amplified signal and a preset overcurrent threshold voltage signal, comparing the voltage effective value amplified signal with the overcurrent threshold voltage signal, obtaining a comparison signal and outputting the comparison signal. The current source charging and discharging circuit unit (106) is used for accessing the comparison signal and the overcurrent threshold voltage signal, forming a current source-based charging and discharging loop (1061) under the control of the comparison signal, comparing a charging and discharging signal of the charging and discharging loop (1061) with the overcurrent threshold voltage signal, and obtaining a leakage protection control signal.

2. The signal processing circuit for high precision leakage protector according to claim 1, characterized in that: The switch capacitor full differential amplifier unit (101) includes a differential amplifier (A1), a first capacitor (C1), a second capacitor (C2), a third capacitor (C3), a fourth capacitor (C4), a first linkage switch (S1), a second linkage switch (S2), a third linkage switch (S3), a fourth linkage switch (S4), a fifth linkage switch (S5) and a sixth linkage switch (S6). The first capacitor (C1) and the first linkage switch (S1) are connected in series between the differential signal first access end (IN1) and the positive input end of the differential amplifier (A1); the second capacitor (C2) and the second linkage switch (S2) are connected in series between the differential signal second access end (IN2) and the negative input end of the differential amplifier (A1); the third capacitor (C3) and the third linkage switch (S3) are connected in series between the positive input end and the negative output end of the differential amplifier (A1); the fourth capacitor (C4) and the fourth linkage switch (S4) are connected in series between the negative input end and the positive output end of the differential amplifier (A1); the fifth linkage switch (S5) is connected between the positive input end and the negative output end of the differential amplifier (A1); the sixth linkage switch (S6) is connected between the negative input end and the positive output end of the differential amplifier (A1), and the positive output end and the negative output end of the differential amplifier (A1) are used for outputting the differential amplified signal.

3. The signal processing circuit for high precision leakage protector according to claim 2, characterized in that: The opening and closing of the first linkage switch (S1), the second linkage switch (S2), the third linkage switch (S3), the fourth linkage switch (S4), the fifth linkage switch (S5) and the sixth linkage switch (S6) are controlled by a high-frequency square wave signal; When the high-frequency square wave signal is high, the first linkage switch (S1), the second linkage switch (S2), the fifth linkage switch (S5) and the sixth linkage switch (S6) are closed, and the third linkage switch (S3) and the fourth linkage switch (S4) are opened; when the high-frequency square wave signal is low, the first linkage switch (S1), the second linkage switch (S2), the fifth linkage switch (S5) and the sixth linkage switch (S6) are opened, and the third linkage switch (S3) and the fourth linkage switch (S4) are closed; Or, when the high-frequency square wave signal is low, the first linkage switch (S1), the second linkage switch (S2), the fifth linkage switch (S5) and the sixth linkage switch (S6) are closed, and the third linkage switch (S3) and the fourth linkage switch (S4) are opened; when the high-frequency square wave signal is high, the first linkage switch (S1), the second linkage switch (S2), the fifth linkage switch (S5) and the sixth linkage switch (S6) are opened, and the third linkage switch (S3) and the fourth linkage switch (S4) are closed.

4. The signal processing circuit for high precision leakage protector according to claim 2, characterized in that: The zero-crossing comparator unit (103) is provided with two input ends and an output end, wherein the two input ends are a positive input end and a negative input end respectively; the positive input end of the zero-crossing comparator unit (103) is connected to the positive output end of the differential amplifier (A1), the negative input end of the zero-crossing comparator unit (103) is connected to the negative output end of the differential amplifier (A1), and the output end of the zero-crossing comparator unit (103) is used for outputting the zero-crossing signal; The zero-crossing signal includes first and second zero-crossing signals with opposite levels; when the first voltage signal output by the negative output end of the differential amplifier (A1) is greater than the second voltage signal output by the positive output end of the differential amplifier (A1), the output end of the zero-crossing comparator unit (103) is used for outputting the first zero-crossing signal; when the first voltage signal output by the negative output end of the differential amplifier (A1) is less than the second voltage signal output by the positive output end of the differential amplifier (A1), the output end of the zero-crossing comparator unit (103) is used for outputting the second zero-crossing signal; Wherein, the first voltage signal and the second voltage signal constitute the differential amplification signal.

5. The signal processing circuit for high precision leakage protector according to claim 4, characterized in that: The voltage effective value sampling and holding unit (102) is provided with three input ends and two output ends, wherein the three input ends are a positive input end, a negative input end and a controlled end respectively, and the two output ends are a positive output end and a negative output end respectively; the positive input end of the voltage effective value sampling and holding unit (102) is connected to the negative output end of the differential amplifier (A1), the negative input end of the voltage effective value sampling and holding unit (102) is connected to the positive output end of the differential amplifier (A1), the controlled end of the voltage effective value sampling and holding unit (102) is connected to the output end of the zero-crossing comparator unit (103), and the positive output end and the negative output end of the voltage effective value sampling and holding unit (102) are used for outputting the differential voltage effective value signal; The voltage effective value sampling and holding unit (102) is specifically used for, when the accessed zero-crossing signal is the first zero-crossing signal, directly sampling the differential voltage effective value of the differential amplification signal; when the accessed zero-crossing signal is the second zero-crossing signal, inverting and sampling the differential voltage effective value of the differential amplification signal.

6. The signal processing circuit for high precision leakage protector according to claim 5, characterized in that: The differential-to-single-ended amplifier unit (104) is provided with two input ends and an output end, wherein the two input ends are a positive input end and a negative input end respectively; the positive input end of the differential-to-single-ended amplifier unit (104) is connected to the positive output end of the voltage effective value sampling and holding unit (102), the negative input end of the differential-to-single-ended amplifier unit (104) is connected to the negative output end of the voltage effective value sampling and holding unit (102), and the output end of the differential-to-single-ended amplifier unit (104) is used for outputting the voltage effective value amplification signal.

7. The signal processing circuit for high precision leakage protector according to claim 6, characterized in that: The overcurrent threshold comparator unit (105) is provided with two input ends and an output end, wherein the two input ends are a positive input end and a negative input end respectively; the positive input end of the overcurrent threshold comparator unit (105) is used for inputting the overcurrent threshold voltage signal, the negative input end of the overcurrent threshold comparator unit (105) is connected with the output end of the differential amplifier unit (104), the output end of the overcurrent threshold comparator unit (105) is connected with the input end of the current source charging and discharging circuit unit (106), and the output end of the overcurrent threshold comparator unit (105) is used for outputting the comparison signal. When the voltage effective value amplification signal is greater than the overcurrent threshold voltage signal, the comparison signal output by the output end of the overcurrent threshold comparator unit (105) is high level; when the voltage effective value amplification signal is less than the overcurrent threshold voltage signal, the comparison signal output by the output end of the overcurrent threshold comparator unit (105) is low level.

8. The signal processing circuit for high-precision leakage protector according to any one of claims 1 to 7, characterized in that: The current source charging and discharging circuit unit (106) comprises a current source, a comparator (A2), a first resistor (R1), a second resistor (R2), a fifth capacitor (C5), a seventh linkage switch (S7) and an eighth linkage switch (S8); the opening and closing of the seventh linkage switch (S7) and the eighth linkage switch (S8) are controlled by the comparison signal output by the overcurrent threshold comparator unit (105); one end of the first resistor (R1) is grounded through the seventh linkage switch (S7), the other end of the first resistor (R1) is connected to the output end of the current source through the eighth linkage switch (S8), the other end of the first resistor (R1) is also connected to the negative input end of the comparator (A2) through the second resistor (R2), the negative input end of the comparator (A2) is also grounded through the fifth capacitor (C5), the positive input end of the comparator (A2) is used for inputting the overcurrent threshold voltage signal, and the output end of the comparator (A2) outputs the leakage protection control signal.

9. The signal processing circuit for high precision leakage protector according to claim 8, characterized in that: When the voltage effective value amplification signal is greater than the overcurrent threshold voltage signal, the comparison signal output by the overcurrent threshold comparator unit (105) is high level; when the voltage effective value amplification signal is less than the overcurrent threshold voltage signal, the comparison signal output by the overcurrent threshold comparator unit (105) is low level. When the comparison signal is high level, the seventh linkage switch (S7) is opened and the eighth linkage switch (S8) is closed, so that the second resistor (R2) and the fifth capacitor (C5) form a charging circuit, and the current source charges the fifth capacitor (C5) through the second resistor (R2); When the comparison signal is low, the seventh linkage switch (S7) is closed and the eighth linkage switch (S8) is opened, then the first resistor (R1), the second resistor (R2) and the fifth capacitor (C5) form a discharge circuit, and the fifth capacitor (C5) is discharged through the first resistor (R1) and the second resistor (R2).

10. The signal processing circuit for high precision leakage protector according to claim 9, characterized in that: The voltage signal at the non-ground terminal of the fifth capacitor (C5) changes with the charging or discharging of the fifth capacitor (C5); When the voltage signal at the non-ground terminal of the fifth capacitor (C5) is greater than the over-current threshold voltage signal, the leakage protection control signal output by the output end of the comparator (A2) is high; When the voltage signal at the non-ground terminal of the fifth capacitor (C5) is less than the over-current threshold voltage signal, the leakage protection control signal output by the output end of the comparator (A2) is low.

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