Detection Method and Circuit of Magnetic Field Interference in Flyback Converter

Abstract

A method and circuit for detecting magnetic field interference in a flyback converter. By detecting the product V0*D of the primary current duty cycle D and the reference voltage V0, the V0*D without magnetic field interference is used as the preset value Vref0. The Vref0 is divided, with half of Vref0 being the first threshold Vref1, one-fourth of Vref0 being the second threshold Vref2, and one-eighth of Vref0 being the third threshold Vref3. When the detected V0*D is less than Vref1, the operating frequency of the flyback converter is doubled; when the reference voltage-duty cycle product V0*D is less than Vref2, the operating frequency of the flyback converter is quadrupled; when the reference voltage-duty cycle product V0*D is less than Vref3, the operating frequency of the flyback converter is octupled, enabling the flyback converter to maintain its original output power under strong magnetic interference conditions.

Description

Technical Field

[0001] The present invention relates to a switching power supply, and particularly to a method and a circuit for detecting magnetic field interference in a flyback converter. Background Art

[0002] The input power of a flyback converter in a switching power supply is proportional to its primary peak current, the inductance value of the excitation inductor, and its operating frequency. The topological structure of the flyback conversion circuit in the switching power supply is as Figure 1 shown, where Lm represents the excitation inductor of the transformer, the input signal Vin is an AC signal, D1, D2, D3, and D4 form a diode rectifier bridge to rectify the input signal Vin; R1, R2, R3, R4 and capacitors C1, C2 form a filter network to filter out the noise in the input signal; R5, C3 and D5 form an RCD absorption circuit to suppress the spike voltage during the operation of the circuit; M1 is a power transistor, and when it is turned on, the primary energy is transferred to the secondary through the transformer; R12 is a sampling resistor to realize the sampling of the primary current; in the secondary circuit, D6 is a freewheeling diode, C4 is a voltage stabilizing capacitor, TL431 is a controllable precision voltage reference source, D01, R8, and R6 supply power to TL431, R9 and R10 form a resistor voltage divider to provide an input for TL431, and R7 and C5 form a compensation network for TL431; I0 represents the gate controller of the power transistor in the flyback conversion circuit, and its internal circuit structure topology is as Figure 2 shown, VDD is provided by the input signal through the auxiliary winding as the power supply signal for I0, Comp is a feedback signal reflecting the change of the output voltage, CS is the primary peak current sampling signal to realize the real-time sampling of the power transistor current. DR is the drive signal of the power transistor gate, which is jointly controlled by Comp and CS. When the output power decreases, the feedback signal Comp decreases accordingly, increasing the duty ratio of DR, and further increasing the on-time of the power transistor M1 in each cycle to maintain the constancy of the output power. The inductance value of the excitation inductor is affected by the external magnetic field. When an external strong magnetic field is applied, the inductance value of the excitation inductor will decrease due to electromagnetic induction, which will further lead to a decrease in the input power. Reflected in the primary current, if the peak current constant technology is adopted for the current, the primary on-time ton will decrease, and then the duty ratio D will decrease. The decrease in the primary duty ratio will reduce the power transferred from the primary to the secondary in each cycle, and further reduce the output average current and output power.

[0003] Refer to Figure 3, the flyback conversion circuit operates in the discontinuous conduction mode (DCM) with a fixed operating frequency. Gon is generated by the power transistor gate controller I0 and is the control signal for the gate of the power transistor M1. The duty cycle of this signal is determined by the controller. SW is the drain voltage signal of M1. When the primary side conducts, SW is at a low level, and when freewheeling, SW is at a high level. After the freewheeling ends, the leakage inductance of the transformer and the drain-source capacitance of the power transistor generate sub-harmonic oscillations on the primary side. When there is no magnetic field interference (defined as no magnetic field interference under normal magnetic field conditions), the conduction time of the primary side current and the freewheeling time of the secondary side current remain unchanged, and the duty cycle of the Gon signal does not change within different cycles. The pulse widths of the primary side current Ip and the secondary side current Is both remain unchanged. After magnetic field interference (abnormal strong magnetic field) occurs, the inductance value of the excitation inductance decreases, and both the conduction time of the primary side current and the freewheeling time of the secondary side current decrease, causing the waveform of SW to be modulated as well. The duty cycle of the Gon signal decreases, and the pulse widths of the primary side current Ip and the secondary side current Is both decrease, thereby resulting in a decrease in the output power. Multiply Gon by the reference level, and this product will decrease after the magnetic field interference signal arrives. See Figure 4 。

[0004] The above existing technologies cannot avoid the influence of abnormal strong magnetic field interference on the inductance value of the excitation inductance Lm, lack an effective detection mechanism for magnetic field interference, and cannot avoid the decrease in output power caused by the decrease in the inductance value of the excitation inductance Lm. Summary of the Invention

[0005] To overcome the defects of the existing technologies, the purpose of the present invention is to provide a method and circuit for detecting magnetic field interference in a flyback converter, which is used to monitor the flyback converter in real time in a switching power supply system, determine whether it is affected by magnetic field interference, and if a magnetic field interference signal is detected, correspondingly increase the operating frequency of the circuit to keep the output power of the circuit stable and constant.

[0006] To achieve the above invention purpose, the present invention adopts the following technical solutions: A method for detecting magnetic field interference in a flyback converter, characterized in that: the flyback converter is monitored in real time to determine whether it is affected by magnetic field interference. If a magnetic field interference signal is detected, the operating frequency of the flyback converter is correspondingly increased to keep the flyback converter maintain a stable output power;

[0007] It includes the following steps:

[0008] The first step, when the flyback converter is operating, detect the product V0*D of the duty cycle D of the primary side current and the reference voltage V0, where V0 is the secondary side feedback voltage controlled by the load, and use V0*D as a measure of the degree of magnetic field interference of the flyback converter;

[0009] In the second step, the situation with a normal magnetic field is defined as no magnetic field interference. At this time, V0*D is used as a preset value, denoted as Vref0 and stored. The preset value Vref0 is divided by a resistor to set the corresponding voltage-dividing resistor value. One-half of Vref0 is defined as the first threshold Vref1, one-fourth of Vref0 is defined as the second threshold Vref2, and one-eighth of Vref0 is defined as the third threshold Vref3.

[0010] In the third step, when the detected V0*D is less than the first threshold Vref1, the operating frequency of the flyback converter is increased to the first loading frequency, which is twice the original operating frequency of the flyback converter; when the reference voltage-duty cycle product V0*D is less than the second threshold Vref2, the operating frequency of the flyback converter is increased to the second loading frequency, which is four times the original operating frequency of the flyback converter; when the reference voltage-duty cycle product V0*D is less than the third threshold Vref3, the operating frequency of the flyback converter is increased to the third loading frequency, which is eight times the original operating frequency of the flyback converter.

[0011] Further, in the third step, the method of increasing the operating frequency of the flyback converter to the first loading frequency, the second loading frequency, and the third loading frequency is as follows:

[0012] In the first step, the detected V0*D is respectively compared with the first threshold Vref1, the second threshold Vref2, and the third threshold Vref3 through the first threshold decision circuit, the second threshold decision circuit, and the third threshold decision circuit. The comparison result output by the first threshold decision circuit is defined as the enable signal EN1, the comparison result output by the second threshold decision circuit is defined as the enable signal EN2, and the comparison result output by the third threshold decision circuit is defined as the enable signal EN3.

[0013] In the second step, the enable signal EN1, the enable signal EN2, and the enable signal EN3 are used as the three input signals of the frequency modulation circuit. The output frequency of the frequency modulation circuit is the operating frequency of the flyback converter; when the enable signal EN1 is at a high level and EN2 and EN3 are at a low level, the output of the frequency modulation circuit increases the operating frequency of the flyback converter to the first loading frequency. When the enable signals EN1 and EN2 are at a high level and EN3 is at a low level, the output of the frequency modulation circuit increases the operating frequency of the flyback converter to the second loading frequency. When the enable signals EN1, EN2, and EN3 are all at a high level, the output of the frequency modulation circuit increases the operating frequency of the flyback converter to the third loading frequency.

[0014] The detection circuit designed according to the above detection method for magnetic field interference in the flyback converter is characterized in that it includes a V0*D generation circuit, a threshold decision circuit, and a frequency modulation circuit.

[0015] The V0*D generation circuit includes switch S1, switch S2, and capacitors C8, C9, and resistor R13. One end of switch S1 is connected to the reference voltage V0, and the other end of switch S1 is connected to one end of switch S2, one end of capacitor C8, and one end of resistor R13. The other end of resistor R13 is connected to one end of capacitor C9 and outputs the signal V0*D. The control end of switch S1 is connected to the gate control signal GON of power transistor M1, the control end of switch S2 is connected to the inverted signal GONB of the gate control signal GON of power transistor M1, and the other ends of switch S2, capacitor C8, and capacitor C9 are all grounded;

[0016] The threshold decision circuit includes a multiplier, three comparators Comp1, Comp2, Comp3, and four voltage-dividing resistors R14, R15, R16, and R17. Comparators Comp1, Comp2, and Comp3 correspond to the first threshold decision circuit, the second threshold decision circuit, and the third threshold decision circuit respectively. The two input ends of the multiplier are respectively connected to the real-time detection values of the primary current duty ratio D and the reference voltage V0. The output of the multiplier is simultaneously connected to the negative ends of comparator Comp1, comparator Comp2, and comparator Comp3. The preset value Vref0 is grounded after being sequentially connected in series with resistor R15, resistor R16, and resistor R17 through resistor R14. By setting the corresponding resistance values of resistors R14, R15, R16, and R17, the connection point of resistor R14 and resistor R15 obtains one-half of the preset value Vref0, that is, the first threshold Vref1, which is connected to the positive end of comparator Comp1. The connection point of resistor R15 and resistor R16 obtains one-fourth of the preset value Vref0, that is, the second threshold Vref2, which is connected to the positive end of comparator Comp2. The connection point of resistor R16 and resistor R17 obtains one-eighth of the preset value Vref0, that is, the third threshold Vref3, which is connected to the positive end of comparator Comp3. Comparator Comp1 outputs the enable signal EN1, comparator Comp2 outputs the enable signal EN2, and comparator Comp3 outputs the enable signal EN3;

[0017] The frequency modulation circuit includes four current sources IS1, IS2, IS3, IS4, control switches S3, S4, S5 and a relaxation oscillator. The input ends of the current sources IS1, IS2, IS3 and IS4 are all connected to VDD. The output end of the current source IS1 is connected to one end of the control switch S3. The output end of the current source IS2 is connected to one end of the control switch S4. The output end of the current source IS3 is connected to one end of the control switch S5. The other ends of the control switch S3, the control switch S4 and the control switch S5 are connected together and connected to the input end of the relaxation oscillator and the output end of the current source IS4. The control signal of the control switch S3 is the enable signal EN1 output by the first threshold decision circuit. The control signal of the control switch S4 is the enable signal EN2 output by the second threshold decision circuit. The control signal of the control switch S5 is the enable signal EN3 output by the third threshold decision circuit. The relaxation oscillator outputs a frequency modulation signal VF to correspondingly adjust the operating frequency of the flyback converter.

[0018] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0019] The present invention detects the product of the primary current duty ratio and the reference voltage in real time. If the product of the primary current duty ratio and the reference voltage decreases significantly, it indicates that the inductance value of the primary excitation inductor decreases, that is, it characterizes the detection of abnormal magnetic field interference. At this time, the operating frequency of the flyback converter is correspondingly increased to suppress the decrease of the output power. At the same time, the product of the primary current duty ratio and the reference voltage can be used as a measure of the degree of magnetic field interference on the flyback converter. By comparing the product of the primary current duty ratio and the reference voltage with the set threshold, when it drops to different intervals, the frequency modulation circuit adjusts the operating frequency of the flyback converter to different values, effectively solving the problem that the output power of the flyback converter decreases due to magnetic field interference, and enabling the flyback converter to maintain a constant output power under the interference of an external magnetic field. Description of the Drawings

[0020] Figure 1 is a schematic structural diagram of a common flyback converter topology;

[0021] Figure 2 is a schematic structural diagram of the internal topology of the controller I0 in the flyback converter;

[0022] Figure 3 represents the influence of the operating condition of the flyback converter under the interference of an external magnetic field signal;

[0023] Figure 4 represents that the duty ratio product will decrease under the interference of an external magnetic field signal;

[0024] Figure 5 is the adjustment of the output power by the magnetic field interference detection method of the present invention;

[0025] Figure 6 An implementation circuit for multiplying the duty cycle by the reference voltage in the present invention;

[0026] Figure 7 An implementation circuit for the threshold decision circuit in the present invention;

[0027] Figure 8 An implementation circuit for the frequency modulation circuit in the present invention. Specific implementation manners

[0028] The present invention will be further described below with reference to the accompanying drawings.

[0029] The purpose of the present invention is to perform real-time monitoring on a flyback converter in an actual switching power supply system to determine whether it is affected by magnetic field interference. If a magnetic field interference signal is detected, the operating frequency of the circuit is correspondingly increased to keep the output power of the circuit stable and constant.

[0030] As Figure 5 , if the product V0*D of the original reference voltage and the duty cycle decreases significantly, it indicates that the inductance value of the primary excitation inductor decreases, that is, it represents that magnetic field interference is detected (refer to the dotted line in the figure). After detecting the magnetic field interference, increasing the operating frequency of the flyback converter can make the product V0*D of the reference voltage and the duty cycle rise back to a level close to that before the magnetic field interference arrives (refer to the solid line in the figure).

[0031] As Figure 6 , the reference voltage V0 is the secondary side feedback voltage controlled by the load. When the load is constant, V0 will not change with the magnetic field. Taking V0 as the input of the circuit, the switch S1 and S2 are respectively controlled by the Gon signal and the inverse signal GonB of the Gon signal. The product of the primary side current duty cycle and the reference voltage is stored in the capacitor C8, and then the DC component of the product of the primary side current duty cycle and the reference voltage is obtained through the low-pass filter composed of R13 and C9, as the product V0*D of the reference voltage and the duty cycle.

[0032] As Figure 7, when the flyback circuit operates in a magnetic - field - free environment, measure the product of the secondary - side feedback voltage V0 and the primary - side current duty cycle D in the flyback converter, that is, the reference - voltage - duty - cycle product V0*D. Take the V0*D at this time as the preset value, denoted as Vref0. Use resistors R14, R15, R16, R17 to divide the voltage of the preset value Vef0. By setting the resistance values of R14, R15, R16, R17, set half of Vef0 as the first threshold Vref1, set one - quarter of Vef0 as the second threshold Vref2, and set one - eighth of Vef0 as the third threshold Vref3. Compare the real - time reference - voltage - duty - cycle product with Vref1, Vref2, Vref3 respectively through the first - threshold decision circuit, the second - threshold decision circuit, and the third - threshold decision circuit. Denote the outputs of the first - threshold decision circuit, the second - threshold decision circuit, and the third - threshold decision circuit as EN1, EN2, and EN3 respectively. Set EN1 as the first enable signal, EN2 as the second enable signal, and EN3 as the third enable signal. When the reference - voltage - duty - cycle product is less than the first threshold, the first - threshold decision circuit outputs EN1 as high and the rest as low; when the reference - voltage - duty - cycle product is less than the second threshold, the first - threshold decision circuit outputs EN1 and EN2 as high and the rest as low; when the reference - voltage - duty - cycle product is less than the third threshold, the first - threshold decision circuit outputs EN1, EN2, and EN3 all as high.

[0033] As Figure 8 , from Figure 7 , the outputs EN1 of the first - threshold decision circuit, EN2 of the second - threshold decision circuit, and EN3 of the third - threshold decision circuit in are all connected to the input terminal of the frequency - modulation circuit. The larger the input current of the frequency - modulation circuit, the higher the frequency of its output signal VF. The frequency of VF is the operating frequency of the flyback converter. Therefore, the operating frequency of the flyback converter is modulated by current sources IS1, IS2, IS3, IS4. When EN1 is high and the rest are low, switch S3 closes, S4 and S5 open, increasing the input current of the frequency - modulation circuit from IS1 to (IS1 + IS4), driving the frequency - modulation circuit to increase the operating frequency of the flyback converter to the first load frequency, which is twice the original operating frequency; when EN1 and EN2 are high and the rest are low, increase the input current of the frequency - modulation circuit to (IS1 + IS2 + IS4), driving the frequency - modulation circuit to increase the operating frequency of the flyback converter to the second load frequency, which is four times the original operating frequency; when EN1, EN2, and EN3 are all high, switches S3, S4, and S5 all close, increasing the input current of the frequency - modulation circuit to (IS1 + IS2 + IS3 + IS4), driving the frequency - modulation circuit to increase the operating frequency of the flyback converter to the third load frequency, which is eight times the original operating frequency.

Claims

1. A method for detecting magnetic field interference in a flyback converter, characterized in that: Perform real-time monitoring on the flyback converter to determine whether it is affected by magnetic field interference. If a magnetic field interference signal is detected, correspondingly increase the operating frequency of the flyback converter to maintain a stable output power of the flyback converter; It includes the following steps: In the first step, when the flyback converter is operating, detect the product V0*D of the duty cycle D of the primary current and the reference voltage V0, where V0 is the secondary feedback voltage controlled by the load, and use V0*D as a measure of the degree of magnetic field interference on the flyback converter; In the second step, define the situation with a normal magnetic field as no magnetic field interference. At this time, V0*D is used as a preset value, denoted as Vref0 and stored. Divide the preset value Vref0 by a resistor, set the corresponding voltage-dividing resistor value, define half of Vref0 as the first threshold Vref1, one-fourth of Vref0 as the second threshold Vref2, and one-eighth of Vref0 as the third threshold Vref3; In the third step, when the detected V0*D is less than the first threshold Vref1, increase the operating frequency of the flyback converter to the first loading frequency, that is, twice the original operating frequency of the flyback converter; when the reference voltage-duty cycle product V0*D is less than the second threshold Vref2, increase the operating frequency of the flyback converter to the second loading frequency, that is, four times the original operating frequency of the flyback converter; when the reference voltage-duty cycle product V0*D is less than the third threshold Vref3, increase the operating frequency of the flyback converter to the third loading frequency, that is, eight times the original operating frequency of the flyback converter.

2. The method for detecting magnetic field interference in the flyback converter according to claim 1, wherein: In the third step described above, the method of increasing the operating frequency of the flyback converter to the first loading frequency, the second loading frequency, and the third loading frequency is as follows: In the first step, respectively compare the detected V0*D with the first threshold Vref1, the second threshold Vref2, and the third threshold Vref3 through the first threshold decision circuit, the second threshold decision circuit, and the third threshold decision circuit. The comparison result output by the first threshold decision circuit is defined as the enable signal EN1, the comparison result output by the second threshold decision circuit is defined as the enable signal EN2, and the comparison result output by the third threshold decision circuit is defined as the enable signal EN3; In the second step, use the enable signal EN1, the enable signal EN2, and the enable signal EN3 as the three input signals of the frequency modulation circuit, and the output frequency of the frequency modulation circuit is the operating frequency of the flyback converter.

3. The method for detecting magnetic field interference in the flyback converter according to claim 2, characterized in that: In the second step described above, when the enable signal EN1 is at a high level and EN2 and EN3 are at a low level, the output of the frequency modulation circuit increases the operating frequency of the flyback converter to the first loading frequency. When the enable signals EN1 and EN2 are at a high level and EN3 is at a low level, the output of the frequency modulation circuit increases the operating frequency of the flyback converter to the second loading frequency. When the enable signals EN1, EN2, and EN3 are all at a high level, the output of the frequency modulation circuit increases the operating frequency of the flyback converter to the third loading frequency.

4. The detection circuit designed according to the detection method of magnetic field interference in the flyback converter described in claim 1, characterized in that: It includes a V0*D generation circuit, a threshold decision circuit, and a frequency modulation circuit; The V0*D generation circuit includes switch S1, switch S2, and capacitors C8, C9, and resistor R13. One end of switch S1 is connected to the reference voltage V0, and the other end of switch S1 is connected to one end of switch S2, one end of capacitor C8, and one end of resistor R13. The other end of resistor R13 is connected to one end of capacitor C9 and outputs the signal V0*D. The control end of switch S1 is connected to the gate control signal GON of power transistor M1, the control end of switch S2 is connected to the inverse signal GONB of the gate control signal GON of power transistor M1, and the other ends of switch S2, capacitor C8, and capacitor C9 are all grounded; The threshold decision circuit includes a multiplier, three comparators Comp1, Comp2, Comp3, and four voltage-dividing resistors R14, R15, R16, and R17. Comparators Comp1, Comp2, and Comp3 correspond to the first threshold decision circuit, the second threshold decision circuit, and the third threshold decision circuit respectively. Two input ends of the multiplier are respectively connected to the real-time detection values of the primary-side current duty ratio D and the reference voltage V0. The output of the multiplier is simultaneously connected to the negative end of comparator Comp1, the negative end of comparator Comp2, and the negative end of comparator Comp3. The preset value Vref0 is grounded after being sequentially connected in series with resistor R14, resistor R15, resistor R16, and resistor R17. By setting the corresponding resistance values of resistors R14, R15, R16, and R17, the connection point of resistor R14 and resistor R15 obtains one-half of the preset value Vref0, i.e., the first threshold Vref1, which is connected to the positive end of comparator Comp1. The connection point of resistor R15 and resistor R16 obtains one-fourth of the preset value Vref0, i.e., the second threshold Vref2, which is connected to the positive end of comparator Comp2. The connection point of resistor R16 and resistor R17 obtains one-eighth of the preset value Vref0, i.e., the third threshold Vref3, which is connected to the positive end of comparator Comp3. Comparator Comp1 outputs the enable signal EN1, comparator Comp2 outputs the enable signal EN2, and comparator Comp3 outputs the enable signal EN3; The frequency modulation circuit includes four current sources IS1, IS2, IS3, IS4, as well as control switches S3, S4, S5 and an oscillator. The input ends of the current sources IS1, IS2, IS3 and IS4 are all connected to VDD. The output end of the current source IS1 is connected to one end of the control switch S3. The output end of the current source IS2 is connected to one end of the control switch S4. The output end of the current source IS3 is connected to one end of the control switch S5. The other end of the control switch S3, the other end of the control switch S4 and the other end of the control switch S5 are connected together and connected to the input end of the relaxation oscillator OSC and the output end of the current source IS4. The control signal of the control switch S3 is the enable signal EN1 output by the first threshold decision circuit. The control signal of the control switch S4 is the enable signal EN2 output by the second threshold decision circuit. The control signal of the control switch S5 is the enable signal EN3 output by the third threshold decision circuit. The relaxation oscillator OSC outputs a frequency modulation signal VF to correspondingly adjust the operating frequency of the flyback converter.

5. The detection circuit designed according to the method for detecting magnetic field interference in the flyback converter described in claim 4, characterized in that: The oscillator in the frequency modulation circuit is a relaxation oscillator.

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