Single-stage differential cascode amplifier module applied to w-band
By introducing differential circuits and neutralizing capacitor structures into the single-stage differential cascode amplifier module in the W-band, combined with interlayer matching inductors, the problem of insufficient output power and stability of cascode structures in millimeter-wave power amplifiers is solved, achieving efficient and stable circuit performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- TIANJIN UNIV
- Filing Date
- 2022-11-22
- Publication Date
- 2026-05-01
AI Technical Summary
Existing cascode structures in W-band millimeter-wave power amplifiers suffer from low output power and power-added efficiency, as well as insufficient stability. In particular, when interlayer matching circuits are considered, differential cascode structures cannot effectively compensate for the effects of transistor-to-ground parasitic capacitance.
By employing a single-stage differential cascode amplifier module, utilizing the symmetry of differential circuits and the neutralizing capacitor structure, combined with interlayer matching inductors, a circuit design that eliminates the need for grounding capacitors is formed, thereby improving output power, efficiency, and stability.
It achieves high output power and power-added efficiency in the W-band, while maintaining stability across the entire frequency band, simplifying circuit layout and improving system integration.
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Figure CN115765637B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of millimeter-wave integrated circuit technology, and in particular to a single-stage differential cascode amplifier module for the W-band. Background Technology
[0002] Millimeter waves refer to electromagnetic waves with frequencies ranging from 30 to 300 GHz. Compared to microwave frequencies, millimeter waves offer advantages such as wider usable bandwidth, higher communication speeds, narrower beamwidths, and smaller device sizes. With the increasing cutoff frequency of silicon-based processes, millimeter-wave circuits can now be manufactured using CMOS technology, and extensive work has been done in the design of silicon-based millimeter-wave integrated circuits. The millimeter-wave frequency band around 94 GHz (W-band) holds great promise for applications in radar, communications, and other fields. In millimeter-wave RF front-end circuits, the power amplifier plays a crucial role in increasing signal power levels, thus determining the performance of the RF front-end circuit.
[0003] The higher the output power of a power amplifier, the farther the signal can be transmitted; therefore, power amplifiers need to have the ability to output higher power. The power-added efficiency (PER) of a power amplifier significantly affects the battery life and overall system reliability, thus requiring improvement in PER. High-frequency power amplifiers are prone to oscillation, so ensuring amplifier stability is crucial. In the W-band, parasitic losses in signal lines are significantly greater than in the low-frequency band, resulting in a significant decrease in amplifier output power and efficiency. Therefore, reasonable design of the signal line layout is needed to reduce losses and achieve higher output power. Cascode structures offer a larger voltage swing, higher output impedance, and better isolation compared to common-source structures, and are therefore widely used in millimeter-wave power amplifier design. However, in cascode structures, the parasitic capacitance between the drain of the common-source transistor and the source of the common-gate transistor forms a signal path to ground inside the amplifier, leading to power waste and efficiency reduction. Therefore, interlayer matching circuits need to be installed between the common-source and common-gate transistors in the cascode structure. However, most cascode structures that include interlayer matching circuits do not consider circuit stability. Compared with single-ended structures, differential structures have advantages such as good symmetry, strong anti-interference ability, and autonomous generation of virtual AC ground, making them a common design in millimeter-wave circuits. Neutralizing capacitor technology is often used in millimeter-wave differential amplifier circuit design. Cross-coupled capacitors provide positive feedback, reduce the influence of the gate-drain parasitic capacitance of the common-source transistor, and improve the stability and gain of the circuit. However, differential cascode structures without interlayer matching and neutralizing capacitors cannot compensate for the influence of the transistor's parasitic capacitance to ground. Furthermore, the cross-line routing of the neutralizing capacitors will increase the drain-to-ground parasitic capacitance of the common-source transistor, preventing the differential cascode structure from achieving optimal performance.
[0004] In summary, designing a cascode amplifier structure with high output power, high power-added efficiency, and high stability is of great significance for the design of millimeter-wave power amplifiers. Summary of the Invention
[0005] The purpose of this invention is to provide a single-stage differential cascode amplifier module for the W-band, which can achieve high output power and efficiency over a wide frequency band and remain stable across the entire frequency band, thus showing good application prospects.
[0006] The technical solution adopted to achieve the purpose of this invention is:
[0007] A single-stage differential cascode amplifier module for the W-band uses a cascode structure and a differential amplification configuration, including common-source transistors M1 and M2, common-gate transistors M3 and M4, and a gate bias resistor R for the common-gate transistors. G Neutralizing capacitor C M1 C M2 Transmission lines TL1, TL2, TL3, TL4 and interlayer matching inductor L;
[0008] Common-source transistor M1 and common-gate transistor M3 form one path of a differential pair, and common-source transistor M2 and common-gate transistor M4 form the other path of a differential pair. Neutralizing capacitor C... M1 One end is connected to the gate of transistor M1, and the other end is connected to the drain of transistor M2; neutralizing capacitor C M2 One end of the transistor is connected to the gate of transistor M2, and the other end is connected to the drain of transistor M1; the sources of common-source transistors M1 and M2 are grounded.
[0009] The drain of transistor M1 is connected to the lower end of transmission line TL1, the source of transistor M3 is connected to the upper end of transmission line TL3, and the upper end of transmission line TL1 is connected to the lower end of transmission line TL3; the drain of transistor M2 is connected to the lower end of transmission line TL2, the source of transistor M4 is connected to the upper end of transmission line TL4, and the upper end of transmission line TL2 is connected to the lower end of transmission line TL4.
[0010] One end of the interlayer matching inductor L is connected to the connection point of transmission lines TL2 and TL4, and the other end is connected to the connection point of transmission lines TL1 and TL3; the gates of common-gate transistors M3 and M4 are connected to the bias resistor R. G One end is connected, R G The other end is connected to a DC bias V CG ;
[0011] The gates of common-source transistors M1 and M2 are respectively used as differential input signals V. IN+ V IN-The input terminals; the drains of common-gate transistors M3 and M4 serve as the differential output signals V. OUT+ V OUT- The output terminal.
[0012] The gate bias of common-source transistors M1 and M2 is provided by the front-end matching circuit, while the drain bias of common-gate transistors M3 and M4 is provided by the back-end matching circuit.
[0013] In this configuration, the gates of common-source transistors M1 and M2 are connected to the preceding matching network to receive the differential input signal V output by the preceding matching network. IN+ V IN- The drains of common-gate transistors M3 and M4 are connected to the subsequent matching network to output a differential output signal V. OUT+ V OUT- Then proceed to the subsequent matching network.
[0014] The single-stage differential cascode amplifier module of the present invention, applied to the W-band, utilizes the characteristic that the midpoint of the line connecting the symmetrical points of the differential circuit is the AC ground, and the inter-layer matching circuit does not require a grounding capacitor; while using a neutralizing capacitor structure to improve stability, an inter-layer matching circuit is added to improve output power, efficiency and stability; at the same time, the circuit structure is simple and easy to integrate into the system. Attached Figure Description
[0015] Figure 1 This is a schematic diagram of the single-stage differential cascode amplifier module applied to the W-band of the present invention.
[0016] Figure 2 This is a simulation result of the stability factor of the single-stage differential cascode amplifier module of the present invention applied to the W-band. Detailed Implementation
[0017] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
[0018] like Figure 1 As shown, Figure 1 This is a schematic diagram of the overall circuit structure of the present invention. It uses a cascode structure and a differential amplification configuration. The overall circuit includes common-source transistors M1 and M2, common-gate transistors M3 and M4, and a gate bias resistor R for the common-gate transistors. G Neutralizing capacitor C M1 C M2 The transmission lines TL1, TL2, TL3, TL4 and the inductor L are included. The gate bias of the common-source transistor in this differential amplifier module is provided by the front-end matching circuit, and the drain bias of the common-gate transistor is provided by the rear-end matching circuit.
[0019] Common-source transistor M1 and common-gate transistor M3 form one path of a differential pair, and common-source transistor M2 and common-gate transistor M4 form the other path of a differential pair. Neutralizing capacitor C... M1 One end is connected to the gate of transistor M1, and the other end is connected to the drain of transistor M2; neutralizing capacitor C M2 One end of the common-gate transistor M3 is connected to the gate of transistor M2, and the other end is connected to the drain of transistor M1. The drain of transistor M1 is connected to the lower end of transmission line TL1, the source of transistor M3 is connected to the upper end of transmission line TL3, and the upper end of transmission line TL1 is connected to the lower end of transmission line TL3; the drain of transistor M2 is connected to the lower end of transmission line TL2, the source of transistor M4 is connected to the upper end of transmission line TL4, and the upper end of transmission line TL2 is connected to the lower end of transmission line TL4; one end of the interlayer matching inductor L is connected to the junction of transmission lines TL2 and TL4, and the other end is connected to the junction of transmission lines TL1 and TL3. The gates of common-gate transistors M3 and M4 are connected to a bias resistor R. G One end is connected, R G The other end is connected to a DC bias V CG Differential input signal V IN+ V IN- The gates of common-source transistors M1 and M2 are connected respectively; the differential output signal V OUT+ V OUT- Connect the drains of common-gate transistors M3 and M4 respectively.
[0020] The differential input is connected to the preceding matching network; the differential output is connected to the following matching network. Simulation results for the circuit's stability factor (K value) are shown below. Figure 2 As shown, if the stability factor (K value) is greater than 1 throughout the entire frequency band, then the amplifier module is absolutely stable throughout the entire frequency band.
[0021] Since the differential structure has better anti-interference performance and symmetry than the single-ended structure, the amplifier module of this embodiment adopts a differential amplification configuration. To improve voltage swing and power gain, the amplifier module uses a cascode structure. To ensure that the voltage drop of the two transistor layers is the same, the common-source transistor and the common-gate transistor are transistors with the same gate width.
[0022] In addition, the gate connection of the common gate transistor adopts the gate shorting technology (the gates of all common gate transistors in the differential circuit are directly connected), which can simplify the layout of DC bias and improve the reverse isolation and stability of the circuit by taking advantage of the fact that the midpoint of the connection of the symmetrical points of the differential circuit is the AC ground.
[0023] Due to the presence of the gate-drain parasitic capacitance of the common-source transistor, negative feedback is introduced into the amplifier, which reduces the stability of the circuit. Therefore, neutralizing capacitor technology is introduced to improve the stability and gain of the circuit. The positive feedback current introduced by the cross-coupled neutralizing capacitor is used to counteract the effect of the gate-drain parasitic capacitance of the common-source transistor.
[0024] Under the influence of large millimeter-wave signals, the parasitic capacitance of the source to ground of the common-gate transistor, the parasitic capacitance of the drain to ground of the common-source transistor, and the parasitic capacitance of the common-source-common-gate interconnect to ground constitute a signal path to ground, which will cause a large power waste in the W-band and reduce the power-added efficiency. Therefore, interlayer matching is performed between the common-source transistor and the common-gate transistor.
[0025] The T-type interlayer matching network, consisting of a series transmission line, a parallel inductor to ground, and another series transmission line, has the advantages of low insertion loss and wide matching bandwidth. Furthermore, the characteristic that the symmetrical point connection of the differential circuit is the AC ground eliminates the need for a grounding capacitor when connecting the parallel inductor to ground, thus simplifying the layout.
[0026] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. It will be apparent to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and that the present invention can be implemented in other specific forms without departing from the spirit or basic features of the present invention.
[0027] Therefore, the embodiments should be regarded as exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of the equivalents of the claims be included within the invention.
[0028] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.
Claims
1. A single-stage differential cascode amplifier module for W-band, characterized in that, The cascode structure is used with an amplification configuration, including common-source transistors M1 and M2, common-gate transistors M3 and M4, and a gate bias resistor R for the common-gate transistors. G Neutralizing capacitor C M1 C M2 Transmission lines TL1, TL2, TL3, TL4 and interlayer matching inductor L; Common-source transistor M1 and common-gate transistor M3 form one path of a differential pair, and common-source transistor M2 and common-gate transistor M4 form the other path of a differential pair. Neutralizing capacitor C... M1 One end is connected to the gate of transistor M1, and the other end is connected to the drain of transistor M2; neutralizing capacitor C M2 One end of the transistor is connected to the gate of transistor M2, and the other end is connected to the drain of transistor M1; the sources of common-source transistors M1 and M2 are grounded. The drain of transistor M1 is connected to the lower end of transmission line TL1, the source of transistor M3 is connected to the upper end of transmission line TL3, and the upper end of transmission line TL1 is connected to the lower end of transmission line TL3; the drain of transistor M2 is connected to the lower end of transmission line TL2, the source of transistor M4 is connected to the upper end of transmission line TL4, and the upper end of transmission line TL2 is connected to the lower end of transmission line TL4. One end of the interlayer matching inductor L is connected to the connection point of transmission lines TL2 and TL4, and the other end is connected to the connection point of transmission lines TL1 and TL3; the gates of common-gate transistors M3 and M4 are connected to the bias resistor R. G One end is connected, R G The other end is connected to DC bias V CG ; The gates of common-source transistors M1 and M2 are respectively used as differential input signals V. IN+ V IN- The input terminals; the drains of common-gate transistors M3 and M4 serve as the differential output signals V. OUT+ V OUT- The output terminal.
2. The single-stage differential cascode amplifier module for W-band according to claim 1, characterized in that, The gate bias of common-source transistors M1 and M2 is provided by the front-end matching circuit, while the drain bias of common-gate transistors M3 and M4 is provided by the back-end matching circuit.
3. The single-stage differential cascode amplifier module for W-band according to claim 2, characterized in that, The gates of common-source transistors M1 and M2 are connected to the preceding matching network to receive the differential input signal V output by the preceding matching network. IN+ V IN- The drains of common-gate transistors M3 and M4 are connected to the subsequent matching network to output a differential output signal V. OUT+ V OUT- Then proceed to the subsequent matching network.
4. The single-stage differential cascode amplifier module for W-band according to claim 1, characterized in that, Common-source transistors M1 and M2 and common-gate transistors M3 and M4 use transistors with the same gate width.
Citation Information
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Apparatus and methods for a cascode amplifier topology for millimeter-wave power application
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