Low-addition phase-shift digital attenuator with amplitude calibration function and design method

Abstract

The application discloses a low-additional phase shift digital attenuator with amplitude calibration function and a design method, belongs to the field of digital attenuators in millimeter wave phased array T / R component integrated circuits, and comprises a plurality of attenuation units with different attenuation amounts, and the attenuation units with different attenuation amounts are connected together in stages; and comprises an amplitude error calibration unit and a phase shift compensation unit, the amplitude error calibration unit is connected with the attenuation unit, and is used for combining with the attenuation unit to realize a required attenuation bit and compensate an amplitude error; and the phase shift compensation unit is used for compensating an additional phase shift. The application has effective benefits of low attenuation amplitude error and low attenuation additional phase shift.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of digital controlled attenuator in millimeter wave phased array T / R module integrated circuit, and more particularly to a low additional phase shift digital controlled attenuator with amplitude calibration function and a design method. BACKGROUND

[0002] Phased array systems are widely used in radar, satellite communication and telemetry fields. For example, Ku band (10.7-12.7 GHz and 13.7-14.5 GHz) and Ka band (17.7-20.2 GHz and 27.5-30 GHz) satellite communication systems, and millimeter wave 5G (24.25-29.5 GHz and 37-43.5 GHz) communication systems. In order to realize the combination of high-speed link, flexible signal coverage and anti-interference ability, a large number of high-performance phased array transmit / receive (T / R) front-end modules are needed. In each unit of the phased array T / R, the amplitude control unit is used to compensate the gain variation between units to realize the reduction of antenna beam side lobe level (SLL). In order to realize the accurate adjustment of SLL and beam null, high-precision, large-bandwidth and small-step amplitude control circuit is needed. For a 16-unit uniformly distributed linear array, when the same signal amplitude is excited in each unit, the SLL is-13 dB, and by adjusting the excitation signal amplitude of each unit and combining Chebyshev / Taylor synthesis method, the SLL can be effectively suppressed. In order to obtain lower SLL, a wider amplitude adjustment range is needed. For example, -30 dB SLL needs not less than 12 dB amplitude adjustment range. Amplitude adjustment resolution is another important factor affecting beam forming, and reducing amplitude adjustment step can help to enhance the performance of beam forming. For example, a 16-element linear array, 0.5 dB amplitude adjustment step can realize the same performance compared with the ideal model. In addition, the additional phase shift change generated in the realization of different amplitude adjustment cannot be too large, otherwise it will seriously affect the beam forming of the phased array system. Therefore, the attenuator with high-precision attenuation error, low additional phase shift and large attenuation range is an important component element of high-performance phased array antenna system.

[0003] Variable-Gain Amplifiers (VGA) and digitally controlled attenuators are two important devices to realize amplitude control function. Traditional VGAs are difficult to achieve a compromise among bandwidth, gain and linearity performance, and have high power consumption, so there are certain limitations in the application. Compared with VGA, digitally controlled attenuators have the advantages of simple control mode, high linearity, large bandwidth, large attenuation range, low amplitude error / additional phase shift, and zero power consumption, and are more suitable for phased array system applications in microwave and millimeter wave frequency bands. At present, three typical attenuator topologies are widely used, which are distributed attenuation, switch gating attenuation and switch embedded T / Π attenuation. Firstly, the distributed attenuator can provide a wide bandwidth and low insertion loss, but it occupies a large circuit area and generally can only achieve an attenuation range of less than 10-15 dB; secondly, the switch gating attenuator can achieve low amplitude / phase error, but due to a large number of series switches, it has high loss; finally, the switch embedded T / Π attenuator has the advantages of low loss, large attenuation range and small area, and meets the T / R application of large-scale phased array. However, the switch embedded T / Π attenuator still has some technical difficulties: 1) when multiple attenuation units are cascaded, due to the sensitivity of the attenuation unit to the load impedance, as well as process fluctuations and high and low temperature changes, the attenuation amplitude accuracy is reduced; 2) the additional phase shift changes greatly in different attenuation states, which needs to be specially compensated; 3) due to the influence of the parasitic capacitance of the transistor and the circuit interconnection wiring, the high frequency (millimeter wave frequency band) application is limited.

[0004] Traditional microwave and millimeter wave integrated circuits are mainly designed and manufactured by using III-V compound semiconductor process, such as GaAs-based attenuators, which are widely used in phased array T / R components due to their high attenuation accuracy and low additional phase shift. However, the III-V compound semiconductor process has high cost, low device integration, and requires additional control and drive chips in practical applications. With the improvement of process level and design technology, silicon-based microwave and millimeter wave integrated circuits have comparable performance to traditional III-V compound semiconductor integrated circuits. Compared with III-V compound semiconductor microwave integrated circuits, silicon-based microwave integrated circuits have the advantages of high integration, low power consumption and low cost. Since the substrate impedance of silicon-based process is very low, the parasitic capacitance of the device itself and the parasitic capacitance of the metal interconnection have a great influence on the performance of the circuit, and it is difficult to realize high accuracy and low additional phase shift for attenuators manufactured by using silicon-based process at high frequency. SUMMARY

[0005] The present application aims to overcome the shortcomings of the prior art, and provides a low additional phase shift digitally controlled attenuator with amplitude calibration function and a design method, which has effective benefits of low attenuation amplitude error and low attenuation additional phase shift.

[0006] The purpose of the present application is achieved by the following solutions:

[0007] The low additional phase shift digital attenuator with amplitude calibration function comprises a plurality of attenuation units with different attenuation amounts, and the attenuation units with different attenuation amounts are connected in cascade; and comprises an amplitude error calibration unit and a phase shift compensation unit, the amplitude error calibration unit is connected with the attenuation unit, and is used for combining with the attenuation unit to realize the required attenuation bit and compensate the amplitude error; the phase shift compensation unit is used for compensating the additional phase shift.

[0008] Further, the matching inductors are further contained between each attenuation unit, and are used for improving the inter-stage impedance matching performance of each attenuation bit.

[0009] Further, the plurality of attenuation units with different attenuation amounts are 0.5dB attenuation unit one, 4dB attenuation unit, 7.5dB attenuation unit, 0.5dB amplitude error calibration attenuation unit one, 2dB attenuation unit, 0.5dB attenuation unit two, 0.5dB amplitude error calibration attenuation unit two and 1dB amplitude error calibration unit from input to output; 0.5dB attenuation unit two and 0.5dB amplitude error calibration attenuation unit two constitute 1dB attenuation unit; 0.5dB attenuation unit and 1dB attenuation unit are realized by the switch embedded T-type attenuation circuit structure, 2dB attenuation unit and 4dB attenuation unit are realized by the switch embedded T-type attenuation circuit structure, and 7.5dB attenuation unit is realized by the switch embedded Π-type attenuation circuit structure; 0.5dB attenuation unit two and 0.5dB amplitude error calibration attenuation unit two are combined to realize 1dB attenuation bit, 7.5dB attenuation unit and 0.5dB amplitude error calibration attenuation unit one are combined to realize 8dB attenuation bit, and 1dB amplitude error calibration unit is the added amplitude error calibration unit, and the attenuation amplitude error calibration function of ±1dB can be realized.

[0010] Further, the phase shift compensation units are arranged in the circuits of the 4dB attenuation unit, the 7.5dB attenuation unit and the 2dB attenuation unit, and are respectively used for compensating the additional phase shift of the 4dB attenuation unit, the 7.5dB attenuation unit and the 2dB attenuation unit when attenuating, so as to realize the reduction of the additional phase shift of the digital attenuator.

[0011] Further, the phase shift compensation unit is a parallel capacitor and is connected on the series resistor RP.

[0012] Further, one 7.5dB attenuation unit and one 0.5dB amplitude error calibration attenuation unit one constitute an 8dB attenuation unit.

[0013] Further, the matching inductors contained between each attenuation unit are 6 in total.

[0014] Further, the switch-embedded T-type attenuation circuit structure comprises a parallel MOS switch transistor M2, a series resistor RG at the control end of the MOS switch transistor, a series resistor RB at the body end of the MOS switch transistor, and a parallel attenuation resistor RP; the switch-embedded Π-type attenuation circuit structure comprises a series MOS switch transistor M1, a series resistor RG at the control end of the MOS switch transistor, a series resistor RB at the body end of the MOS switch transistor, a series attenuation resistor RS, a parallel attenuation resistor RP, a parallel capacitor Ccomp, and a parallel MOS switch transistor M2.

[0015] Further, the six matching inductors are L1-L6, and L1=L6=100pH, L2=L5=90pH, and L3=L4=70pH.

[0016] A design method of a low-additional phase shift digital attenuator with amplitude calibration function, according to the attenuation amplitude error variation caused by the chip process PVT variation of the selected digital attenuator, the attenuation unit with attenuation amplitude error variation greater than the set value is split, and the amplitude error calibration unit is added, and the additional phase shift capacitor compensation is matched, and a digital attenuator with high attenuation precision and low additional phase shift is designed; the digital attenuator comprises a millimeter wave silicon-based digital attenuator, and the millimeter wave silicon-based digital attenuator comprises a digital attenuator with calibratable attenuation amplitude error based on a silicon-based 65nm CMOS process.

[0017] The beneficial effects of the present application include:

[0018] (1) Low attenuation amplitude error. The embodiment scheme of the present application aims at the problem that the attenuation amplitude error of the silicon-based digital attenuator is large due to process fluctuation and high-low temperature variation. By reasonably designing the attenuation amplitude error calibration unit and combining to realize the required attenuation bit, the amplitude error caused by process fluctuation and temperature variation can be effectively compensated, and the attenuation amplitude error RMS performance of the silicon-based digital attenuator is reduced. Therefore, the present application has the effective benefits of low attenuation amplitude error.

[0019] (2) Low additional phase shift. The silicon-based digital attenuator is affected by the parasitic capacitance of the MOS switch transistor and the parasitic capacitance of the high-frequency signal interconnection wiring, and the T / Π type attenuation structure presents a large phase difference in the reference state and the attenuation state. The embodiment scheme of the present application adopts the method of adding a parallel capacitor Ccomp on the series resistor RP of the 2dB attenuation unit 5, the 4dB attenuation unit 2 and the 7.5dB attenuation unit 3 with large attenuation additional phase shift to compensate the additional phase shift. Therefore, the present application has the effective benefits of low attenuation additional phase shift. BRIEF DESCRIPTION OF DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description only show some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from these drawings without any creative effort.

[0021] Figure 1 The functional block diagram of the low-addition phase shift digital attenuator with amplitude calibration function in the embodiment of the present application;

[0022] Figure 2 The circuit principle diagram of the low-addition phase shift digital attenuator with amplitude calibration function in the embodiment of the present application, wherein 1 is a 0.5dB attenuation unit one, 6 is a 0.5dB attenuation unit two, 2 is a 4dB attenuation unit, 3 is a 7.5dB attenuation unit, 4 is a 0.5dB amplitude error calibration attenuation unit one, 7 is a 0.5dB amplitude error calibration attenuation unit two, 5 is a 2dB attenuation unit, and 8 is a 1dB amplitude error calibration unit.

[0023] Figure 3 The attenuation amplitude error RMS performance curve diagram of the present application;

[0024] Figure 4 The attenuation phase error RMS performance curve diagram of the present application. DETAILED DESCRIPTION

[0025] The present application will be further described below in combination with the drawings and embodiments. All the features disclosed in all the embodiments in the present specification, or all the steps in the methods or processes impliedly disclosed, can be combined and / or extended, replaced, in any manner, except that the features and / or steps which are mutually exclusive are not combined.

[0026] In view of the prior art, the inventors of the present application, after creative analysis and thinking, realized that the technical problems of the digital attenuator (such as a silicon-based millimeter wave embedded switch) exist: 1) When multiple-stage attenuation units are cascaded, due to the sensitivity of the attenuation unit to the load impedance, as well as process fluctuations and high-temperature changes, the accuracy of the attenuation amplitude is reduced; 2) The additional phase shift changes greatly in different attenuation states, which needs to be specially compensated; 3) Due to the influence of the parasitic capacitance of the transistor and the circuit interconnection wiring, the high-frequency (millimeter wave frequency band) application is limited. In view of the above technical problems, the inventors of the present application, after further creative thinking, according to the attenuation amplitude error change caused by the PVT variation of the chip process selected by the digital attenuator, split the attenuation unit with large attenuation amplitude error change, appropriately increase the amplitude error calibration unit, and cooperate with the additional phase shift capacitance compensation technology, design a digital attenuator with attenuation amplitude error calibration function, high attenuation precision and low additional phase shift, which can meet the application of high integration and low cost millimeter wave phased array antenna system. At the same time, in view of the problem that the attenuation amplitude error of the millimeter wave silicon-based digital attenuator is large due to process fluctuations and high-temperature changes, the corresponding amplitude calibration technology method is proposed.

[0027] In a further inventive concept, the technical scheme of the present application realizes the five-bit attenuation function of 0.5dB / 1dB / 2dB / 4dB / 8dB by cascading eight attenuation units, specifically including: the 1dB attenuation bit is composed of one 0.5dB attenuation unit and one 0.5dB amplitude error attenuation unit, the 8dB attenuation bit is composed of one 7.5dB attenuation unit and one 0.5dB amplitude error attenuation unit, and one 1dB amplitude error calibration attenuation unit is additionally added, which can realize the attenuation amplitude error adjustment range of ±1dB; the 0.5dB / 1dB attenuation unit is realized by a simplified switch T-type attenuation structure, the 2dB / 4dB attenuation unit is realized by a switch T-type attenuation structure, and the 7.5dB attenuation unit is realized by a switch Π-type attenuation structure; the attenuation additional phase shift compensation capacitance technology is designed in the 2dB / 4dB / 7.5dB attenuation units; six matching inductors are included between each attenuation unit to improve the inter-stage impedance matching performance of each attenuation bit. Based on the silicon-based 65nm CMOS process, a digital attenuator with adjustable attenuation amplitude error is finally realized, the attenuation dynamic range is 15.5dB, and the minimum attenuation step is 0.5dB.

[0028] Reference Figures 1-2In the following described exemplary preferred embodiment, a low additional phase shift digital attenuator with amplitude calibration function. Its circuit principle composition is as follows: 8 different attenuation amount of basic attenuation unit cascade respectively, from input to output in turn for 0.5dB attenuation unit 1, 4dB attenuation unit 2, 7.5dB attenuation unit 3, 0.5dB amplitude error calibration attenuation unit 4, 2dB attenuation unit 5, 0.5dB attenuation unit 6, 0.5dB amplitude error calibration attenuation unit 7, 1dB amplitude error calibration unit 8; 0.5dB and 1dB attenuation unit is realized by the simplified switch embedded T type attenuation circuit structure, 2dB and 4dB attenuation unit is realized by the switch embedded T type attenuation circuit structure, 7.5dB attenuation unit is realized by the switch embedded Π type attenuation circuit structure; 6 and 7 combination realizes 1dB attenuation bit, 3 and 4 combination realizes 8dB attenuation bit, 8 is the additional amplitude error calibration unit, can realize ±1dB of attenuation amplitude error calibration function.

[0029] Referring to Figure 2 The circuit structure of attenuation unit 2, 3 and 5, the series resistance RP is increased respectively in parallel with capacitor Ccomp, the additional phase shift of 2, 3 and 5 attenuation unit when attenuating is compensated, the reduction of additional phase shift of the digital attenuator of the application is realized.

[0030] Referring to Figure 2 M1 is a series MOS switch transistor, M2 is a parallel MOS switch transistor, RS is a series attenuation resistor, RP is a parallel attenuation resistor, RG is a MOS switch tube control end series resistor, RB is a MOS switch tube body end series resistor, the above circuit elements in the embodiment related parameters see Figure 2 L1~L6 is designed between each basic attenuation unit matching inductance, enhance the impedance matching performance between each attenuation unit. In the embodiment of the application, L1=L6=100pH, L2=L5=90pH, L3=L4=70pH.

[0031] Referring to Figure 3 And Figure 4The performance curve of the embodiment is shown in the table. The simulation results show that the amplitude error RMS is relatively large under ff / -40°, ss / -40° and tt / -40° conditions, and can reach 0.88 dB at most in the frequency range of 25-35 GHz. The combination of the three calibration positions can realize calibration of the amplitude error of the large attenuation state, so that the amplitude error RMS under all process angle conditions can be reduced to below 0.37 dB in the whole working frequency band. The phase error RMS under all process angle conditions is relatively good, and the influence on the phase error is very small when the amplitude calibration is performed. The test results show that in the frequency range of 25-35 GHz, the amplitude error RMS is 0.12-0.26 dB, and the phase error is 1.02°-2.07°. Therefore, the silicon-based digital attenuator with high attenuation precision and low additional phase shift characteristics can be realized.

[0032] It should be noted that the following embodiments can be combined and / or extended, replaced, in any logical manner within the scope of protection defined in the claims of the present application, for example, the disclosed technical principles, disclosed technical features or implied disclosed technical features.

[0033] Embodiment 1

[0034] A low-additional-phase-shift digital attenuator with amplitude calibration function comprises a plurality of attenuation units with different attenuation amounts, and the attenuation units with different attenuation amounts are connected together in cascade; and comprises an amplitude error calibration unit and a phase shift compensation unit, the amplitude error calibration unit is connected with the attenuation unit, and is used to combine with the attenuation unit to realize the required attenuation position and compensate the amplitude error; the phase shift compensation unit is used to compensate the additional phase shift.

[0035] Embodiment 2

[0036] On the basis of embodiment 1, each attenuation unit further comprises a matching inductor for improving the inter-stage impedance matching performance of each attenuation position.

[0037] Embodiment 3

[0038] On the basis of embodiment 1, the attenuation units of different attenuation amounts are 0.5dB attenuation unit one, 4dB attenuation unit 2, 7.5dB attenuation unit 3, 0.5dB amplitude error calibration attenuation unit one 4, 2dB attenuation unit 5, 0.5dB attenuation unit two 6, 0.5dB amplitude error calibration attenuation unit two 7 and 1dB amplitude error calibration unit 8 from input to output; 0.5dB attenuation unit two 6 and 0.5dB amplitude error calibration attenuation unit two 7 constitute 1dB attenuation unit; 0.5dB attenuation unit 1 and 1dB attenuation unit are realized by switch embedded T type attenuation circuit structure, 2dB attenuation unit 5 and 4dB attenuation unit 2 are realized by switch embedded T type attenuation circuit structure, 7.5dB attenuation unit 3 is realized by switch embedded Π type attenuation circuit structure; 0.5dB attenuation unit two 6 and 0.5dB amplitude error calibration attenuation unit two 7 are combined to realize 1dB attenuation bit, 7.5dB attenuation unit 3 and 0.5dB amplitude error calibration attenuation unit one 4 are combined to realize 8dB attenuation bit, 1dB amplitude error calibration unit 8 is an added amplitude error calibration unit, which can realize ±1dB attenuation amplitude error calibration function.

[0039] Embodiment 4

[0040] On the basis of embodiment 3, the circuit in 4dB attenuation unit 2, 7.5dB attenuation unit 3 and 2dB attenuation unit 5 is provided with the corresponding phase shift compensation unit respectively, which is used for compensating the additional phase shift when 4dB attenuation unit 2, 7.5dB attenuation unit 3 and 2dB attenuation unit 5 attenuate, realizing the reduction of additional phase shift of digital controlled attenuation.

[0041] Embodiment 5

[0042] On the basis of embodiment 4, the phase shift compensation unit is a parallel capacitor, which is connected to the series resistor RP.

[0043] Embodiment 6

[0044] On the basis of embodiment 3, 1 7.5dB attenuation unit 3 and 1 0.5dB amplitude error calibration attenuation unit one 4 constitute 8dB attenuation unit.

[0045] Embodiment 7

[0046] On the basis of embodiment 3, the matching inductors contained between each attenuation unit are 6 in total.

[0047] Embodiment 8

[0048] On the basis of embodiment 3, the switch-embedded T-type attenuation circuit structure comprises parallel MOS switch transistor M2, the control end of the MOS switch tube is connected with a resistor RG in series, the body end of the MOS switch tube is connected with a resistor RB in series, and a parallel attenuation resistor RP is connected; the switch-embedded Π-type attenuation circuit structure comprises series MOS switch transistor M1, the control end of the MOS switch tube is connected with a resistor RG in series, the body end of the MOS switch tube is connected with a resistor RB in series, a series attenuation resistor RS is connected, a parallel attenuation resistor RP is connected, a parallel capacitor Ccomp is connected, and parallel MOS switch transistor M2 is connected.

[0049] Embodiment 9

[0050] On the basis of embodiment 7, the six matching inductors are L1-L6, and L1=L6=100pH, L2=L5=90pH, and L3=L4=70pH.

[0051] Embodiment 10

[0052] A design method of a low additional phase shift digital attenuator with amplitude calibration function, according to the attenuation amplitude error change caused by the chip process PVT change of the selected digital attenuator, the attenuation unit with attenuation amplitude error change greater than the set value is split, and the amplitude error calibration unit is added, and the additional phase shift capacitor compensation is matched, and a digital attenuator with high attenuation precision and low additional phase shift is designed; the digital attenuator comprises a millimeter wave silicon-based digital attenuator, and the millimeter wave silicon-based digital attenuator comprises a digital attenuator with calibratable attenuation amplitude error based on a silicon-based 65nm CMOS process.

[0053] The units described in the embodiments of the application can be realized in the form of software or in the form of hardware, and the described units can also be arranged in a processor. In some cases, the names of these units do not constitute a limitation on the units themselves.

[0054] According to an aspect of the present application, a computer program product or computer program is provided, which includes computer instructions stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer readable storage medium, and the processor executes the computer instructions, so that the computer device executes the method provided in the various optional implementation manners.

[0055] As another aspect, the application also provides a computer readable medium, which can be included in the electronic device described in the above embodiments, or can exist independently without being assembled into the electronic device. The computer readable medium carries one or more programs, which, when executed by the electronic device, enable the electronic device to implement the method described in the above embodiments.

[0056] The parts of the application not involved in the application are the same as or can be realized by the prior art.

[0057] The technical solution described above is only one embodiment of the application. Based on the application disclosed and the application method and principle, those skilled in the art can easily make various types of improvements or modifications, and the method described in the above specific embodiments is not limited. Therefore, the above description is only preferred and not limited.

[0058] In addition to the above examples, those skilled in the art can obtain other embodiments by being inspired or making changes by using related knowledge or technology according to the above disclosure. The features of each embodiment can be interchanged or replaced. The changes and variations made by those skilled in the art do not deviate from the spirit and scope of the application, and should be within the protection scope of the claims of the application.

Claims

1. A low additional phase shift digital attenuator with amplitude calibration function, characterized in that, The attenuation units with different attenuation amounts are connected in cascade, and the amplitude error calibration unit and the phase shift compensation unit are connected with the attenuation units, wherein the amplitude error calibration unit is used to realize the required attenuation position and compensate the amplitude error in combination with the attenuation units, and the phase shift compensation unit is used to compensate the additional phase shift. The attenuation units with different attenuation amounts are connected in cascade, and the amplitude error calibration unit and the phase shift compensation unit are connected with the attenuation units, wherein the amplitude error calibration unit is used to realize the required attenuation position and compensate the amplitude error in combination with the attenuation units, and the phase shift compensation unit is used to compensate the additional phase shift. The 0.5dB attenuation unit two (6) and the 0.5dB amplitude error calibration attenuation unit two (7) constitute a 1dB attenuation unit. The 0.5dB attenuation unit one (1) and the 1dB attenuation unit are realized by the switch-embedded T-type attenuation circuit structure, the 2dB attenuation unit (5) and the 4dB attenuation unit (2) are realized by the switch-embedded T-type attenuation circuit structure, the 7.5dB attenuation unit (3) is realized by the switch-embedded Π-type attenuation circuit structure, the 0.5dB attenuation unit two (6) and the 0.5dB amplitude error calibration attenuation unit two (7) are combined to realize a 1dB attenuation position, the 7.5dB attenuation unit (3) and the 0.5dB amplitude error calibration attenuation unit one (4) are combined to realize an 8dB attenuation position, and the 1dB amplitude error calibration unit (8) is an additional amplitude error calibration unit, which can realize the attenuation amplitude error calibration function of ±1dB. The phase shift compensation units are arranged in the circuits of the 4dB attenuation unit (2), the 7.5dB attenuation unit (3) and the 2dB attenuation unit (5) to compensate the additional phase shift of the 4dB attenuation unit (2), the 7.5dB attenuation unit (3) and the 2dB attenuation unit (5) respectively, so as to reduce the additional phase shift of the digital control attenuation. The switch-embedded T-type attenuation circuit structure comprises a parallel MOS switch transistor M2, a resistor RG connected in series with the control end of the MOS switch transistor, a resistor RB connected in series with the body end of the MOS switch transistor, and a parallel attenuation resistor RP.

2. The low-addition phase-shift digital attenuator with amplitude calibration function according to claim 1, wherein, The matching inductors are arranged between the attenuation units to improve the inter-stage impedance matching performance of each attenuation position.

3. The low-addition phase-shift digital attenuator with amplitude calibration function according to claim 1, wherein, The phase shift compensation unit is a parallel capacitor connected in series with the resistor RP.

4. The low-addition phase-shift digital attenuator with amplitude calibration function according to claim 1, wherein, One 7.5dB attenuation unit (3) and one 0.5dB amplitude error calibration attenuation unit one (4) constitute an 8dB attenuation unit.

5. The low-addition phase-shift digital attenuator with amplitude calibration function according to claim 1, wherein, The total number of the matching inductors arranged between the attenuation units is six.

6. The low-addition phase-shift digital attenuator with amplitude calibration function according to claim 5, characterized in that, 6 matched inductors are L1-L6, and L1=L6=100pH, L2=L5=90pH, L3=L4=70pH.

7. A design method of a low additional phase shift digital attenuator with amplitude calibration function, characterized in that, The low additional phase shift digital attenuator with amplitude calibration function based on claim 1 comprises the steps of: according to the attenuation amplitude error variation caused by the chip process PVT variation selected by the digital attenuator, splitting the attenuation unit with attenuation amplitude error variation greater than the set value, and adding the amplitude error calibration unit, and then cooperating with the additional phase shift capacitor compensation to design the digital attenuator with high attenuation precision and low additional phase shift. The digital attenuator comprises a millimeter wave silicon-based digital attenuator, and the millimeter wave silicon-based digital attenuator comprises a digital attenuator with calibratable attenuation amplitude error based on a silicon-based 65nm CMOS process.

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