Drive regulation circuits, power modules, and power conversion devices for power semiconductor components

By using a differentiating circuit and a voltage regulation circuit in the drive adjustment circuit of the power semiconductor element, the gate voltage is controlled to reduce switching losses during migration, solving the problem of ineffective control of switching losses in the prior art and achieving more efficient energy utilization.

CN115769476BActive Publication Date: 2025-10-31MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
CN202080102819.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-07-14
Publication Date
2025-10-31
Estimated Expiration
2040-07-14

AI Technical Summary

Technical Problem

Existing technologies cannot effectively control the switching losses of semiconductor components used in power applications during migration, leading to increased energy consumption.

Method used

By employing a differentiating circuit, a comparator, and a voltage adjustment circuit, the gate voltage of the semiconductor element is differentiated and compared to adjust its voltage, thereby controlling the rate of current change during the migration process and reducing switching losses.

Benefits of technology

By precisely controlling the gate voltage, switching losses during migration are reduced, energy consumption is lowered, and the efficiency of power semiconductor devices is improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The drive adjustment circuit (1000) for a power semiconductor element includes: a differentiating circuit (5) for differentiating the gate voltage of the power semiconductor element (1); a power supply (8) for generating a comparison reference voltage; a comparator (7) having a first input terminal connected to the differentiating circuit (5) and a second input terminal for receiving the comparison reference voltage; and a voltage adjustment circuit (6) for adjusting the gate voltage of the power semiconductor element (1) according to the output of the comparator (7).
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Description

Technical Field

[0001] This disclosure relates to drive regulation circuits for power semiconductor elements, power modules, and power conversion devices. Background Technology

[0002] Semiconductor components for controlling large amounts of electricity are used in power supply circuits that generate AC power at different frequencies based on direct current or alternating current, or in power conversion devices (inverters) incorporating such circuits. When semiconductor components are used in inverters, it is important to suppress electricity consumption to reduce greenhouse gas emissions. Methods for reducing the energy generated within semiconductor components are known.

[0003] For example, Patent Document 1 describes a method for reducing power consumption and increasing switching speed in power semiconductor devices. Patent Document 1... Figure 1 Power semiconductor circuits and power module circuit devices can suppress switching losses by preventing gate driver breakdown due to induced voltage, transient voltage, and overshoot voltage generated by the inductive component of the line during turn-off, and by suppressing the self-turn-on of the power transistor.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2019-80359 Summary of the Invention

[0007] However, the power semiconductor drive circuit in Patent Document 1 cannot control the voltage and current during the transition of the power semiconductor element from an off state to an on state or from an on state to an off state. As a result, this power semiconductor drive circuit cannot reduce switching losses during the transition operation.

[0008] Therefore, the purpose of this disclosure is to provide a drive adjustment circuit, a power module, and a power conversion device for power semiconductor elements that can reduce switching losses during migration operations.

[0009] The drive adjustment circuit for a power semiconductor element disclosed herein includes: a differentiating circuit for differentiating the gate voltage of the power semiconductor element; a power supply for generating a comparison reference voltage; a comparator having a first input terminal connected to the differentiating circuit and a second input terminal for receiving the comparison reference voltage; and a voltage adjustment circuit for adjusting the gate voltage of the power semiconductor element according to the output of the comparator.

[0010] According to this disclosure, the gate voltage of the power semiconductor element is adjusted based on a comparison between the voltage obtained by differentiating the gate voltage and the magnitude of the comparison reference voltage generated by the power supply, thereby reducing switching losses during migration operation. Attached Figure Description

[0011] Figure 1 This is a diagram showing the drive adjustment circuit 1000 of the power semiconductor element according to Embodiment 1.

[0012] Figure 2 This is a diagram showing the structure of the differentiating circuit 5A.

[0013] Figure 3 This is a diagram showing the structure of voltage regulation circuit 6.

[0014] Figure 4 This is a diagram showing the structure of the voltage regulation circuit 6A.

[0015] Figure 5 This is a diagram illustrating the operation of the drive adjustment circuit 1000 for the power semiconductor element according to Embodiment 1.

[0016] Figure 6 This is a diagram showing the operating waveforms of the switch 9 being turned on and off in the drive adjustment circuit 1000 for the power semiconductor element in Embodiment 1.

[0017] Figure 7 This is a diagram showing the drive adjustment circuit 2000 of the power semiconductor element according to Embodiment 2.

[0018] Figure 8 This is a diagram showing the structure of voltage regulation circuit 6D.

[0019] Figure 9 This is a diagram showing the structure of the voltage regulation circuit 6E.

[0020] Figure 10 This is a diagram illustrating the operation of the drive adjustment circuit 2000 for the power semiconductor element according to Embodiment 2.

[0021] Figure 11 This is a diagram showing the drive adjustment circuit 3000 of the power semiconductor element according to Embodiment 3.

[0022] Figure 12 This is a diagram showing an example of the structure of the rising edge detection circuit 10.

[0023] Figure 13 This is a diagram showing the structure of voltage regulation circuit 6B.

[0024] Figure 14This is a diagram showing the structure of the voltage regulation circuit 6C.

[0025] Figure 15 This is a diagram illustrating the operation of the drive adjustment circuit 3000 for the power semiconductor element according to Embodiment 3.

[0026] Figure 16 This is a diagram showing the structure of the power module 5000 according to Embodiment 4.

[0027] Figure 17 This is a diagram showing the structure of the power module 4000 according to Embodiment 5.

[0028] Figure 18 This is a block diagram showing the structure of the power conversion system according to Embodiment 6.

[0029] (Symbol Explanation)

[0030] 1, 1a, 1b: Semiconductor components for power applications; 2, 2a, 2b: Freewheeling diodes; 3, 3a, 3b: Drive circuits; 4, 4a, 4b: Gate resistors; 5: Differentiating circuit; 5a: Capacitor; 5b, 5d, 6a: Resistors; 5c: Operational amplifier; 6, 6A, 6B, 6C, 6D, 6E: Voltage regulation circuits; 6b: Diode; 6c: NMOS transistor; 7: Comparator; 8, 8a: Power supply; 9: Switch; 10: Rising edge detection circuit; 11: Decoder; 10b, 12: Inverting circuit; 100: Power supply; 200: Power conversion device; 201: Main conversion circuit; 202: Semiconductor module; 203: Control circuit; 300: Load; 1000, 2000, 3000, 1000a, 1000b: Drive adjustment circuits; 4000, 5000: Power modules. Detailed Implementation

[0031] Hereinafter, embodiments will be described with reference to the accompanying drawings. In the following embodiments, the same reference numerals are used for the same constituent elements.

[0032] Implementation method 1.

[0033] Figure 1 This is a diagram showing a drive adjustment circuit 1000 for a power semiconductor element according to Embodiment 1. The drive adjustment circuit 1000 includes a differentiating circuit 5, a comparator 7, a voltage adjustment circuit 6, and a switch 9.

[0034] like Figure 1As shown, the power semiconductor element 1 is, for example, composed of an IGBT (Insulated Gate Bipolar Transistor), a bipolar transistor, or a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The freewheeling diode 2 is connected in anti-parallel to the power semiconductor element 1. The drive circuit 3 is driven by a control signal CT. The drive circuit 3 is connected to the first terminal of the gate resistor 4. The second terminal of the gate resistor 4 is connected to the gate terminal of the power semiconductor element 1. The emitter terminal of the power semiconductor element 1 is connected to a reference potential Vss. Vss is the reference potential of the power semiconductor element 1.

[0035] Differentiating circuit 5 differentiates the gate voltage Vg at the gate terminal of the power semiconductor element 1, outputting a voltage Vdiff. Differentiating circuit 5 includes a capacitor 5a and a resistor 5b connected in series. The first terminal of capacitor 5a is connected to the gate terminal of the power semiconductor element 1. The first terminal of resistor 5b is connected to a reference potential Vss. The second terminals of capacitor 5a and resistor 5b are connected to node ND1. Node ND1 is the output terminal of differentiating circuit 5. Node ND1 is connected to the negative input terminal of comparator 7.

[0036] Figure 1 The structure of the differential circuit 5 is an example. Figure 2 This is a diagram showing the structure of the 5A differentiating circuit. It can also be used as a substitute. Figure 1 The differentiating circuit 5 uses Figure 2 The differential circuit shown is 5A.

[0037] Differentiating circuit 5A includes resistor 5d, capacitor 5a, operational amplifier 5c, and resistor 5b. Terminal 1 of resistor 5d is connected to the gate terminal of the power semiconductor element 1. Terminal 2 of resistor 5d is connected to terminal 1 of capacitor 5a. Terminal 2 of capacitor 5a is connected to the negative input terminal of operational amplifier 5c. The positive input terminal of operational amplifier 5c is connected to the reference potential Vss. Resistor 5b is connected between the negative input terminal and the output terminal of operational amplifier 5c. The output terminal of operational amplifier 5c is connected to node ND1.

[0038] Figure 2 The differential circuit 5A shown can adjust the gain by using the resistance values ​​of resistors 5d and 5b. The gain is obtained by dividing the resistance value of resistor 5b by the resistance value of resistor 5d.

[0039] Refer again Figure 1Power supply 8 is positioned between the positive input terminal of comparator 7 and the reference potential Vss. Power supply 8 generates a voltage Vref (comparison reference voltage).

[0040] Comparator 7 has a negative input terminal connected to node ND1, which serves as the output terminal of differentiating circuit 5, and a positive input terminal for the voltage Vref of the input power supply 8. The voltage Vref of power supply 8 is greater than the reference potential Vss. When the output voltage Vdiff of differentiating circuit 5 is greater than the voltage Vref of power supply 8, comparator 7 outputs a low-level output voltage Vout1. When the output voltage Vdiff of differentiating circuit 5 is less than the voltage Vref of power supply 8, comparator 7 outputs a high-level output voltage Vout1.

[0041] Switch 9 is connected between the negative input terminal of comparator 7 and the reference potential Vss. By switching switch 9, the potential Vdiff at the negative input terminal of comparator 7 is controlled. As a result, the gate voltage Vg of the power semiconductor element 1 is controlled.

[0042] The voltage adjustment circuit 6 receives the output voltage Vout of the comparator 7 and adjusts the gate voltage Vg of the power semiconductor element 1. The voltage adjustment circuit 6 also has the function of drawing in the gate current of the power semiconductor element 1. When the output voltage Vdiff of the differentiating circuit 5, as indicated by the comparator 7, is greater than the voltage Vref of the power supply 8, the voltage adjustment circuit 6 draws in the gate current of the power semiconductor element 1.

[0043] Figure 3 This is a diagram showing the structure of voltage regulation circuit 6.

[0044] The voltage adjustment circuit 6 includes a resistor 6a and a diode 6b connected in series. The resistor 6a has a first terminal connected to the gate terminal of the power semiconductor element 1 and a second terminal connected to the anode of the diode 6b. The diode 6b has an anode connected to the second terminal of the resistor 6a and a cathode connected to the output terminal of the comparator 7.

[0045] The ability to adjust the gate current of the power semiconductor element 1 is adjusted by limiting the current flowing through the diode 6b using the resistance value of resistor 6a. When the output voltage Vout of comparator 7 is high, the voltage adjustment circuit 6 does not operate. Here, the magnitude of the high-level voltage Vout is the same as the magnitude of the gate voltage Vg of the power semiconductor element 1 when it is in the on state. When the output voltage Vout of comparator 7 is low, the voltage adjustment circuit 6 operates. The magnitude of the low-level voltage Vout is the same as the magnitude of the reference potential Vss.

[0046] The output voltage Vout of the comparator 7, which determines whether the voltage adjustment circuit 6 operates, does not necessarily need to be equal to the gate voltage Vg or the reference potential Vss when the power semiconductor element 1 is in the on state. When it is desired to operate the voltage adjustment circuit 6, a voltage A is applied across the voltage adjustment circuit 6 such that the current value set by the resistance value of resistor 6a flows through diode 6b. When it is not desired to operate the voltage adjustment circuit 6, a voltage B is applied across the voltage adjustment circuit 6 such that no current flows through diode 6b.

[0047] Figure 3 The structure of voltage regulation circuit 6 is an example. Figure 4 This is a diagram showing the structure of the voltage regulation circuit 6A. It can also be used as a substitute. Figure 3 The voltage adjustment circuit 6 is used Figure 4 The voltage adjustment circuit shown is 6A.

[0048] The voltage regulation circuit 6A includes a resistor 6a, a diode 6b, and an NMOS transistor 6c connected in series. The resistor 6a has a first terminal connected to the gate terminal of the power semiconductor element 1 and a second terminal connected to the anode of the diode 6b. The diode 6b has an anode connected to the second terminal of the resistor 6a and a cathode connected to the drain of the NMOS transistor 6c. The NMOS transistor 6c has a drain connected to the cathode of the diode 6b, a source connected to a reference potential Vss, and a gate connected to the output terminal of the comparator 7.

[0049] As mentioned above, in Figure 3 In the structure of the voltage adjustment circuit 6 shown, the comparator's output voltage Vout becomes the same potential as the gate voltage Vg of the power semiconductor element 1, or a reference potential Vss. Therefore, for example, when the gate voltage Vg of the power semiconductor element 1 is 15V, the comparator 7 also needs to output a 15V voltage. Therefore, a semiconductor element capable of outputting a 15V voltage (e.g., a bipolar transistor or a power MOSFET) is required. On the other hand, when the comparator 7 is constructed using a typical CMOS process element with an output voltage of 5V, miniaturization and low power consumption can be achieved. However, Figure 3 The potential difference between the output voltage Vout of the comparator 7 and the gate voltage Vg of the power semiconductor element 1 is 10V. Therefore, there is a problem that the voltage adjustment circuit 6 operates when the output voltage Vout of the comparator 7 is high.

[0050] Figure 4 The voltage adjustment circuit 6A shown can solve this problem. By adding an NMOS transistor 6c, the comparator 7 can be constructed using semiconductor elements produced by general CMOS technology, thus enabling the comparator 7 to be miniaturized and have low power consumption.

[0051] Refer again Figure 1 The comparator 7 has a negative input terminal connected to the output terminal of the differentiator circuit 5 and the switch 9, and a positive input terminal connected to the voltage Vref of the power supply 8.

[0052] When the output voltage Vdiff of the differentiating circuit 5 is greater than the voltage Vref of the power supply 8, the output voltage Vout of the comparator 7 becomes low (the aforementioned reference potential Vss). At this time, the voltage adjustment circuit 6 operates.

[0053] When the output voltage Vdiff of the differentiating circuit 5 is less than the voltage Vref of the power supply 8, the output voltage Vout of the comparator 7 becomes high (the gate voltage Vg of the aforementioned power semiconductor element 1). At this time, the voltage adjustment circuit 6 does not operate.

[0054] Switch 9 is connected between the negative input terminal of comparator 7 and the reference potential Vss. Switch 9 is selected to be on or off by an external selection signal SL. By controlling switch 9, it is possible to select whether the voltage regulation circuit 6 operates.

[0055] When switch 9 is on, the voltage at the negative input terminal of comparator 7 becomes the reference potential Vss, so the output voltage Vout of comparator 7 becomes high. As a result, voltage adjustment circuit 6 does not operate. When switch 9 is off, comparator 7 outputs the comparison result based on the output voltage Vdiff of differentiating circuit 5. Voltage adjustment circuit 6 is then controlled based on the output voltage Vout representing the comparison result.

[0056] Figure 5 This is a diagram illustrating the operation of the drive adjustment circuit 1000 for the power semiconductor element according to Embodiment 1. Figure 5 In the diagram, solid lines represent the operation of this embodiment, while dashed lines represent the operation of a conventional example. In the conventional example, the drive adjustment circuit 1000 was not provided. In this embodiment, switch 9 is set to be off.

[0057] At time t0, when the control signal CT switches from low level to high level, the rise of the gate voltage Vg of the power semiconductor element 1 begins through the drive circuit 3 and the gate resistor 4, and the rise of the output voltage Vdiff of the differentiating circuit 5 also begins.

[0058] At time t1, when the gate voltage Vg exceeds the threshold voltage Vth of the power semiconductor element 1, the collector current Ic of the power semiconductor element 1 begins to flow. Additionally, when the output voltage Vdiff of the differentiating circuit 5 exceeds the voltage Vref of the power supply 8, the output voltage Vout of the comparator 7 drops from a high level to a low level. As a result, the voltage adjustment circuit 6 operates. Along with the operation of the voltage adjustment circuit 6, the voltage adjustment circuit 6 draws in the gate current of the power semiconductor element 1. Consequently, the rise in the gate voltage Vg in this embodiment is more gradual than that in the conventional example, and the rate of change of the collector current Ic in this embodiment is also smaller than that in the conventional example. The moment when the gate voltage Vg exceeds the threshold voltage Vth and the moment when the output voltage Vdiff of the differentiating circuit 5 exceeds the reference voltage and the voltage adjustment circuit 6 begins to operate do not necessarily have to be simultaneous. These moments can be arbitrarily set by changing the voltage Vref of the power supply 8.

[0059] At time t2, in the conventional example, the Miller period of the power semiconductor element 1 begins, and the gate voltage Vg becomes constant. In the conventional example, the collector current Ic becomes a current value determined by the circuit load, etc. In the conventional example, the collector / emitter voltage Vce of the power semiconductor element 1 begins to decrease simultaneously with the start of the Miller period. In this embodiment, the gate voltage Vg rises more slowly than in the conventional example, so at time t2, the Miller period of the power semiconductor element 1 has not yet begun.

[0060] At time t3, in this embodiment, the Miller period of the power semiconductor element 1 begins, and the gate voltage Vg becomes constant. The collector current Ic becomes a current value determined by the circuit load, etc. Furthermore, after time t3, the surge current of the collector current Ic reaches its peak. In this embodiment, through the operation of the voltage adjustment circuit 6, the current change of the collector current Ic is controlled to be slower than the rate of change of the collector current Ic in the conventional example; therefore, in this embodiment, the surge current of the collector current Ic is reduced compared to the conventional example. Furthermore, at time t3, in this embodiment, the Miller period of the power semiconductor element 1 begins, so the collector / emitter voltage Vce of the power semiconductor element 1 begins to decrease. Additionally, in this embodiment, through the operation of the voltage adjustment circuit 6, the rise of the gate voltage Vg is slowly controlled, so the output voltage Vdiff of the differentiating circuit 5 is less than the voltage Vref. As a result, the output voltage Vout of the comparator 7 rises from a low level to a high level, so the operation of the voltage adjustment circuit 6 ends. Furthermore, the time of entering the Miller period and the time of ending the operation of the voltage adjustment circuit 6 do not necessarily have to be simultaneous. These times can be set arbitrarily by changing the voltage Vref of power supply 8.

[0061] At time t4, in the conventional example, the Miller period of the power semiconductor element 1 ends, and the gate voltage Vg rises. Additionally, the decrease in the collector / emitter voltage Vce ends. In this embodiment, the Miller period of the power semiconductor element 1 has not yet ended.

[0062] At time t5, in this embodiment, the Miller period of the power semiconductor element 1 ends, and the gate voltage Vg rises. Additionally, the decrease in the collector / emitter voltage Vce ends. In this embodiment and the conventional example, the length of the Miller period is the same, therefore, the rate of change of the collector / emitter voltage Vce is the same in both embodiments.

[0063] At time t6, in this embodiment, the gate voltage Vg is fully turned on (high level). Furthermore, the voltage Vref of the power supply 8 needs to be set appropriately such that the rate of change of the gate voltage Vg from time t5 to time t6 is less than the rate of change of the gate voltage Vg from time t0 to time t1, and the voltage adjustment circuit 6 is not operated during the period from time t5 to time t6.

[0064] Figure 6 This is a diagram showing the operating waveforms of the switch 9 being turned on and off in the drive adjustment circuit 1000 for the power semiconductor element in Embodiment 1.

[0065] When switch 9 is turned on by an external selection signal SL, voltage regulation circuit 6 remains inactive; when switch 9 is turned off, voltage regulation circuit 6 can be controlled.

[0066] When switch 9 is turned on, even if voltage adjustment circuit 6 is inactive, the voltage Vdiff at the negative input terminal of comparator 7 becomes the reference potential Vss, so the output voltage Vout of comparator 7 becomes high. When voltage adjustment circuit 6 is inactive, the waveforms of gate voltage Vg, collector current Ic, and collector / emitter voltage Vce are similar to... Figure 5 The waveform shown is the same as in the previous example.

[0067] Regarding the on / off state of switch 9, the operation of the power semiconductor element 1 can be confirmed in advance, and the appropriate selection can be made in accordance with the operation. Alternatively, the operation status of the power semiconductor element 1 can be monitored, and the switch 9 can be set to operate according to the determination result of the operation status.

[0068] As described above, according to Embodiment 1, by controlling the gate voltage Vg during the transition operation of the power semiconductor element 1 from an off state to an on state, and adjusting only the rate of change of the collector current Ic, the rate of change of the collector / emitter voltage Vce becomes the same as in the conventional example. As a result, the inrush current of the collector current Ic can be reduced. In this embodiment, damage caused by inrush current can be suppressed, and compared to simultaneously adjusting the rate of change of the collector current Ic and the collector / emitter voltage Vce as in the conventional example, the increase in switching losses is suppressed.

[0069] Implementation method 2.

[0070] Figure 7 This is a diagram showing the drive adjustment circuit 2000 of the power semiconductor element according to Embodiment 2. Figure 7 The drive adjustment circuit 2000 shown and Figure 1 The differences between the drive adjustment circuit 1000 of Embodiment 1 shown are as follows.

[0071] Figure 7 The drive adjustment circuit 2000 replaces the power supply 8 and has a power supply 8a, replaces the voltage adjustment circuit 6 and has a voltage adjustment circuit 6D, and has an inverting circuit 12 between the output of the comparator 7 and the voltage adjustment circuit 6.

[0072] The polarity of power supply 8a is opposite to that of power supply 8 in the drive adjustment circuit 1000 shown in Embodiment 1, so the voltage Vref2 of power supply 8a is lower than the reference potential Vss.

[0073] The inverting circuit 12 inverts the output voltage Vout1 of comparator 7, resulting in an output voltage Vout2. When the output voltage Vout2 is low, the voltage adjustment circuit 6 operates; when the output voltage Vout2 is high, the voltage adjustment circuit 6 does not operate.

[0074] It can also replace the inverting circuit 12 to output a signal with opposite polarity inside the comparator 7. Alternatively, the inputs of the positive and negative input terminals of the comparator 7 can be interchanged.

[0075] The voltage adjustment circuit 6D receives the output voltage Vout2 of the inverting circuit 12 and adjusts the gate voltage Vg of the power semiconductor element 1. The voltage adjustment circuit 6D has the function of drawing in the gate current of the power semiconductor element 1. When the output voltage Vdiff of the differentiating circuit 5, as indicated by the comparator 7, is less than Vref, the voltage adjustment circuit 6D draws in the gate current of the power semiconductor element 1.

[0076] Figure 8 This is a diagram showing the structure of voltage regulation circuit 6D.

[0077] The voltage regulation circuit 6D includes a resistor 6a and a diode 6b connected in series. The resistor 6a has a first terminal connected to the gate terminal of the power semiconductor element 1 and a second terminal connected to the anode of the diode 6b. The diode 6b has an anode connected to the second terminal of the resistor 6a and a cathode connected to the output terminal of the inverting circuit 12.

[0078] Similar to Embodiment 1, the ability to adjust the gate current of the power semiconductor element 1 is adjusted by limiting the current flowing through the diode 6b using the resistance value of resistor 6a. When the output voltage Vout1 of comparator 7 is low and the output voltage Vout2 of inverting circuit 12 is high, the voltage adjustment circuit 6 does not operate. Here, the magnitude of the high-level voltage Vout2 is the same as the magnitude of the gate voltage Vg of the power semiconductor element 1 when it is in the on state. When the output voltage Vout1 of comparator 7 is high and the output voltage Vout2 of inverting circuit 12 is low, the voltage adjustment circuit 6 operates. The magnitude of the low-level voltage Vout2 is the same as the magnitude of the reference potential Vss.

[0079] Figure 8 The structure of the voltage regulation circuit 6D is an example. Figure 9 This is a diagram showing the structure of voltage regulation circuit 6E. It can also be used as a substitute. Figure 8 The voltage regulation circuit 6D is used Figure 9 The voltage adjustment circuit 6E shown is an example.

[0080] The voltage regulation circuit 6E includes a resistor 6a, a diode 6b, and an NMOS transistor 6c connected in series. The resistor 6a has a first terminal connected to the gate terminal of the power semiconductor element 1 and a second terminal connected to the anode of the diode 6b. The diode 6b has an anode connected to the second terminal of the resistor 6a and a cathode connected to the drain of the NMOS transistor 6c. The NMOS transistor 6c has a drain connected to the cathode of the diode 6b, a source connected to a reference potential Vss, and a gate connected to the output terminal of the inverting circuit 12.

[0081] When switch 9 is on, the voltage at the negative input terminal of comparator 7 becomes the reference potential Vss, comparator 7 outputs a low level, and inverting circuit 12 outputs a high level. As a result, voltage adjustment circuit 6 remains inactive. When switch 9 is off, comparator 7 outputs the comparison result based on the output voltage Vdiff of differentiating circuit 5. Voltage adjustment circuit 6 is controlled by voltage Vout2, obtained by inverting the output voltage Vout1 representing the comparison result.

[0082] Figure 10This is a diagram illustrating the operation of the drive adjustment circuit 2000 for the power semiconductor element according to Embodiment 2. Figure 10 In the diagram, solid lines represent the operation of this embodiment, while dashed lines represent the operation of a conventional example. In the conventional example, the drive adjustment circuit 2000 was not provided. In this embodiment, switch 9 is set to be off.

[0083] At time t0, when the control signal CT switches from high level to low level, the decrease of the gate voltage Vg of the power semiconductor element 1 begins through the drive circuit 3 and the gate resistor 4, and the decrease of the output voltage Vdiff of the differentiating circuit 5 also begins.

[0084] At time t1, when the output voltage Vdiff of the differentiating circuit 5 is less than the voltage Vref2, the output voltage Vout1 of the comparator 7 rises from a low level to a high level. Consequently, the output voltage Vout2 of the inverting circuit 12 falls from a high level to a low level, and the voltage adjustment circuit 6 operates. Along with the operation of the voltage adjustment circuit 6, it draws in the gate current of the power semiconductor element 1. As a result, the reduction of the gate voltage Vg in this embodiment is faster than that in the conventional example (the rate of change of time is greater).

[0085] At time t2, due to the influence of the operating voltage adjustment circuit 6, the Miller period of the power semiconductor element 1 begins in this embodiment, and the gate voltage Vg becomes constant. In this embodiment, the collector / emitter voltage Vce of the power semiconductor element 1 begins to increase simultaneously with the start of the Miller period. In conventional examples, the gate current sinking function of the voltage adjustment circuit 6 is not utilized, so the Miller period of the power semiconductor element 1 has not yet started.

[0086] At time t3, in the previous example, after the Miller period of the power semiconductor element 1 begins, the collector / emitter voltage Vce begins to increase.

[0087] At time t4, in this embodiment, gate current is drawn into the voltage adjustment circuit 6 during operation from time t1, so the Miller period of the power semiconductor element 1 ends earlier than in the conventional example. Furthermore, in this embodiment, at the timing of the end of the Miller period of the power semiconductor element 1, the change in the collector / emitter voltage Vce also ends, and the collector current Ic begins to change.

[0088] At time t5, when the output voltage Vdiff of the differentiating circuit 5 is greater than the voltage Vref2, the output voltage Vout1 of the comparator 7 drops from a high level to a low level. Consequently, the output voltage Vout2 of the inverting circuit 12 rises from a low level to a high level, and the operation of the voltage adjustment circuit 6 ends.

[0089] At time t6, in the previous example, the Miller period of the power semiconductor element 1 ends, the change of collector / emitter voltage Vce ends, and the collector current Ic begins to change.

[0090] From time t2 to time t6, the rate of change of collector / emitter voltage Vce in this embodiment is greater than the rate of change of collector / emitter voltage Vce in the conventional example.

[0091] After time t4, the voltage adjustment circuit 6 operates, but the voltage between the gate terminal of the power semiconductor element 1 connected to the voltage adjustment circuit 6 and the output terminal of the inverting circuit 12 decreases, so the ability of the gate current to be drawn into the voltage adjustment circuit 6 gradually decreases. As a result, the time change rate of the collector current Ic in this embodiment becomes the same as that of the collector current Ic in the conventional example.

[0092] As described above, according to Embodiment 2, the rate of change of the collector / emitter voltage Vce is adjusted by controlling the gate voltage Vg during the transition operation of the power semiconductor element 1 from the on state to the off state. In this embodiment, the rate of change of the collector current Ic is the same as that in the conventional example, therefore, switching losses can be reduced in this embodiment compared to the conventional example. Furthermore, although not shown, by increasing the rate of change of the collector / emitter voltage Vce, the surge voltage of the collector / emitter voltage Vce increases, so it is necessary to appropriately set the gate current sinking capability. The gate current sinking capability can be determined by… Figure 8 , Figure 9 The resistance value of resistor 6a in the voltage adjustment circuits 6D and 6E shown is set.

[0093] Implementation method 3.

[0094] Figure 11 This is a diagram showing the drive adjustment circuit 3000 of the power semiconductor element according to Embodiment 3. Figure 11 The drive adjustment circuit 3000 shown is... Figure 1 The differences between the drive adjustment circuit 1000 of Embodiment 1 shown are as follows.

[0095] The drive adjustment circuit 3000 includes a rising edge detection circuit 10, and replaces the voltage adjustment circuit 6 with a voltage adjustment circuit 6B.

[0096] The rising edge detection circuit 10 detects the rising edge of the output voltage Vout1 of the comparator 7 and outputs the detection signal Vout2 to the voltage adjustment circuit 6.

[0097] Figure 12 This is a diagram showing an example of the structure of the rising edge detection circuit 10.

[0098] The rising edge detection circuit 10 includes a delay circuit 10a, an inversion circuit 10b, and an AND circuit 10c. The delay circuit 10a delays the output voltage Vout1 of the comparator 7 by a set time. The inversion circuit 10b inverts the output of the delay circuit 10a. The AND circuit 10c outputs the AND of the output voltage Vout1 of the comparator 7 and the output of the inversion circuit 10b as a detection signal Vout2. The rising edge detection circuit 10 outputs a detection signal Vout2 that becomes high at the rising edge of the output voltage Vout1 of the comparator 7 after the set time of the delay circuit 10a.

[0099] The voltage adjustment circuit 6B does not have the function of drawing gate current from the gate terminal of the power semiconductor element 1, but rather has the function of supplying current to the gate terminal of the power semiconductor element 1. When the output voltage Vdiff of the differentiating circuit 5 changes from a state greater than Vref to a state less than Vref, as indicated by the comparator 7 and the rising edge detection circuit 10, the voltage adjustment circuit 6B supplies current to the gate terminal of the power semiconductor element 1 for a set time.

[0100] Figure 13 This is a diagram showing the structure of voltage regulation circuit 6B.

[0101] The voltage regulation circuit 6B includes a resistor 6a and a diode 6b connected in series. The resistor 6a has a first terminal connected to the gate terminal of the power semiconductor element 1 and a second terminal connected to the cathode of the diode 6b. The diode 6b has a cathode connected to the second terminal of the resistor 6a and an anode connected to the output terminal of the rising edge detection circuit 10. The diode 6b is connected in the direction of supplying current to the gate terminal of the power semiconductor element 1.

[0102] By using the resistance value of resistor 6a to limit the current flowing through diode 6b, the ability to supply current to the gate of power semiconductor element 1 is adjusted.

[0103] To activate the voltage adjustment circuit 6B, apply voltage A across it such that the current value set by the resistance value of resistor 6a flows into diode 6b. To deactivate the voltage adjustment circuit 6B, apply voltage B across it such that no current flows through diode 6b.

[0104] Figure 13 The structure of voltage regulation circuit 6B is an example. Figure 14 This is a diagram showing the structure of voltage regulation circuit 6C. It can also be used as a substitute. Figure 13 The voltage regulation circuit 6B is used Figure 14 The voltage adjustment circuit 6C shown is an example.

[0105] The voltage regulation circuit 6C includes a resistor 6a, a diode 6b, and an NMOS transistor 6c connected in series. The resistor 6a has a first terminal connected to the gate terminal of the power semiconductor element 1 and a second terminal connected to the cathode of the diode 6b. The diode 6b has a cathode connected to the second terminal of the resistor 6a and an anode connected to the drain of the NMOS transistor 6c. The NMOS transistor 6c has a drain connected to the anode of the diode 6b, a source connected to the voltage Vref of the power supply 8, and a gate connected to the output terminal of the rising edge detection circuit 10.

[0106] When switch 9 is on, the voltage at the negative input terminal of comparator 7 becomes the reference potential Vss, and comparator 7 outputs a high level. At this time, the rising edge detection circuit 10 outputs a low level. As a result, the voltage adjustment circuit 6 remains inactive.

[0107] When switch 9 is open, comparator 7 outputs a comparison result based on the output voltage Vdiff of differentiating circuit 5. At this time, voltage adjustment circuit 6 is controlled based on the output result of rising edge detection circuit 10.

[0108] Figure 15 This is a diagram illustrating the operation of the drive adjustment circuit 3000 for the power semiconductor element according to Embodiment 3. Figure 15 In the diagram, solid lines represent the operation of this embodiment, while dashed lines represent the operation of a conventional example. In the conventional example, the drive adjustment circuit 3000 was not provided. In this embodiment, switch 9 is set to be off.

[0109] At time t0, when the control signal CT switches from low level to high level, the rise of the gate voltage Vg of the power semiconductor element 1 begins through the drive circuit 3 and the gate resistor 4, and the rise of the output voltage Vdiff of the differentiating circuit 5 also begins.

[0110] At time t1, when the gate voltage Vg exceeds the threshold voltage Vth of the power semiconductor element 1, the collector current Ic of the power semiconductor element begins to flow. Additionally, when the output voltage Vdiff of the differentiating circuit 5 exceeds the voltage Vref of the power supply 8, the output voltage Vout1 of the comparator 7 drops from a high level to a low level. The times at which the gate voltage Vg exceeds the threshold voltage Vth and the times at which the output voltage Vdiff of the differentiating circuit 5 exceeds the voltage Vref of the power supply 8 do not necessarily have to be simultaneous. These times can be arbitrarily set by changing the voltage Vref of the power supply 8.

[0111] At time t2, the Miller period of the power semiconductor element 1 begins, and the gate voltage Vg becomes constant. The collector current Ic becomes a current value determined by the circuit load, etc. In addition, at the same time as the Miller period of the power semiconductor element 1 begins, the collector / emitter voltage Vce of the power semiconductor element 1 begins to decrease.

[0112] At time t3, when the output voltage Vdiff of the differentiator circuit 5 is lower than the voltage Vref, the output voltage Vout1 of the comparator 7 rises from low level to high level.

[0113] The rising edge detection circuit 10 detects the rising edge of the voltage Vout1, and the detection signal Vout2 rises from a low level to a high level. Along with the operation of the rising edge detection circuit 10, the voltage adjustment circuit 6 operates, supplying current to the gate terminal of the power semiconductor element 1. By changing the magnitude of the voltage Vref of the power supply 8, the period during which the output voltage Vout1 is low can be arbitrarily set.

[0114] From time t3 to time t4, in this embodiment, current is supplied to the gate terminal of the power semiconductor element 1 through the operation of the voltage adjustment circuit 6. Therefore, the rate of change of the collector / emitter voltage Vce in this embodiment is greater than the rate of change of the collector / emitter voltage Vce in the conventional example.

[0115] At time t4, the Miller period of the power semiconductor element 1 in this embodiment ends, and the gate voltage Vg rises. Additionally, the decrease in the collector / emitter voltage Vce ends. The timing of the end of the Miller period of the power semiconductor element 1 in this embodiment and the timing of the rise edge detection circuit 10's detection signal Vout2 falling from a high level to a low level do not need to be the same; the period during which the detection signal Vout2 is high can be arbitrarily set.

[0116] At time t5, the Miller period of the conventional power semiconductor device 1 ends, and the gate voltage Vg rises. Additionally, the change in the collector / emitter voltage Vce ends.

[0117] In embodiment 3, only the rate of change of the collector / emitter voltage Vce of the power semiconductor element 1 during the transition from the off state to the on state is controlled. The period during which the output voltage Vout1 of the comparator 7 is low (from time t1 to time t3) needs to be appropriately set by the voltage Vref of the power supply 8.

[0118] As described above, according to Embodiment 3, by controlling the gate voltage Vg during the transition operation of the power semiconductor element 1 from an off state to an on state, only the rate of change of the collector / emitter voltage Vce is adjusted. The rate of change of the collector current Ic in this embodiment is the same as that in the conventional example. Therefore, in this embodiment, the inrush current of the collector current Ic can be made to the same level as in the conventional example, and switching losses are reduced.

[0119] Implementation method 4.

[0120] Figure 16 This is a diagram showing the structure of the power module 5000 according to Embodiment 4.

[0121] The power module 5000 includes power semiconductor elements 1a and 1b, freewheeling diodes 2a and 2b, drive adjustment circuits 1000a and 1000b, drive circuits 3a and 3b, and gate resistors 4a and 4b.

[0122] Drive circuit 3a is controlled by control signal CT1. Drive circuit 3b is controlled by control signal CT2. The emitter of power semiconductor element 1a is connected to reference potential Vss1. The emitter of power semiconductor element 1b is connected to reference potential Vss2.

[0123] The collector of the power semiconductor element 1a is connected to the power supply VDD. The emitter of the power semiconductor element 1a and the collector of the power semiconductor element 1b are connected, and the connection point is connected to the output terminal OUT.

[0124] The drive adjustment circuits 1000a and 1000b can be any of the drive adjustment circuits 1000, 2000, and 3000 described in embodiments 1 to 4.

[0125] The power module can also be configured by omitting the drive circuits 3a and 3b and the gate resistors 4a and 4b, and only having the power semiconductor elements 1a and 1b and the drive adjustment circuits 1000a and 1000b. Examples of power modules are not limited to this. Furthermore, the drive adjustment circuit and the drive circuit can also be configured by integrated circuits.

[0126] In embodiment 4, the power module includes two power semiconductor elements 1a and 1b, but it may also include three or more power semiconductor elements. The power module may also include, for example, six power semiconductor elements.

[0127] Implementation method 5.

[0128] Figure 17 This is a diagram showing the structure of the power module 4000 according to Embodiment 5.

[0129] The power module 4000 includes a drive circuit 3, a gate resistor 4, a drive adjustment circuit 1000 according to Embodiment 1, a drive adjustment circuit 2000 according to Embodiment 2, a drive adjustment circuit 3000 according to Embodiment 3, and a decoder 11.

[0130] Drive adjustment circuit 1000, drive adjustment circuit 2000 and drive adjustment circuit 3000 adjust the gate voltage Vg of the power semiconductor element 1.

[0131] Decoder 11 selects only one of the drive adjustment circuits 1000, 2000 and 3000 based on the selection signal SL2 from the outside.

[0132] Only the selected drive adjustment circuit operates to adjust the gate voltage Vg of the power semiconductor element 1.

[0133] Implementation method 6.

[0134] This embodiment is an example of applying the drive adjustment circuit of the above embodiment to a power conversion device. The power conversion device used is not limited to a specific power conversion device, but the following description focuses on a three-phase inverter.

[0135] Figure 18 This is a block diagram showing the structure of the power conversion system according to Embodiment 6.

[0136] The power conversion system includes a power source 100, a power conversion device 200, and a load 300.

[0137] Power supply 100 is a DC power supply that supplies DC power to power conversion device 200. Power supply 100 can be constructed from various power sources. For example, power supply 100 can be constructed from a DC system, a solar cell, or a battery. Power supply 100 can also be constructed from a rectifier circuit or an AC / DC converter connected to an AC system. Power supply 100 can also be constructed from a DC / DC converter that converts DC power output from a DC system into a predetermined power.

[0138] The power conversion device 200 is a three-phase inverter connected between the power source 100 and the load 300. The power conversion device 200 converts the DC power supplied from the power source 100 into AC power and supplies AC power to the load 300. The power conversion device 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, and a control circuit 203 that outputs control signals to the main conversion circuit 201.

[0139] Load 300 is a three-phase electric motor driven by AC power supplied from power conversion device 200. Load 300 is not limited to a specific application and is an electric motor mounted on various electrical devices. For example, load 300 is used as an electric motor for hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioning equipment.

[0140] The power conversion device 200 will be described in detail below.

[0141] The main conversion circuit 201 includes a power semiconductor element 1 and a freewheeling diode 2. The main conversion circuit 201 converts the DC power supplied from the power source 100 into AC power by switching the power semiconductor element 1, and supplies it to the load 300.

[0142] There are various examples of specific circuit structures for the main converter circuit 201, but in this embodiment, the main converter circuit 201 is a 2-level three-phase full-bridge circuit.

[0143] A 2-level three-phase full-bridge circuit can be constructed from six power semiconductor elements 1 and six freewheeling diodes 2 connected in anti-parallel to each power semiconductor element 1. The power semiconductor elements 1 and each freewheeling diode 2 of the main converter circuit 201 can be constructed using a semiconductor module 202. For each of the six power semiconductor elements 1, two power semiconductor elements 1 are connected in series to form upper and lower branches, and each upper and lower branch constitutes a phase (U phase, V phase, W phase) of the full-bridge circuit. Furthermore, the output terminals of each upper and lower branch, i.e., the three output terminals of the main converter circuit 201, are connected to the load 300.

[0144] The main converter circuit 201 includes a drive circuit 3 for driving each power semiconductor element 1. The drive circuit 3 can be built into the semiconductor module 202 or disposed outside the semiconductor module 202. The drive circuit 3 generates a drive signal for driving the power semiconductor element 1 and supplies it to the gate of the power semiconductor element 1 in the main converter circuit 201. Specifically, the drive circuit 3 outputs the drive signal for driving the power semiconductor element 1 to the gate of each power semiconductor element 1 according to the control signal CT from the control circuit 203.

[0145] The main conversion circuit 201 also includes any one of the drive adjustment circuits in Embodiment 1 (drive adjustment circuit 1000), Embodiment 2 (drive adjustment circuit 2000), and Embodiment 3 (drive adjustment circuit 3000).

[0146] The control circuit 203 controls the power semiconductor elements 1 of the main converter circuit 201 in a manner that supplies the desired power to the load 300. Specifically, based on the power to be supplied to the load 300, the control circuit 203 calculates the time (on-time) during which each power semiconductor element 1 of the main converter circuit 201 should be in the on state. For example, the main converter circuit 201 can be controlled by PWM (Pulse Width Modulation) control, which modulates the on-time of the power semiconductor element 1 according to the output voltage. Furthermore, the control circuit 203 outputs control commands (control signals CT) to the drive circuit 3 in a manner that outputs an on signal to the power semiconductor element 1 that should be in the on state at each time point and an off signal to the power semiconductor element 1 that should be in the off state. The drive circuit 3 outputs an on signal or an off signal to the gate of each power semiconductor element 1 as a drive signal according to the control signal CT.

[0147] The main conversion circuit 201 includes the drive adjustment circuit 1000 of Embodiment 1, the drive adjustment circuit 2000 of Embodiment 2, or the drive adjustment circuit 3000 of Embodiment 3, so it can reduce switching losses during the transition operation of the power semiconductor element 1 from the off state to the on state or from the on state to the off state.

[0148] In this embodiment, the power conversion device using the drive adjustment circuit of embodiments 1 to 3 is a two-level three-phase inverter, but this disclosure is not limited to this and can be applied to various power conversion devices. For example, it can also be a three-level or multi-level power conversion device. In addition, when supplying power to a single-phase load, the power conversion device can also be a single-phase inverter. In addition, when supplying power to a DC load, the power conversion device can also be a DC / DC converter or an AC / DC converter.

[0149] The power conversion device disclosed herein is not limited to cases where the load is an electric motor; the load may also be, for example, an electrical discharge machining machine, a laser processing machine, an induction heating cooker, or a contactless power supply system. The power conversion device disclosed herein can also be used as a power regulator for solar power generation systems or energy storage systems, etc.

[0150] The embodiments disclosed herein should be considered illustrative and not restrictive in all respects. The scope of this disclosure is set forth in the claims, not in the foregoing description, and is intended to include all modifications within the meaning and scope equivalent to the claims.

Claims

1. A drive adjustment circuit for a power semiconductor element, comprising: Differentiating circuits differentiate the gate voltage of semiconductor devices used in power applications; The power supply generates a reference voltage for comparison. The comparator has a first input terminal connected to the differentiating circuit and a second input terminal receiving the comparison reference voltage; and The voltage adjustment circuit adjusts the gate voltage of the power semiconductor element based on the output of the comparator. The voltage regulation circuit has the function of drawing in the gate current of the power semiconductor element. The comparison reference voltage is greater than the reference potential of the power semiconductor element. When the output voltage of the differentiating circuit is greater than the comparison reference voltage, the voltage adjustment circuit draws in the gate current of the power semiconductor element. The voltage adjustment circuit includes a resistor and a diode connected in series. The resistor has a first terminal connected to the gate terminal of the power semiconductor element and a second terminal connected to the anode of the diode. The diode has an anode connected to the second terminal of the resistor and a cathode connected to the output terminal of the comparator.

2. A drive adjustment circuit for a power semiconductor element, comprising: Differentiating circuits differentiate the gate voltage of semiconductor devices used in power applications; The power supply generates a reference voltage for comparison. The comparator has a first input terminal connected to the differentiating circuit and a second input terminal receiving the comparison reference voltage; and The voltage adjustment circuit adjusts the gate voltage of the power semiconductor element based on the output of the comparator. The voltage regulation circuit has the function of drawing in the gate current of the power semiconductor element. The comparison reference voltage is greater than the reference potential of the power semiconductor element. When the output voltage of the differentiating circuit is greater than the comparison reference voltage, the voltage adjustment circuit draws in the gate current of the power semiconductor element. The voltage regulation circuit includes a resistor, a diode, and an NMOS transistor connected in series. The resistor has a first terminal connected to the gate terminal of the power semiconductor element and a second terminal connected to the anode of the diode. The diode has an anode connected to the second terminal of the resistor and a cathode connected to the drain of the NMOS transistor. The NMOS transistor has a drain connected to the cathode of the diode, a source connected to a reference potential of the power semiconductor element, and a gate connected to the output terminal of the comparator.

3. A drive adjustment circuit for a power semiconductor element, comprising: Differentiating circuits differentiate the gate voltage of semiconductor devices used in power applications; The power supply generates a reference voltage for comparison. The comparator has a first input terminal connected to the differentiating circuit and a second input terminal receiving the comparison reference voltage; and The voltage adjustment circuit adjusts the gate voltage of the power semiconductor element based on the output of the comparator. The voltage regulation circuit has the function of drawing in the gate current of the power semiconductor element. The comparison reference voltage is less than the reference potential of the power semiconductor element. When the output voltage of the differentiating circuit is less than the comparison reference voltage, the voltage adjustment circuit draws in the gate current of the power semiconductor element.

4. A drive adjustment circuit for a power semiconductor element, comprising: Differentiating circuits differentiate the gate voltage of semiconductor devices used in power applications; The power supply generates a reference voltage for comparison. The comparator has a first input terminal connected to the differentiating circuit and a second input terminal receiving the comparison reference voltage; and A voltage adjustment circuit is provided, with one end connected to the gate terminal of the power semiconductor element and the other end connected to the output terminal of the comparator. This voltage adjustment circuit adjusts the gate voltage of the power semiconductor element according to the output of the comparator. The voltage regulation circuit has the function of drawing in the gate current of the power semiconductor element. The comparison reference voltage is greater than the reference potential of the power semiconductor element. When the output voltage of the differentiating circuit is greater than the comparison reference voltage, the voltage adjustment circuit draws in the gate current of the power semiconductor element. The voltage adjustment circuit includes a resistor and a diode connected in series. The resistor has a first terminal connected to the gate terminal of the power semiconductor element and a second terminal connected to the anode of the diode. The diode has an anode connected to the second terminal of the resistor and a cathode connected to the output terminal of the comparator.

5. A drive adjustment circuit for a power semiconductor element, comprising: Differentiating circuits differentiate the gate voltage of semiconductor devices used in power applications; The power supply generates a reference voltage for comparison. The comparator has a first input terminal connected to the differentiating circuit and a second input terminal receiving the comparison reference voltage; and A voltage adjustment circuit is provided, with one end connected to the gate terminal of the power semiconductor element and the other end connected to the output terminal of the comparator. This voltage adjustment circuit adjusts the gate voltage of the power semiconductor element according to the output of the comparator. The voltage regulation circuit has the function of drawing in the gate current of the power semiconductor element. The comparison reference voltage is greater than the reference potential of the power semiconductor element. When the output voltage of the differentiating circuit is greater than the comparison reference voltage, the voltage adjustment circuit draws in the gate current of the power semiconductor element. The voltage regulation circuit includes a resistor, a diode, and an NMOS transistor connected in series. The resistor has a first terminal connected to the gate terminal of the power semiconductor element and a second terminal connected to the anode of the diode. The diode has an anode connected to the second terminal of the resistor and a cathode connected to the drain of the NMOS transistor. The NMOS transistor has a drain connected to the cathode of the diode, a source connected to a reference potential of the power semiconductor element, and a gate connected to the output terminal of the comparator.

6. The drive adjustment circuit for a power semiconductor element according to claim 3, wherein, It includes an inverting circuit connected to the output terminal of the comparator. The voltage adjustment circuit includes a resistor and a diode connected in series. The resistor has a first terminal connected to the gate terminal of the power semiconductor element and a second terminal connected to the anode of the diode. The diode has an anode connected to the second end of the resistor and a cathode connected to the output terminal of the inverting circuit.

7. The drive adjustment circuit for a power semiconductor element according to claim 3, wherein, It includes an inverting circuit connected to the output terminal of the comparator. The voltage regulation circuit includes a resistor, a diode, and an NMOS transistor connected in series. The resistor has a first terminal connected to the gate terminal of the power semiconductor element and a second terminal connected to the anode of the diode. The diode has an anode connected to the second terminal of the resistor and a cathode connected to the drain of the NMOS transistor. The NMOS transistor has a drain connected to the cathode of the diode, a source connected to the reference potential of the power semiconductor element, and a gate connected to the output terminal of the inverting circuit.

8. A drive adjustment circuit for a power semiconductor element, comprising: Differentiating circuits differentiate the gate voltage of semiconductor devices used in power applications; The power supply generates a reference voltage for comparison. The comparator has a first input terminal connected to the differentiating circuit and a second input terminal receiving the comparison reference voltage; and The voltage adjustment circuit adjusts the gate voltage of the power semiconductor element based on the output of the comparator. The voltage regulation circuit has the function of supplying current to the gate terminal of the power semiconductor element. The comparison reference voltage is greater than the reference potential of the power semiconductor element. When the output voltage of the differentiating circuit changes from a state greater than the comparison reference voltage to a state less than the comparison reference voltage, the voltage adjustment circuit supplies current to the gate of the power semiconductor element. An edge detection circuit is provided to detect the edge of the comparator's output voltage. The voltage adjustment circuit includes a resistor and a diode connected in series. The resistor has a first terminal connected to the gate terminal of the power semiconductor element and a second terminal connected to the cathode of the diode. The diode has a cathode connected to the second end of the resistor and an anode connected to the output terminal of the edge detection circuit.

9. A drive adjustment circuit for a power semiconductor element, comprising: Differentiating circuits differentiate the gate voltage of semiconductor devices used in power applications; The power supply generates a reference voltage for comparison. The comparator has a first input terminal connected to the differentiating circuit and a second input terminal receiving the comparison reference voltage; and The voltage adjustment circuit adjusts the gate voltage of the power semiconductor element based on the output of the comparator. The voltage regulation circuit has the function of supplying current to the gate terminal of the power semiconductor element. The comparison reference voltage is greater than the reference potential of the power semiconductor element. When the output voltage of the differentiating circuit changes from a state greater than the comparison reference voltage to a state less than the comparison reference voltage, the voltage adjustment circuit supplies current to the gate of the power semiconductor element. It includes an edge detection circuit that detects changes in the output voltage of the comparator. The voltage regulation circuit includes a resistor, a diode, and an NMOS transistor connected in series. The resistor has a first terminal connected to the gate terminal of the power semiconductor element and a second terminal connected to the cathode of the diode. The diode has a cathode connected to the second terminal of the resistor and an anode connected to the drain of the NMOS transistor. The NMOS transistor has a drain connected to the anode of the diode, a source that receives the comparison reference voltage, and a gate connected to the output terminal of the edge detection circuit.

10. The drive adjustment circuit for a power semiconductor element according to any one of claims 1 to 9, wherein, It includes a switch connected between the first input terminal of the comparator and the reference potential of the power semiconductor element.

11. A power module, comprising: Semiconductor components for power applications; Drive circuit, for driving the power semiconductor element; and The drive adjustment circuit for a power semiconductor element according to any one of claims 1 to 10.

12. A power module, comprising: Semiconductor components for power applications; The driving circuit drives the power semiconductor element; The drive adjustment circuit for a power semiconductor element as described in claim 1 or 2; The drive adjustment circuit for a power semiconductor element as described in claim 3; The drive adjustment circuit for a power semiconductor element as described in claim 8 or 9; as well as The decoder, based on the selection signal from the outside, selects only one of the three drive adjustment circuits. The selected drive adjustment circuit adjusts the gate voltage of the power semiconductor element.

13. A power conversion device, comprising: A main conversion circuit includes a power semiconductor element, a drive circuit for driving the power semiconductor element, and a drive adjustment circuit as described in any one of claims 1 to 10. This main conversion circuit converts input power into output power. The control circuit outputs control signals to the main conversion circuit.

Citation Information

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