Heterogeneously integrated silicon-based thin film lithium niobate modulator and method of manufacturing the same

Abstract

The application discloses a hetero-integrated silicon-based thin film lithium niobate modulator, which comprises a Si device layer, a SiO2 cladding layer, a substrate Si, an LNOI layer and a transmission electrode Ti-Au; the SiO2 cladding layer is arranged on the Si device layer; the substrate Si is arranged on the Si device layer and in the SiO2 cladding layer; the LNOI layer is integrated with the SiO2 cladding layer in a bonding mode, and the LNOI layer is arranged on the SiO2 cladding layer; and the transmission electrode Ti-Au is arranged on the LNOI layer. The application further provides another hetero-integrated silicon-based thin film lithium niobate modulator. The application further provides a manufacturing method of the above-mentioned hetero-integrated silicon-based thin film lithium niobate modulator. The application can integrate LN materials, and the integration method is simple.

Description

Technical Field

[0001] This invention belongs to the field of on-chip integrated modulator technology, specifically relating to a heterogeneous integrated silicon-based thin-film lithium niobate modulator and its manufacturing method. Background Technology

[0002] Silicon is currently the most widely used material in integrated optics because the manufacturing process for silicon chips in integrated circuits is very mature. Silicon is also transparent and has a high refractive index in the optical communication band, making it suitable for large-scale fabrication of silicon-based integrated optical circuits using CMOS technology. "Silicon photonics" developed in this context. However, silicon has some drawbacks, such as lacking electro-optic effects. Lithium niobate (LN), on the other hand, is a material with excellent electro-optic properties. Compared to silicon, it can break through the upper limit of electro-optic modulation rate (~60 GHz) constrained by carrier mobility and also has significant application value in nonlinear optics. However, traditional lithium niobate devices are expensive, have poor integration, and are large in size, which limits their application in photonic devices and optical communication systems.

[0003] With the development of high-quality wafer-level thin-film lithium niobate materials, coupled with the advancements in nanofabrication technology in recent years, the research and development of high-performance LNOI (thin-film lithium niobate wafer) photonic devices has great potential and is gradually becoming a research hotspot in the field of photonic integration.

[0004] Because lump nitride (LN) is a chemically very stable and difficult-to-etch material, fabricating waveguides and other optical micro / nanostructures on LN is extremely challenging. Traditional bulk LN fabrication often employs titanium diffusion or proton exchange processes. The main drawbacks of these methods are the small refractive index difference in the fabricated waveguides, weak optical mode confinement (mode area between 10 and 100 μm²), and large waveguide bending radii (millimeter-scale). Therefore, these methods cannot be applied to the fabrication of highly integrated optical devices and various microstructures (such as microrings and photonic crystals), and controlling waveguide dispersion is also very difficult.

[0005] Photonic devices built on the LNOI platform are characterized by their fine structure and small size, making traditional bulk material LN fabrication methods difficult to apply. Currently, the main methods for fabricating waveguide devices on the LNOI platform are: (1) wet etching; (2) dry etching; (3) optical-grade physical cutting; and (4) femtosecond laser and chemical mechanical polishing. With the continuous improvement and optimization of process technology, the problems of rough waveguide interfaces and high transmission loss on the LNOI platform have been greatly improved in recent years. However, the processing equipment is still not fully compatible with mainstream CMOS process equipment. Many wafer foundries are unwilling to fabricate LN materials due to the contamination of equipment by Li atoms, which further hinders the development of LNOI on-chip integrated devices. Therefore, we urgently need a new method for integrating LN materials. Summary of the Invention

[0006] The purpose of this invention is to provide a heterogeneous integrated silicon-based thin-film lithium niobate modulator and its manufacturing method that can integrate LN materials and has a simple integration method.

[0007] The technical solution adopted in this invention is:

[0008] A heterogeneous integrated silicon-based thin-film lithium niobate modulator includes a Si device layer, a SiO2 cladding layer, a Si substrate, an LNOI layer, and a Ti-Au transmission electrode.

[0009] The SiO2 cladding is placed on the Si device layer;

[0010] The substrate Si is placed on the Si device layer and within the SiO2 cladding layer;

[0011] The LNOI layer is integrated with the SiO2 cladding layer by bonding, and the LNOI layer is placed on the SiO2 cladding layer;

[0012] The transmission electrode Ti-Au is placed on the LNOI layer.

[0013] The present invention also provides a heterogeneous integrated silicon-based thin-film lithium niobate modulator, which includes a Si device layer, a SiO2 cladding layer, a Si substrate, an LNOI layer, a second SiO2 cladding layer, a Ti-Au transmission electrode, and a second Si substrate;

[0014] The SiO2 cladding is placed on the Si device layer;

[0015] The substrate Si is placed on the Si device layer and within the SiO2 cladding layer;

[0016] The LNOI layer is integrated with the SiO2 cladding layer and the second SiO2 cladding layer by bonding; and the LNOI layer is placed on the SiO2 cladding layer and below the second SiO2 cladding layer.

[0017] The transmission electrode Ti-Au is placed on the Si device layer and within the SiO2 cladding, spaced apart from the substrate Si.

[0018] The second substrate Si is placed on the second SiO2 cladding.

[0019] According to the above scheme, the Si device layer is prepared by CMOS-compatible semiconductor wafer fabrication process; the LNOI layer is prepared by cutting commercial thin-film lithium niobate wafers; the transmission electrode Ti-Au is prepared by electron beam evaporation, mainly using ordinary ground-signal-ground electrodes or specially designed capacitive loading electrodes;

[0020] The thickness of the SiO2 cladding layer is 150-220 nm, the thickness of the LNOI layer is 500-600 nm, and the thickness of the Ti-Au transport electrode is 0.8-1.2 μm.

[0021] The LNOI layer and the transport electrode Ti-Au maintain a micrometer-level spacing.

[0022] The Si device layer includes optical input / output devices, mainly comprising end-face tapered coupling structures or grating couplers, MMI beam splitting and combining structures (Y-branch or multimode interference beam splitter), wide single-mode waveguide structures, tapered thermally adiabatic transmission waveguide structures, and narrow single-mode waveguide structures. The thin-film lithium niobate layer (LNOI layer) is obtained directly from commercial lithium niobate wafers through mechanical dicing. Aside from organic and RAC cleaning, no other semiconductor processing techniques are applied to the wafer surface, avoiding the challenges of complex etching of lithium niobate material.

[0023] The present invention also provides a method for manufacturing a heterogeneous integrated silicon-based thin-film lithium niobate modulator, which includes the following steps:

[0024] a) The Si device layer is fabricated using a fabrication method compatible with CMOS technology;

[0025] b) LNOI layers with characteristic crystal orientations were prepared by dicing.

[0026] c) The traveling wave transmission electrode was prepared using electron beam deposition.

[0027] d) Achieve heterogeneous integration of the LNOI layer and the SiO2 cladding on the Si device layer using direct bonding or adhesive bonding methods;

[0028] e) Remove the substrate Si of the LNOI layer by grinding, polishing, or deep etching;

[0029] f) Remove the buried oxide layer SiO2 using wet etching or CMP.

[0030] According to the above scheme, the direct bonding in step d) is a direct connection between ultra-clean wafers based on van der Waals forces, which reduces the requirements for removing organic and inorganic particles from the wafer surface and the requirements for wafer surface roughness; the adhesive bonding in step d) is a connection between wafers based on BCB adhesive bonding technology, which reduces the stringent requirements for experimental environment and wafer surface, and is suitable for laboratories with general environmental conditions.

[0031] According to the above scheme, the bonding equipment in step d) is a hot plate at room temperature, a vacuum annealing furnace, or a wafer bonding machine. The experimental equipment is relatively broad and mainly depends on the requirements for the yield of the experiment.

[0032] According to the above scheme, the method for heterogeneous integration of the LNOI layer and the SiO2 cladding on the Si device layer in step d) using direct bonding or adhesive bonding is as follows:

[0033] 1) Select an SOI wafer with a 2.5um buried oxide layer and a 300nm device layer (1-0-0 crystal orientation p-type doped), and select a high impedance type wafer substrate to ensure low-loss transmission of microwave signals;

[0034] 2) Select an LNOI wafer with a 2.7µm buried oxide layer and a 500nm thick device layer. The substrate of this wafer will be removed later, so its resistance characteristics are not considered.

[0035] 3) Remove 150nm of Si from the SOI wafer through etching to achieve 150nm.

[0036] 4) Passive devices on silicon are fabricated using CMOS technology to obtain Si devices; Si devices mainly include on-chip devices such as end couplers, MMI beam splitters, thermally insulating waveguides, and narrow single-mode waveguides, and can also be fabricated by silicon optical fabrication plants.

[0037] 5) PECVD is used to grow a silicon dioxide cladding layer on the Si device with a thickness of 400 nm to avoid possible damage to the device on the silicon in subsequent processes;

[0038] 6) The grown silicon dioxide cladding is thinned and surface polished using CMP (Crush, Polish, and Grind) technology to form an SOI wafer; the surface roughness of the silicon dioxide cladding is guaranteed to be <1nm. This requires ellipsometry testing of the entire SOI wafer to select the area that meets the requirements for dicing; the final thickness of the silicon dioxide cladding is 200nm.

[0039] 7) Directly clean the SOI wafers and LNOI wafers with organic cleaning and RCA-1 standard solution;

[0040] 8) After cleaning, the SOI wafer and LNOI wafer are subjected to 2 minutes of RF power 150W plasma surface activation treatment in an oxygen atmosphere using plasma activation equipment. The principle of plasma surface activation is to effectively remove organic contaminants and inert layers from the crystal surface by using the physical and chemical action of plasma, change the composition of suspended groups on the crystal surface, and enhance the bonding ability of the crystal surface.

[0041] 9) Place the SOI wafer and LNOI wafer in the fixtures of the SB6 wafer bonding equipment, adjust the bonding experimental parameters, and perform bonding.

[0042] According to the above scheme, the method for heterogeneous integration of the LNOI layer and the SiO2 cladding on the Si device layer by adhesive bonding in step d) is as follows:

[0043] 1) Select an SOI wafer with a 2.5um buried oxide layer and a 300nm device layer (1-0-0 crystal orientation p-type doped), and select a high impedance type wafer substrate to ensure low-loss transmission of microwave signals;

[0044] 2) Select an LNOI wafer with a 2.7µm buried oxide layer and a 500nm thick device layer. The substrate of this wafer will be removed later, so its resistance characteristics are not considered.

[0045] 3) Remove 150nm of Si from the SOI wafer through etching to achieve 150nm.

[0046] 4) Passive devices on silicon are fabricated using CMOS technology to obtain Si devices. Si devices mainly include on-chip devices such as end couplers, MMI beam splitters, thermally insulating waveguides, and narrow single-mode waveguides. They can also be manufactured by silicon optical fabrication plants.

[0047] 5) Directly perform organic cleaning and RCA-1 standard solution cleaning on Si devices and LNOI wafers; Since there are passive components on Si devices, only RCA cleaning is required, and ultrasonic cleaning is not allowed directly. LNOI wafers can be directly ultrasonically cleaned and RCA cleaned.

[0048] 6) After cleaning, first spin-coat the adhesion promoter AP3000 on the surface of the Si device and LNOI wafer, then spin-coat BCB3022-35 adhesive and a diluent of trimethylbenzene to ensure that the thickness of BCB is 200nm after pre-curing at 200℃.

[0049] 7) Place the Si device and LNOI wafer on the fixture of the SB6 wafer bonding equipment for bonding.

[0050] According to the above scheme, the bonding parameters of the SB6 wafer bonding equipment are as follows:

[0051] The bonding machine was pressurized to 110 mBar, and the temperature was slowly increased from 50°C to 200°C over 60 minutes; the temperature was held at 200°C for 60 minutes, and then slowly increased to 250°C over another 60 minutes; the temperature was held at 250°C for 60 minutes, and then slowly increased to 300°C over another 60 minutes; the temperature was held at 300°C for 120 minutes, and then allowed to cool naturally to room temperature (approximately 5 hours). Under these parameter conditions, a very good direct bonding effect was achieved.

[0052] The cleaning method is as follows:

[0053] (a) Soak the beaker in potassium dichromate solution to clean it, and then ultrasonically clean the tweezers with deionized water for 15 minutes.

[0054] (b) The LNOI wafers were placed sequentially in an ultrasonic cleaner at 50°C using acetone, isopropanol, and anhydrous ethanol as active reagents, and left for 20 minutes each to effectively remove organic impurities adhering to the surface of SOI and LNOI wafers. The cleaning activity of the three reagents was in the order of acetone > isopropanol > anhydrous ethanol. Then, the wafers were rinsed with deionized water for 10 minutes to remove the active reagents. After cleaning, the wafers were observed under a microscope. If the wafers were found to be unclean, they were wiped clean with a cotton swab soaked in acetone. This process was repeated until no dirt was observed on the surface of the crystals under the microscope.

[0055] (c) RCA cleaning is performed using the standard wet cleaning process. The chemical composition of standard RCA cleaning solution No. 1 is NH4OH / H2O2 / H2O (ammonium hydroxide / hydrogen peroxide / deionized water) mixed in a ratio of 1:1:6. When using it, first mix NH4OH and H2O in a ratio of 1:6 and heat it to 70°C. At this time, add 1 part of H2O2 and let it stand for 2 minutes. After a large number of bubbles are generated in the solution, put the SOI wafer and LNOI wafer into the solution and keep the solution temperature at 40°C for 10 minutes. Then rinse with deionized water for 4 minutes.

[0056] The entire optoelectronic signal modulation process includes: (1) The external optical signal input fiber is coupled to the silicon waveguide through a low-loss end-face coupler; (2) The optical signal is split into two paths in the silicon-based MMI splitting structure, one of which is transmitted directly in a single-mode waveguide and the other is transmitted in a single-mode through an optical delay line. At this time, most of the light is in the silicon-based waveguide; (3) The optical signal is transmitted to the narrow waveguide region through the silicon-based thermally adiabatic waveguide. In the narrow waveguide region, the optical mode field is squeezed out of the silicon substrate, and most of it is distributed in the lithium niobate layer. The optical signal is high-frequency modulated by the microwave signal above the lithium niobate layer; (4) The phase-modulated optical signal is coupled back to the silicon-based thermally adiabatic waveguide and phase superposition is achieved through the MMI combiner to realize the intensity modulation effect; (5) The modulated optical signal bundled in the silicon substrate is output to the optical fiber through the end-face coupler, completing the entire optical signal modulation process. The thickness of the narrow region silicon waveguide is 150 nm and the width is 280 nm. The wide-area silicon waveguide has a thickness of 150 nm and a width of 650 nm. The lithium niobate layer has a thickness of 500 nm, the crystal is X-shaped, and the optical transmission direction is along the y-axis. The hybrid integrated modulation region has a length of 1.5-1.7 cm.

[0057] The beneficial effects of this invention are as follows:

[0058] LN materials are integrated through bonding, and the integration method is simple;

[0059] The back substrate of the lithium niobate layer is ground, polished, and wet etched to enable the back electrode to directly modulate the optical signal inside the lithium niobate layer.

[0060] The heterogeneous integration process employing direct bonding and adhesive bonding between SOI wafers and LNOI wafers ensures the high bandwidth modulation effect of LN material. At the same time, the entire device fabrication process is completed on the Si device layer of SOI, avoiding direct etching of LN material. The bonding process is also consistent with conventional wafer bonding, making it fully applicable to mainstream silicon photonics fabrication conditions. This plays an important role in promoting the commercialization of high-bandwidth, low-loss on-chip integrated modulators.

[0061] It can achieve the fabrication of complex structures on silicon while ensuring the minimum requirements for the processing of lithium niobate layers, and fully utilize the excellent optoelectronic properties of lithium niobate layers to achieve high-resolution modulation characteristics of optical signals;

[0062] It can fully utilize the electro-optic modulation performance of the thin-film lithium niobate layer to form an electro-optic modulation effect on most optical mode fields within it, achieving a high bandwidth modulation effect of over 100 GHz.

[0063] The direct bonding process adopted can provide low-loss and high-strength heterogeneous integration bonding effect to the maximum extent. The bonded device will not suffer from debonding or other adverse consequences in subsequent processing. The fabricated device can withstand high temperature and harsh physical and chemical environment in subsequent use, which is beneficial for use in harsh working environments.

[0064] BCB bonding can minimize the requirements for a clean experimental environment, organic and inorganic contaminant particles on the wafer surface, and wafer surface roughness. Furthermore, the bonded devices do not experience debonding or other adverse consequences during subsequent processing, making it a fast and reliable bonding method. Attached Figure Description

[0065] The present invention will be further described below with reference to the accompanying drawings and embodiments. In the accompanying drawings:

[0066] Figure 1 This is a schematic diagram of the heterogeneous integrated silicon-based thin-film lithium niobate modulator of Example 1;

[0067] Figure 2 This is a schematic diagram of the heterogeneous integrated silicon-based thin-film lithium niobate modulator of Example 2;

[0068] Figure 3 This is a flowchart illustrating the process of fabricating the heterogeneous integrated silicon-based thin-film lithium niobate modulator of Example 1 using the substrate removal method.

[0069] Figure 4 This is a flowchart illustrating the process of fabricating the heterogeneous integrated silicon-based thin-film lithium niobate modulator of Example 1 using the electrode wrapping method.

[0070] In the figure: 1. Si device layer, 2. SiO2 cladding, 3. Si substrate, 4. LNOI layer, 5. Ti-Au transfer electrode, 6. Second SiO2 cladding, 7. Second substrate Si. Detailed Implementation

[0071] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0072] Example 1

[0073] See Figure 1A heterogeneous integrated silicon-based thin-film lithium niobate modulator includes a Si device layer 1, a SiO2 cladding layer 2, a Si substrate 3, an LNOI layer 4, and a Ti-Au transfer electrode 5. The SiO2 cladding layer 2 is placed on the Si device layer 1. The Si substrate 3 is placed on the Si device layer 1 and within the SiO2 cladding layer 2. The LNOI layer 4 is integrated with the SiO2 cladding layer 1 by bonding and is placed on the SiO2 cladding layer 2. The Ti-Au transfer electrode is placed on the LNOI layer. The thickness of the SiO2 cladding layer 2 is 150-220 nm, the thickness of the LNOI layer 4 is 500-600 nm, and the thickness of the Ti-Au transfer electrode 5 is 0.8-1.2 μm. A micrometer-level spacing is maintained between the LNOI layer 4 and the Ti-Au transfer electrode 5.

[0074] Example 2

[0075] See Figure 2 A heterogeneous integrated silicon-based thin-film lithium niobate modulator includes a Si device layer 1, a SiO2 cladding layer 2, a substrate Si 3, an LNOI layer 4, a second SiO2 cladding layer 6, a transport electrode Ti-Au 5, and a second substrate Si 7. The SiO2 cladding layer 2 is placed on the Si device layer 1. The substrate Si 3 is placed on the Si device layer 1 and within the SiO2 cladding layer 2. The LNOI layer 4 is integrated with the SiO2 cladding layer 2 and the second SiO2 cladding layer 6 by bonding; the LNOI layer 4 is placed on the SiO2 cladding layer 2 and below the second SiO2 cladding layer 6. The transport electrode Ti-Au 5 is placed on the Si device layer 1 and within the SiO2 cladding layer 2, spaced apart from the substrate Si 3; the second substrate Si 7 is placed on the second SiO2 cladding layer 6.

[0076] In Examples 1 and 2, the Si device layer 1 is fabricated using a CMOS-compatible semiconductor wafer fabrication process; the LNOI layer 4 is fabricated by dicing commercial thin-film lithium niobate wafers; and the transmission electrode Ti-Au 5 is fabricated by electron beam evaporation, mainly using a common ground-signal-ground electrode or a specially designed capacitive loading electrode.

[0077] In Examples 1 and 2, the Si device layer 1 includes optical input / output devices, mainly comprising end-face tapered coupling structures or grating couplers, MMI beam splitting and combining structures (Y-branch or multimode interference beam splitter), wide single-mode waveguide structures, tapered thermally adiabatic transmission waveguide structures, narrow single-mode waveguide structures, etc. The thin-film lithium niobate layer (LNOI layer) is obtained directly from commercial lithium niobate wafers through mechanical dicing. The wafer surface morphology undergoes no semiconductor processing other than organic and RAC cleaning, thus avoiding the difficulties of complex etching of lithium niobate material.

[0078] Example 3

[0079] A method for manufacturing a heterogeneous integrated silicon-based thin-film lithium niobate modulator includes the following steps:

[0080] a) The Si device layer is fabricated using a fabrication method compatible with CMOS technology;

[0081] b) LNOI layers with characteristic crystal orientations were prepared by dicing.

[0082] c) The traveling wave transmission electrode was prepared using electron beam deposition.

[0083] d) Achieve heterogeneous integration of the LNOI layer and the SiO2 cladding on the Si device layer using direct bonding or adhesive bonding methods;

[0084] e) Remove the substrate Si of the LNOI layer by grinding, polishing, or deep etching;

[0085] f) Remove the buried oxide layer SiO2 using wet etching or CMP.

[0086] The method for heterogeneous integration of the LNOI layer and the SiO2 cladding on the Si device layer using direct bonding or adhesive bonding in step d) is as follows:

[0087] 1) Select an SOI wafer with a 2.5um buried oxide layer and a 300nm device layer (1-0-0 crystal orientation p-type doped), and select a high impedance type wafer substrate to ensure low-loss transmission of microwave signals;

[0088] 2) Select an LNOI wafer with a 2.7µm buried oxide layer and a 500nm thick device layer. The substrate of this wafer will be removed later, so its resistance characteristics are not considered.

[0089] 3) Remove 150nm of Si from the SOI wafer through etching to achieve 150nm.

[0090] 4) Passive devices on silicon are fabricated using CMOS technology to obtain Si devices; Si devices mainly include on-chip devices such as end couplers, MMI beam splitters, thermally insulating waveguides, and narrow single-mode waveguides, and can also be fabricated by silicon optical fabrication plants.

[0091] 5) PECVD is used to grow a silicon dioxide cladding layer on the Si device with a thickness of 400 nm to avoid possible damage to the device on the silicon in subsequent processes;

[0092] 6) The grown silicon dioxide cladding is thinned and surface polished using CMP (Crush, Polish, and Grind) technology to form an SOI wafer; the surface roughness of the silicon dioxide cladding is guaranteed to be <1nm. This requires ellipsometry testing of the entire SOI wafer to select the area that meets the requirements for dicing; the final thickness of the silicon dioxide cladding is 200nm.

[0093] 7) Directly clean the SOI wafers and LNOI wafers with organic cleaning and RCA-1 standard solution;

[0094] 8) After cleaning, the SOI wafer and LNOI wafer are subjected to 2 minutes of RF power 150W plasma surface activation treatment in an oxygen atmosphere using plasma activation equipment. The principle of plasma surface activation is to effectively remove organic contaminants and inert layers from the crystal surface by using the physical and chemical action of plasma, change the composition of suspended groups on the crystal surface, and enhance the bonding ability of the crystal surface.

[0095] 9) Place the SOI wafer and LNOI wafer in the fixtures of the SB6 wafer bonding equipment, adjust the bonding experimental parameters, and perform bonding.

[0096] The method for heterogeneous integration of the LNOI layer and the SiO2 cladding on the Si device layer using adhesive bonding in step d) is as follows:

[0097] 1) Select an SOI wafer with a 2.5um buried oxide layer and a 300nm device layer (1-0-0 crystal orientation p-type doped), and select a high impedance type wafer substrate to ensure low-loss transmission of microwave signals;

[0098] 2) Select an LNOI wafer with a 2.7µm buried oxide layer and a 500nm thick device layer. The substrate of this wafer will be removed later, so its resistance characteristics are not considered.

[0099] 3) Remove 150nm of Si from the SOI wafer through etching to achieve 150nm.

[0100] 4) Passive devices on silicon are fabricated using CMOS technology to obtain Si devices. Si devices mainly include on-chip devices such as end couplers, MMI beam splitters, thermally insulating waveguides, and narrow single-mode waveguides. They can also be manufactured by silicon optical fabrication plants.

[0101] 5) Directly perform organic cleaning and RCA-1 standard solution cleaning on Si devices and LNOI wafers; Since there are passive components on Si devices, only RCA cleaning is required, and ultrasonic cleaning is not allowed directly. LNOI wafers can be directly ultrasonically cleaned and RCA cleaned.

[0102] 6) After cleaning, first spin-coat the adhesion promoter AP3000 on the surface of the Si device and LNOI wafer, then spin-coat BCB3022-35 adhesive and a diluent of trimethylbenzene to ensure that the thickness of BCB is 200nm after pre-curing at 200℃.

[0103] 7) Place the Si device and LNOI wafer on the fixture of the SB6 wafer bonding equipment for bonding.

[0104] In this embodiment, the bonding parameters of the SB6 wafer bonding device are as follows:

[0105] The bonding machine was pressurized to 110 mBar, and the temperature was slowly increased from 50°C to 200°C over 60 minutes; the temperature was held at 200°C for 60 minutes, and then slowly increased to 250°C over another 60 minutes; the temperature was held at 250°C for 60 minutes, and then slowly increased to 300°C over another 60 minutes; the temperature was held at 300°C for 120 minutes, and then allowed to cool naturally to room temperature (approximately 5 hours). Under these parameter conditions, a very good direct bonding effect was achieved.

[0106] In this embodiment, the cleaning method is as follows:

[0107] (a) Soak the beaker in potassium dichromate solution to clean it, and then ultrasonically clean the tweezers with deionized water for 15 minutes.

[0108] (b) The LNOI wafers were placed sequentially in an ultrasonic cleaner at 50°C using acetone, isopropanol, and anhydrous ethanol as active reagents, and left for 20 minutes each to effectively remove organic impurities adhering to the surface of SOI and LNOI wafers. The cleaning activity of the three reagents was in the order of acetone > isopropanol > anhydrous ethanol. Then, the wafers were rinsed with deionized water for 10 minutes to remove the active reagents. After cleaning, the wafers were observed under a microscope. If the wafers were found to be unclean, they were wiped clean with a cotton swab soaked in acetone. This process was repeated until no dirt was observed on the surface of the crystals under the microscope.

[0109] (c) RCA cleaning is performed using the standard wet cleaning process. The chemical composition of standard RCA cleaning solution No. 1 is NH4OH / H2O2 / H2O (ammonium hydroxide / hydrogen peroxide / deionized water) mixed in a ratio of 1:1:6. When using it, first mix NH4OH and H2O in a ratio of 1:6 and heat it to 70°C. At this time, add 1 part of H2O2 and let it stand for 2 minutes. After a large number of bubbles are generated in the solution, put the SOI wafer and LNOI wafer into the solution and keep the solution temperature at 40°C for 10 minutes. Then rinse with deionized water for 4 minutes.

[0110] To meet the subsequent modulation requirements of the on-chip integrated modulator of silicon-based thin-film lithium niobate, the GSG electrode needs to efficiently modulate the optical mode field in the LN in order to realize the fabrication of the high-bandwidth modulator. The following examples illustrate two basic methods for fabricating the GSG electrode, with further explanation.

[0111] The GSG electrode based on the traveling wave transmission line needs to maintain a micrometer-level spacing from the LN waveguide structure to achieve effective coupling and matching of the radio frequency field with the optical field, thus realizing the most efficient electro-optic modulation process. This means that the GSG electrode needs to be fabricated near the LN layer rather than far away. To address this close-range modulation requirement, this invention proposes two GSG electrode fabrication methods: substrate removal and electrode wrapping.

[0112] Example 4

[0113] See Figure 3 The method for fabricating heterogeneous integrated silicon-based thin-film lithium niobate modulators using the substrate removal method is as follows:

[0114] 1) Preparation of protective layer

[0115] The bonding and completion of the Si-LNOI chip first involves growing a 2µm silicon dioxide thin film on the upper surface of the device using PECVD as a protective layer for the device on Si.

[0116] 2) BB220 spin coating

[0117] BB220 adhesive was used to spin-coat and protect exposed silicon-on-silicon devices and SOI substrates. The curing temperatures of BB220 were 80℃ for 3 min, 180℃ for 3 min, and 220℃ for 5 min.

[0118] 3) Removal of the silica protective layer of LNOI

[0119] The chip was etched with hydrofluoric acid solution for 2 seconds to remove the silicon dioxide protective layer on the back side of the LNOI substrate prepared in step 1).

[0120] 4) Removal of LNOI from Si substrate

[0121] The LNOI substrate was etched and removed using a XeF2 etching process for 200 cycles.

[0122] 5) Removal of SiO2 buried oxide layer

[0123] The chip was etched using a hydrofluoric acid solution for 2 seconds.

[0124] 6) Exposure of GSG electrode images

[0125] The spin coating process was performed using 672.11, the GSG electrode was exposed using an e-book exposure device, the development was performed for 30 seconds using MIBK solution, and the fixing was performed for 70 seconds using IPA solution.

[0126] 7) Electrode evaporation

[0127] GSG electrodes were deposited using an electron beam evaporation apparatus, with 150 nm Ti, 1.2 μm Au, and 100 nm Ti deposited respectively.

[0128] 8) Electrode stripping process

[0129] The chip was immersed in acetone solution for 24 hours, and then rinsed with water to remove excess photoresist and the metal layer adhering to it, thus realizing the fabrication of GSG electrode.

[0130] Example 5

[0131] See Figure 4 The method for fabricating heterogeneous integrated silicon-based thin-film lithium niobate modulators using the electrode wrapping method is as follows:

[0132] 1) Exposure of GSG electrode images

[0133] After the passive device is fabricated on SOI, 672.11 electron beam resist is spin-coated directly on it. The GSG electrode is exposed using an electronic book exposure device, developed with MIBK solution for 30 seconds, and fixed with IPA solution for 70 seconds.

[0134] 2) Electrode evaporation

[0135] GSG electrodes were deposited using an electron beam evaporation apparatus, with 150 nm Ti, 1.2 μm Au and 100 nm Ti deposited respectively.

[0136] 3) Electrode stripping process

[0137] The chip was immersed in acetone solution for 24 hours, and then rinsed with water to remove excess photoresist and the metal layer adhering to it, thus realizing the fabrication of GSG electrode.

[0138] 4) Immerse the exposed sample in a developer solution composed of MIBK:IPA (3:1) for about 1 minute to remove the exposed PMMA resist and achieve PMMA patterning.

[0139] 5) PECVD is used to grow a silicon dioxide cladding layer on the fabricated Si device, with a thickness of about 400 nm, to avoid possible damage to the device on silicon in subsequent processes.

[0140] 6) The grown silicon dioxide cladding is thinned and polished using CMP (Crush, Polish, and Grind) technology. Note that the surface roughness of the silicon dioxide must be less than 1 nm. This requires ellipsometry testing of the entire SOI wafer to select the qualified areas for dicing. The final thickness of the silicon dioxide cladding is about 200 nm.

[0141] 7) The polished SOI wafer and commercial LNOI substrate are directly cleaned with organic cleaning and RCA-1 standard solution, followed by direct bonding. Subsequent complex steps such as LNOI substrate removal are unnecessary, thus completing the heterogeneous integration process of the silicon-based thin-film lithium niobate modulator.

[0142] It should be understood that those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A heterogeneous integrated silicon-based thin-film lithium niobate modulator, characterized in that: It includes a Si device layer, a SiO2 cladding layer, a Si substrate, an LNOI layer, a second SiO2 cladding layer, a Ti-Au transport electrode, and a second Si substrate; The SiO2 cladding is placed on the Si device layer; The substrate Si is placed on the Si device layer and within the SiO2 cladding layer; The LNOI layer is integrated with the SiO2 cladding layer and the second SiO2 cladding layer by bonding; and the LNOI layer is placed on the SiO2 cladding layer and below the second SiO2 cladding layer. The transmission electrode Ti-Au is placed on the Si device layer and within the SiO2 cladding, spaced apart from the substrate Si. The second substrate Si is placed on the second SiO2 cladding layer; The Si device layer is fabricated using a CMOS-compatible semiconductor wafer fabrication process; the LNOI layer is fabricated by dicing commercial thin-film lithium niobate wafers; and the Ti-Au transport electrode is fabricated by electron beam evaporation. The thickness of the SiO2 cladding layer is 150-220 nm, the thickness of the LNOI layer is 500-600 nm, and the thickness of the Ti-Au transport electrode is 0.8-1.2 μm. The LNOI layer and the transport electrode Ti-Au maintain a micrometer-level spacing.

2. A method for manufacturing a heterogeneous integrated silicon-based thin-film lithium niobate modulator according to claim 1, characterized in that, Includes the following steps: a) The Si device layer is fabricated using a fabrication method compatible with CMOS technology; b) LNOI layers with characteristic crystal orientations were prepared by dicing. c) The traveling wave transmission electrode was prepared using electron beam deposition. d) Achieve heterogeneous integration of the LNOI layer and the SiO2 cladding on the Si device layer using direct bonding or adhesive bonding methods; e) Remove the substrate Si of the LNOI layer by grinding, polishing, or deep etching; f) Remove the buried oxide layer SiO2 using wet etching or CMP.

3. The method for manufacturing a heterogeneous integrated silicon-based thin-film lithium niobate modulator according to claim 2, characterized in that: The direct bonding in step d) is a direct connection between ultra-clean wafers based on van der Waals forces; The adhesive bonding in step d) is a bonding technology based on BCB adhesive to connect wafers.

4. The method for manufacturing a heterogeneous integrated silicon-based thin-film lithium niobate modulator according to claim 2, characterized in that: The bonding equipment in step d) is a hot plate, vacuum annealing furnace or wafer bonding machine at room temperature.

5. The method for manufacturing a heterogeneous integrated silicon-based thin-film lithium niobate modulator according to claim 2, characterized in that: The method for heterogeneous integration of the LNOI layer and the SiO2 cladding on the Si device layer using direct bonding or adhesive bonding in step d) is as follows: 1) Select an SOI wafer with a 2.5µm buried oxide layer and a 300nm device layer, and choose a high-impedance type wafer substrate; 2) Select LNOI wafers with a 2.7µm buried oxide layer and a 500nm thick device layer; 3) Remove 150nm of Si from the SOI wafer through etching to achieve 150nm. 4) Passive devices on silicon are fabricated using CMOS technology to obtain Si devices; 5) A silicon dioxide cladding layer with a thickness of 400 nm was grown on a Si device using PECVD. 6) The grown silica cladding is thinned and surface-polished using grinding and polishing technology to form an SOI wafer; the surface roughness of the silica cladding is guaranteed to be <1nm; the final thickness of the silica cladding is 200nm. 7) Perform organic cleaning and RCA-1 standard solution cleaning directly on SOI wafers and LNOI wafers; since SOI wafers have passive devices, only RCA cleaning is required and ultrasonic cleaning is not allowed. LNOI wafers can be directly ultrasonically cleaned and RCA cleaned. 8) After cleaning, the SOI wafer and LNOI wafer are subjected to 2 minutes of RF power 150W plasma surface activation treatment in an oxygen atmosphere using a plasma activation device. 9) Place the SOI wafer and LNOI wafer into the fixtures of the SB6 wafer bonding equipment, adjust the bonding experimental parameters, and perform bonding.

6. The method for manufacturing a heterogeneous integrated silicon-based thin-film lithium niobate modulator according to claim 2, characterized in that: The method for heterogeneous integration of the LNOI layer and the SiO2 cladding on the Si device layer using adhesive bonding in step d) is as follows: 1) Select an SOI wafer with a 2.5µm buried oxide layer and a 300nm device layer, and choose a high-impedance type wafer substrate; 2) Select LNOI wafers with a 2.7µm buried oxide layer and a 500nm thick device layer; 3) Remove 150nm of Si from the SOI wafer through etching to achieve 150nm. 4) Passive devices on silicon are fabricated using CMOS technology to obtain Si devices; 5) Directly perform organic cleaning and RCA-1 standard solution cleaning on Si devices and LNOI wafers; Since there are passive components on Si devices, only RCA cleaning is required, and ultrasonic cleaning cannot be performed directly. LNOI wafers can be directly ultrasonically cleaned and RCA cleaned. 6) After cleaning, first spin-coat the adhesion promoter AP3000 on the surface of the Si device and LNOI wafer, then spin-coat BCB3022-35 adhesive and a diluent of trimethylbenzene to ensure that the thickness of BCB is 200nm after pre-curing at 200℃. 7) Place the Si device and LNOI wafer on the fixture of the SB6 wafer bonding equipment for bonding.

7. The method for manufacturing a heterogeneous integrated silicon-based thin-film lithium niobate modulator according to claim 5 or 6, characterized in that: The bonding parameters for the SB6 wafer bonding equipment are as follows: The bonding machine was pressurized to 110 mBar, and the temperature was slowly increased from 50°C to 200°C over 60 minutes; the temperature was held at 200°C for 60 minutes, and then slowly increased to 250°C over another 60 minutes; the temperature was held at 250°C for 60 minutes, and then slowly increased to 300°C over another 60 minutes; the temperature was held at 300°C for 120 minutes, and then allowed to cool naturally to room temperature.

8. The method for manufacturing a heterogeneous integrated silicon-based thin-film lithium niobate modulator according to claim 5 or 6, characterized in that: The cleaning method is as follows: (a) Soak the beaker in potassium dichromate solution to clean it, and ultrasonically clean the tweezers with deionized water for 15 min. (b) Place the LNOI wafer sequentially into a 50°C ultrasonic cleaner using acetone, isopropanol, and anhydrous ethanol as active reagents, and leave each for 20 min. Then rinse with deionized water for 10 min to remove the active reagents. After cleaning, observe with a microscope. If it is found that it is not clean, wipe it clean with a cotton swab soaked in acetone. (c) The standard wet cleaning process RCA cleaning is adopted. The chemical composition of standard RCA cleaning solution No. 1 is a mixture of NH4OH / H2O2 / H2O in a ratio of 1:1:

6. When using it, first mix NH4OH and H2O in a ratio of 1:6 and heat it to 70°C. At this time, add 1 part of H2O2 and let it stand for 2 minutes. After a large number of bubbles are generated in the solution, put the SOI wafer and LNOI wafer into the solution and keep the solution temperature at 40°C for 10 minutes. Then rinse with deionized water for 4 minutes.

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