Bonding apparatus and bonding method

Abstract

The application provides a bonding device and a bonding method. The bonding method comprises the following steps: providing a first carrier film and a second carrier film, the first carrier film carrying a plurality of chips, and the second carrier film carrying a wafer; covering the first carrier film and the second carrier film with a first shielding cover and a second shielding cover respectively, and the first shielding cover exposing part of the chips, and the second shielding cover exposing part of the surface of the wafer; performing a plasma cleaning process to activate part of the chips exposed by the first shielding cover and part of the surface of the wafer exposed by the second shielding cover; and bonding the activated part of the chips on the activated part of the surface of the wafer. The technical scheme of the application can reduce the probability of bonding failure.

Description

Technical Field

[0001] This invention relates to the field of semiconductors, and in particular to a bonding apparatus and bonding method. Background Technology

[0002] Currently, chip-wafer bonding is a crucial method for achieving three-dimensional heterogeneous integration. The quality of the bonding directly determines the success of the three-dimensional heterogeneous integration, and the activation of both the chip and the wafer directly determines the bonding quality. Existing chip-wafer bonding technologies include: first, cleaning and activating all chips obtained after dicing the top-layer wafer in one go, while simultaneously cleaning and activating the entire surface of the bottom-layer wafer to be bonded to the chips; then, sequentially aligning all the chips with the bottom-layer wafer and bonding them.

[0003] After cleaning and activating the chip and the underlying wafer, bonding must be performed promptly. Otherwise, as the waiting time increases, the activity of the chip and wafer surfaces will gradually decrease, preventing proper bonding and leading to bonding failure. However, due to current process and equipment limitations, bonding each chip and wafer requires a considerable amount of time. Furthermore, the large number of chips means that later-bonded chips and bonding points on the underlying wafer will wait a long time after cleaning and activation. The longer the waiting time, the higher the probability of bonding failure.

[0004] Therefore, reducing the probability of bonding failure is an urgent problem to be solved. Summary of the Invention

[0005] The purpose of this invention is to provide a bonding apparatus and bonding method that can reduce the probability of bonding failure.

[0006] To achieve the above objectives, the present invention provides a bonding method, comprising:

[0007] A first carrier film and a second carrier film are provided, wherein a plurality of chips are carried on the first carrier film and a wafer is carried on the second carrier film;

[0008] The first and second shielding covers are respectively used to cover the first carrier film and the second carrier film, with the first shielding cover exposing a portion of the chip and the second shielding cover exposing a portion of the wafer surface;

[0009] A plasma cleaning process is performed to activate a portion of the chip exposed by the first shielding and a portion of the wafer exposed by the second shielding.

[0010] The activated portion of the chip is bonded to the activated portion of the surface of the wafer.

[0011] Optionally, after performing the plasma cleaning process and before bonding the activated portion of the chip to the activated portion surface of the wafer, the bonding method further includes:

[0012] Remove the first mask and the second mask.

[0013] Optionally, the first shield has a first opening for exposing a portion of the chip, and the second shield has a second opening for exposing a portion of the wafer surface, the exposure areas of the first opening and the second opening being adjustable or fixed.

[0014] Optionally, the exposure areas of the first opening and the second opening are adjustable, and the bonding method further includes:

[0015] The exposure areas of the first opening and the second opening are adjusted such that the first opening exposes a portion of the remaining area of ​​the chip on the first carrier film and the second opening exposes a portion of the wafer surface on the remaining area of ​​the second carrier film;

[0016] Repeat the plasma cleaning process and the steps of bonding the activated portions of the chip to the activated portion surface of the wafer;

[0017] The exposed areas of the first opening and the second opening are fixed, and the bonding method further includes:

[0018] The first and second shielding covers are respectively used to cover the first carrier film and the second carrier film. The first opening on the new first shielding exposes a portion of the chip in the remaining area of ​​the first carrier film, and the second opening on the new second shielding exposes a portion of the wafer surface in the remaining area of ​​the second carrier film.

[0019] Repeat the plasma cleaning process and the steps of bonding the activated portions of the chip to the activated portion surface of the wafer.

[0020] Optionally, the edge of the first carrier film is provided with a first fixing ring, which surrounds the plurality of chips; the edge of the second carrier film is provided with a second fixing ring, which surrounds the wafer.

[0021] Optionally, the edge of the first shield is connected to the first fixing ring, and the edge of the second shield is connected to the second fixing ring.

[0022] The present invention also provides a bonding apparatus, comprising:

[0023] A first carrier film and a second carrier film, wherein the first carrier film carries multiple chips and the second carrier film carries a wafer;

[0024] A first shielding cover and a second shielding cover are used to cover the first carrier film and the second carrier film, respectively, with the first shielding cover exposing a portion of the chip and the second shielding cover exposing a portion of the wafer surface;

[0025] A plasma cleaning unit is used to activate a portion of the chip exposed by the first shielding cover and a portion of the wafer exposed by the second shielding cover;

[0026] A bonding unit for bonding an activated portion of the chip to an activated portion of the surface of the wafer.

[0027] Optionally, the first shield has a first opening for exposing a portion of the chip, and the second shield has a second opening for exposing a portion of the wafer surface, the exposure areas of the first opening and the second opening being adjustable or fixed.

[0028] Optionally, the edge of the first carrier film is provided with a first fixing ring, which surrounds the plurality of chips; the edge of the second carrier film is provided with a second fixing ring, which surrounds the wafer.

[0029] Optionally, the edge of the first shield is connected to the first fixing ring, and the edge of the second shield is connected to the second fixing ring.

[0030] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0031] 1. The bonding method of the present invention involves using a first shielding mask and a second shielding mask to cover a first carrier film and a second carrier film respectively, wherein the first shielding mask exposes a portion of the chips and the second shielding mask exposes a portion of the wafer surface; performing a plasma cleaning process to activate the portion of the chips exposed by the first shielding mask and the portion of the wafer surface exposed by the second shielding mask; and bonding the activated portion of the chips to the activated portion of the wafer surface, thereby reducing the waiting time between cleaning activation and bonding completion for each bonding point of each chip and the wafer, thereby preventing a decrease in the chemical activity of the bonding surfaces of the chips and the wafer, and thus reducing the probability of bonding failure.

[0032] 2. The bonding apparatus of the present invention comprises: a first carrier film and a second carrier film, wherein the first carrier film carries a plurality of chips and the second carrier film carries a wafer; a first shielding cover and a second shielding cover, respectively used to cover the first carrier film and the second carrier film, wherein the first shielding cover exposes a portion of the chips and the second shielding cover exposes a portion of the surface of the wafer; a plasma cleaning unit used to activate the portion of the chips exposed by the first shielding cover and the portion of the surface of the wafer exposed by the second shielding cover; and a bonding unit used to bond the activated portion of the chips to the activated portion of the surface of the wafer, thereby reducing the waiting time between cleaning activation and bonding completion at each bonding point of each chip and the wafer, thereby preventing the chemical activity of the bonding surface of the chip and the wafer from decreasing, and thus reducing the probability of bonding failure. Attached Figure Description

[0033] Figure 1a This is a top view schematic diagram of a first carrier film carrying a chip according to an embodiment of the present invention;

[0034] Figure 1b This is a top view schematic diagram of a first fixing ring fixed to the edge of a first bearing membrane according to an embodiment of the present invention;

[0035] Figure 1c This is a top view schematic diagram of a first shielding cover covering a chip according to an embodiment of the present invention;

[0036] Figure 2a This is a top view schematic diagram of a second carrier film supporting a wafer according to an embodiment of the present invention;

[0037] Figure 2b This is a top view schematic diagram of a second fixing ring fixed to the edge of a second bearing membrane according to an embodiment of the present invention;

[0038] Figure 2c This is a top view schematic diagram of a second shielding cover covering a wafer according to an embodiment of the present invention;

[0039] Figure 3 This is a flowchart of a bonding method according to an embodiment of the present invention.

[0040] Among them, the appendix Figures 1a to 3 The annotations in the attached figures are explained as follows:

[0041] 10-Chip; 11-First carrier film; 12-First fixing ring; 13-First shielding cover; 20-Wafer; 21-Second carrier film; 22-Second fixing ring; 23-Second shielding cover. Detailed Implementation

[0042] To make the objectives, advantages, and features of the present invention clearer, the bonding apparatus and bonding method proposed in this invention will be further described in detail below. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clearly illustrate the objectives of the embodiments of the present invention.

[0043] One embodiment of the present invention provides a bonding method, see below. Figure 3 , Figure 3 This is a flowchart of a bonding method according to an embodiment of the present invention. Figure 3 As can be seen from the above, the bonding method includes:

[0044] Step S1: Provide a first carrier film and a second carrier film, wherein the first carrier film carries a plurality of chips and the second carrier film carries a wafer;

[0045] Step S2: The first carrier film and the second carrier film are covered by a first shielding cover and a second shielding cover respectively, and the first shielding cover exposes a portion of the chip, while the second shielding cover exposes a portion of the wafer surface;

[0046] Step S3: Perform a plasma cleaning process to activate the surface of the chips exposed by the first shielding and the wafer exposed by the second shielding.

[0047] Step S4: The activated portion of the chip is bonded to the activated portion surface of the wafer.

[0048] See below. Figures 1a to 2c The bonding method provided in this embodiment will be described in more detail.

[0049] Follow step S1, refer to Figure 1a and Figure 2a A first carrier film 11 and a second carrier film 21 are provided. The first carrier film 11 carries a plurality of chips 10, and the second carrier film 21 carries a wafer 20.

[0050] The first carrier film 11 and the second carrier film 21 can be any film coated with adhesive, such as blue film, so that the chip 10 is adhered to the first carrier film 11 and the wafer 20 is adhered to the second carrier film 21.

[0051] And, as Figure 1b As shown, a first fixing ring 12 is provided on the edge of the first carrier film 11. The first fixing ring 12 surrounds the plurality of chips 10. The first fixing ring 12 is used to fix the first carrier film 11 and tighten the first carrier film 11 so that the chips 10 can be picked up in the subsequent bonding process; as shown Figure 2bAs shown, a second fixing ring 22 is provided on the edge of the second carrier film 21. The second fixing ring 22 surrounds the wafer 20 and is used to fix the second carrier film 21 and tighten the second carrier film 21.

[0052] Follow step S2, see Figure 1c and Figure 2c The first carrier film 11 and the second carrier film 21 are covered by a first shielding cover 13 and a second shielding cover 23 respectively. The first shielding cover 13 exposes only a portion of the chip 10 on a portion of the first carrier film 11, and the second shielding cover 23 exposes only a portion of the surface of the wafer 20 on a portion of the second carrier film 21.

[0053] The edge of the first shielding cover 13 can be connected to the first fixing ring 12, and the edge of the second shielding cover 23 can be connected to the second fixing ring 22, so as to fix the first shielding cover 13 to the first fixing ring 12 and the second shielding cover 23 to the second fixing ring 22.

[0054] It should be noted that the surface of the first shielding cover 13 opposite to the first carrier film 11 does not contact the chip 10, and the surface of the second shielding cover 23 opposite to the second carrier film 21 does not contact the wafer 20.

[0055] The first shield 13 has a first opening (unidentified) for exposing a portion of the chip 10, and the second shield 23 has a second opening (unidentified) for exposing a portion of the surface of the wafer 20. The exposure areas of the first opening and the second opening are adjustable or fixed.

[0056] If the exposure areas of the first opening and the second opening are adjustable, only one first shielding cover 13 and one second shielding cover 23 need to be designed. Both the first shielding cover 13 and the second shielding cover 23 are provided with an adjustment component (not shown) for adjusting the size of the exposure areas of the first opening and the second opening. This allows the chip 10 on the first carrier film 11 and the wafer 20 on the second carrier film 21 to be exposed in different areas without replacing the first shielding cover 13 and the second shielding cover 23.

[0057] If the exposure areas of the first opening and the second opening are fixed, multiple first shielding covers 13 and multiple second shielding covers 23 can be designed. The first openings of different first shielding covers 13 expose different areas of the chip 10 on the first carrier film 11. All the first openings of the first shielding covers 13 can be spliced ​​together to expose all the chips 10 on the first carrier film 11. Similarly, the second openings of different second shielding covers 23 expose different areas of the wafer 20 on the second carrier film 21. All the second openings of the second shielding covers 23 can be spliced ​​together to expose the entire wafer 20 on the second carrier film 21.

[0058] The materials of the first shielding cover 13 and the second shielding cover 23 can be ceramic, glass or metal, etc.

[0059] According to step S3, a plasma cleaning process is performed to activate a portion of the chip 10 on a portion of the first carrier film 11 exposed by the first shielding cover 13 and a portion of the wafer 20 on a portion of the second carrier film 21 exposed by the second shielding cover 23. Since the remaining areas of the chip 10 on the first carrier film 11 and the remaining areas of the wafer 20 on the second carrier film 21 are not exposed, the surfaces of the remaining areas of the chip 10 on the first carrier film 11 and the remaining areas of the wafer 20 on the second carrier film 21 are not activated by plasma cleaning.

[0060] The steps of performing a plasma cleaning process may include: first, placing the first carrier film 11 covered by the first shielding cover 13 and the second carrier film 21 covered by the second shielding cover 23 in a plasma chamber; then, introducing a gas into the plasma chamber, the gas being at least one of nitrogen, oxygen, and argon; then, energizing the electrodes in the plasma chamber to generate plasma from the gas, thereby cleaning a portion of the chip 10 on a portion of the first carrier film 11 exposed by the first shielding cover 13 and the chip 21 on a portion of the first carrier film 11 exposed by the second shielding cover 23. Plasma bombardment is performed on a portion of the surface of the wafer 20 in a certain area on the second carrier film 21, thereby activating the dangling bonds formed on the surfaces of the chips 10 exposed by the first shielding cover 13 and the wafer 20 exposed by the second shielding cover 23. This increases the surface chemical activity, allowing the dangling bonds on the surfaces of the activated chips 10 to directly bond with the dangling bonds on the activated surfaces of the wafer 20 during subsequent bonding processes. This, in turn, improves the bonding strength between the activated chips 10 and the activated surfaces of the wafer 20.

[0061] According to step S4, the activated portion of the chip 10 is bonded to the activated portion surface of the wafer 20.

[0062] After performing the plasma cleaning process and before bonding the activated portions of the chip 10 to the activated portion surface of the wafer 20, the bonding method further includes:

[0063] Remove the first masking cover 13 and the second masking cover 23 to prevent them from affecting the bonding between the chip 10 and the wafer 20.

[0064] The step of bonding the activated portion of the chips 10 to the activated portion surface of the wafer 20 may include: first, fixing the first carrier film 11 carrying the plurality of chips 10 to a first carrier stage (not shown), and fixing the second carrier film 21 carrying the wafer 20 to a second carrier stage (not shown); then, using a chip pick-up component (not shown), picking up and flipping the activated chip 10 from the first carrier film 11; then, using a bonding head (not shown), adsorbing the flipped chip 10, and then moving the bonding head horizontally along a guide rail (not shown), so that the bonding head moves the chip 10 above the wafer 20; then, aligning the chip 10 with the activated bonding points on the wafer 20, and then bonding the chip 10 to the activated bonding points on the wafer 20. If the activated portion of the chips 10 consists of at least two chips 10, the steps described above, including picking up and flipping the activated chips 10 from the first carrier film 11 using the chip picking component, and the steps following this step, are repeated in a loop until all the activated chips 10 are bonded to the activated portion of the surface of the wafer 20.

[0065] Furthermore, if the exposure areas of the first opening and the second opening are adjustable, the bonding method may further include: firstly, adjusting the exposure areas of the first opening and the second opening using the adjusting member, such that the first opening exposes a portion of the remaining area of ​​the chip 10 on the first carrier film 11 and the second opening exposes a portion of the remaining area of ​​the wafer 20 on the second carrier film 21; then, repeating the plasma cleaning process and the steps of bonding the activated portion of the chip 10 to the activated portion of the wafer 20, such that the activated portion of the chip 10 on the remaining area of ​​the first carrier film 11 is bonded to the activated portion of the wafer 20 on the remaining area of ​​the second carrier film 21. It should be noted that the above steps can be repeated until all chips 10 on the first carrier film 11 are bonded to the wafer 20; and the size of the area exposed by the first opening and the second opening (i.e. the number of chips 10 and the number of bonding points on the second wafer 20 in the exposed area) can be optimally selected based on factors such as bonding speed, the time required for plasma cleaning process and the time that the activated chemical activity can be maintained.

[0066] If the exposed areas of the first opening and the second opening are fixed, the bonding method further includes: firstly, using a new first shielding cover 13 and a new second shielding cover 23 to cover the first carrier film 11 and the second carrier film 21 respectively, the first opening on the new first shielding cover 13 exposing a portion of the remaining area of ​​the chip 10 on the first carrier film 11, and the second opening on the new second shielding cover 23 exposing a portion of the remaining area of ​​the wafer 20 on the second carrier film 21; then, repeating the plasma cleaning process and the steps of bonding the activated portion of the chip 10 to the activated portion of the wafer 20, so that the activated portion of the chip 10 on the remaining area of ​​the first carrier film 11 is bonded to the activated portion of the wafer 20 on the remaining area of ​​the second carrier film 21. It should be noted that the above steps can be repeated until all chips 10 on the first carrier film 11 are bonded to the wafer 20; and the size of the area exposed by the first opening on each first shielding 13 and the second opening on each second shielding 23 (i.e. the number of chips 10 and the number of bonding points on the second wafer 20 in the exposed area) can be designed according to factors such as bonding speed, the time required for plasma cleaning process and the time that the activated chemical activity can be maintained.

[0067] If, after cleaning and activating the chip 10 and the wafer 20, the chip 10 is not bonded to the wafer 20 in time due to excessive waiting time, the insulating dielectric layer on the bonding surface of the chip 10 and the wafer 20 will adsorb water molecules from the air, and the metal layer on the bonding surface will be oxidized by the air. That is, the chemical activity of the bonding surface of the chip 10 and the wafer 20 will decrease, resulting in a decrease in the bonding strength between the chip 10 and the wafer 20, thus leading to bonding failure.

[0068] Therefore, the existing method of cleaning and activating all chips at once, and cleaning and activating the entire surface of the underlying wafer to which the chips are bonded, and then sequentially aligning all the chips with the underlying wafer for bonding, results in chips that are bonded later in the order and bonding points on the underlying wafer waiting for a long time after cleaning and activation, which in turn leads to a high probability of bonding failure.

[0069] In this embodiment, by employing the first shielding cover 13 to expose only a portion of the chips 10 and the second shielding cover 23 to expose only a portion of the surface of the wafer 20, each time the plasma cleaning process is performed, only the portion of the chips 10 exposed by the first shielding cover 13 and the portion of the surface of the wafer 20 exposed by the second shielding cover 23 are activated. Then, the activated portion of the chips 10 is bonded to the activated surface of the wafer 20, thereby enabling all the chips 10 on the first carrier film 11 and the second carrier film 23 to be bonded to the activated surface of the wafer 20. The entire surface of the wafer 20 on the film 21 is cleaned and activated multiple times. After cleaning and activation, the activated portions of the chips 10 can be sequentially bonded to the activated portion of the wafer 20 surface. This allows each chip 10 to quickly bond to each bonding point of the wafer 20 after cleaning and activation, reducing the waiting time between cleaning and activation and bonding completion. This prevents the chemical activity of the bonding surfaces of the chips 10 and the wafer 20 from decreasing, thereby reducing the probability of bonding failure.

[0070] Furthermore, when multiple first carrier films 11 are provided, and the types of chips 10 on different first carrier films 11 are different, if it is necessary to bond different types of chips 10 onto the wafer 20, the first shielding cover 13 can be applied to each first carrier film 11. The portion of the chip 10 exposed by the first shielding cover 13 on one of the first carrier films 11 and the portion of the wafer 20 surface exposed by the second shielding cover 23 on the second carrier film 21 are then cleaned and activated. The activated chips... After the chips 10 are bonded to the activated portion of the wafer 20, the portion of the wafer 20 exposed by the first shielding 13 on another first carrier film 11 and the remaining portion of the wafer 20 exposed by the second shielding 23 on the second carrier film 21 are cleaned and activated to bond the activated chips 10 on another first carrier film 11 to the activated portion of the wafer 20 on the remaining portion of the wafer 20 on the second carrier film 21; and so on, until all types of chips 10 are bonded to the wafer 20. Specifically, before each type of chip 10 is bonded to the wafer 20, only the bonding points on the corresponding type of chip 10 that needs to be bonded immediately are cleaned and activated, while the bonding points on other types of chips 10 and their corresponding wafers 20 do not require cleaning and activation. This avoids the chemical activity of the bonding points on other types of chips 10 and their corresponding wafers 20 decreasing due to excessive waiting time, thereby reducing the probability of bonding failure and enabling the bonding of multiple types of chips 10 onto the wafer 20.

[0071] In summary, the bonding method provided by this invention includes: providing a first carrier film and a second carrier film, wherein a plurality of chips are carried on the first carrier film and a wafer is carried on the second carrier film; covering the first carrier film and the second carrier film respectively with a first shielding mask and a second shielding mask, wherein the first shielding mask exposes a portion of the chips and the second shielding mask exposes a portion of the surface of the wafer; performing a plasma cleaning process to activate the portion of the chips exposed by the first shielding mask and the portion of the surface of the wafer exposed by the second shielding mask; and bonding the activated portion of the chips to the activated surface of the wafer. The bonding method provided by this invention can reduce the probability of bonding failure.

[0072] An embodiment of the present invention provides a bonding apparatus, comprising: a first carrier film and a second carrier film, wherein a plurality of chips are carried on the first carrier film and a wafer is carried on the second carrier film; a first shielding cover and a second shielding cover, respectively used to cover the first carrier film and the second carrier film, wherein the first shielding cover exposes a portion of the chips and the second shielding cover exposes a portion of the surface of the wafer; a plasma cleaning unit used to activate the portion of the chips exposed by the first shielding cover and the portion of the surface of the wafer exposed by the second shielding cover; and a bonding unit used to bond the activated portion of the chips to the activated portion of the surface of the wafer.

[0073] See below. Figures 1a to 2c The bonding device provided in this embodiment will be described in more detail.

[0074] The first carrier film 11 carries a plurality of chips 10, and the second carrier film 21 carries a wafer 20.

[0075] The first carrier film 11 and the second carrier film 21 can be any film coated with adhesive, such as blue film, so that the chip 10 is adhered to the first carrier film 11 and the wafer 20 is adhered to the second carrier film 21.

[0076] And, as Figure 1b As shown, a first fixing ring 12 is provided on the edge of the first carrier film 11. The first fixing ring 12 surrounds the plurality of chips 10. The first fixing ring 12 is used to fix the first carrier film 11 and tighten the first carrier film 11 so that the chips 10 can be picked up during the bonding process; as shown Figure 2b As shown, a second fixing ring 22 is provided on the edge of the second carrier film 21. The second fixing ring 22 surrounds the wafer 20 and is used to fix the second carrier film 21 and tighten the second carrier film 21.

[0077] The first shielding cover 13 and the second shielding cover 23 are used to cover the first carrier film 11 and the second carrier film 21, respectively. The first shielding cover 13 exposes only a portion of the chip 10 on a portion of the first carrier film 11, and the second shielding cover 23 exposes only a portion of the surface of the wafer 20 on a portion of the second carrier film 21.

[0078] The edge of the first shielding cover 13 can be connected to the first fixing ring 12, and the edge of the second shielding cover 23 can be connected to the second fixing ring 22, so that the first shielding cover 13 is fixed to the first fixing ring 12 and the second shielding cover 23 is fixed to the second fixing ring 22.

[0079] It should be noted that the surface of the first shielding cover 13 opposite to the first carrier film 11 does not contact the chip 10, and the surface of the second shielding cover 23 opposite to the second carrier film 21 does not contact the wafer 20.

[0080] The first shield 13 has a first opening (unidentified) for exposing a portion of the chip 10, and the second shield 23 has a second opening (unidentified) for exposing a portion of the surface of the wafer 20. The exposure areas of the first opening and the second opening are adjustable or fixed.

[0081] If the exposure areas of the first opening and the second opening are adjustable, the bonding device may consist of only one first shielding cover 13 and one second shielding cover 23. Both the first shielding cover 13 and the second shielding cover 23 are provided with an adjustment member (not shown) for adjusting the size of the exposure areas of the first opening and the second opening, so that the chip 10 on the first carrier film 11 and the wafer 20 on the second carrier film 21 can be exposed without replacing the first shielding cover 13 and the second shielding cover 23.

[0082] If the exposed areas of the first opening and the second opening are fixed, the bonding device may include a plurality of first shielding covers 13 and a plurality of second shielding covers 23. The first openings of different first shielding covers 13 expose different areas of the chip 10 on the first carrier film 11. The first openings of all the first shielding covers 13 can be spliced ​​together to expose all the chips 10 on the first carrier film 11. Similarly, the second openings of different second shielding covers 23 expose different areas of the wafer 20 on the second carrier film 21. The second openings of all the second shielding covers 23 can be spliced ​​together to expose the entire wafer 20 on the second carrier film 21.

[0083] The materials of the first shielding cover 13 and the second shielding cover 23 can be ceramic, glass or metal, etc.

[0084] The plasma cleaning unit (not shown) is used to activate a portion of the surface of the chips 10 on a portion of the first carrier film 11 exposed by the first shielding cover 13, and a portion of the surface of the wafer 20 on a portion of the second carrier film 21 exposed by the second shielding cover 23. Since the remaining areas of the chips 10 on the first carrier film 11 and the remaining areas of the wafer 20 on the second carrier film 21 are not exposed, the surfaces of the remaining areas of the chips 10 on the first carrier film 11 and the remaining areas of the wafer 20 on the second carrier film 21 are not activated by plasma cleaning.

[0085] The plasma cleaning unit may include a plasma chamber. After placing the first carrier film 11 covered by the first shielding cover 13 and the second carrier film 21 covered by the second shielding cover 23 in the plasma chamber, a gas can be introduced into the plasma chamber. The gas can be at least one of nitrogen, oxygen, and argon. Then, the electrodes in the plasma chamber are energized to generate plasma from the gas. This plasma bombards a portion of the surface of the chips 10 exposed by the first shielding cover 13 and a portion of the surface of the wafer 20 exposed by the second shielding cover 23 on a portion of the first carrier film 11. This activates the surface of the chips 10 exposed by the first shielding cover 13 and the wafer 20 exposed by the second shielding cover 23, forming dangling bonds and increasing surface chemical activity. As a result, during the bonding process, the dangling bonds on the surface of the activated chips 10 directly bond with the dangling bonds on the activated surface of the wafer 20, thereby improving the bonding strength between the activated chips 10 and the activated surface of the wafer 20.

[0086] The bonding unit (not shown) is used to bond the activated portion of the chip 10 to the activated portion surface of the wafer 20.

[0087] The bonding unit may include: a first carrier stage for fixing the first carrier film 11 carrying the plurality of chips 10; a second carrier stage for fixing the second carrier film 21 carrying the wafer 20; a chip pick-up component for picking up and flipping the activated chip 10 from the first carrier film 11; a bonding head and a guide rail, wherein the bonding head is used to adsorb the flipped chip 10 and move horizontally along the guide rail (not shown) so that the bonding head moves the chip 10 above the wafer 20, and the bonding head then bonds the chip 10 to the activated bonding point on the wafer 20.

[0088] If, after cleaning and activating the chip 10 and the wafer 20 using the plasma cleaning unit, the chip 10 is not bonded to the wafer 20 in time due to excessive waiting time, the insulating dielectric layer on the bonding surface of the chip 10 and the wafer 20 will adsorb water molecules from the air, and the metal layer on the bonding surface will be oxidized by the air. That is, the chemical activity of the bonding surface of the chip 10 and the wafer 20 will decrease, resulting in a decrease in the bonding strength between the chip 10 and the wafer 20, thus leading to bonding failure.

[0089] Therefore, the existing method of cleaning and activating all chips at once, and cleaning and activating the entire surface of the underlying wafer to which the chips are bonded, and then sequentially aligning all the chips with the underlying wafer for bonding, results in chips that are bonded later in the order and bonding points on the underlying wafer waiting for a long time after cleaning and activation, which in turn leads to a high probability of bonding failure.

[0090] In the bonding apparatus of this embodiment, since it includes a first shielding cover 13 that exposes only a portion of the chips 10 and a second shielding cover 23 that exposes only a portion of the surface of the wafer 20, the plasma cleaning unit activates only the portion of the chips 10 exposed by the first shielding cover 13 and the portion of the surface of the wafer 20 exposed by the second shielding cover 23 each time it performs the plasma cleaning process. Then, the bonding unit uses the activated portion of the chips 10 to bond to the activated portion of the surface of the wafer 20, thereby enabling the bonding of the first carrier film 11 to be bonded to the surface of the wafer 20. All chips 10 and the entire surface of the wafer 20 on the second carrier film 21 are cleaned and activated multiple times. After cleaning and activation, the activated portions of the chips 10 can be sequentially bonded to the activated portion of the wafer 20 surface. This allows each chip 10 to quickly bond to each bonding point of the wafer 20 after cleaning and activation, reducing the waiting time between cleaning and activation and bonding completion. This avoids a decrease in the chemical activity of the bonding surfaces of the chips 10 and the wafer 20, thereby reducing the probability of bonding failure.

[0091] Furthermore, when the bonding apparatus includes multiple first carrier films 11, and the types of chips 10 on different first carrier films 11 are different, if it is necessary to bond different types of chips 10 onto the wafer 20, each first carrier film 11 can be covered with a first shielding cover 13. The portion of the chip 10 exposed by the first shielding cover 13 on one of the first carrier films 11 and the portion of the wafer 20 surface exposed by the second shielding cover 23 on the second carrier film 21 can be cleaned and activated. After the chip 10 is bonded to the activated portion of the surface of the wafer 20, the portion of the surface of the wafer 20 exposed by the first shielding 13 on another first carrier film 11 and the remaining portion exposed by the second shielding 23 on the second carrier film 21 are cleaned and activated, so as to bond the activated chip 10 on another first carrier film 11 to the activated portion of the surface of the wafer 20 in the remaining area on the second carrier film 21; and so on, until all types of chips 10 are bonded to the wafer 20. Specifically, before bonding each type of chip 10 to the wafer 20 using the bonding unit, only the bonding points on the corresponding type of chip 10 that needs to be bonded immediately are cleaned and activated, while the bonding points on other types of chips 10 and their corresponding wafers 20 do not require cleaning and activation. This avoids the chemical activity of the bonding points on other types of chips 10 and their corresponding wafers 20 decreasing due to excessive waiting time, thereby reducing the probability of bonding failure and enabling the bonding of multiple types of chips 10 to the wafer 20.

[0092] In summary, the bonding apparatus provided by the present invention includes: a first carrier film and a second carrier film, wherein a plurality of chips are carried on the first carrier film and a wafer is carried on the second carrier film; a first shielding cover and a second shielding cover are respectively used to cover the first carrier film and the second carrier film, wherein the first shielding cover exposes a portion of the chips and the second shielding cover exposes a portion of the surface of the wafer; a plasma cleaning unit is used to activate the portion of the chips exposed by the first shielding cover and the portion of the surface of the wafer exposed by the second shielding cover; and a bonding unit is used to bond the activated portion of the chips to the activated surface of the wafer. The bonding apparatus provided by the present invention can reduce the probability of bonding failure.

[0093] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A bonding method, characterized in that, include: A first carrier film and a second carrier film are provided, wherein a plurality of chips are carried on the first carrier film and a wafer is carried on the second carrier film; The first and second shielding covers are respectively used to cover the first carrier film and the second carrier film, with the first shielding cover exposing a portion of the chip and the second shielding cover exposing a portion of the wafer surface; A plasma cleaning process is performed to activate a portion of the chip exposed by the first shielding and a portion of the wafer exposed by the second shielding. The activated portion of the chip is bonded to the surface of the activated portion of the wafer; The device can activate all the chips on the first carrier film and the entire surface of the wafer on the second carrier film multiple times, and after each activation, the activated portion of the chips can be immediately bonded to the activated portion of the wafer surface.

2. The bonding method as described in claim 1, characterized in that, After performing the plasma cleaning process and before bonding the activated portions of the chip to the activated portion surface of the wafer, the bonding method further includes: Remove the first mask and the second mask.

3. The bonding method as described in claim 1, characterized in that, The first shield has a first opening for exposing a portion of the chip, and the second shield has a second opening for exposing a portion of the wafer surface; the exposure areas of the first and second openings are adjustable or fixed.

4. The bonding method as described in claim 3, characterized in that, The exposure areas of the first opening and the second opening are adjustable, and the bonding method further includes: The exposure areas of the first opening and the second opening are adjusted such that the first opening exposes a portion of the remaining area of ​​the chip on the first carrier film and the second opening exposes a portion of the wafer surface on the remaining area of ​​the second carrier film; Repeat the plasma cleaning process and the steps of bonding the activated portions of the chip to the activated portion surface of the wafer; The exposed areas of the first opening and the second opening are fixed, and the bonding method further includes: The first and second shielding covers are respectively used to cover the first carrier film and the second carrier film. The first opening on the new first shielding exposes a portion of the chip in the remaining area of ​​the first carrier film, and the second opening on the new second shielding exposes a portion of the wafer surface in the remaining area of ​​the second carrier film. Repeat the plasma cleaning process and the steps of bonding the activated portions of the chip to the activated portion surface of the wafer.

5. The bonding method as described in claim 1, characterized in that, The first carrier film has a first fixing ring at its edge, which surrounds the plurality of chips; the second carrier film has a second fixing ring at its edge, which surrounds the wafer.

6. The bonding method as described in claim 5, characterized in that, The edge of the first shield is connected to the first fixing ring, and the edge of the second shield is connected to the second fixing ring.

7. A bonding device, characterized in that, include: A first carrier film and a second carrier film, wherein the first carrier film carries multiple chips and the second carrier film carries a wafer; A first shielding cover and a second shielding cover are used to cover the first carrier film and the second carrier film, respectively, with the first shielding cover exposing a portion of the chip and the second shielding cover exposing a portion of the wafer surface; A plasma cleaning unit is used to activate a portion of the chip exposed by the first shielding cover and a portion of the wafer exposed by the second shielding cover; A bonding unit for bonding the activated portion of the chip to the activated portion surface of the wafer; The device can activate all the chips on the first carrier film and the entire surface of the wafer on the second carrier film multiple times, and after each activation, the activated portion of the chips can be immediately bonded to the activated portion of the wafer surface.

8. The bonding apparatus as claimed in claim 7, characterized in that, The first shield has a first opening for exposing a portion of the chip, and the second shield has a second opening for exposing a portion of the wafer surface; the exposure areas of the first and second openings are adjustable or fixed.

9. The bonding apparatus as claimed in claim 7, characterized in that, The first carrier film has a first fixing ring at its edge, which surrounds the plurality of chips; the second carrier film has a second fixing ring at its edge, which surrounds the wafer.

10. The bonding apparatus as claimed in claim 9, characterized in that, The edge of the first shield is connected to the first fixing ring, and the edge of the second shield is connected to the second fixing ring.

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