Deep neural network modeling method for industrial chip common transformer

Abstract

The present application relates to a kind of industrial chip transformer commonly used deep neural network modeling method, belong to on-chip transformer modeling technical field, the method includes: S1, the structure of transformer, working frequency, geometric parameter and the performance of simulation are determined, and multiple geometric parameters of transformer are defined as vector X, multiple performances to be solved are defined as vector Y;S2, in the set interval, a large number of geometric parameters X are obtained using suitable sampling method, then the corresponding performance index Y is calculated by electromagnetic simulation, and sample data set (X, Y) is formed;S3, sample data set (X, Y) is normalized;S4, the deep neural network model of on-chip transformer is established using machine learning algorithm;S5, the deep neural network model is tested and verified.The method provided by the present application can establish high-precision deep model under limited modeling sample, improve the sample efficiency required when modeling and avoid the overfitting problem of machine learning.

Description

Technical Field

[0001] This invention belongs to the field of on-chip transformer modeling technology, specifically a deep neural network modeling method for transformers commonly used in industrial chips. Background Technology

[0002] Isolators are an essential component in industrial circuit applications, such as for isolating power supplies from equipment.

[0003] Inter-signal interference. Based on different isolation principles, it can generally be divided into three types: optical coupling, capacitive coupling, and transformer magnetic coupling. On-chip integrated transformer coupling has advantages such as low power consumption, small area, high transmission speed, and high rated isolation voltage. Magnetic transformer isolation chips can have a rated isolation voltage that is twice that of...

[0004] Compared to optocoupler isolators, this one offers a transmission rate ten times higher, giving it a significant market advantage. 5CMTI is an important performance indicator for digital isolators, used to measure their ability to resist high-speed noise.

[0005] Properly configuring the geometric parameters of the on-chip transformer isolation device can improve the noise suppression capability of digital isolation chips. Furthermore, the on-chip transformer has a very large area; regardless of the manufacturing process used, a significant amount of space must be reserved within the entire digital isolator to accommodate it. This area size is determined by the on-chip transformer parameters.

[0006] Therefore, designing the geometric parameters of the on-chip transformer has become an important issue in digital isolation design.

[0007] In traditional on-chip transformer design, a supplementary method is typically used. Figure 1 The process is shown below.

[0008] The transformer structure and materials are designed using HFSS software, followed by time-consuming electromagnetic simulation analysis, performance calculations, and verification of the digital isolation chip's performance. Typically, a single iteration is insufficient to meet design requirements. Therefore, designers often need to modify parameters and perform manual iterations, a process that becomes extremely time-consuming.

[0009] To address the time-consuming process of transformer layout design and parameter adjustment, machine learning methods can be used to build offline models to accelerate design reuse. Compared to equivalent circuit modeling methods, machine learning offers advantages such as lower physical requirements and greater scalability. Once this high-precision model is established, it can be reused and combined with optimization algorithms to quickly solve for design parameters. For on-chip transformer isolators, this machine learning design process can reduce design time from weeks to minutes.

[0010] However, a large number of modeling samples are often required to establish a high-precision offline model. Due to time-consuming electromagnetic simulation, it is difficult to obtain transformer simulation samples. Therefore, there is a contradiction between high-precision model and low simulation cost. Gaussian process regression is a commonly used modeling method, which has the advantages of strong uncertainty and wide application range. However, it has the disadvantages of high modeling complexity and weak fitting ability. Artificial neural network has the advantage of strong fitting ability. However, in order to realize a high-precision model, it still needs thousands of sample points. In order to improve the fitting ability of neural network, neural network often needs a large depth. At this time, due to the lack of sample acquisition, too many neural network layers may cause the deep neural network to overfit and lose the generalization ability. In order to establish a high-precision deep model under limited modeling samples, it is a key problem to develop a new modeling technology to improve the model precision. SUMMARY

[0011] In view of the contradiction between modeling precision and modeling sample cost existing in the prior art machine learning modeling method, the purpose of the present application is to provide a deep neural network modeling method for an industrial chip commonly used transformer. Using the method can establish a high-precision deep model under limited modeling samples, improve the sample efficiency required during modeling, and avoid the overfitting problem of machine learning.

[0012] To achieve the above purpose, a technical solution adopted by the present application is:

[0013] A deep neural network modeling method for an industrial chip commonly used transformer, comprising the following steps:

[0014] S1, determining the structure, working frequency, geometric parameters and simulated performance indicators of the transformer, and defining a plurality of geometric parameters of the transformer as a vector X and a plurality of performance indicators to be solved as a vector Y;

[0015] S2, a large number of geometric parameters X are obtained by using a suitable sampling method in the set interval of each geometric parameter, and then the corresponding performance indicators Y are calculated through electromagnetic simulation, so as to form a sample data set (X, Y);

[0016] S3, normalizing the sample data set (X, Y) to avoid data fluctuation caused by large differences between multiple performances and ensure that the modeling can converge;

[0017] S4, using the sample data set after normalization, a deep neural network model of the on-chip transformer is established by using a machine learning algorithm;

[0018] S5, testing and verifying the deep neural network model.

[0019] Further, in the step S2 of the deep neural network modeling method for the industrial chip commonly used transformer as described above, a large number of geometric parameters X are obtained by Monte Carlo sampling.

[0020] Further, in the step S3 of the deep neural network modeling method for the industrial chip commonly used transformer as described above, the operation method of the normalization is:

[0021] Given a certain geometric parameter value x, the normalized value of x is x_norm in [0, 1],

[0022] x_norm = (x - x_min) / (x_max - x_min)

[0023] In the formula: x_min represents the minimum value in the x setting interval, and x_max represents the maximum value in the x setting interval.

[0024] Further, in the step S4 of the deep neural network modeling method for the industrial chip commonly used transformer as described above, the step S4 is specifically:

[0025] S41, the expression of the deep neural network model of the on-chip transformer is:

[0026] Y = (X, θ)

[0027] In the formula: the vector X is a plurality of geometric parameters of a given transformer, the vector Y is a plurality of performance indicators corresponding to the plurality of geometric parameters, θ represents the model coefficients to be solved, and f(.) represents the model function;

[0028] S42, a M-layer residual neural network is used as a geometric deep feature extraction layer to extract geometric parameters into geometric electrical characteristics. For the m-th (m = 1, 2, 3,..., M) layer residual network, the calculation formula of the input and output is:

[0029] a m = g(h m +a m-1 )

[0030] Wherein:

[0031] h m = w m a m-1 +b m

[0032] In the formula: a m-1 represents the input parameter of the m-th layer residual network, a m represents the output parameter of the m-th layer residual network, w and b are model weights, and g represents an activation function.

[0033] S43, the geometric electrical characteristic data extracted by the residual neural network is processed in the form of batch normalization by using a BatchNorm layer;

[0034] S44, the normalized geometric electrical characteristic data is fed into an N-layer fully connected artificial neural network, and the final electrical performance Y of the on-chip transformer is predicted, and for the nth layer artificial neural network, the calculation formula is as follows:

[0035] c n =g(h n )

[0036] h n =w n c n-1 +b n

[0037] In the formula, c n-1 represents the input of the nth layer artificial neural network, c n represents the output of the nth layer artificial neural network, and g represents an activation function.

[0038] S45, the model structure is trained, and the model coefficient theta is finally solved, so as to establish a deep neural network model of the on-chip transformer.

[0039] Further, in the deep neural network modeling method of the industrial chip common transformer as described above, the outputs of all residual neural network layers and artificial neural networks in steps S42 and S44 are subjected to nonlinear operation on each geometric parameter x by using an ELU activation function, and the operation formula is as follows:

[0040] x<0: ELU(x)=e x -1

[0041] x≥0: ELU(x)=x

[0042] Further, in the deep neural network modeling method of the industrial chip common transformer as described above, the artificial neural network is composed of a multilayer perception mechanism.

[0043] Further, in the deep neural network modeling method of the industrial chip common transformer as described above, the unknown parameter vectors w and b in the model structure are solved by using a gradient descent method in step S45.

[0044] Further, in the deep neural network modeling method of the industrial chip common transformer as described above, the model is trained by using an Adam optimizer in step S45.

[0045] The deep neural network modeling method of the industrial chip common transformer has the following obvious technical effects:

[0046] 1) Adopting new machine learning algorithm to build transformer model, reducing designer's return iteration, accelerating design and reuse, and improving isolator circuit performance;

[0047] 2) Dividing modeling into feature extraction and performance prediction two processes, and adopting residual neural thought to build network in feature extraction stage to improve neural network depth and generalization ability;

[0048] 3) Using ELU as activation function, efficiently converging model;

[0049] 4) Using Batchnorm regularization intermediate geometric feature;

[0050] 5) Adopting Adam optimizer to train model, guaranteeing model parameter convergence to global optimum. BRIEF DESCRIPTION OF DRAWINGS

[0051] Figure 1 for traditional on-chip transformer design flowchart;

[0052] Figure 2 for the deep neural network modeling method of the common transformer of the industrial chip provided in the embodiment of the application flowchart;

[0053] Figure 3 for Figure 2 the model structure in the modeling method;

[0054] Figure 4 for Figure 3 the operation method flowchart of the model structure;

[0055] Figure 5 for Figure 3 the residual neural network operation process in the model structure;

[0056] Figure 6 for Figure 3 the artificial neural network operation process in the model structure. DETAILED DESCRIPTION

[0057] The application will be further described below in combination with specific embodiments and the accompanying drawings of the specification.

[0058] In view of the contradiction between modeling precision and modeling sample cost in the existing machine learning modeling method, the application provides a high-precision deep neural network modeling method of the common transformer of the industrial chip, to improve the sample efficiency required during modeling, and avoid the overfitting problem of machine learning; finally, accelerate the design reuse and shorten the design cycle of the on-chip transformer.

[0059] The method comprises a model structure and a training method. In the model structure, transformer modeling is divided into two processes of geometric feature extraction and performance regression. First, a residual neural network method is used as a geometric deep feature extraction layer to extract geometric parameters into geometric electrical information. The residual neural network can improve the depth of the neural network without causing overfitting. Then, the extracted deep geometric electrical information is input into an artificial neural network to finally obtain the simulation performance of the transformer. In order to prevent model overfitting, the application introduces BatchNorm in the form of batch normalization to process the geometric electrical data extracted by the residual neural network. In this model structure, all network layers use the most advanced ELU activation function to improve nonlinearity and training speed. In the training method, given the simulation sample data, in order to solve the unknown coefficients in the model structure, the gradient descent method is used for solving, specifically, the advanced Adam optimizer is used to dynamically adjust the learning rate of iteration to ensure the global optimization of training.

[0060] Figure 1 A flowchart of a deep neural network modeling method for an industrial chip commonly used transformer is provided in the embodiment of the application. The method comprises the following steps:

[0061] S1, determine the structure, working frequency, geometric parameters and simulated performance indicators of the transformer, and define the plurality of geometric parameters of the transformer as a vector X, and the plurality of performance indicators to be solved as a vector Y.

[0062] Generally, the conversion of the simulation S parameter (Z parameter) to the transformer performance is involved here, and the transformer indicators measured are calculated according to the port calculation formula.

[0063] S2, a suitable sampling method is used to obtain a large number of geometric parameters X in the set interval of each geometric parameter, and then the corresponding performance Y is calculated through electromagnetic simulation, so as to form a sample data set (X, Y).

[0064] In a specific embodiment of the application, a large number of geometric parameters X are obtained by Monte Carlo sampling.

[0065] S3, the sample data set (X, Y) is normalized to avoid data fluctuations caused by large differences between multiple performances and ensure that the modeling can converge.

[0066] In a specific embodiment of the application, the normalization operation method is that, given a certain geometric parameter value x, the normalized value of x is x_norm in [0, 1],

[0067] x_norm=(x-x_min) / (x_max-x_min)

[0068] S4, using the normalized sample data set, a deep neural network model of the on-chip transformer is established by using a machine learning algorithm.

[0069] Reference Figures 3-6 , the specific modeling process of the deep neural network model of the on-chip transformer is as follows:

[0070] S41, the expression of the deep neural network model of the on-chip transformer is:

[0071] Y = (X, θ)

[0072] In the formula: the vector X is a plurality of geometric parameters of a given transformer, the vector Y is a plurality of corresponding performances, θ represents a model coefficient to be solved, and f(.) represents a model function.

[0073] S42, a residual neural network is used as a geometric deep feature extraction layer to extract geometric parameters as geometric electrical information.

[0074] The model includes M residual neural networks and N artificial neural networks, and the outputs of all network layers use ELU activation functions to improve nonlinearity and training speed. The ELU activation function means that each geometric parameter x is subjected to a nonlinear operation, and the operation formula is:

[0075] x < 0: ELU(x) = e x -1

[0076] x ≥ 0: ELU(x) = x

[0077] After M layers of feature extraction, the output parameters calculated by the input parameters (transformer geometric dimensions X) of the residual neural network layer, i.e. geometric electrical characteristics, are extracted. For the mth (m = 1, 2, 3, …, M) layer residual network, the calculation formula of the input and output is:

[0078] a m = g(h m +a m-1 )

[0079] Wherein:

[0080] h m = w m a m-1 +b m

[0081] In the formula: a m-1 represents the input parameter of the mth layer residual network, a m represents the output parameter of the mth layer residual network, w and b are model weights, and g represents an activation function, which here refers to an ELU activation function.

[0082] Obviously, a0 =X, a M It is the extracted geometric electrical features.

[0083] The residual neural network used performs a summation operation on the input and output of its linear layers, and then performs a nonlinear operation through an activation function. This connection operation concept of the residual neural network can effectively increase the model's depth without causing overfitting.

[0084] S43. The geometric electrical feature data extracted by the residual neural network is processed by using the BatchNorm layer in the form of batch regularization.

[0085] Geometric electrical features a extracted by residual neural networks M The Batchnorm layer performs regularization to improve the generalization ability of the model training.

[0086] S44. The regularized geometric electrical feature data is fed into an N-layer fully connected artificial neural network to predict the final electrical performance Y of the on-chip transformer.

[0087] For the nth layer of the artificial neural network, the calculation formula is as follows:

[0088] c n =g(h n )

[0089] h n =w n c n-1 +b n

[0090] In the formula, c n-1 c represents the input to the nth layer of the artificial neural network. n Let c represent the output of the nth layer of the artificial neural network, and g represent the activation function, specifically the ELU activation function. Clearly, c... N =Y,c 0 =a M .

[0091] In one specific embodiment of the present invention, the artificial neural network is composed of a multilayer sensing mechanism.

[0092] S45. Train the model and finally solve for the model coefficients θ, thereby establishing a deep neural network model of the on-chip transformer.

[0093] The model structure contains unknown parameter vectors w and b, which are solved using gradient descent. In a specific embodiment of this invention, the Adam optimizer is used for training; the Adam algorithm is very mature. It can dynamically adjust the learning rate of iterations to ensure global optimality during training. By iterating the parameters repeatedly in reverse, the model coefficients θ are finally solved.

[0094] S5, test and verify the model.

[0095] The high-precision model established by the application also has scalability in combination with an optimizer, has practical value, and can help designers improve the performance and area of on-chip transformers. The specific operation is as follows:

[0096] Given the target to be optimized, such as the area of the transformer. In combination with constraints, such as the performance that the transformer needs to achieve. Based on the offline model established by the application, the optimizer finds out the geometric parameters that meet the design requirements. Specifically, the optimizer evolves the geometric parameters according to the model prediction, and the model predicts the transformer performance according to the geometric parameters. In this way, the iteration of the on-chip transformer isolator design is replaced by an artificial intelligence method. The result it synthesizes is likely to be better than that of the designer, such as having a smaller chip area, which can provide guidance for the designer.

[0097] The modeling method provided by the application is described below by taking the modeling process of a single-turn octagonal symmetric transformer as an example. The implementation steps are as follows:

[0098] 1. First, determine the structure of the transformer, as shown in Figure 3 , determine its geometric parameters, including the input and output coil radii r1 and r2 and their respective metal widths w1 and w2, combine these geometric parameters to form a geometric vector X. Specify the working frequency, such as 100 M Hz. The simulation performance is the inductance value L1 and the quality factor Q1 of the input coil, and the quality factor Q2 and the inductance value L2 of the output coil. Use the electromagnetic simulation tool HFSS to draw the transformer parameterization unit and perform automatic simulation. During simulation, in order to calculate the performance of L, Q, etc., the two-port calculation method is used to convert the Z parameter into the performance of L, Q, etc. The specific calculation formula is as follows:

[0099] Input coil:

[0100]

[0101] Output coil:

[0102]

[0103] 2. Define appropriate intervals for each design parameter, such as x1 satisfies (x1 min , x2 max ). Next, perform Monte Carlo sampling to randomly obtain a large number of design parameter combination vectors X in the design interval, simulate these design parameters through the HFSS software to obtain simulation value vectors Y, and form a data set. In order to be able to train the model well, the data set also needs to be randomly divided into training, verification, and test sets.

[0104] 3, Normalize the input X and output Y in the sample, here is normalized to the range of [0, 1]. The normalization operation avoids the huge difference between multiple performances to cause data fluctuations, and ensures that the modeling can converge.

[0105] The operation process of normalization is as follows:

[0106] Given a certain parameter value x, the normalized value of x is x_norm in [0, 1]

[0107] x_norm = (x-x_min) / (x_max-x_min)

[0108] 4, Construct the deep model described in the application. Here the vector X = (r1, r2, w1, w2), and the vector Y = (L1, L2, Q1, Q2).

[0109] 5, Given the geometric parameters to be predicted, such as r1 = r2 = 50u, w1 = w2 = 5u, the corresponding performance of L1, L2, Q1, Q2 working at 100MHz is predicted.

[0110] The deep neural network modeling method for the transformer commonly used in industrial chips provided by the application can effectively establish a high-precision model from the on-chip transformer geometry and physical design parameters to the simulation performance, accelerate the on-chip transformer design and reuse. With the help of the fast and higher-than-human intelligence model analysis provided by the application, the more important use can improve the performance and area of the transformer isolator. Compared with the existing machine learning method, the application has the advantages of strong fitting ability, high precision and strong generalization ability; compared with the Gaussian process regression method, the application has the advantages of low complexity and strong fitting ability; compared with artificial neural network, the application has the advantages of strong generalization ability and not easy to overfit. The modeling method can be extended to any unique transformer design, and does not depend on physical equivalent circuit analysis, which can release the physical and mathematical operation process of transformer experts. The application also has scalability. The offline model can be applied in single-objective algorithm and multi-objective algorithm as an interface to help designers find the minimum / maximum value that meets the constraints, such as minimizing the area to meet the specific transformer performance. The application is expected to ultimately help designers complete the modeling and optimization of transformers, greatly reduce the transformer design cycle, and make the design process no longer a tedious and manual process.

[0111] The above embodiments are only illustrative of the application, and the application can be implemented in other specific ways or other specific forms without departing from the spirit or essential characteristics of the application. Therefore, the described embodiments should be considered illustrative rather than limiting in any aspect. The scope of the application should be explained by the appended claims, and any changes equivalent to the intent and scope of the claims should also be included in the scope of the application.

Claims

1. A deep neural network modeling method for an industrial chip common transformer, comprising the following steps: S1, determining the structure, working frequency, geometric parameters and simulated performance indicators of the transformer, and defining a plurality of geometric parameters of the transformer as a vector X and a plurality of performance indicators to be solved as a vector Y; S2, obtaining a large number of geometric parameters X by using a suitable sampling method in the set interval of each geometric parameter, and then calculating the corresponding performance indicators Y through electromagnetic simulation, thereby forming a sample data set (X, Y); S3, normalizing the sample data set (X, Y) to avoid data fluctuations caused by large differences between multiple performances and ensure that the modeling can converge; S4, using the normalized sample data set, a machine learning algorithm is used to establish a deep neural network model for the on-chip transformer; S5, testing and verifying the deep neural network model; Step S4 is specifically: S41, the expression of the deep neural network model for the on-chip transformer is: Y = (X, θ) In the formula: the vector X is a plurality of geometric parameters of a given transformer, the vector Y is a plurality of corresponding performance indicators, θ represents the model coefficients to be solved, and f(.) represents the model function; S42, an M-layer residual neural network is used as a geometric deep feature extraction layer to extract geometric parameters into geometric electrical characteristics, and for the mth (m = 1, 2, 3, …, M) residual network, the calculation formula of the input and output is: a m = g(h m + a m-1 ) Wherein: h m = w m a m-1 + b m where: a m-1 input parameters representing the mth layer residual network, a m output parameters representing the mth layer residual network, w and b are model weights, and g represents an activation function; S43, the BatchNorm layer is used to process the geometric electrical characteristic data extracted by the residual neural network in the form of batch normalization; S44, the normalized geometric electrical characteristic data is fed into an N-layer fully connected artificial neural network to predict the final electrical performance Y of the on-chip transformer, and for the nth layer artificial neural network, the calculation formula is as follows: c n = g(h n ) h n = w n c n-1 + b n where c n-1 represents the input of the nth layer artificial neural network, c n represents the output of the nth layer artificial neural network, g represents an activation function S45, the model structure is trained, and the model coefficients θ are finally solved, thereby establishing a deep neural network model for the on-chip transformer.

2. The method of claim 1, wherein, In step S2, a large number of geometric parameters X are obtained by using Monte Carlo sampling.

3. The method of claim 2, wherein, In step S3, the normalization operation method is: Given a certain geometric parameter value x, the normalized value of x is x_norm in [0, 1], x_norm = (x - x_min) / (x_max - x_min) In the formula: x_min represents the minimum value in the set interval of x, and x_max represents the maximum value in the set interval of x.

4. The method of claim 3, wherein, In steps S42 and S44, the output of all residual neural network layers and artificial neural network layers adopts an ELU activation function to perform a nonlinear operation on each geometric parameter x, and the operation formula is: x < 0: ELU(x) = e x -1 x ≥ 0: ELU(x) = x.

5. The method of claim 4, wherein, The artificial neural network is composed of a plurality of multilayer perception mechanisms.

6. The method of claim 1, wherein, In step S45, the gradient descent method is used to solve the unknown parameter vectors w and b in the model structure.

7. The method of claim 6, wherein the method further comprises: In step S45, the Adam optimizer is used to train the model structure.

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