Narrow Pulse High-Power Output Module Based on Three-Dimensional Chip Arrangement and Manufacturing Method

Abstract

The present invention relates to a narrow-pulse high-power output module based on three-dimensional chip arrangement and a manufacturing method thereof. A parallel single board is arranged inside the module, on which multiple power IGBT chips or power MOSFET chips can be installed in parallel. Multiple parallel single boards are stacked and connected in series to form the core structure of the module. The module meets the requirements for on-state current and off-state voltage through the parallel and series connection of power IGBT chips or power MOSFET chips. The same poles between the chips on the parallel single board are interconnected by metal plates respectively. The chips inside the entire module are arranged in three dimensions. Through reasonable chip layout and metal interconnection structure design, the volumetric power density is significantly improved. On the basis of realizing the miniaturization of the module, it can meet the narrow-pulse high-power application requirements in some specific fields.

Description

Technical Field

[0001] The present invention relates to the field of power semiconductor device packaging, and particularly to a narrow-pulse high-power output module based on three-dimensional chip arrangement and a manufacturing method thereof. Background Art

[0002] In general power modules or pulse power modules, several IGBT chips and freewheeling diode chips usually need to be soldered or bonded onto a single-sided ceramic substrate. The connection between chips and between chips and lead terminals is completed through the copper-clad layer on the ceramic substrate and bonding aluminum wires. This is a typical two-dimensional arrangement of chips. Usually, a thick metal plate is bonded to the other side of the ceramic substrate, and the exposed side of the metal plate is the contact surface for connecting to an external radiator. The packaging layout of a typical existing product, a three-phase inverter module, is shown in FIGS. 1(a) to 1(c). Among them, FIG. 1(a) is the layout of the internal ceramic plate, which has 6 IGBT chips and 6 freewheeling diode chips. FIG. 1(b) is the packaging external shape of this product, and its packaging external dimension is 107*45*20 mm. FIG. 1(c) is the circuit diagram.

[0003] In many application scenarios, it is necessary to provide pulse currents or pulse powers with extremely high peaks and extremely narrow widths, such as in cutting-edge fields like pulsed arc welding, electrical discharge machining, high-power power supplies, high-power microwaves, high-power lasers, high-energy particle beams, and aerospace. The power supplies used in these fields are various pulse power supplies that meet the requirements of these special fields, and need to output currents of thousands of amperes and withstand voltages of thousands of volts. Obviously, for these special fields, the output module of the power supply will use a larger number of IGBT chips, and the number may be several times to more than a dozen times the number of chips in FIG. 1(a). The existing packaging external structure cannot integrate such a large number of chips into the same module. However, to meet general output requirements, multiple high-power discrete devices or multiple modules can be directly interconnected to achieve their functions. This interconnection method will occupy a large amount of space in the power supply. It can meet the output requirements at low frequencies, but at high frequencies or for extremely narrow pulses, its distributed inductance and capacitance will affect the integrity of the output waveform, and even completely fail to meet the usage requirements of certain specific fields. Therefore, the method of using a PCB board and external wiring to interconnect discrete devices or modules is only applicable to general switching power supplies or pulse power supplies with wide pulses.

[0004] In some other special occasions (such as the aerospace field), not only is it required that the pulse power supply has extremely high peak power and extremely narrow pulse width, but also the entire power supply is required to have a very small size, so that its instantaneous volume power density reaches the design limit. For the design of high-power output modules under such special application conditions, the internal interconnection method and the arrangement method of external lead terminals of the above existing module packaging external structure are obviously no longer suitable. Summary of the Invention

[0005] The present invention first discloses a narrow-pulse high-power output module based on three-dimensional arrangement of chips, which is applicable to multiple IGBT chips or power MOSFET chips interconnected through multiple metal plates and integrated in the same miniaturized module, capable of outputting narrow-pulse high-power waveforms and meeting the application requirements in special fields such as aerospace.

[0006] In order to achieve the above object, the technical solution adopted by the present invention is as follows:

[0007] The narrow-pulse high-power output module based on three-dimensional arrangement of chips includes a housing, exposed wiring terminals, and a core body inside the housing. The core body includes multiple stacked and interconnected parallel single boards. The parallel single board includes a first metal plate, a second metal plate, a gate interconnection board, an IGBT chip, and a freewheeling diode chip. The first metal plate interconnects the collectors of multiple IGBT chips and the cathodes of freewheeling diode chips. The second metal plate interconnects the emitters of multiple IGBT chips and the anodes of freewheeling diode chips. The gate interconnection board interconnects the gates of multiple IGBT chips;

[0008] The exposed wiring terminals include the collector terminal C and emitter terminal E of the module, emitter terminals e led out from the second metal plate of each parallel single board, and gate terminals g led out from the gate interconnection board of each parallel single board. When multiple parallel single boards are stacked and interconnected, the first metal plate of the parallel single board in the upper layer is interconnected with the second metal plate of the adjacent parallel single board in the lower layer. The emitter terminal E is led out from the second metal plate of the topmost parallel single board, and the collector terminal C is led out from the first metal plate of the bottommost parallel single board;

[0009] The collector terminal C and emitter terminal E of the module, the emitter terminals e of each parallel single board, and the gate terminals g are all arranged on the same end face of the housing. The collector terminal C and emitter terminal E are vertically aligned and located at one end of the housing end face where they are located. All the emitter terminals e are vertically aligned and located at the other end of the housing end face where they are located. All the gate terminals g are vertically aligned and located in the middle of the housing end face where they are located;

[0010] The IGBT chips on the parallel single board are symmetrically arranged in two columns along the length direction of the first metal plate, symmetrically arranged in m rows along the width direction of the first metal plate, and the column pitch is greater than the row pitch. The gates of two IGBT chips in each row are opposite to each other. The emitter terminal e of each parallel single board is located at one end of one of the columns, and the gate terminal g of each parallel single board is located at one end between the two columns.

[0011] Further, the second metal plate is of a U-shaped structure, and the U-shaped structure includes extension plates on both sides and a connecting plate that connects one ends of the extension plates on both sides into one body. The freewheeling diode chips are arranged at one end of the IGBT chip column. The extension plates are brazed and interconnected with the emitters of each IGBT chip, and the connecting plate is brazed and interconnected with the anodes of the freewheeling diode chips. The gate interconnection plate is located between the two columns of IGBT chips or between the extension plates on both sides.

[0012] Further, the extension plates on both sides of the second metal plate of the parallel single board on the uppermost layer of the core are of equal length. One of the extension plates leads out the emitter terminal E of the module, and the other extension plate leads out the emitter terminal e of the parallel single board; for the second metal plates of other parallel single boards in the core, the extension plates on both sides are of unequal length, and the longer extension plate leads out the emitter terminal e of the parallel single board.

[0013] Further, the gate interconnection plate is a third metal plate, and the shape of the third metal plate is fishbone-shaped, that is, it includes a main rib along the length direction of the first metal plate and a plurality of secondary ribs symmetrically extending from both sides of the main rib to the width direction of the main rib. One end of the main rib is the gate terminal g of the parallel single board, and the end of each secondary rib is brazed and interconnected with the gate of the corresponding IGBT chip.

[0014] Further, the gate interconnection plate is a double-sided copper-clad ceramic plate. The width of the double-sided copper-clad ceramic plate is smaller than the column pitch between the two columns of IGBT chips. The back of the double-sided copper-clad ceramic plate is welded to the first metal plate. The gate of each IGBT chip on the parallel single board is connected to the copper-clad area on the front of the double-sided copper-clad ceramic plate through a metal bonding wire. The gate metal lead terminal is welded to one end of the copper-clad area on the front of the double-sided copper-clad ceramic plate, and the part extending out of the double-sided copper-clad ceramic plate serves as the gate terminal g.

[0015] Further, between the emitter connection solder joints of each IGBT chip on the parallel single board and the second metal plate, and between the anode connection solder joints of the freewheeling diode chips and the second metal plate, they are respectively brazed and connected through metal gaskets.

[0016] Further, between adjacent stacked parallel single boards, the first metal plate of the parallel single board in the upper layer and the second metal plate of the parallel single board in the lower layer are brazed and connected through a metal gasket.

[0017] The present invention also simultaneously discloses a manufacturing method of the above output module, including:

[0018] Step 1: Assembly and welding of the parallel single board: Each connection point on each parallel single board is assembled and pre-positioned by dot-applying the first solder paste and respectively placing each interconnection board, and then the parallel single board is fixed by welding the connection points through the first reflow soldering.

[0019] Step 2: Stacking and soldering multiple parallel single boards to form a core body: After completing Step 1, apply the second solder paste at the corresponding connection points of the adjacent stacked parallel single boards, stack the bottom of the upper parallel single board onto the top of the lower parallel single board in sequence, and then complete the soldering and fixing of the stacked corresponding connection points through the second reflow soldering; the melting point of the first solder paste is higher than that of the second solder paste, and the soldering temperature of the first reflow soldering is higher than that of the second reflow soldering.

[0020] Step 3: Encapsulating the core body: Place the core body completed in Step 2 into the housing, pour encapsulating glue into the housing, and cure it after baking.

[0021] Furthermore, in Step 1, first place the first metal plate into the soldering mold, apply the first solder paste at the chip interconnection positions on the first metal plate, then place the IGBT chip and the freewheeling diode chip at the corresponding solder paste dots, then apply the first solder paste at the emitter region of the IGBT chip, the metallization region of the freewheeling diode chip, and the gate region of the IGBT chip, then place metal gaskets at the solder paste dots on the emitter region of the IGBT chip and the surface of the freewheeling diode chip, and apply the first solder paste on the top of the metal gaskets. Next, place the second metal plate on the metal gaskets, cover the gate of the IGBT chip at the corresponding gate connection solder joint on the third metal plate. After completing the above steps, complete the brazing of the parallel single board in the tunnel furnace.

[0022] In Step 2, first place the parallel single board with the collector terminal C into the soldering mold, apply the second solder paste at the connection points of the second metal plate of this parallel single board, place a metal gasket at the applied second solder paste, apply the second solder paste on the metal gasket, then place the parallel single board without both the collector terminal C and the emitter terminal E on it for stacking. Repeat the above steps until all the parallel single boards without both the collector terminal C and the emitter terminal E are stacked. After applying the second solder paste on the topmost parallel single board without both the collector terminal C and the emitter terminal E, stack the parallel single board with the emitter terminal E on it. Finally, complete the brazing of the above core body in the tunnel furnace.

[0023] Furthermore, the composition of the first solder paste is PbSn5Ag2.5, the liquidus point is 285 °C, and the composition of the second solder paste is SnAg3Cu0.5, the liquidus point is 217 °C.

[0024] The narrow pulse high-power output module based on three-dimensional chip arrangement disclosed by the present invention is provided with a parallel single board inside the module, on which multiple power IGBT chips or power MOSFET chips can be installed in parallel. Multiple parallel single boards are stacked and connected in series to form the core structure of the module. The module meets the requirements for off-state voltage and on-state current through the series and parallel connection of power IGBT chips or power MOSFET chips. The chips inside the module adopt a three-dimensional arrangement layout. Through reasonable chip arrangement and metal interconnection structure design, the volumetric power density is significantly improved. On the basis of realizing the miniaturization of the module, it can meet the narrow pulse high-power application requirements in some specific fields. Description of the Drawings

[0025] Fig. 1(a) is a schematic diagram of the layout of the ceramic board inside a typical existing module;

[0026] Fig. 1(b) is an external package diagram of the typical existing module shown in Fig. 1(a);

[0027] Fig. 1(c) is a circuit diagram of the typical existing module shown in Fig. 1(a);

[0028] Figure 2 is a schematic plan view of the parallel single board in the first embodiment of the present invention;

[0029] Figure 3 is Figure 2 a schematic side structure diagram of the parallel single board shown;

[0030] Figure 4 is the core schematic diagram of the stacked and interconnected parallel single boards using Figure 2 the parallel single board shown;

[0031] Figure 5 is a schematic plan view of the parallel single board in the second embodiment of the present invention;

[0032] Figure 6 is Figure 5 a sectional view of the parallel single board A-A' shown;

[0033] Figure 7 is Figure 5 a sectional view of the parallel single board B-B' shown;

[0034] Figure 8 is the core schematic diagram of the stacked and interconnected parallel single boards using Figure 5 the parallel single board shown;

[0035] Figure 9 is a schematic plan view of the parallel single board at the bottom layer of the core in the first embodiment of the present invention;

[0036] Figure 10 is a schematic plan view of the parallel single board at the top layer of the core in the first embodiment of the present invention;

[0037] Figure 11 Schematic plan view of the parallel single board of the core body intermediate layer in the first embodiment of the present invention;

[0038] Figure 12 Schematic diagram after the core body corresponding to the first embodiment of the present invention is assembled;

[0039] Figure 13 is Figure 12 Terminal arrangement diagram of the assembled core body;

[0040] Figure 14 is Figure 12 Circuit diagram of the assembled module.

[0041] Reference numerals:

[0042] 1. First metal plate; 2. Second metal plate; 3. Third metal plate; 4. Gate connection solder joint; 5. IGBT chip; 6. Emitter metallization area of IGBT chip; 7. Emitter connection solder joint; 8a. Copper gasket inside the plate; 8b. Copper gasket between plates; 9. Freewheeling diode chip; 10. Metallization area of freewheeling diode chip; 11. Double-sided copper-clad ceramic plate; 12. Copper-clad area on the front of the ceramic plate; 13. Metal bonding wire; 14. Gate output terminal of the ceramic plate. Specific implementation manner

[0043] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention.

[0044] This embodiment discloses a narrow pulse high-power output module (hereinafter referred to as the module) based on three-dimensional arrangement of chips and a manufacturing method of the module. It mainly completes the series-parallel connection of multiple chips through three-dimensional interconnection at the chip level. When designing the chip layout and the structure of the interconnection metal sheet, it mainly considers miniaturization of volume, as small as possible distributed capacitance and distributed inductance, meeting usage requirements such as output current and off-state withstand voltage and having a certain margin. The module is composed of a housing, potting compound, the core body inside the housing, and exposed wiring terminals. This embodiment mainly designs the core body structure and the exposed wiring terminals, and in combination with Figures 2 to 14 as shown, the details are described as follows.

[0045] Embodiment 1: This embodiment combines Figures 2 to 4 , Figures 9 to 14The introduction is as shown. There are at least two parallel single boards in the core body inside the module housing. Multiple IGBT chips 5, freewheeling diode chips 9, and metal sheets for realizing the same-pole interconnection of each chip are arranged on each parallel single board. The multiple parallel single boards are interconnected in a stacked-up and -down manner. In this embodiment and the corresponding drawings, taking the setting of 8 parallel single boards as an example, six IGBT chips 5 and two freewheeling diode chips 9 are arranged on each parallel single board. That is, in this embodiment, the total number of IGBT chips 5 arranged inside the module is 48, and the number of freewheeling diode chips 9 arranged is 16. The entire technical solution given by the present invention is also applicable to the MOSFET chip layout design. The present invention is only illustrated by taking the IGBT chip as an example. When replacing the IGBT chip in this embodiment with a MOSFET chip, the connection structure given by the present invention can be referred to for setting.

[0046] The exposed wiring terminals of the module in this embodiment include one collector terminal C and one emitter terminal E of the module, emitter terminals e led out from each parallel single board of the module, and gate terminals g led out from each parallel single board. The collector terminal C and the emitter terminal E form the output terminals of the module, and the emitter terminal e and the gate terminal g form the drive signal input terminals of each parallel single board. The collector terminal C, the emitter terminal E, the emitter terminal e, and the gate terminal g are all arranged on the same end face of the housing. Among them, the collector terminal C and the emitter terminal E are aligned up and down and located at one end of the housing end face where they are located. All the emitter terminals e are aligned up and down and located at the other end of the housing end face where they are located. All the gate terminals g are aligned up and down and located in the middle of the housing end face where they are located.

[0047] The description of a single parallel single board in this embodiment is as follows: The parallel single board includes a first metal plate 1, a second metal plate 2, a third metal plate 3, six IGBT chips 5, and two freewheeling diode chips 9. Regarding the arrangement quantity of the freewheeling diode chips 9 on the parallel single board, it should satisfy that the reverse repetitive peak voltage V of the freewheeling diode chips 9 on the parallel single board RRM is not less than the collector-emitter voltage V of the IGBT chips 5 CES , and the rated current I of the freewheeling diode chips 9 F is equal to or close to the collector current I of the IGBT chips 5 C . The number of freewheeling diode chips 9 is related to the load of the module, and generally ≤ the number of IGBT chips 5 on the parallel single board.

[0048] To achieve the compact arrangement of chips on the parallel single board, in this embodiment, the first metal plate 1 is a rectangular metal plate. The IGBT chips 5 on the parallel single board are symmetrically arranged in two columns along the length direction of the first metal plate 1 and in m rows (m = 3 in this embodiment) along the width direction of the first metal plate 1, and the column pitch is greater than the row pitch. The gates of two IGBT chips 5 in each row are opposite to each other. Two freewheeling diode chips 9 are respectively arranged at one end of the IGBT chips 5 in the corresponding columns. The first metal plate 1 interconnects the collectors of each IGBT chip 5 on the parallel single board and the cathodes of the freewheeling diode chips 9.

[0049] The second metal plate 2 in this embodiment adopts a U-shaped structure. For ease of description, the U-shaped structure is divided into two side extension plates and a connecting plate that connects one end of the two side extension plates into one body. The connecting plate has the same width as the extension plates and is perpendicularly connected at their respective ends. The back of the IGBT chip 5 in this embodiment is the collector, the front of the IGBT chip 5 is the emitter metallization region 6 of the IGBT chip, the emitter connection solder joint 7 of the IGBT chip 5 is located in the emitter metallization region 6 of the IGBT chip, and the gate connection solder joint 4 of the IGBT chip 5 is located beside the emitter metallization region 6 of the IGBT chip. The back of the freewheeling diode chip 9 is the cathode and the front is the anode. The freewheeling diode anode connection solder joint is provided in the metallization region 10 on the front of the freewheeling diode chip. Each side extension plate is soldered and interconnected with the emitter connection solder joint 7 of each IGBT chip 5 in the corresponding column, and the connecting plate is soldered and interconnected with the anode connection solder joint of the freewheeling diode chip 9. The third metal plate 3 is arranged between the two columns of IGBT chips 5. The U-shaped second metal plate 2 will not affect the soldering operation of the third metal plate 3 and the gate connection solder joint 4, and is also conducive to inspecting the welding quality of the third metal plate 3 and the gate connection solder joint 4.

[0050] In this embodiment, the shape of the third metal plate 3 is fishbone-shaped, that is, it includes a main rib along the length direction of the first metal plate 1 and a plurality of secondary ribs symmetrically extending from both sides of the main rib to the width direction of the main rib. The end of each secondary rib is soldered and interconnected with the gate connection solder joint 4 of the adjacent IGBT chip 5.

[0051] When assembling the parallel single board according to the structure given above, for the two side extension plates of the second metal plate 2 of the parallel single board on the uppermost layer of the core body, they are set to be of equal length (such as Figure 10As shown, the extension plate on one side extends out of the housing to serve as the emitter terminal E of the entire module, and the extension plate on the other side extends out of the housing to serve as the emitter terminal e of the topmost parallel single board; for the extension plates on both sides of the second metal plate 2 of other parallel single boards in the core body except the top layer, they are set to be one long and one short, and the longer extension plate extends out of the housing to serve as the emitter terminal e of this parallel single board. One end of the main bar of the third metal plate 3 on each layer of parallel single boards extends out of the housing to serve as the gate terminal g of this parallel single board. A terminal is led out from the first metal plate 1 of the parallel single board at the bottommost layer of the core body to outside the housing to serve as the collector terminal C of the entire module. When multiple parallel single boards are stacked and interconnected vertically, the first metal plate 1 of the parallel single board in the upper layer is interconnected with the second metal plate 2 of the adjacent parallel single board in the lower layer. Between the emitter connection solder joint 7 of each IGBT chip 5 on the parallel single board and the second metal plate 2, and between the anode connection solder joint of the freewheeling diode chip 9 and the second metal plate 2, they are respectively connected through metal gaskets (in this embodiment, copper gaskets are used, corresponding to the in-board copper gasket 8a in the drawing). The setting of the in-board copper gasket 8a can ensure that the electrical clearance between the emitter and collector of the IGBT chip 5 on the parallel single board meets the design requirements, and the thickness difference between the IGBT chip 5 and the freewheeling diode chip 9 can also be adjusted by selecting different thicknesses of the in-board copper gasket 8a, so that the heights from the tops of the IGBT chip 5 and the freewheeling diode chip 9 to the bottom of the second metal plate 2 are the same. Between adjacent stacked parallel single boards, the first metal plate 1 of the parallel single board in the upper layer and the second metal plate 2 of the parallel single board in the lower layer can also be connected through metal gaskets (corresponding to the inter-board copper gasket 8b in the drawing).

[0052] In the prior art, usually multiple chips are arranged on a PCB board. The PCB board is relatively thick, and after stacking, it will increase the dimension in the thickness direction of the output module, which is not conducive to miniaturization design; and if a single-sided or double-sided PCB board is used to replace the first metal plate 1 mentioned in the present invention, when multiple parallel single boards are stacked in series, external leads or via holes on the board are required to achieve the vertical connection of multiple parallel single boards, which will increase the size of the module, and the interconnection through leads will generate relatively large parasitic parameters, thus affecting the integrity of the output waveform.

[0053] For a narrow-pulse high-power output module, since the module does not operate continuously and the current duty cycle is very small, the junction temperature of the chip will not increase significantly, and there is no need to consider the heat dissipation problem. Using the first metal plate 1 can improve the layout density of the chips, is also conducive to reducing the height of the parallel single board, and when multiple parallel single boards are stacked vertically, it is conducive to reducing the total stacking height and the total parasitic parameters.

[0054] Embodiment 2: This embodiment combines Figures 5 to 8This will be introduced as shown. This embodiment has a similar structure to Embodiment 1. The difference is that the gate interconnection of multiple IGBT chips 5 on the parallel single board is realized by wire bonding, while in Embodiment 1, it is realized by soldering. This embodiment is mainly considered when the gate area of the selected IGBT chip 5 is too small and not suitable for the soldering interconnection process, and the following solution given in this embodiment can be adopted. In this embodiment, corresponding to the gate interconnection board of the third metal plate 3 in Embodiment 1, a double-sided copper-clad ceramic plate 11 is used. The width of the double-sided copper-clad ceramic plate 11 is less than the column pitch of two columns of IGBT chips 5. The length of the double-sided copper-clad ceramic plate 11 = the main rib length of the third metal plate 3 in Embodiment 1 minus the length of the part where the third metal plate 3 extends beyond the first metal plate 1. Place the double-sided copper-clad ceramic plate 11 in the middle of two columns of IGBT chips 5, weld the back of the double-sided copper-clad ceramic plate 11 to the first metal plate 1, and bond the gate of each IGBT chip 5 on the parallel single board to the copper-clad area 12 on the front of the double-sided copper-clad ceramic plate 11 through a metal bonding wire 13. Weld a gate metal lead terminal (i.e., Figure 5 the ceramic plate gate output terminal 14 in Figure 5 ) to the copper-clad area 12 on the front of the double-sided copper-clad ceramic plate 11 and make it extend the same length as the terminal of the third metal plate 3 in Embodiment 1. The extended end of the gate metal lead terminal is the gate terminal g of the parallel single board. For the structural design of the parts not mentioned in this embodiment, the corresponding structural description given in Embodiment 1 can be referred to. In traditional processes, wire bonding is mostly used to complete the connection of the gate. However, using wire bonding to connect will increase the gate inductance, so the bonding wires should be as short as possible.

[0055] This embodiment also gives the manufacturing method of the above output module. The following only takes the manufacturing method of the corresponding structure in Embodiment 1 as an example for introduction. Since the structure in Embodiment 2 is similar to that in Embodiment 1, the same parts can be referred to the following manufacturing method.

[0056] The manufacturing method of a narrow pulse high-power output module based on a three-dimensional chip arrangement includes:

[0057] Step 1: Assembly and welding of the parallel single board: Pre-position each connection point on each parallel single board with the corresponding interconnection board parts by dotting the first solder paste, and then fix the connection points of the parallel single board by the first reflow soldering.

[0058] The detailed description of Step 1 is as follows: First, place the first metal plate 1 into the welding mold, and apply the first solder paste (the composition of the first solder paste in this embodiment is PbSn5Ag2.5, and the liquidus temperature is 285°C) at the chip interconnection positions on the first metal plate 1. Then, place the IGBT chip 5 and the freewheeling diode chip 9 above the corresponding solder paste dots. Next, apply the first solder paste at the emitter region of the IGBT chip 5, the metallization region 10 of the freewheeling diode chip 9, and the gate region of the IGBT chip 5. Then, place the metal gasket 8a above the solder paste dots on the surfaces of the emitter region of the IGBT chip 5 and the freewheeling diode chip 9 (if the thickness of the IGBT chip 5 is different from that of the freewheeling diode chip 9, select metal gaskets 8a with different thicknesses to adjust the height so that for each chip: thickness + metal gasket thickness = designed height, that is, the top surfaces of the two chips are at the same height), and apply the first solder paste on the top of the metal gasket 8a. Next, place the second metal plate 2 on the metal gasket 8a, cover the pad at the corresponding gate connection solder joint on the third metal plate 3 (i.e., the pad at the end of the auxiliary rib) on the gate of the IGBT chip 5. Check or fine-tune the above assembly result. After the position is free of deviation, complete the first brazing of the above parallel single boards in a tunnel furnace. After the first brazing is completed, check the welding quality of each parallel single board one by one.

[0059] Step 2: Stack and weld multiple parallel single boards to form a core body: After completing Step 1, apply the second solder paste (the composition of the second solder paste in this embodiment is SnAg3Cu0.5, and the liquidus temperature is 217°C) at the corresponding connection points of the adjacent stacked parallel single boards. Stack the bottom of the upper parallel single board onto the top of the lower parallel single board in sequence to complete pre-positioning, and then complete the welding and fixing of the stacked corresponding connection points of the multiple parallel single boards through the second reflow soldering; the melting point of the first solder paste is higher than that of the second solder paste, and the welding temperature of the first reflow soldering is higher than that of the second reflow soldering.

[0060] The detailed description of Step 2 is as follows: First, place the parallel single board with the collector terminal C into the welding mold, apply the second solder paste at the connection point of the second metal plate of this parallel single board, place the metal gasket 8b at the applied second solder paste, apply the second solder paste on the metal gasket 8b, and then place the parallel single board without both the collector terminal C and the emitter terminal E on it for stacking. Repeat the above steps until all the parallel single boards without both the collector terminal C and the emitter terminal E are stacked. After applying the second solder paste on the topmost parallel single board without both the collector terminal C and the emitter terminal E, stack the parallel single board with the emitter terminal E on it. Finally, complete the second brazing of the above core body in a tunnel furnace. After the second brazing is completed, check the welding quality of the core body.

[0061] Step 3: Core encapsulation: Place the core that has completed Step 2 into the outer shell, pour encapsulating glue into the outer shell, cure it after baking, and then test the entire module.

[0062] In the manufacturing method described above, two soldering methods are used to complete the assembly of the core inside the output module, which is beneficial to improving the soldering quality. Since the assembly height of the single-layer parallel single board is relatively low, it is not easy to move in position after the first solder paste is dot-applied for pre-positioning before the first brazing, avoiding solder offset. To ensure that the second brazing will not affect the solder joints of the first brazing, the melting point of the first solder paste used in the present invention is higher than that of the second solder paste, and the soldering temperature of the first reflow soldering is higher than that of the second reflow soldering, so that the solder joints after the first brazing will not melt during the second brazing.

[0063] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A narrow pulse high-power output module based on a three-dimensional arrangement of chips, comprising a housing, exposed wiring terminals, and a core body inside the housing, characterized in that: The core body includes a plurality of stacked and interconnected parallel single boards. The parallel single board includes a first metal plate, a second metal plate, a gate interconnection plate, an IGBT chip, and a freewheeling diode chip. The first metal plate interconnects the collectors of a plurality of IGBT chips and the cathodes of the freewheeling diode chips. The second metal plate interconnects the emitters of a plurality of IGBT chips and the anodes of the freewheeling diode chips. The gate interconnection plate interconnects the gates of a plurality of IGBT chips; The exposed terminal includes the collector terminal C and the emitter terminal E of the module, the emitter terminal e led out from the second metal plate of each parallel single board, and the gate terminal g led out from the gate interconnection plate of each parallel single board. When a plurality of parallel single boards are stacked and interconnected, the first metal plate of the parallel single board on the upper layer is interconnected with the second metal plate of the adjacent parallel single board on the lower layer. The emitter terminal E is led out from the second metal plate of the uppermost parallel single board, and the collector terminal C is led out from the first metal plate of the lowermost parallel single board; The collector terminal C and the emitter terminal E of the module, the emitter terminal e and the gate terminal g of each parallel single board are all arranged on the same end face of the housing. The collector terminal C and the emitter terminal E are aligned vertically and located at one end of the housing end face where they are located. All the emitter terminals e are aligned vertically and located at the other end of the housing end face where they are located. All the gate terminals g are aligned vertically and located in the middle of the housing end face where they are located; The IGBT chips on the parallel single board are symmetrically arranged in two columns along the length direction of the first metal plate, symmetrically arranged in m rows along the width direction of the first metal plate, and the column pitch is greater than the row pitch. The gates of the two IGBT chips in each row are opposite to each other. The emitter terminal e of each parallel single board is located at one end of one column, and the gate terminal g of each parallel single board is located at one end between the two columns. The second metal plate is of a U-shaped structure, and the U-shaped structure includes two side extension plates and a connecting plate that connects one end of the two side extension plates into one body. The freewheeling diode chips are arranged at one end of the IGBT chip column. The extension plates are brazed and interconnected with the emitters of each IGBT chip, and the connecting plate is brazed and interconnected with the anode of the freewheeling diode. The gate interconnection plate is located between the two columns of IGBT chips or between the two side extension plates. The two side extension plates of the second metal plate of the uppermost parallel single board in the core body are of equal length. One side extension plate leads out the emitter terminal E of the module, and the other side extension plate leads out the emitter terminal e of the parallel single board. The two side extension plates of the second metal plate of other parallel single boards in the core body are of unequal length, and the longer side extension plate leads out the emitter terminal e of the parallel single board.

2. The narrow pulse high-power output module based on the three-dimensional arrangement of chips according to claim 1, wherein: The gate interconnection plate is a third metal plate, and the shape of the third metal plate is fishbone-shaped, that is, it includes a main rib along the length direction of the first metal plate and a plurality of secondary ribs symmetrically extending from both sides of the main rib to the width direction of the main rib. One end of the main rib is the gate terminal g of the parallel single board, and the end of each secondary rib is brazed and interconnected with the gate of the corresponding IGBT chip.

3. The narrow pulse high-power output module based on the three-dimensional arrangement of chips according to claim 1, characterized in that: The gate interconnection board is a double-sided copper-clad ceramic board. The width of the double-sided copper-clad ceramic board is less than the column pitch of two columns of IGBT chips. The back of the double-sided copper-clad ceramic board is welded to the first metal plate. The gate of each IGBT chip on the parallel single board is connected to the copper-clad area on the front of the double-sided copper-clad ceramic board through a metal bonding wire. The gate metal lead terminal is welded to one end of the copper-clad area on the front of the double-sided copper-clad ceramic board, and the part extending out of the double-sided copper-clad ceramic board serves as the gate terminal g.

4. The narrow pulse high-power output module based on the three-dimensional arrangement of chips according to claim 1, wherein: Between the emitter connection solder joint of each IGBT chip on the parallel single board and the second metal plate, and between the anode connection solder joint of the freewheeling diode chip and the second metal plate, they are respectively connected by brazing with a metal gasket.

5. The narrow pulse high-power output module based on the three-dimensional arrangement of chips according to claim 1, wherein: Between adjacent stacked parallel single boards, between the first metal plate of the upper parallel single board and the second metal plate of the lower parallel single board, they are connected by brazing with a metal gasket.

6. The manufacturing method of the narrow pulse high-power output module based on the three-dimensional arrangement of chips according to any one of claims 1-5, characterized in that Including: Step 1: Assembly and welding of the parallel single board: For each connection point on each parallel single board, apply the first solder paste by dotting, place each interconnection board respectively to complete the assembly and pre-positioning of each interconnection board, and then complete the welding and fixing of the connection points by the first reflow soldering for the parallel single board. Step 2: Stack and weld multiple parallel single boards to form a core: After completing Step 1, apply the second solder paste by dotting at the corresponding connection points of adjacent stacked parallel single boards, stack the bottom of the upper parallel single board on top of the lower parallel single board in sequence, and then complete the welding and fixing of the stacked corresponding connection points by the second reflow soldering; the melting point of the first solder paste is higher than that of the second solder paste, and the welding temperature of the first reflow soldering is higher than that of the second reflow soldering. Step 3: Encapsulation of the core: Place the core completed in Step 2 into the housing, pour encapsulating glue into the housing, and cure it after baking.

7. The manufacturing method according to claim 6, characterized in that: In Step 1, first place the first metal plate into the welding mold, apply the first solder paste at the chip interconnection position on the first metal plate, then place the IGBT chip and the freewheeling diode chip at the corresponding solder paste dots, then apply the first solder paste at the emitter area of the IGBT chip, the metallization area of the freewheeling diode chip, and the gate area of the IGBT chip, then place a metal gasket at the solder paste dots on the emitter area of the IGBT chip and the surface of the freewheeling diode chip, and apply the first solder paste on top of the metal gasket. Next, place the second metal plate on the metal gasket, cover the gate of the IGBT chip at the corresponding gate connection solder joint on the third metal plate. After completing the above steps, complete the brazing of the parallel single board in the tunnel furnace. In step 2, first place the parallel single board with the collector terminal C into the soldering mold, apply the second solder paste at the connection point of the second metal plate of the parallel single board, place a metal gasket at the applied second solder paste, apply the second solder paste on the metal gasket, and then place the parallel single board without both the collector terminal C and the emitter terminal E on it for lamination. Repeat the above steps until all the parallel single boards without both the collector terminal C and the emitter terminal E are laminated. After applying the second solder paste on the topmost parallel single board without both the collector terminal C and the emitter terminal E, laminate the parallel single board with the emitter terminal E on it. Finally, complete the brazing of the above core body in a tunnel furnace.

8. The manufacturing method according to claim 6, characterized in that: The composition of the first solder paste is PbSn5Ag2.5, and the liquidus point is 285 °C. The composition of the second solder paste is SnAg3Cu0.5, and the liquidus point is 217 °C.

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