A method for preparing Micro-LED
A SiO2 passivation layer is formed on the surface of Micro-LED through a low-temperature sol-gel method, which solves the problem of surface defects after dry etching, improves device performance and reduces production costs.
Patent Information
- Application Number
- CN202211505066.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-29
- Publication Date
- 2025-09-05
- Estimated Expiration
- 2042-11-29
AI Technical Summary
In the conventional Micro-LED preparation process, the surface of the micro-LED chip after dry etching has dangling bonds, defects formed by stress relaxation, and residual damage caused by ICP etching. It is easily damaged when exposed to a high-temperature plasma environment, resulting in a decrease in device performance.
A low-temperature sol-gel method is used to form a SiO2 sidewall passivation layer on the Micro-LED surface. By controlling the addition ratio of TEOS, ammonia solution and CTAB, the thickness growth of silicon oxide is controlled. Multiple sol-gel processes are performed to form a passivation layer of preset thickness, reducing the defects caused by ALD and CVD processes.
It effectively reduces the surface defects of Micro-LEDs and improves device performance. It also has a simple preparation method and low production cost.
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Figure CN115799406B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of optoelectronic devices, and in particular relates to a method for preparing a Micro-LED. Background Art
[0002] Micro-light-emitting diodes (μLEDs) have the advantages of high brightness, high resolution, long life, high response rate, low power consumption, and high reliability. They have broad application prospects in many fields such as high-resolution display, wearable / implantable optoelectronic devices, optical communications, and biomedical testing.
[0003] Conventional Micro-LEDs sequentially grow an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer on a substrate to form an LED epitaxial wafer. The LED epitaxial wafer is then etched from top to bottom using dry etching technology to form a microchip array structure. After ICP etching, PECVD, ALD, and other processes are required to deposit a passivation layer of SiO2, Al2O3, or Si3N4. The passivation layer can passivate surface defects, reduce chip leakage current, and also act as an insulator between the np electrodes. However, after dry etching, the surface of the micro-LED chip has defects such as dangling bonds, stress relaxation, and residual damage caused by ICP etching. In the PECVD and ALD processes, since the chip is exposed to high temperature and plasma environments, the fragile locations on the sidewall surface are easily damaged and form defects. Summary of the Invention
[0004] The purpose of the present invention is to address the above-mentioned defects in the prior art and provide a method for preparing Micro-LEDs. The method adopts a low-temperature sol-gel method to form a SiO2 sidewall passivation layer, which can effectively reduce the defects generated during the conventional surface passivation process using ALD and CVD processes, thereby improving device performance. The preparation method is simple and the production cost is low.
[0005] The present invention adopts the following technical solutions:
[0006] A method for preparing a Micro-LED comprises the following steps:
[0007] S1: preparing an LED epitaxial wafer, wherein the epitaxial wafer comprises, from bottom to top, a substrate, a first conductive type semiconductor layer, a light emitting layer, and a second conductive type semiconductor layer;
[0008] S2: Etching the LED epitaxial wafer to form grooves, with the etching depth reaching the first conductive type semiconductor layer. The grooves divide the epitaxial wafer into micro light-emitting arrays;
[0009] S3: forming a passivation layer on the surface of the micro-light emitting array including the bottom and sidewalls of the groove, wherein the passivation layer includes a first passivation layer formed by a low-temperature sol-gel method.
[0010] Furthermore, the epitaxial wafer further includes a current spreading layer, which is deposited on the upper surface of the second conductive type semiconductor layer.
[0011] Furthermore, the substrate includes any one of silicon, silicon carbide, gallium arsenide, indium phosphide, sapphire, gallium nitride and glass substrate.
[0012] Furthermore, the first conductive type semiconductor layer is n-GaN, the light emitting layer is InGaN / GaN, and the second conductive type semiconductor layer is p-GaN.
[0013] Furthermore, the first conductive type semiconductor layer is n-AlGaInP, the light emitting layer is a GaInP / AlGaInP multi-quantum well layer, and the second conductive type semiconductor layer is p-AlGaInP.
[0014] Furthermore, the LED epitaxial wafer is etched to form grooves, silicon oxide is used as a hard mask layer, and a patterned mask layer is formed by photolithography and etching.
[0015] Furthermore, the etching adopts dry etching to form the groove, and then adopts wet etching to adjust the groove morphology and reduce damage after etching.
[0016] Furthermore, the first passivation layer includes any one of SiO2, Al2O3, HfO2, ZrO2, ZnO and Ga2O3, and has a thickness of 2 to 200 nm.
[0017] Furthermore, the passivation layer further includes a second passivation layer, and the second passivation layer is deposited on an upper surface of the first passivation layer.
[0018] Furthermore, the second passivation layer includes any one of Al2O3, Si3N4, AlN, and Ga2O3 formed by ALD, CVD, or sputtering process, and has a thickness of 2 to 200 nm.
[0019] Furthermore, the first passivation layer is SiO2, and the preparation process is as follows:
[0020] S31: immersing the epitaxial wafer in a mixed solution of anhydrous ethanol and deionized water at room temperature;
[0021] S32: adding cetyltrimethylammonium bromide to the mixed solution described in S31 to form micelles, and stirring the mixture at 50-1000 rpm for 1-30 minutes;
[0022] S33: adding tetraethyl orthosilicate and ammonia solution to the mixture in step S32 in sequence, and stirring continuously at 50-1000 rpm for 0.5-5 hours;
[0023] S34: Clean the epitaxial wafer with deionized water and ethanol and dry it for 1 to 10 hours;
[0024] S35: heat-treating the epitaxial wafer obtained in S34 using a two-step heat treatment method, wherein the first step heat treatment temperature is 80-300° C., and the second step heat treatment temperature is 300-600° C.;
[0025] S36: Repeat S31 to S35 according to the thickness requirement of the first passivation layer to obtain a first passivation layer of a preset thickness.
[0026] The sol-gel method for forming the first SiO2 passivation layer uses tetraethyl orthosilicate (TEOS) as the silicon source, ammonia solution as the catalyst, cetyltrimethylammonium bromide (CTAB) as the surfactant, and anhydrous ethanol as the solvent. By controlling the ratio of TEOS, ammonia solution, and CTAB, the hydrolysis and condensation rates of TEOS are controlled, limiting the amount of sol, so that the thickness of the silicon oxide increases linearly with reaction time before reaching saturation in each sol-gel process. Repeated sol-gel processes produce a first passivation layer of a predetermined thickness.
[0027] Furthermore, the first passivation layer is Al2O3, and the preparation process is as follows:
[0028] S31: Immersing the epitaxial wafer in an aluminum gel solution at room temperature;
[0029] S32: forming a film by a Czochralski method in an aluminum gel solution at a pulling speed of 1-300 mm / s;
[0030] S33: After sealing and aging for 1 to 48 hours, an Al2O3 thin film is formed on the surface of the micro-light-emitting array, including the bottom and sidewalls of the groove, by heat treatment. A three-step heat treatment method is used, wherein the first step heat treatment temperature is 80 to 200°C, the second step heat treatment temperature is 200 to 350°C, and the third step heat treatment temperature is 300 to 600°C.
[0031] S34: Repeat S31 to S33 according to the thickness requirement of the first passivation layer to obtain a first passivation layer of a preset thickness.
[0032] The aluminum gel solution can be prepared by using aluminum chloride hexahydrate (AlCl3·6H2O), deionized water, polyethylene glycol (PEG) 4000 as a dispersant, and an ammonia solution as a precipitant.
[0033] Furthermore, the first passivation layer in S3 is HfO2, which is formed by dissolving HfCl4 in ethanol or other solvents, then adding acid for hydrolysis and peptization, forming a film on the substrate by multiple immersion methods, and forming HfO2 after heat treatment.
[0034] Furthermore, the first passivation layer in S3 is Ga2O3, and gallium nitrate hydrate is dissolved in anhydrous ethanol to prepare a solution of a certain concentration, and an appropriate proportion of Triton is added as a surfactant. A film is formed on the substrate by multiple immersion methods, and Ga2O3 is formed after heat treatment.
[0035] When preparing the p-electrode later, the passivation layer on the second conductive type semiconductor layer needs to be removed to prepare the p-electrode. When preparing the n-electrode later, the passivation layer on the first conductive type semiconductor layer needs to be removed to prepare the n-electrode.
[0036] The beneficial effects of the present invention are as follows:
[0037] In conventional Micro-LED fabrication processes, after the epitaxial wafer is dry-etched to form the array light-emitting structure, a passivation layer is typically formed using CVD or ALD to protect the sidewalls of the light-emitting array structure. However, the surface of the array structure after dry etching is susceptible to numerous defects, dangling bonds, and residual etching damage. This surface is highly susceptible to new damage when exposed to the high-temperature, plasma environment of CVD and ALD. This solution utilizes a low-temperature sol-gel method to form a SiO2 passivation layer, effectively reducing the defects generated during conventional surface passivation using ALD and CVD processes, thereby improving device performance. Furthermore, the low-temperature sol-gel method offers a simple preparation method and low production costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] Figure 1 Flowchart of the Micro-LED fabrication process of the present invention;
[0039] Figure 2 This is a flow chart of forming the first passivation layer SiO2 by low-temperature sol-gel in Example 1 of the present invention;
[0040] Figure 3 This is a flow chart of forming a first passivation layer Al2O3 by low-temperature sol-gel in Example 2 of the present invention;
[0041] Figure 4 The cross section of the Micro-LED during the preparation process of the present invention Figure 1 ;
[0042] Figure 5 The cross section of the Micro-LED during the preparation process of the present invention Figure 2 ;
[0043] Figure 6 The cross section of the Micro-LED during the preparation process of the present invention Figure 3 ;
[0044] Wherein: 1-substrate; 2-first conductive type semiconductor layer; 3-light emitting layer; 4-second conductive type semiconductor layer; 5-first passivation layer; 6-second passivation layer. DETAILED DESCRIPTION
[0045] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention will be further described below with reference to the accompanying drawings.
[0046] The present invention discloses a method for preparing Micro-LED, comprising the following steps:
[0047] S1: preparing an LED epitaxial wafer, the epitaxial wafer including a substrate, a first conductive type semiconductor layer, a light emitting layer, and a second conductive type semiconductor layer;
[0048] The substrate is selected from a sapphire substrate, a SiC substrate, a Si substrate, and a GaN substrate. The first conductivity-type semiconductor layer is n-GaN, the light-emitting layer is InGaN / GaN, and the second conductivity-type semiconductor layer is p-GaN. The first conductivity-type semiconductor layer can also be n-AlGaInP, the light-emitting layer can also be a GaInP / AlGaInP multi-quantum well layer, and the second conductivity-type semiconductor layer can also be p-AlGaInP.
[0049] Optionally, a p-AlGaN electron blocking layer is further deposited after the light emitting layer and before the second conductive type semiconductor layer.
[0050] Optionally, a current spreading layer is further deposited on the upper surface of the second conductive type semiconductor layer, and the current spreading layer is indium tin oxide (ITO).
[0051] S2: Etching the LED epitaxial wafer to form grooves, with the etching depth reaching the first conductive type semiconductor layer. The grooves divide the epitaxial wafer into micro light-emitting arrays;
[0052] Optionally, the step of etching the LED epitaxial wafer to form the grooves includes forming a patterned photoresist mask layer by applying photoresist, exposing, and developing, and then transferring the pattern to the epitaxial wafer by dry etching.
[0053] Optionally, silicon oxide may be used as a hard mask layer, and a patterned mask layer may be formed by photolithography and etching.
[0054] Optionally, the step of etching the LED epitaxial wafer to form grooves includes dry etching to form the grooves, followed by wet etching to adjust the groove morphology and damage after etching. Inductively coupled plasma etching (ICP) or inductively coupled plasma reactive ion etching (ICP-RIE) can be used to etch the LED epitaxial wafer to form the groove array. Wet etching using an alkaline solution or an acidic solution, such as potassium hydroxide solution, repairs the etched groove morphology and reduces damage after dry etching.
[0055] S3: forming a passivation layer on the surface of the micro-light emitting array including the bottom and sidewalls of the groove, wherein the passivation layer includes a first passivation layer formed by a low-temperature sol-gel method.
[0056] Example 1
[0057] The first passivation layer is SiO2, using TEOS as a silicon source, an ammonia solution as a catalyst, and CTAB as a surfactant.
[0058] In this embodiment 1, the first passivation layer is formed by a low-temperature sol-gel method, which includes the following steps:
[0059] S31: immersing the epitaxial wafer in a mixed solution of anhydrous ethanol and deionized water in a volume ratio of 1:1 to 1:2;
[0060] S32: Add CTAB (purity ≥97%) to the mixed solution described in S31 at a ratio of 1–10 g CTAB per 1 L of solution to form micelles. Stir the mixture at 50–1000 rpm for 1–30 min.
[0061] S33: adding 1-50 ml of ammonia solution (mass fraction 25%-30%) and TEOS (purity ≥97%) to 1 L of the solution, and sequentially adding TEOS and ammonia solution dropwise to the mixture in step S32, wherein the volume ratio of ammonia solution to TEOS is 1:1-3:1, and continuously stirring at 50-1000 rpm at room temperature for 0.5-5 hours;
[0062] S34: Clean the epitaxial wafer with deionized water and ethanol and dry it for 1 to 10 hours;
[0063] S35: heat-treating the epitaxial wafer obtained in S35. Preferably, a two-step heat treatment method is adopted, wherein the first step heat treatment temperature is 80-300°C, and the second step heat treatment temperature is 300-600°C;
[0064] S36: Repeat S31 to S35 according to the thickness requirement of the first passivation layer to obtain a first passivation layer of a preset thickness. Preferably, the thickness of the first passivation layer is 2-200 nm.
[0065] In the Micro-LED preparation method of this embodiment 1, a low-temperature sol-gel method is used to prepare a first silicon oxide passivation layer. TEOS is used as a silicon source, an ammonia solution is used as a catalyst, and CTAB is used as a surfactant. By controlling the addition ratio of TEOS, ammonia solution, and CTAB, the hydrolysis and condensation rates of TEOS are controlled, and the amount of sol is limited. In this way, the thickness of the silicon oxide in each sol-gel process first increases linearly with the reaction time and then reaches saturation. A first passivation layer of a preset thickness is obtained through multiple sol-gel processes.
[0066] Example 2
[0067] The first passivation layer in S3 is Al2O3 formed by a low-temperature sol-gel method, and the preparation process is as follows:
[0068] S31: Immersing the epitaxial wafer in an aluminum gel solution at room temperature;
[0069] S32: Film formation is performed in an aluminum gel solution by a Czochralski method at a pulling speed of 1-10 mm / s;
[0070] S33: After sealing and aging for 1 to 48 hours, an Al2O3 film is formed on the surface of the micro-light emitting array, including the bottom and sidewalls of the groove, at a heat treatment temperature of 80 to 600°C;
[0071] S34: Repeat S31 to S33 according to the thickness requirement of the first passivation layer to obtain a first passivation layer of a preset thickness.
[0072] Preferably, the aluminum gel solution can be prepared by using AlCl3·6H2O, deionized water, polyethylene glycol (PEG) 4000 as a dispersant, and ammonia water as a precipitant.
[0073] Specifically, AlCl3·6H2O and deionized water are prepared into an aqueous solution with a concentration of 0.01~0.5 mol / L, and a certain amount of PEG is added. After stirring evenly, ammonia water is added dropwise at a rate of 0.1~3 mL / min and stirred continuously until the pH value of the solution reaches 8~10, forming an aluminum gel solution.
[0074] Preferably, a three-step heat treatment method is adopted, wherein the first step heat treatment temperature is 80-200°C, the second step heat treatment temperature is 200-350°C, and the third step heat treatment temperature is 300-600°C.
[0075] Preferably, the thickness of the first passivation layer Al2O3 film is 2-200 nm.
[0076] In other embodiments, the first passivation layer in S3 is HfO2. The first passivation layer HfO2 can be prepared by dissolving HfCl4 in ethanol or other solvents, adding acid for hydrolysis and peptization, and forming HfO2 on the substrate through multiple immersion methods and heat treatment.
[0077] In other embodiments, the first passivation layer in S3 is Ga2O3, gallium nitrate hydrate is dissolved in anhydrous ethanol to prepare a solution of a certain concentration, an appropriate proportion of Triton is added as a surfactant, and Ga2O3 is formed on the substrate through multiple immersion and heat treatment.
[0078] The passivation layer also includes a second passivation layer, which is deposited on the upper surface of the first passivation layer. The second passivation layer is made of Al2O3, Si3N4, AlN, or Ga2O3. The second passivation layer can be formed using processes such as CVD, ALD, and sputtering. The thickness of the second passivation layer is 2 to 200 nm.
[0079] The second passivation layer can protect the first passivation layer and also serve as an etch stop layer.
[0080] When preparing the p-electrode later, the passivation layer on the second conductive type semiconductor layer needs to be removed to prepare the p-electrode. When preparing the n-electrode later, the passivation layer on the first conductive type semiconductor layer needs to be removed to prepare the n-electrode.
[0081] The above description is only used to illustrate the present invention and is not intended to limit the implementation of the present invention in any form. Therefore, any modification or amendment of the present invention based on the shape, structure, characteristics and basic concept described in the present invention shall fall within the scope of the intellectual property rights that the present invention intends to protect.
Claims
1. A method for preparing a Micro-LED, characterized by: The steps include: S1: preparing an LED epitaxial wafer, wherein the epitaxial wafer comprises, from bottom to top, a substrate, a first conductive type semiconductor layer, a light emitting layer, and a second conductive type semiconductor layer; S2: Etching the LED epitaxial wafer to form grooves, with the etching depth reaching the first conductive type semiconductor layer. The grooves divide the epitaxial wafer into micro light-emitting arrays; S3: forming a passivation layer on the surface of the micro-light-emitting array including the bottom and sidewalls of the groove, wherein the passivation layer includes a first passivation layer formed by a low-temperature sol-gel method; The passivation layer further includes a second passivation layer, which is deposited on the upper surface of the first passivation layer; The second passivation layer is formed by ALD, CVD, or sputtering process.
2. The method for preparing a Micro-LED according to claim 1, wherein: The epitaxial wafer further includes a current spreading layer, which is deposited on the upper surface of the second conductive type semiconductor layer.
3. The method for preparing a Micro-LED according to claim 1, wherein: The substrate includes any one of silicon, silicon carbide, gallium arsenide, indium phosphide, sapphire, gallium nitride and glass substrate.
4. The method for preparing a Micro-LED according to claim 1, wherein: The first conductive type semiconductor layer is n-GaN, the light emitting layer is InGaN / GaN, and the second conductive type semiconductor layer is p-GaN.
5. The method for preparing a Micro-LED according to claim 1, wherein: The first conductive type semiconductor layer is n-AlGaInP, the light emitting layer is a GaInP / AlGaInP multi-quantum well layer, and the second conductive type semiconductor layer is p-AlGaInP.
6. The method for preparing a Micro-LED according to claim 1, wherein: The LED epitaxial wafer is etched to form grooves, silicon oxide is used as a hard mask layer, and a patterned mask layer is formed by photolithography and etching; The etching adopts dry etching to form the groove, and then adopts wet etching to adjust the groove morphology and reduce the damage after etching.
7. The method for preparing a Micro-LED according to claim 1, wherein: The first passivation layer includes any one of SiO2, Al2O3, HfO2, ZrO2, ZnO and Ga2O3, and has a thickness of 2-200 nm.
8. The method for preparing a Micro-LED according to claim 1, wherein: The second passivation layer includes any one of Al2O3, Si3N4, AlN, and Ga2O3, and has a thickness of 2-200 nm.
9. The method for preparing a Micro-LED according to claim 7, wherein: The first passivation layer is SiO2, and the preparation process is as follows: S31: immersing the epitaxial wafer in a mixed solution of anhydrous ethanol and deionized water at room temperature; S32: adding cetyltrimethylammonium bromide to the mixed solution of S31 to form micelles, and stirring the mixture at 50-1000 rpm for 1-30 minutes; S33: adding tetraethyl orthosilicate and ammonia solution to the mixture in step S32 in sequence, and stirring continuously at 50-1000 rpm for 0.5-5 hours; S34: Clean the epitaxial wafer with deionized water and ethanol and dry it for 1 to 10 hours; S35: heat-treating the epitaxial wafer obtained in S34 using a two-step heat treatment method, wherein the first step heat treatment temperature is 80-300° C., and the second step heat treatment temperature is 300-600° C.; S36: Repeat S31 to S35 according to the thickness requirement of the first passivation layer to obtain a first passivation layer of a preset thickness.
10. The method for preparing a Micro-LED according to claim 7, wherein: The first passivation layer is Al2O3, and the preparation process is as follows: S31: Immersing the epitaxial wafer in an aluminum gel solution at room temperature; S32: forming a film by a Czochralski method in an aluminum gel solution at a pulling speed of 1-300 mm / s; S33: After sealing and aging for 1 to 48 hours, an Al2O3 thin film is formed on the surface of the micro-light-emitting array, including the bottom and sidewalls of the groove, by heat treatment. A three-step heat treatment method is used, wherein the first step heat treatment temperature is 80 to 200°C, the second step heat treatment temperature is 200 to 350°C, and the third step heat treatment temperature is 300 to 600°C. S34: Repeat S31 to S33 according to the thickness requirement of the first passivation layer to obtain a first passivation layer of a preset thickness.
Citation Information
Patent Citations
Micro LED display device and preparation method thereof
CN113161382A