A modulation method for eliminating sideband harmonics at integer multiples of carrier frequency of common mode voltage

Abstract

The application discloses a modulation method for eliminating sideband harmonics at the integer multiple carrier frequency of common-mode voltage, which reselects effective voltage vectors in the process of synthesizing reference voltage vectors, so that the common-mode voltage waveform between carrier periods is completely the same, and according to the characteristics of the common-mode voltage waveform, the modulation method can completely eliminate sideband harmonics near the integer multiple carrier frequency of common-mode voltage while reducing the amplitude of common-mode voltage, effectively reducing the adverse effects caused by the amplitude of common-mode voltage and its sideband harmonics. In view of the increase of switching frequency caused by the modulation method, the switching times of each carrier period are reduced by means of sawtooth wave carrier, further reducing the harm of common-mode voltage to the system.

Description

Technical Field

[0001] This invention relates to a modulation method for a three-phase two-level inverter with a sawtooth wave carrier. Background Technology

[0002] With the development of power electronics technology, inverters typically employ PWM (Pulse Width Modulation) technology. While PWM technology can reduce low-order harmonic losses and improve dynamic response performance, it can also cause harm. PWM technology can cause voltage imbalance at the inverter output of the motor system, generating common-mode voltage. Excessive common-mode voltage amplitude can damage the bearing oil film, reducing bearing life. The complex high-frequency harmonics contained in the common-mode voltage can impact the common-mode circuit, causing common-mode current and emitting electromagnetic interference to other electrical equipment in the surrounding area. When the common-mode current caused by the common-mode voltage is too large, it will affect the normal operation of the system, necessitating suppression of its amplitude and high-frequency harmonics.

[0003] Currently, the common-mode voltage suppression strategy for traditional inverter-driven three-phase motor systems mainly focuses on reducing the amplitude of the common-mode voltage. Existing modulation strategies fail to suppress harmonic pollution caused by sideband harmonics near integer multiples of the carrier frequency of the common-mode voltage. To further reduce the adverse effects of common-mode voltage on the system, it is necessary to study common-mode voltage sideband harmonic suppression strategies that suppress both the amplitude and the sideband harmonics. Summary of the Invention

[0004] The purpose of this invention is to provide a modulation method for eliminating sideband harmonics at integer multiples of the carrier frequency of the common-mode voltage. By reselecting the effective voltage vector during the synthesis of the reference voltage vector, the common-mode voltage waveform is made identical between carrier cycles. Based on the characteristics of this common-mode voltage waveform, this modulation method can completely eliminate sideband harmonics near integer multiples of the carrier frequency of the common-mode voltage while reducing the common-mode voltage amplitude, effectively reducing the adverse effects caused by the common-mode voltage amplitude and its sideband harmonics. To address the increase in switching frequency caused by this modulation method, a sawtooth wave carrier is used to reduce the number of switching cycles per carrier cycle, further reducing the harm caused by the common-mode voltage to the system.

[0005] The objective of this invention is achieved through the following technical solution:

[0006] A modulation method for eliminating sideband harmonics at carrier frequencies that are integer multiples of the common-mode voltage, wherein the method synthesizes a virtual voltage vector using an effective voltage vector and makes the common-mode voltage waveform identical between carrier cycles, while using a sawtooth wave carrier to reduce the number of switching operations per carrier cycle, the specific steps of which are as follows:

[0007] Step 1: Based on the six effective voltage vectors of the space vector modulation strategy V 1~ V6. Combine two adjacent effective voltage vectors into a single virtual voltage vector to obtain the virtual voltage vector. V 12 , V 23 , V 34 , V 45 , V 56 , V 61 Where: virtual voltage vector V 12 From the effective voltage vector V 1 and V 2. Synthesis; Virtual Voltage Vector V 23 From the effective voltage vector V 2 and V 3. Synthesis; Virtual Voltage Vector V 34 From the effective voltage vector V 3 and V 4. Synthesis; Virtual Voltage Vector V 45 From the effective voltage vector V 4 and V 5. Synthesis; Virtual Voltage Vector V 56 From the effective voltage vector V 5 and V 6. Synthesis; Virtual Voltage Vector V 61 From the effective voltage vector V 6 and V 1. Synthesis;

[0008] Step 2: Based on the virtual voltage vector obtained in Step 1 V 12 , V 23 , V 34 , V 45 , V 56 , V 61 Redefining the six sectors: virtual vector V 12 and V 23 The area between these two points is the first sector, a virtual vector. V 23 and V 34 The area between these two sectors is the second sector, and the virtual vector is... V 34 andV 45 The area between these two sectors is the third sector, and the virtual vector is... V 45 and V 56 The area between these two sectors is the fourth sector, and the virtual vector is... V 56 and V 61 The area between these two sectors is the fifth sector, a virtual vector. V 61 and V 12 The area between these two sectors is the sixth sector.

[0009] Step 3: Use two virtual voltage vectors as new effective voltage vectors to synthesize a reference voltage vector, and use effective voltage vectors with opposite phases to synthesize a zero voltage vector. The carrier wave is a sawtooth wave.

[0010] Step 4: The six effective voltage vectors correspond to the two polarities of the common-mode voltage. According to the volt-second balance principle, the order of action of the selected effective voltage vectors is changed so that the duration of the positive common-mode voltage in each carrier cycle is equal to the duration of the negative common-mode voltage, both being half the carrier cycle. Simultaneously, the common-mode voltage waveform is identical between each carrier cycle within a fundamental cycle. Specifically, the selection and order of action of the effective voltage vectors when the reference voltage vector is located within the six sectors are as follows:

[0011] Selection of effective voltage vector within the first sector: V 1 and V 4. Synthesize a zero voltage vector. V 12 and V 23 The synthesized reference voltage vector operates in the following order: V 1→ V 3→ V 4→ V 2;

[0012] Selection of effective voltage vector within the second sector: V 2 and V 5. Synthesize a zero voltage vector. V 23 and V 34 The synthesized reference voltage vector operates in the following order: V 3→ V 5→ V 4→ V 2;

[0013] Selection of effective voltage vector within the third sector: V 3 and V 6. Synthesize a zero voltage vector. V34 and V 45 The synthesized reference voltage vector operates in the following order: V 3→ V 5→ V 6→ V 4;

[0014] Effective voltage vector selection in the fourth sector: V 1 and V 4. Synthesize a zero voltage vector. V 45 and V 56 The synthesized reference voltage vector operates in the following order: V 5→ V 1→ V 6→ V 4;

[0015] Effective voltage vector selection within sector 5: V 2 and V 5. Synthesize a zero voltage vector. V 56 and V 61 The synthesized reference voltage vector operates in the following order: V 5→ V 1→ V 2→ V 6;

[0016] Effective voltage vector selection in sector 6: V 3 and V 6. Synthesize a zero voltage vector. V 61 and V 12 The synthesized reference voltage vector operates in the following order: V 1→ V 3→ V 2→ V 6.

[0017] Compared with the prior art, the present invention has the following advantages:

[0018] 1. This invention employs the method of synthesizing a new voltage vector from an effective voltage vector, synthesizing a zero voltage vector from effective voltage vectors with opposite phases, and using sawtooth wave carriers to ensure that the common-mode voltage waveform is completely identical within each carrier cycle, thereby achieving suppression of the system's common-mode voltage amplitude and elimination of sideband harmonics near several times the carrier frequency.

[0019] 2. The modulation method of the present invention can effectively eliminate sideband harmonics near integer multiples of the carrier frequency while suppressing the common-mode voltage amplitude, thereby reducing the adverse effects of the common-mode voltage on the system. At the same time, the carrier uses a sawtooth wave, so the switching loss will not increase significantly. It has high research and application value. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the sector definition and reference vector synthesis of the modulation strategy proposed in this invention;

[0021] Figure 2 The modulation strategy proposed in this invention provides the PWM waveform and common-mode voltage waveform within the newly defined sector.

[0022] Figure 3 The common-mode voltage waveform within the carrier period using the modulation strategy of this invention;

[0023] Figure 4 The common-mode voltage of the motor using the modulation strategy of this invention is Fourier expanded in the range of 0~40kHz;

[0024] Figure 5 Fourier expansion of the common-mode voltage of the motor using the AZSPWM1 modulation strategy in the range of 0~40kHz;

[0025] Figure 6 Fourier expansions of the two modulation strategies are given in the range of 150kHz to 30MHz. Detailed Implementation

[0026] The technical solution of the present invention will be further described below with reference to the accompanying drawings, but it is not limited thereto. Any modifications or equivalent substitutions to the technical solution of the present invention that do not depart from the spirit and scope of the technical solution of the present invention should be covered within the protection scope of the present invention.

[0027] like Figure 1 As shown, the six dashed arrows represent a virtual voltage vector synthesized from six effective voltage vectors. V 12 From the effective voltage vector V 1 and V 2. Synthesis; Virtual Voltage Vector V 23 From the effective voltage vector V 2 and V 3. Synthesis; Virtual Voltage Vector V 34 From the effective voltage vector V 3 and V 4. Synthesis; Virtual Voltage Vector V 45 From the effective voltage vector V 4 andV 5. Synthesis; Virtual Voltage Vector V 56 From the effective voltage vector V 5 and V 6. Synthesis; Virtual Voltage Vector V 61 From the effective voltage vector V 6 and V 1. Composition. The regular hexagon shown by the dashed lines is composed of 6 virtual voltage vectors. The sector is redefined based on the regular hexagon formed by the dashed lines, where the virtual voltage vectors... V 12 and V 23 The area between these points is the first sector; virtual voltage vector. V 23 and V 34 The area between these two points is the second sector; virtual voltage vector. V 34 and V 45 The area between these two points represents the third sector; virtual voltage vector. V 45 and V 56 The area between these two points is the fourth sector; virtual voltage vector. V 56 and V 61 The area between these two points represents the fifth sector; virtual voltage vector. V 61 and V 12 The area between these two points is the sixth sector.

[0028] Taking the reference voltage vector in the first sector as an example, the virtual voltage vector selection during its synthesis process... V 12 and V 23 Zero voltage vector selection of effective voltage vector V 1 and V 4. Synthesis. The calculation of the virtual voltage vector and the effective voltage vector's duration for synthesizing the zero voltage vector is similar to the SVPWM modulation strategy. Among the selected effective voltage vectors, the one used for synthesizing the zero voltage vector... V 1. V 4 vectors, composition V 12 of V 1. V 2 vectors, composition V 23 of V 2. V The durations of action of the three vectors are all equal. According to the formula for calculating common-mode voltage,V 1. V A 3-vector will generate a negative common-mode voltage. V 2. V Four vectors will generate a positive common-mode voltage. Therefore, the duration of the positive common-mode voltage within a carrier cycle is equal to the duration of the negative common-mode voltage, both being half the carrier cycle. According to the volt-second balance principle, changing the vector order without changing the duration of the vectors does not affect the final result. Within each carrier cycle, the effective vectors generating both positive and negative common-mode voltages are grouped together, minimizing the number of switching operations. The vector order within a carrier cycle is set to... V 1→ V 3→ V 4→ V 2. The common-mode voltage waveform changes within the carrier cycle by first exhibiting negative polarity for half a carrier cycle, followed by positive polarity for half a carrier cycle. The common-mode voltage waveform is identical within each carrier cycle of this sector.

[0029] Similar to the above, where the reference voltage vector is located in the first sector, the selection of the effective voltage vector and its specific order of action when the reference voltage vector is located in each of the six sectors are as follows:

[0030] Selection of effective voltage vector within the first sector: V 1 and V 4. Synthesize a zero voltage vector. V 12 and V 23 The synthesized reference voltage vector operates in the following order: V 1→ V 3→ V 4→ V 2.

[0031] Selection of effective voltage vector within the second sector: V 2 and V 5. Synthesize a zero voltage vector. V 23 and V 34 The synthesized reference voltage vector operates in the following order: V 3→ V 5→ V 4→ V 2.

[0032] Selection of effective voltage vector within the third sector: V 3 and V 6. Synthesize a zero voltage vector. V 34 and V45 The synthesized reference voltage vector operates in the following order: V 3→ V 5→ V 6→ V 4.

[0033] Effective voltage vector selection in the fourth sector: V 1 and V 4. Synthesize a zero voltage vector. V 45 and V 56 The synthesized reference voltage vector operates in the following order: V 5→ V 1→ V 6→ V 4.

[0034] Effective voltage vector selection within sector 5: V 2 and V 5. Synthesize a zero voltage vector. V 56 and V 61 The synthesized reference voltage vector operates in the following order: V 5→ V 1→ V 2→ V 6.

[0035] Effective voltage vector selection in sector 6: V 3 and V 6. Synthesize a zero voltage vector. V 61 and V 12 The synthesized reference voltage vector operates in the following order: V 1→ V 3→ V 2→ V 6.

[0036] Theoretically, the PWM waveform and common-mode voltage waveform within each sector are as follows: Figure 2 As shown. Because the zero-voltage vector is not used, the amplitude of the common-mode voltage is suppressed to... V dc / 6. The common-mode voltage waveform is exactly the same in each carrier cycle. Fourier analysis shows that it can completely eliminate the sideband harmonic components near integer multiples of the carrier frequency.

[0037] With the carrier frequency set to 10 kHz, the common-mode voltage waveform generated by the motor using the modulation strategy of this invention is as follows: Figure 3 As shown. By Figure 3It can be seen that this strategy can achieve a completely identical common-mode voltage waveform within each carrier cycle. Fourier decomposition of this waveform in the 0~40kHz range is shown below. Figure 4 As shown. Using the AZSPWM1 modulation strategy, Fourier decomposition is performed on the motor common-mode voltage in the range of 0~40kHz, as follows... Figure 5 As shown. Fourier expansions of the two modulation strategies in the 150kHz~30MHz range are presented in the comparison diagram below. Figure 6 As shown above, under the modulation strategy of this invention, sideband harmonics near integer multiples of the carrier frequency of the common-mode voltage are eliminated. The modulation strategy of this invention can effectively eliminate sideband harmonics near integer multiples of the carrier frequency while suppressing the common-mode voltage amplitude, further reducing the harm caused by the common-mode voltage to the system.

Claims

1. A modulation method for eliminating sideband harmonics at integer multiples of the common-mode voltage carrier frequency, characterized in that... The method includes the following steps: Step 1: Based on the six effective voltage vectors of the space vector modulation strategy V 1~ V 6. Combine two adjacent effective voltage vectors into a single virtual voltage vector to obtain the virtual voltage vector. V 12 , V 23 , V 34 , V 45 , V 56 , V 61 Where: virtual voltage vector V 12 From the effective voltage vector V 1 and V 2. Synthesis; Virtual Voltage Vector V 23 From the effective voltage vector V 2 and V 3. Synthesis; Virtual Voltage Vector V 34 From the effective voltage vector V 3 and V 4. Synthesis; Virtual Voltage Vector V 45 From the effective voltage vector V 4 and V 5. Synthesis; Virtual Voltage Vector V 56 From the effective voltage vector V 5 and V 6. Synthesis; Virtual Voltage Vector V 61 From the effective voltage vector V 6 and V 1. Synthesis; Step 2: Based on the virtual voltage vector obtained in Step 1 V 12 , V 23 , V 34 , V 45 , V 56 , V 61 Redefining the six sectors: virtual vector V 12 and V 23 The area between these two points is the first sector, a virtual vector. V 23 and V 34 The area between these two sectors is the second sector, and the virtual vector is... V 34 and V 45 The area between these two sectors is the third sector, and the virtual vector is... V 45 and V 56 The area between these two sectors is the fourth sector, and the virtual vector is... V 56 and V 61 The area between these two sectors is the fifth sector, a virtual vector. V 61 and V 12 The area between these two sectors is the sixth sector. Step 3: Use two virtual voltage vectors as new effective voltage vectors to synthesize a reference voltage vector, and use effective voltage vectors with opposite phases to synthesize a zero voltage vector. The carrier wave is a sawtooth wave. Step 4: The six effective voltage vectors correspond to the two polarities of the common-mode voltage. According to the volt-second balance principle, the order of action of the selected effective voltage vectors is changed so that the duration of the positive common-mode voltage in each carrier cycle is equal to the duration of the negative common-mode voltage, both being half the carrier cycle. Simultaneously, the common-mode voltage waveform is identical between each carrier cycle within a fundamental cycle. The selection and order of action of the effective voltage vectors when the reference voltage vector is located within the six sectors are as follows: Selection of effective voltage vector within the first sector: V 1 and V 4. Synthesize a zero voltage vector. V 12 and V 23 The synthesized reference voltage vector operates in the following order: V 1→ V 3→ V 4→ V 2; Selection of effective voltage vector within the second sector: V 2 and V 5. Synthesize a zero voltage vector. V 23 and V 34 The synthesized reference voltage vector operates in the following order: V 3→ V 5→ V 4→ V 2; Selection of effective voltage vector within the third sector: V 3 and V 6. Synthesize a zero voltage vector. V 34 and V 45 The synthesized reference voltage vector operates in the following order: V 3→ V 5→ V 6→ V 4; Effective voltage vector selection in the fourth sector: V 1 and V 4. Synthesize a zero voltage vector. V 45 and V 56 The synthesized reference voltage vector operates in the following order: V 5→ V 1→ V 6→ V 4; Effective voltage vector selection within sector 5: V 2 and V 5. Synthesize a zero voltage vector. V 56 and V 61 The synthesized reference voltage vector operates in the following order: V 5→ V 1→ V 2→ V 6; Effective voltage vector selection in sector 6: V 3 and V 6. Synthesize a zero voltage vector. V 61 and V 12 The synthesized reference voltage vector operates in the following order: V 1→ V 3→ V 2→ V 6.

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