A method for testing the execution correctness of an FC link failure protocol

By designing the FC link fault state machine test model, the problem of incorrect execution of the FC port link fault state machine is solved, and automated detection and testing of the FC port link fault protocol is realized, ensuring the correct execution of the protocol.

CN115801644BActive Publication Date: 2025-06-27XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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Patent Information

Application Number
CN202211384442.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-07
Publication Date
2025-06-27
Estimated Expiration
2042-11-07

AI Technical Summary

Technical Problem

The FC port link failure state machine may not be able to recover to the valid state when executing the link failure protocol, resulting in incorrect execution of the link failure protocol.

Method used

A FC link fault state machine test model is designed. By defining the test processing mechanism, the state machine jump mode in LF1 and LF2 states is automatically detected and tested on the FC port link fault status to ensure the correctness of the execution of the link fault protocol.

Benefits of technology

It realizes the correctness of the execution of the state machine in automated detection of FC link failure, ensures the correct implementation and execution of the FC port link failure protocol, is suitable for various types of FC port link failure testing, and the state machine control is clear and easy to implement hardware logic.

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Abstract

The present invention provides a method for testing the execution correctness of an FC link failure protocol. The testing method includes designing a link failure state machine test model and testing the execution correctness of the FC link failure protocol according to the link failure state machine test model. The model includes a detection device with a Test_Port port and a device under test with an N_Port port. The Test_Port port executes the FC link failure detection protocol, and the N_Port port executes the FC link failure protocol. Moreover, the N_Port port performs primitive interaction and control with the Test_Port port, and the state of the N_Port port is detected to test the execution correctness of the link failure protocol. By designing an independent link failure state machine test model, the present invention automatically tests the execution of the FC port link failure state under the control of the state machine using corresponding control logic, ensuring the correctness of the execution of the FC link failure protocol.
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Description

Technical Field

[0001] The present invention relates to the field of computer communication technologies, and particularly to a method for testing the execution correctness of an FC link failure protocol. Background Art

[0002] A new generation of aircraft uses FC as the backbone network to provide high-speed interconnection communication support for each airborne subsystem. When an FC port detects any one of the following three situations: the time for detecting the loss of synchronization exceeds R_T_TOV (Receive Transmit Timeout Value), signal loss when not in the offline state, or link reset protocol timeout error, it will execute the link failure protocol.

[0003] The link failure protocol starts from entering the LF2 (NOS transmission state) state, but when the FC port link failure state machine is executed incorrectly, there may be a problem that the link cannot be restored to the effective state. Therefore, an automated detection method for the correct execution of the FC port link failure state machine needs to be provided to ensure the correctness of the implementation and execution of the FC port link failure protocol. Summary of the Invention

[0004] The purpose of the present invention is to disclose a method for testing the execution correctness of an FC link failure protocol. By defining an FC link failure state machine test processing mechanism, according to the jump modes of the state machine in the LF1 (NOS reception state) and LF2 states, an independent link failure state machine test model is designed. Through the corresponding control logic, the execution situation of the FC port link failure state is automatically tested under the control of the state machine to ensure the correctness of its execution of the FC link failure protocol.

[0005] The technical solution for achieving the object of the invention is as follows: A method for testing the execution correctness of an FC link failure protocol, the test method includes designing a link failure state machine test model, and testing the execution correctness of the FC link failure protocol according to the link failure state machine test model;

[0006] The link failure state machine test model includes a detection device and a device under test. The N_Port port of the detection device is connected to the Test_Port port of the test device. The Test_Port port executes the FC link failure test protocol, the N_Port port executes the FC link failure protocol, and the N_Port port and the Test_Port port perform primitive interaction and control to detect the state of the N_Port port and test the execution correctness of the link failure protocol.

[0007] Further, testing the execution correctness of the FC link failure protocol according to the link failure state machine test model includes the following steps:

[0008] The link failure state machine test model enters the initialization state for initialization;

[0009] The Test_Port port judges the completion flag of the enabling test for two states, namely the NOS reception state and the NOS transmission state, in the N_Port port;

[0010] If there is an untested state, it enters the enabling test port corresponding to the untested state for enabling test, including: if the enabling test is normal, it judges the completion flag of all primitives corresponding to this state; if the enabling test is incorrect, it outputs the enabling error signal for this state;

[0011] If there is an untested primitive in the state, it enters the primitive test port corresponding to the untested primitive for primitive test, including: if the primitive test is normal, it sets the primitive test flag to valid; if the primitive test is incorrect, it sends a primitive error signal to the enabling test port of this state;

[0012] After the enabling tests for the NOS reception state and the NOS transmission state of the N_Port port and all primitives in each state are completed, it outputs relevant test results based on the enabling test completion flag, the primitive test completion flag, the enabling error signal, and the primitive error signal; if the Test_Port port receives a start test signal, it returns to the initialization state of the link failure state machine test model.

[0013] In one embodiment, the primitive tests for the NOS reception state and the NOS transmission state both include LR (Link Reset Primitive Sequence) test, LRR (Link Reset Response Primitive Sequence) test, IDLE (Link Active) test, NOS (Non-Operational Primitive Sequence) test, OLS (Offline Primitive Sequence) test, signal loss test, and out-of-sync time greater than the limit value test.

[0014] In an improved embodiment of the primitive test, the test method for signal loss is: the Test_Port port stops sending signals to the N_Port port, if it detects the NOS primitive sent by the N_Port port, it detects that the signal loss test is normal, otherwise it detects that the signal loss test is abnormal.

[0015] In another improved embodiment of the primitive test, the test method for out-of-sync time greater than the limit value is: the Test_Port port changes the port rate and keeps the duration of the NOS reception state or the NOS transmission state greater than the limit value, if it detects the NOS primitive sent by the N_Port port, the primitive test is normal when the out-of-sync time is greater than the limit value; otherwise the primitive test is abnormal.

[0016] In one embodiment, the method for enabling the test of the NOS receiving state is as follows: The Test_Port port sends a NOS primitive to the N_Port port. If the OLS primitive sent by the N_Port port is detected, the enabling test is normal; otherwise, the enabling test is incorrect.

[0017] The method for enabling the test of the NOS sending state is as follows: The Test_Port port stops sending signals to the N_Port port. If the NOS primitive sent by the N_Port port is detected, the enabling test is normal; otherwise, the enabling test is incorrect.

[0018] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0019] 1. Automatically detect the correctness of the execution of the FC link fault state machine;

[0020] 2. The core function of the FC port status test is applicable to the test of the execution of link faults of various types of FC port links;

[0021] 3. The state machine control is clear and easy to implement in hardware logic;

[0022] 4. Standard logic design, which can be applied to various FC port test devices. Description of the Drawings

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only for the present invention to more clearly illustrate the technical solutions of the embodiments of the present invention or the prior art. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0024] Figure 1 It is a flowchart of the method for testing the correctness of the execution of the FC link fault protocol in the specific implementation manner;

[0025] Figure 2 It is a schematic diagram of the logical jump of the link fault state machine test model in the FC link fault detection in the specific implementation manner. Specific Implementation Manner

[0026] The following will further describe the present invention in combination with specific embodiments, and the advantages and features of the present invention will become clearer as the description progresses. However, these embodiments are only exemplary and do not constitute any limitation to the scope of the present invention. Those skilled in the art should understand that without departing from the spirit and scope of the present invention, the details and forms of the technical solutions of the present invention can be modified or replaced, but these modifications and replacements all fall within the protection scope of the present invention.

[0027] In the description of this embodiment, it should be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present invention.

[0028] In addition, the terms "first", "second", "third", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first", "second", etc. may explicitly or implicitly include one or more of such features. In the description of the present invention, unless otherwise stated, the meaning of "a plurality" is two or more.

[0029] This specific embodiment discloses a method for testing the execution correctness of an FC link failure protocol. The testing method includes designing a link failure state machine test model and testing the execution correctness of the FC link failure protocol according to the link failure state machine test model.

[0030] The link failure state machine test model includes a detection device and a device under test. The N_Port port of the detection device is connected to the Test_Port port of the test device. The Test_Port port executes the FC link failure test protocol, and the N_Port port executes the FC link failure protocol. Moreover, the N_Port port and the Test_Port port perform primitive interaction and control, detect the state of the N_Port port, and test the execution correctness of the link failure protocol.

[0031] Further, as shown in Figure 1 the testing of the execution correctness of the FC link failure protocol according to the link failure state machine test model includes the following steps:

[0032] The link failure state machine test model enters the initialization state for initialization.

[0033] The Test_Port port judges the enable test completion flags of the NOS receive state and the NOS transmit state in the N_Port port, a total of two states.

[0034] If there is an untested state, it enters the enable test port corresponding to the untested state for enable testing, including: if the enable test is normal, it judges the completion flags of all primitives corresponding to this state; if the enable test is incorrect, it outputs the enable error signal of this state.

[0035] If there is a primitive test in the status that has not been performed, enter the primitive test port corresponding to the untested primitive for the primitive test, including: if the primitive test is normal, set the primitive test flag to valid; if the primitive test is incorrect, send a primitive error signal to the enable test port of this status;

[0036] After the enable tests for the NOS receive status and NOS transmit status of the N_Port port and all primitives in each status have been tested, output the relevant test results based on the enable test completion flag, primitive test completion flag, enable error signal, and primitive error signal; if the Test_Port port receives a start test signal, return to the initialization state of the link failure state machine test model.

[0037] In one embodiment, the primitive tests for the NOS receive status and NOS transmit status both include LR test, LRR test, IDLE test, NOS test, OLS test, signal loss test, and out-of-sync time greater than the limit test.

[0038] In an improved embodiment of the primitive test, the test method for signal loss is: the Test_Port port stops sending signals to the N_Port port. If the NOS primitive sent by the N_Port port is detected, it is detected that the signal loss test is normal; otherwise, the signal loss test is detected as abnormal.

[0039] In another improved embodiment of the primitive test, the test method for out-of-sync time greater than the limit is: the Test_Port port changes the port rate and maintains the duration of the NOS receive status or NOS transmit status greater than the limit. If the NOS primitive sent by the N_Port port is detected, the primitive test is normal when the out-of-sync time is greater than the limit; otherwise, the primitive test is abnormal.

[0040] In one embodiment, the enable test method for the NOS receive status is: the Test_Port port sends the NOS primitive to the N_Port port. If the OLS primitive sent by the N_Port port is detected, the enable detection is normal; otherwise, the enable detection is incorrect;

[0041] The enable test method for the NOS transmit status is: the Test_Port port stops sending signals to the N_Port port. If the NOS primitive sent by the N_Port port is detected, the enable detection is normal; otherwise, the enable detection is incorrect.

[0042] The following uses specific examples to illustrate the correct execution detection of the above FC link failure protocol. The link failure detection steps are as Figure 1 shown, and the specific steps are as follows:

[0043] Step 0: Initialization of the link failure state machine test model When powering on or resetting, initialization is performed. The initialization method is to synchronize the FC test port Test_Port of the test device with the FC port N_Port of the DUT. If the Active state is reached, the Test_Port port enters Step 1; otherwise, it stays in Step 0.

[0044] Step 1: Enable test selection.

[0045] Judge the enable test completion flags corresponding to the LF1 and LF2 states, and conduct tests in the two states in sequence; if the LF1 state test has not been performed, the Test_Port port enters Step 2; if the LF2 state test has not been performed, the Test_Port port enters State 11; if both the LF1 and LF2 state tests are completed, the Test_Port port enters Step 19.

[0046] Step 2: LF1 enable test.

[0047] Entering this step, control the Test_Port port of the test device to send a NOS primitive. If the OLS primitive sent by the N_Port of the DUT is detected, the Test_Port port enters Step 3; otherwise, the Test_Port port executes Step 0, reports a LF1 enable error, and sets the LF1 test completion flag to valid.

[0048] Step 3: LF1 primitive test selection.

[0049] Entering this step, the N_Port port of the DUT continuously sends an OLS primitive, and judge the test completion flags corresponding to the LR, LRR, IDLE, NOS, OLS, signal loss, and desynchronization time greater than the limit value tests, and conduct tests in the seven states in sequence; if the LR primitive test has not been performed, the Test_Port port enters Step 4; if the LRR primitive test has not been performed, the Test_Port port enters Step 5; if the IDLE primitive test has not been performed, the Test_Port port enters Step 6; if the NOS primitive test has not been performed, the Test_Port port enters Step 7; if the OLS primitive test has not been performed, the Test_Port port enters Step 8; if the signal loss test has not been performed, the Test_Port port enters Step 9; if the desynchronization time greater than the limit value test has not been performed, the Test_Port port enters Step 10; if all the LR, LRR, IDLE, NOS, OLS, signal loss, and desynchronization time greater than the limit value tests are completed, the Test_Port port executes Step 1 and sets the LF1 test completion flag to valid.

[0050] Step 4: Receive LR primitive test in LF1 state

[0051] Upon entering this step, the Test_Port sends an LR primitive. If it detects that the N_Port of the DUT sends an LRR primitive, the Test_Port executes Step 3, reports that the test for receiving the LR primitive in the LF1 state is normal, and sets the completion flag for the LR primitive test in the LF1 state to valid; otherwise, the Test_Port executes Step 2, reports that the test for receiving the LR primitive in the LF1 state is abnormal, and sets the completion flag for the LR primitive test in the LF1 state to valid.

[0052] Step 5: Test for receiving an LRR primitive in the LF1 state.

[0053] Upon entering this step, the Test_Port sends an LRR primitive. If it detects that the N_Port of the DUT continuously sends OLS within the R_T_TOV time and then sends a NOS primitive after the R_T_TOV timeout, the Test_Port executes Step 3, reports that the test for receiving the LRR primitive in the LF1 state is normal, and sets the completion flag for the LRR primitive test in the LF1 state to valid; otherwise, the Test_Port executes Step 2, reports that the test for receiving the LRR primitive in the LF1 state is abnormal, and sets the completion flag for the LRR primitive test in the LF1 state to valid.

[0054] Step 6: Test for receiving an IDLE primitive in the LF1 state.

[0055] Upon entering this step, the Test_Port sends an IDLE primitive. If it detects that the N_Port of the DUT sends an OLS primitive, the Test_Port executes Step 3, reports that the test for receiving the IDLE primitive in the LF1 state is normal, and sets the completion flag for the IDLE primitive test in the LF1 state to valid; otherwise, the Test_Port executes Step 2, reports that the test for receiving the IDLE primitive in the LF1 state is abnormal, and sets the completion flag for the IDLE primitive test in the LF1 state to valid.

[0056] Step 7: Test for receiving a NOS primitive in the LF1 state.

[0057] Upon entering this step, the Test_Port sends a NOS primitive. If it detects that the N_Port of the DUT sends an OLS primitive, the Test_Port executes Step 3, reports that the test for receiving the NOS primitive in the LF1 state is normal, and sets the completion flag for the NOS primitive test in the LF1 state to valid; otherwise, the Test_Port executes Step 2, reports that the test for receiving the NOS primitive in the LF1 state is abnormal, and sets the completion flag for the NOS primitive test in the LF1 state to valid.

[0058] Step 8: OLS primitive test received in LF1 state.

[0059] Upon entering this step, the Test_Port sends an OLS primitive. If it detects that the N_Port of the DUT sends an LR primitive, the Test_Port executes Step 3, reports that the OLS primitive test received in LF1 state is normal, and sets the OLS primitive test completion flag in LF1 state to valid; otherwise, the Test_Port executes Step 2, reports that the OLS primitive test received in LF1 state is abnormal, and sets the OLS primitive test completion flag in LF1 state to valid.

[0060] Step 9: Signal loss test detected in LF1 state.

[0061] Upon entering this step, the Test_Port stops signal transmission. If it detects that the N_Port of the DUT sends a NOS primitive, the Test_Port executes Step 3, reports that the signal loss test detected in LF1 state is normal, and sets the signal loss test completion flag in LF1 state to valid; otherwise, the Test_Port executes Step 2, reports that the signal loss test detected in LF1 state is abnormal, and sets the signal loss test completion flag in LF1 state to valid.

[0062] Step 10: Test for desynchronization time greater than the limit value detected in LF1 state.

[0063] Upon entering this step, the Test_Port changes the port rate and maintains this state for a duration greater than the limit value. If it detects that the N_Port of the DUT sends a NOS primitive, the Test_Port executes Step 3, reports that the test for desynchronization time greater than the limit value detected in LF1 state is normal, and sets the test completion flag for desynchronization time greater than the limit value detected in LF1 state to valid; otherwise, the Test_Port executes Step 2, reports that the test for desynchronization time greater than the limit value detected in LF1 state is abnormal, and sets the test completion flag for desynchronization time greater than the limit value detected in LF1 state to valid.

[0064] Step 11: LF2 enable test.

[0065] Upon entering this step, control the Test_Port of the test equipment to stop signal transmission. If it detects a NOS primitive sent by the N_Port of the DUT, the Test_Port enters Step 12; otherwise, the Test_Port executes state 0, reports an LF2 enable error, and sets the LF2 test completion flag to valid.

[0066] Step 12: LF2 primitive test selection.

[0067] Enter this step, and the N_Port port of the DUT keeps sending LR primitives. Judge the test completion flags corresponding to the tests of LR, LRR, IDLE, NOS, OLS, signal loss, and out-of-sync time greater than the limit value, and conduct tests under seven states in sequence; if the LR primitive test has not been carried out, the Test_Port port enters step 13; if the LRR primitive test has not been carried out, the Test_Port port enters step 14; if the IDLE primitive test has not been carried out, the Test_Port port enters step 15; if the NOS primitive test has not been carried out, the Test_Port port enters step 16; if the OLS primitive test has not been carried out, the Test_Port port enters step 17; if the signal loss test has not been carried out, the Test_Port port enters step 18; if the out-of-sync time greater than the limit value test has not been carried out, the Test_Port port enters step 19; if the seven tests of LR, LRR, IDLE, NOS, OLS, signal loss, and out-of-sync time greater than the limit value have all been completed, the Test_Port port executes step 1 and sets the LF2 test completion flag to valid.

[0068] Step 13: Receive LR primitive test in LF2 state.

[0069] Enter this step, the Test_Port sends an LR primitive. If it is detected that the N_Port port of the DUT keeps sending NOS primitives all the time, the Test_Port port executes step 12, reports that the LR primitive test received in the LF2 state is normal, and sets the LR primitive test completion flag in the LF2 state to valid; otherwise, the Test_Port port executes step 11, reports that the LR primitive test received in the LF2 state is abnormal, and sets the LR primitive test completion flag received in the LF2 state to valid.

[0070] Step 14: Receive LRR primitive test in LF2 state.

[0071] Enter this step, the Test_Port sends an LRR primitive. If it is detected that the N_Port port of the DUT still keeps sending NOS primitives all the time within the R_T_TOV time, the Test_Port port executes step 12, reports that the LRR primitive test received in the LF2 state is normal, and sets the LRR primitive test completion flag in the LF2 state to valid; otherwise, the Test_Port port executes step 11, reports that the LRR primitive test received in the LF2 state is abnormal, and sets the LRR primitive test completion flag received in the LF2 state to valid.

[0072] Step 15: Receive IDLE primitive test in LF2 state.

[0073] Entering this step, the Test_Port sends an IDLE primitive. If it detects that the N_Port of the DUT still keeps sending NOS primitives within the R_T_TOV time, the Test_Port executes Step 12, reports that the test of receiving the IDLE primitive in the LF2 state is normal, and sets the completion flag of the IDLE primitive test in the LF2 state to valid; otherwise, the Test_Port executes Step 11, reports that the test of receiving the IDLE primitive in the LF2 state is abnormal, and sets the completion flag of the IDLE primitive test received in the LF2 state to valid.

[0074] Step 16: Test for receiving NOS primitive in LF2 state.

[0075] Entering this step, the Test_Port sends a NOS primitive. If it detects that the N_Port of the DUT sends an OLS primitive, the Test_Port executes Step 12, reports that the test of receiving the NOS primitive in the LF2 state is normal, and sets the completion flag of the NOS primitive test in the LF2 state to valid; otherwise, the Test_Port executes Step 11, reports that the test of receiving the NOS primitive in the LF2 state is abnormal, and sets the completion flag of the NOS primitive test received in the LF2 state to valid.

[0076] Step 17: Test for receiving OLS primitive in LF2 state.

[0077] Entering this step, the Test_Port sends an OLS primitive. If it detects that the N_Port of the DUT sends an LR primitive, the Test_Port executes Step 12, reports that the test of receiving the OLS primitive in the LF2 state is normal, and sets the completion flag of the OLS primitive test in the LF2 state to valid; otherwise, the Test_Port executes Step 11, reports that the test of receiving the OLS primitive in the LF2 state is abnormal, and sets the completion flag of the OLS primitive test received in the LF2 state to valid.

[0078] Step 18: Test for detecting signal loss in LF2 state.

[0079] Entering this step, the Test_Port stops sending signals. If it detects that the N_Port of the DUT sends a NOS primitive, the Test_Port executes Step 12, reports that the test of detecting signal loss in the LF2 state is normal, and sets the completion flag of the signal loss test in the LF2 state to valid; otherwise, the Test_Port executes Step 11, reports that the test of detecting signal loss in the LF2 state is abnormal, and sets the completion flag of the signal loss test in the LF2 state to valid.

[0080] Step 19: Test for detecting that the out-of-sync time is greater than the limit value in LF2 state.

[0081] Entering this step, the Test_Port changes the port rate and maintains this state for a duration greater than the specified value. If it detects that the N_Port of the DUT sends a NOS primitive, the Test_Port executes step 12, reports that the test of detecting the out-of-sync time greater than the specified value in the LF2 state is normal, and sets the test completion flag of detecting the out-of-sync time greater than the specified value in the LF2 state to valid; otherwise, the Test_Port executes step 11, reports that the test of the out-of-sync time greater than the specified value in the LF2 state is abnormal, and sets the test completion flag of the out-of-sync time greater than the specified value in the LF2 state to valid.

[0082] Step 20: The test is completed.

[0083] Entering this step, judge the test completion flags of LF1 and LF2 and the test completion flags of receiving relevant primitives in the LF1 and LF2 states, and output the relevant test results. If a test start signal is received, set the relevant test completion flags to invalid, and the Test_Port executes state 0; otherwise, the state machine remains in step 20.

[0084] The method for testing the execution correctness of the FC link failure protocol designed by the present invention has the following advantages:

[0085] 1. Automatically detect the correctness of the execution of the FC link failure state machine;

[0086] 2. The core function of the FC port state test is applicable to the test of the execution of link failures of various types of FC ports;

[0087] 3. The state machine control is clear and easy to implement in hardware logic;

[0088] 4. Standard logic design, which can be applied to various FC port test devices.

[0089] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection scope of the present invention.

[0090] In addition, it should be understood that although this specification is described according to the embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A method for testing the execution correctness of an FC link failure protocol, characterized in that The test method includes designing a link fault state machine test model and testing the execution correctness of the FC link fault protocol according to the link fault state machine test model; The link fault state machine test model includes a detection device and a device under test. The N_Port port of the detection device is connected to the Test_Port port of the test device. The Test_Port port executes the FC link fault test protocol, and the N_Port port executes the FC link fault protocol. The N_Port port and the Test_Port port perform primitive interaction and control, detect the state of the N_Port port, and test the execution correctness of the link fault protocol; Among them, testing the execution correctness of the FC link fault protocol according to the link fault state machine test model includes the following steps: The link fault state machine test model enters the initialization state for initialization; The Test_Port port judges the enable test completion flag for the NOS receive state and the NOS transmit state in the N_Port port; If there is an untested state, enter the enable test port corresponding to the untested state for enable test, including: if the enable test is normal, judge the completion flag of all primitives corresponding to this state; if the enable test is incorrect, output the enable error signal for this state; If there is an untested primitive in the state, enter the primitive test port corresponding to the untested primitive for primitive test, including: if the primitive test is normal, set the primitive test flag to valid; if the primitive test is incorrect, send a primitive error signal to the enable test port of this state; After the enable tests for the NOS receive state and the NOS transmit state of the N_Port port and all primitives in each state are completed, output relevant test results according to the enable test completion flag, primitive test completion flag, enable error signal, and primitive error signal; if the Test_Port port receives a start test signal, return to the initialization state of the link fault state machine test model; Among them, the test method for signal loss test in the primitive tests of the NOS receive state and the NOS transmit state is: the Test_Port port stops sending signals to the N_Port port. If the NOS primitive sent by the N_Port port is detected, it is detected that the signal loss test is normal; otherwise, the Test_Port port jumps to execute the LF1 enable test, reports that the signal loss test is abnormal, and sets the signal loss test completion flag in the LF1 state to valid; The test method for signal loss test in the primitive test of NOS reception status and NOS transmission status is as follows: The test method for the out-of-sync time being greater than the limit value is: The Test_Port port changes the port rate and maintains the duration of the NOS reception status or NOS transmission status for a time greater than the limit value. If the NOS primitive sent by the N_Port end is detected, the primitive test is normal when the out-of-sync time is greater than the limit value; otherwise, the Test_Port port jumps to execute the LF1 enable test, reports an abnormal primitive test, and sets the test completion flag for the out-of-sync time greater than the limit value detected in the LF1 state to valid.

2. The method for testing the execution correctness of the FC link failure protocol according to claim 1, characterized in that: The primitive tests for both NOS reception status and NOS transmission status include LR test, LRR test, IDLE test, NOS test, OLS test, signal loss test, and out-of-sync time greater than limit value test.

3. The method for testing the execution correctness of the FC link failure protocol according to claim 1, characterized in that: The test method for enabling the NOS reception status is: The Test_Port port sends the NOS primitive to the N_Port port. If the OLS primitive sent by the N_Port port is detected, the enable detection is normal; otherwise, the enable detection is incorrect. The test method for enabling the NOS transmission status is: The Test_Port port stops sending signals to the N_Port port. If the NOS primitive sent by the N_Port port is detected, the enable detection is normal; otherwise, the enable detection is incorrect.

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