OLED display panel and preparation method thereof

Abstract

An embodiment of the present application discloses an OLED display panel and a preparation method thereof, wherein the OLED display panel includes a light-shielding layer, a flat layer, an anode layer, a light-emitting material layer, and a cathode layer. The light-shielding layer includes a light-shielding structure and a first structure arranged on the same layer. The anode layer includes an anode and a third structure arranged on the same layer. The first structure and the third structure located in the non-luminous area are electrically connected. The light-emitting material layer is arranged on a side of the anode layer away from the substrate. The cathode layer is arranged on a side of the light-emitting material layer away from the substrate. In the non-luminous area, the first structure is connected to a constant voltage, which is less than or equal to 20V. The light-emitting material layer is provided with a first via hole, and the cathode layer is electrically connected to the third structure through the first via hole. The cathode layer is electrically connected to the first structure to form a potential difference, so that the signal of the cathode layer is transmitted from the cathode layer to the first structure, thereby reducing the path length of the cathode layer signal transmission and reducing the voltage drop of the cathode layer.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to an OLED display panel and a method for preparing the same. Background Art

[0002] When manufacturing large-size OLED device panels, there is often a large cathode voltage drop, which has a great impact on the Vss voltage and seriously affects the display effect. Analysis shows that one of the reasons for the large cathode voltage drop is that the cathode layer signal of the TFT device needs to be transmitted from the TFT device to the edge of the panel due to the long signal transmission path, resulting in severe signal attenuation.

[0003] At the same time, silver ions will precipitate and migrate in the silver layer in the anode layer. The migration of silver ions is a special phenomenon of electrochemical corrosion and can easily cause defects.

[0004] Therefore, the existing OLED display panel has a technical problem that the cathode layer signal transmission path is long, resulting in serious signal loss. Summary of the Invention

[0005] The embodiments of the present application provide an OLED display panel and a method for manufacturing the same, which can alleviate the technical problem of the existing OLED display panel in which the cathode layer signal transmission path length is long, resulting in serious signal loss.

[0006] An embodiment of the present application provides an OLED display panel, including a light-emitting area and a non-light-emitting area. The OLED display panel includes:

[0007] An array substrate, the array substrate comprising a substrate, a light shielding layer disposed above the substrate, and a source-drain electrode layer disposed on a side of the light shielding layer away from the substrate, the light shielding layer comprising a light shielding structure and a first structure disposed in the same layer, the source-drain electrode layer comprising a source electrode, a drain electrode, and a second structure disposed in the same layer, the first structure and the second structure being located in the non-luminous area;

[0008] a planarization layer, the planarization layer being arranged on a side of the source and drain electrode layer away from the substrate;

[0009] an anode layer, the anode layer being arranged on a side of the planar layer away from the substrate, the anode layer comprising an anode and a third structure arranged in the same layer, the third structure being located in the non-luminescent region;

[0010] a light-emitting material layer, the light-emitting material layer being disposed on a side of the anode layer away from the substrate;

[0011] a cathode layer, the cathode layer being disposed on a side of the light-emitting material layer away from the substrate;

[0012] The second structure is electrically connected to the first structure, the third structure is electrically connected to the second structure, the light-emitting material layer is provided with a first via hole extending therethrough, and the cathode layer is electrically connected to the third structure through the first via hole.

[0013] Optionally, in some embodiments of the present application, the third structure is a double-layer stacked structure, the double-layer stacked structure including a first transparent conductive layer and a silver layer arranged on a side of the first transparent conductive layer away from the substrate, the silver layer including a main body located on the surface of the first transparent conductive layer, an extension portion connected to the main body and located in the via hole, and the extension portion is connected to the cathode layer.

[0014] Optionally, in some embodiments of the present application, the OLED display panel further includes a plurality of TFT devices, and the first structure, the second structure, and the third structure constitute a whole that are arranged in a one-to-one correspondence with the TFT devices.

[0015] Optionally, in some embodiments of the present application, the light-emitting material layer is in surface contact with the cathode layer, and the silver layer penetrates the light-emitting material layer and is in edge contact with the cathode layer.

[0016] Optionally, in some embodiments of the present application, the third structure is connected in parallel with the cathode layer.

[0017] The present invention provides a method for manufacturing an OLED display panel, including:

[0018] A substrate is provided, and a light shielding layer, an interlayer insulating layer, and a source-drain electrode layer are sequentially formed over the substrate, wherein the light shielding layer includes a light shielding structure and a first structure arranged in the same layer, and the source-drain electrode layer includes a source electrode, a drain electrode, and a second structure arranged in the same layer, and the second structure is electrically connected to the first structure;

[0019] preparing a flat layer on a side of the source and drain electrode layer away from the substrate;

[0020] The anode layer is prepared on a side of the flat layer away from the substrate, wherein the anode layer includes an anode and a third structure arranged in the same layer, and the third structure is electrically connected to the second structure;

[0021] A light-emitting material layer is prepared on a side of the anode layer away from the substrate, and a first via hole is formed in a non-light-emitting area that penetrates the light-emitting material layer;

[0022] A cathode layer is prepared on a side of the light-emitting material layer away from the substrate, wherein the cathode layer is electrically connected to the third structure through the first via hole.

[0023] Optionally, in some embodiments of the present application, the step of preparing the anode layer on a side of the flat layer away from the substrate further comprises:

[0024] The anode and the third structure are prepared by a half-tone mask. The anode includes a three-layer stacked structure, and the third structure includes a double-layer stacked structure, wherein the double-layer stacked structure includes a first transparent conductive layer and a silver layer arranged on a side of the first transparent conductive layer away from the substrate.

[0025] Optionally, in some embodiments of the present application, the step of preparing the anode and the third structure by using a half-tone mask further includes:

[0026] The OLED display panel includes a light-emitting area and a non-light-emitting area. A photoresist structure is prepared and shielded by the photoresist structure. A first transparent conductive layer, a silver layer, and a second transparent conductive layer are deposited. The thickness of the photoresist structure in the non-light-emitting area is reduced by a half-tone mask. The second transparent conductive layer at the third structure is removed using a first etching solution to form a double-layer stacked structure of the third structure.

[0027] Optionally, in some embodiments of the present application, the step of forming a first via hole penetrating the light-emitting material layer includes:

[0028] A voltage is applied to the silver layer to accelerate the migration of silver ions in the silver layer toward the cathode layer. The silver ions penetrate the light-emitting material layer through migration to form the first via hole.

[0029] Optionally, in some embodiments of the present application, the step of preparing the interlayer insulating layer includes: using another half-tone mask to simultaneously complete the etching of the source via, the drain via, and the third via that passes through the interlayer insulating layer and the buffer layer.

[0030] Beneficial effect: By forming a first via hole above the third structure in the non-luminous area, the cathode layer is electrically connected to the third structure. At the same time, the third structure, the second structure, and the first structure are electrically connected to each other to form a conductive path. The signal of the cathode layer is transmitted from the cathode layer along the conductive path to the first structure, reducing the path length of the cathode layer signal transmission, thereby reducing the cathode layer voltage drop. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0032] Figure 1 This is a first cross-sectional schematic diagram of the OLED display panel provided in this application;

[0033] Figure 2 This is a second cross-sectional schematic diagram of the OLED display panel provided in this application;

[0034] Figure 3 It is a flow chart of the method for preparing an OLED display panel provided in this application.

[0035] Description of reference numerals:

[0036] DETAILED DESCRIPTION

[0037] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; and "inside" and "outside" refer to the outline of the device.

[0038] See also Figure 1The present application provides an OLED display panel 1, comprising a light-emitting area and a non-light-emitting area. The OLED display panel 1 comprises an array substrate, a flat layer 100, an anode layer 10, a light-emitting material layer, and a cathode layer 130. The array substrate comprises a substrate 20, a light-shielding layer 30 disposed above the substrate 20, and a source-drain electrode layer 90 disposed on a side of the light-shielding layer 30 away from the substrate 20. The light-shielding layer 30 comprises a light-shielding structure 301 and a first structure 302 disposed on the same layer. The source-drain electrode layer 90 comprises a source electrode 901, a drain electrode 902, and a second structure 903 disposed on the same layer. The first structure 302 and the second structure 903 are located in the non-light-emitting area. The second structure 903 is electrically connected to the first structure 302. The flat layer 100 is disposed on the source and drain electrodes. The layer 90 is located on a side away from the substrate 20, the anode layer 10 is located on a side of the flat layer 100 away from the substrate 20, the anode layer 10 includes an anode 104 and a third structure 105 arranged on the same layer, the third structure 105 is located in the non-luminous area, the third structure 105 is electrically connected to the second structure 903, the luminescent material layer is located on a side of the anode layer 10 away from the substrate 20, the cathode layer 130 is located on a side of the luminescent material layer away from the substrate 20, wherein, in the non-luminous area, the first structure 302 is connected to a certain voltage, the certain voltage is less than or equal to 20V, the luminescent material layer is provided with a first via hole H1, and the cathode layer 130 is electrically connected to the third structure 105 through the first via hole H1.

[0039] The third structure 105 may be a double-layer stacked structure or a triple-layer stacked structure.

[0040] Furthermore, this application will also start from basic disciplines and structural design, cleverly migrate Ag to reduce cathode voltage drop, and fully transform the migration of silver ions, which was originally harmful in the industry, into a beneficial one.

[0041] In this embodiment, a first via H1 is formed above the third structure 105 in the non-luminous area to electrically connect the cathode layer 130 to the first structure 302. Then, a constant voltage is connected to the first structure 302 to electrically connect the cathode layer 130 to the first structure 302 and form a potential difference. This allows the signal of the cathode layer 130 to be transmitted from the cathode layer 130 to the first structure 302, thereby reducing the path length of the signal transmission of the cathode layer 130 and thereby reducing the voltage drop of the cathode layer 130.

[0042] The technical solution of this application is now described in conjunction with specific embodiments.

[0043] The fixed voltage, stacked structure, size, selected materials, shape, etc. of this application are only described in terms of the best or preferred implementation methods. Other lesser implementation methods should also fall within the scope of protection of the present invention and will not be described in detail here. It should be noted that when the third structure 105 is a three-layer stacked structure, the silver layer 102 can also be other metal layers, which will not be described in detail here.

[0044] In one embodiment, see Figure 1 The third structure 105 is connected to the second structure 903 through a second via H2, and the second structure 903 is connected to the first structure 302 through a third via H3.

[0045] In which, the array substrate also includes a buffer layer 40 arranged on the side of the light-shielding layer 30 away from the substrate 20, an active layer 50 arranged on the side of the buffer layer 40 away from the substrate 20, a gate insulation layer 60 arranged on the side of the active layer 50 away from the substrate 20, a gate layer 70 arranged on the side of the gate insulation layer 60 away from the substrate 20, an interlayer insulation layer 80 arranged on the side of the gate layer 70 away from the substrate 20, a source-drain layer 90 arranged on the side of the interlayer insulation layer 80 away from the substrate 20, a passivation layer arranged on the side of the source-drain layer 90 away from the substrate 20, a flat layer 100 arranged on the side of the passivation layer away from the substrate 20, and an anode layer 10 arranged on the side of the flat layer 100 away from the substrate 20.

[0046] The buffer layer 40 may be made of at least one of silicon nitride and silicon oxide.

[0047] The second via hole H2 is provided through the planar layer 100 and the passivation layer.

[0048] The third via hole H3 is provided through the buffer layer 40 and the interlayer insulating layer 80 .

[0049] It can be understood that the second structure 903 plays the role of transition connection, dividing the connecting via between the first structure 302 and the third structure 105 into the second via H2 and the third via H3, and forming the second via H2 and the third via H3 respectively through a two-step process to improve the yield of the vias.

[0050] In this embodiment, the third structure 105 is electrically connected to the second structure 903 through the second via H2, and the second structure 903 is electrically connected to the first structure 302 through the third via H3, so that the second via H2 and the third via H3 are formed separately, thereby improving the yield of the vias.

[0051] In one embodiment, see Figure 2The third structure 105 is a double-layer stacked structure, which includes a first transparent conductive layer 101 and a silver layer 102 arranged on the side of the first transparent conductive layer 101 away from the substrate 20. The silver layer 102 includes a main body, an extension portion connected to the main body and located in the via hole, and the extension portion is connected to the cathode layer 130.

[0052] The size of the extension portion may be smaller than the size of the first via hole H1.

[0053] It is understandable that the extension portion can be formed by the migration of silver ions in the silver layer 102 , and the first via hole H1 can be formed by corrosion of the silver ions in the silver layer 102 , thereby saving one photomask.

[0054] It can be understood that the first transparent conductive layer 101 is arranged on the side of the silver layer 102 close to the substrate 20, and the first transparent conductive layer 101 blocks the migration of silver ions toward the substrate 20, thereby preventing the film layer of the first transparent conductive layer 101 facing the substrate 20 from being corroded.

[0055] It should be noted that the third structure 105 can also be a single-layer structure, and the single-layer structure is the silver layer 102; the diffusion of silver particles can corrode the pixel definition layer 110 and the light-emitting material layer 120 to form the first via H1, without the need for an additional mask to form the first via H1.

[0056] In this embodiment, a silver layer 102 is provided on a side of the third structure 105 away from the substrate 20, and when power is applied, silver ions in the silver layer 102 migrate to corrode the upper light-emitting material layer, thereby forming the required first via H1. This reduces the cathode voltage drop while saving a photomask, thereby reducing costs.

[0057] In one embodiment, the first structure 302 is grounded, and the fixed voltage is 0V.

[0058] It can be understood that one end of the first structure 302 is grounded and the other end is electrically connected to the cathode layer 130. At this time, the potential difference is the largest, making it easier for the current to be guided to the path from the cathode layer 130 to the third structure 105 to the second structure 903 to the first structure 302. Compared with the cathode layer 130 set on the entire surface, the path for the cathode layer 130 to transmit signals is obviously reduced, and the voltage drop of the cathode layer 130 is reduced.

[0059] In this embodiment, by grounding the first structure 302 , the potential difference between the cathode layer 130 and the first structure 302 is further increased, so that the current signal of the cathode layer 130 is more easily guided to flow toward the first structure 302 .

[0060] In one embodiment, the cross-section of the first via hole H1 is irregular.

[0061] It can be understood that when the first via hole H1 is formed by silver ion corrosion, its corresponding cross-sectional shape is irregular.

[0062] Furthermore, the first via hole H1 can also be formed by hollowing out a plurality of sieve holes in the light-emitting material layer, that is, the light-emitting material layer in part of the first via hole H1 is hollowed out using silver ions, thereby forming multiple contacts between the silver layer 102 and the edge of the cathode layer 130.

[0063] In one embodiment, the light-emitting material layer 120 is in surface contact with the cathode layer 130 , and the silver layer 102 penetrates the light-emitting material layer and is in edge contact with the cathode layer 130 .

[0064] It is understandable that edge contact is defined as: the position where the light emitting material layer 120 contacts the cathode layer 130 is not conductive, and the position where the silver layer 102 contacts the cathode layer 130 is conductive.

[0065] In one embodiment, the OLED display panel 1 includes a plurality of TFT devices, and any of the TFT devices is provided with a corresponding third structure 105, a second structure 903, and a first structure 302; and the third structure 105 is electrically connected to the cathode layer 130 through a first via H1, and the first structure 105, the second structure 903, and the third structure 302 are electrically connected to each other.

[0066] Among them, the third structure 105 can be arranged close to the TFT device. It can be understood that the third structure 105 can lead the cathode layer 130 current signal of the corresponding TFT device to the first structure, thereby further reducing the path length of the cathode layer 130 current transmission.

[0067] It should be noted that the third structure 105 may also be connected in parallel with the cathode layer 130 , thereby reducing the impedance of the cathode layer 103 and further reducing the voltage drop of the cathode layer 103 .

[0068] In this embodiment, the entire structure consisting of the third structure 105 , the second structure 903 , and the first structure 302 is arranged in a one-to-one correspondence with the TFT device, thereby further reducing the length of the current transmission path of the cathode layer 130 .

[0069] See also Figure 3 The method for preparing the OLED display panel 1 provided in the embodiment of the present application includes:

[0070] S1: Providing a substrate 20, and sequentially forming a light shielding layer 30 and a source-drain electrode layer 90 on the substrate 20, wherein the light shielding layer 30 includes a light shielding structure 301 and a first structure 302 arranged in the same layer, and the source-drain electrode layer 90 includes a source electrode 901, a drain electrode 902, and a second structure 903 arranged in the same layer, and the second structure 903 is electrically connected to the first structure 302;

[0071] S2: preparing a flat layer 100 on a side of the source / drain electrode layer 90 away from the substrate 20;

[0072] S3: preparing the anode layer 10 on a side of the flat layer 100 away from the substrate 20, wherein the anode layer 10 includes an anode 104 and a third structure 105 provided in the same layer, and the third structure 105 is electrically connected to the second structure 903;

[0073] S4: preparing a light-emitting material layer on a side of the anode layer 10 away from the substrate 20 , and forming a first via hole H1 penetrating the light-emitting material layer in a non-light-emitting area;

[0074] S5: preparing a cathode layer 130 on a side of the light-emitting material layer away from the substrate 20 , wherein the cathode layer 130 is electrically connected to the third structure 105 through the first via hole H1 .

[0075] In one embodiment, the step of preparing the anode layer 10 on the side of the flat layer 100 away from the substrate 20 further includes: preparing the anode 104 and the third structure 105 by using a half-tone mask, wherein the anode 104 includes a three-layer stacked structure, and the third structure 105 includes a double-layer stacked structure, wherein the double-layer stacked structure includes a first transparent conductive layer 101 and a silver layer 102 arranged on the side of the first transparent conductive layer 101 away from the substrate 20.

[0076] In one embodiment, the step of preparing the anode 104 and the third structure 105 through a half-tone mask plate also includes: the OLED display panel 1 includes a light-emitting area and a non-light-emitting area, the photoresist structure is prepared and blocked by the photoresist structure, and a first transparent conductive layer 101, a silver layer 102, and a second transparent conductive layer 103 are deposited to form the first transparent conductive layer 101, the silver layer 102, and the second transparent conductive layer 103, the thickness of the photoresist structure in the non-light-emitting area is reduced by a half-tone mask plate, and the second transparent conductive layer 103 at the third structure 105 is removed by using a first etching solution to form a double-layer stacked structure of the third structure 105.

[0077] The first transparent conductive layer 101 is used to block the silver ions in the silver layer 102 from migrating toward the substrate 20 , thereby preventing the film layer of the silver layer 102 facing the substrate 20 from being corroded.

[0078] The first etching solution may be at least one of oxalic acid and phosphoric acid. The first etching solution must be capable of only removing the first transparent conductive layer 101 without removing the silver layer 102 .

[0079] The first transparent conductive layer 101 may be at least one of indium zinc oxide and indium tin oxide, and the second transparent conductive layer 103 may be at least one of indium zinc oxide and indium tin oxide.

[0080] In this embodiment, by forming a double-layer stacked structure of the third structure 105, with the silver layer 102 on the side away from the substrate 20, the first via H1 can be formed by utilizing the migration corrosion of silver ions when power is applied, thereby saving one photomask.

[0081] For example, in one embodiment, the step of forming a first via hole H1 penetrating the light-emitting material layer includes: applying a voltage to the silver layer 102 to cause silver ions in the silver layer 102 to migrate toward the cathode layer 130, and the silver ions penetrate the light-emitting material layer through migration to form the first via hole H1.

[0082] In one embodiment, the first via hole H1 passes through the pixel definition layer 110 and the light-emitting material layer 120 disposed on a side of the pixel definition layer 110 away from the substrate 20 .

[0083] In one embodiment, when the interlayer insulating layer 80 is prepared, another half-tone mask can be used to simultaneously etch the source via, drain via, and the third via H3 that penetrates the interlayer insulating layer 80 and the buffer layer 40.

[0084] The source via hole and the drain via hole are respectively used to connect the source electrode 901 and the drain electrode 902 to the active layer 50 .

[0085] The present application also proposes a display module and a display device, both of which include the above-mentioned OLED display panel, which will not be described in detail here.

[0086] The OLED display panel provided by this embodiment includes an array substrate, a flat layer, an anode layer, a light-emitting material layer, and a cathode layer. The array substrate includes a substrate, a light-shielding layer arranged above the substrate, and a source-drain electrode layer arranged on the side of the light-shielding layer away from the substrate. The light-shielding layer includes a light-shielding structure and a first structure arranged on the same layer. The source-drain electrode layer includes a source electrode, a drain electrode, and a second structure arranged on the same layer. The first structure and the second structure are located in the non-luminous area. The second structure is electrically connected to the first structure. The flat layer is arranged on the side of the source-drain electrode layer away from the substrate. The anode layer is arranged on the side of the flat layer away from the substrate. The anode layer includes an anode and a third structure arranged on the same layer. The third structure is located in the non-luminous area. The structure is electrically connected to the second structure, the light-emitting material layer is arranged on the side of the anode layer away from the substrate, and the cathode layer is arranged on the side of the light-emitting material layer away from the substrate, wherein, in the non-light-emitting area, the first structure is connected to a certain voltage, and the certain voltage is less than or equal to 20V, the light-emitting material layer is provided with a first via hole, and the cathode layer is electrically connected to the third structure through the first via hole; by forming a first via hole above the third structure in the non-light-emitting area, the cathode layer is electrically connected to the first structure, and then by connecting a certain voltage to the first structure, the cathode layer is electrically connected to the first structure and a potential difference is formed, so that the signal of the cathode layer is transmitted from the cathode layer to the first structure, reducing the path length of the cathode layer signal transmission, thereby reducing the cathode layer voltage drop.

[0087] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0088] The above is a detailed introduction to the OLED display panel and the method for preparing an OLED display panel provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for those skilled in the art, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. An OLED display panel comprising a light-emitting area and a non-light-emitting area, characterized in that: The OLED display panel includes: An array substrate, the array substrate comprising a substrate, a light shielding layer disposed above the substrate, and a source-drain electrode layer disposed on a side of the light shielding layer away from the substrate, the light shielding layer comprising a light shielding structure and a first structure disposed in the same layer, the source-drain electrode layer comprising a source electrode, a drain electrode, and a second structure disposed in the same layer, the first structure and the second structure being located in the non-luminous area; a planarization layer, the planarization layer being arranged on a side of the source and drain electrode layer away from the substrate; an anode layer, the anode layer being arranged on a side of the planar layer away from the substrate, the anode layer comprising an anode and a third structure arranged in the same layer, the third structure being located in the non-luminescent region; a light-emitting material layer, the light-emitting material layer being disposed on a side of the anode layer away from the substrate; a cathode layer, the cathode layer being disposed on a side of the light-emitting material layer away from the substrate; The second structure is electrically connected to the first structure, the third structure is electrically connected to the second structure, the light-emitting material layer is provided with a first via hole extending therethrough, and the cathode layer is electrically connected to the third structure through the first via hole; The third structure is a double-layer stacked structure, which includes a first transparent conductive layer and a silver layer arranged on the side of the first transparent conductive layer away from the substrate. The silver layer includes a main body located on the surface of the first transparent conductive layer, an extension portion connected to the main body and located in the first via hole, and the extension portion is connected to the cathode layer.

2. The OLED display panel according to claim 1, wherein: The OLED display panel further includes a plurality of TFT devices, and the first structure, the second structure, and the third structure constitute a whole that are arranged in a one-to-one correspondence with the TFT devices.

3. The OLED display panel according to claim 1, wherein: The light-emitting material layer is in surface contact with the cathode layer, and the silver layer penetrates the light-emitting material layer and is in edge contact with the cathode layer.

4. The OLED display panel according to claim 1, wherein: The third structure is connected in parallel with the cathode layer.

5. A method for preparing an OLED display panel, characterized in that: include: A substrate is provided, and a light shielding layer, an interlayer insulating layer, and a source-drain electrode layer are sequentially formed on the substrate, wherein the light shielding layer includes a light shielding structure and a first structure arranged in the same layer, and the source-drain electrode layer includes a source electrode, a drain electrode, and a second structure arranged in the same layer, and the second structure is electrically connected to the first structure; preparing a flat layer on a side of the source and drain electrode layer away from the substrate; An anode layer is prepared on a side of the flat layer away from the substrate, wherein the anode layer includes an anode and a third structure provided in the same layer, and the third structure is electrically connected to the second structure; A light-emitting material layer is prepared on a side of the anode layer away from the substrate, and a first via hole is formed in a non-light-emitting area that penetrates the light-emitting material layer; A cathode layer is prepared on a side of the light-emitting material layer away from the substrate, wherein the cathode layer is electrically connected to the third structure through the first via hole; Among them, the third structure is a double-layer stacked structure, which includes a first transparent conductive layer and a silver layer located on the side of the first transparent conductive layer away from the substrate. The silver layer includes a main body located on the surface of the first transparent conductive layer, an extension portion connected to the main body and located in the first via hole, and the extension portion is connected to the cathode layer.

6. The method for preparing an OLED display panel according to claim 5, wherein: The step of preparing an anode layer on a side of the flat layer away from the substrate further comprises: The anode and the third structure are prepared by using a half-tone mask, and the anode includes a three-layer stacked structure.

7. The method for preparing an OLED display panel according to claim 6, wherein: The step of preparing the anode and the third structure by using a half-tone mask plate further includes: The OLED display panel includes a light-emitting area and a non-light-emitting area. A photoresist structure is prepared and shielded by the photoresist structure. A first transparent conductive layer, a silver layer, and a second transparent conductive layer are deposited. The thickness of the photoresist structure in the non-light-emitting area is reduced by a half-tone mask. The second transparent conductive layer at the third structure is removed using a first etching solution to form a double-layer stacked structure of the third structure.

8. The method for preparing an OLED display panel according to claim 7, wherein: The step of forming a first via hole penetrating the light-emitting material layer includes: A voltage is applied to the silver layer to accelerate the migration of silver ions in the silver layer toward the cathode layer. The silver ions penetrate the light-emitting material layer through migration to form the first via hole.

9. The method for preparing an OLED display panel according to claim 5, wherein: The step of preparing the interlayer insulating layer includes: using another half-tone mask to simultaneously complete the etching of the source via hole, the drain via hole, and the third via hole penetrating the interlayer insulating layer and the buffer layer.

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