A circuit and method for measuring pA-level current and quickly judging threshold value of a super-insulation meter

Abstract

The present invention discloses a circuit and method for measuring pA-level current and quickly judging a threshold value of a super-insulation meter. In the circuit provided by the present invention, a control unit controls a relay drive circuit according to different ceramic capacitors to adjust the capacitance value and resistance value. An integrating operational amplifier outputs a curve of the integral voltage of a capacitor group with respect to the integral time after time integration of the current of the ceramic capacitor. Then, an analog-to-digital conversion circuit collects the sampled values ​​of the curve in real time. The control unit quickly determines the insulation resistance and test current of the ceramic capacitor based on the sampled values ​​and the relationship between the integral voltage and the voltage across the ceramic capacitor. In addition, the final voltage of the integral voltage can be determined based on the curve and compared with a preset threshold voltage. The performance status of the ceramic capacitor can be quickly judged based on the comparison result, thereby realizing efficient detection of the ceramic capacitor using a simple measurement circuit with fewer components. The present invention can be applied to the field of ceramic capacitor detection.

Description

Technical Field

[0001] The present invention relates to the technical field of detecting ceramic capacitors, and in particular to a circuit and method for measuring pA-level current and quickly judging a threshold value using a super-insulation meter. Background Art

[0002] MLCCs (Multi-layer Ceramic Capacitors) are chip-type multilayer ceramic capacitors. They are made by stacking ceramic dielectric diaphragms with printed electrodes (inner electrodes) in an offset manner. After a one-time high-temperature sintering process, they form a ceramic chip. A metal layer (outer electrode) is then sealed at both ends of the chip, forming a structure similar to a monolith. Ceramic capacitor devices are widely used in mobile phones, audio and video equipment, computers, automobiles, and other industrial and medical fields. The demand for ceramic capacitors is gradually increasing, so it is necessary to test whether ceramic capacitors meet the requirements for safe use. Insulation resistance and current are important parameters for detecting defective ceramic capacitors. However, existing testing instruments have complex processes, numerous components, and a relatively complicated testing process, making it difficult to widely use.

[0003] Therefore, a detection scheme for measuring the insulation resistance and current of ceramic capacitors and being able to quickly judge the performance status of ceramic capacitors is of great research significance. Summary of the Invention

[0004] In view of this, an embodiment of the present invention provides a simple and efficient circuit and method for measuring pA-level current and quickly judging a threshold value of a super-insulation meter.

[0005] An embodiment of the present invention provides a super-insulation meter pA-level current measurement and threshold rapid judgment circuit, including:

[0006] A charge clearing circuit for releasing the charge of the capacitor bank to zero;

[0007] An input unit, configured to receive configuration parameters determined by a user for the capacitor group and / or resistor group;

[0008] a relay driving circuit, configured to control the capacitor group and / or the relays corresponding to the resistor group according to the configuration parameters, so as to configure the capacitance value of the capacitor group and / or the resistance value of the resistor group;

[0009] A power supply for supplying power to the ceramic capacitors;

[0010] an integrating operational amplifier, configured to output a curve of the integrated voltage of the capacitor group with respect to the integration time after integrating the current of the ceramic capacitor over time;

[0011] an analog-to-digital conversion circuit, configured to collect sampling values ​​of the curve;

[0012] a threshold comparison circuit, for determining the performance status of the ceramic capacitor;

[0013] Control unit for:

[0014] Determining a configuration of the resistor group according to the configuration parameters, and determining a relationship between an integrated voltage of the capacitor group and a voltage across the ceramic capacitor according to the configuration;

[0015] The insulation resistance and the test current of the ceramic capacitor are determined according to the relationship and the sampled value.

[0016] in:

[0017] The control unit is respectively connected to the input unit, the threshold comparison circuit, the analog-to-digital conversion circuit, the power supply, the charge clearing circuit and the relay drive circuit; the integrating operational amplifier is respectively connected to the ceramic capacitor, the analog-to-digital conversion circuit, the threshold comparison circuit, the capacitor group and the resistor group; the relay drive circuit is respectively connected to the capacitor group and the resistor group; the charge clearing circuit is connected to the capacitor group; and the power supply is connected to the ceramic capacitor.

[0018] Preferably, the threshold comparison circuit includes:

[0019] a first threshold comparison circuit, a second threshold comparison circuit, a third threshold comparison circuit, and a fourth threshold comparison circuit.

[0020] Preferably,

[0021] The first threshold comparison circuit and the second threshold comparison circuit form a positive voltage comparison window for comparing a first integrated voltage output after the negative current of the ceramic capacitor is integrated over a first integration time;

[0022] The third threshold comparison circuit and the fourth threshold comparison circuit form a negative voltage comparison window for comparing a second integrated voltage output after the positive current of the ceramic capacitor is integrated over a second integration time.

[0023] Another aspect of the present invention provides a method for measuring pA-level current and quickly determining a threshold value using a super-insulation meter, which is applied to a control unit in the above-mentioned circuit for measuring pA-level current and quickly determining a threshold value using a super-insulation meter. The method includes:

[0024] Turning on the charge clearing circuit to release the charge of the capacitor group to zero, and turning off the charge clearing circuit after the charge of the capacitor group is released to zero to start charging the capacitor group;

[0025] Determining a configuration of the resistor group according to configuration parameters input by a user through an input unit, and determining a relationship between an integral voltage of the capacitor group and a voltage across the ceramic capacitor according to the configuration;

[0026] obtaining a curve of the integrated voltage of the capacitor group with respect to the integration time after the current of the ceramic capacitor is integrated over time by an integrating operational amplifier, and determining a final voltage of the integrated voltage according to the curve;

[0027] Determining a sampling value collected by an analog-to-digital conversion circuit for the curve;

[0028] Determining the insulation resistance and the test current of the ceramic capacitor according to the relationship and the sampled value;

[0029] The performance state of the ceramic capacitor is determined according to a comparison result between the final voltage and a threshold voltage of a preset threshold comparison circuit.

[0030] Preferably, the determining of the relationship between the integrated voltage of the capacitor group and the voltage across the ceramic capacitor according to the configuration includes:

[0031] If the relays of the resistor group are all disconnected, a first relationship between the integral voltage of the capacitor group and the voltage across the ceramic capacitor is derived according to Kirchhoff's current law;

[0032] If the relays of the resistor group are configured to be closed, a second relationship between the integrated voltage of the capacitor group and the voltage across the ceramic capacitor is derived according to Kirchhoff's current law.

[0033] Preferably, determining the insulation resistance and the test current of the ceramic capacitor according to the relationship and the sampled value includes:

[0034] If the relays of the resistor group are all disconnected, obtaining a first curve of the integrated voltage of the capacitor group with respect to the integration time, and a first sampled value of the first curve collected by the analog-to-digital conversion circuit, and determining a first insulation resistance and a first test current of the ceramic capacitor according to the first relationship and the first sampled value;

[0035] If the relay of the resistor group is configured to be closed, a second curve of the integral voltage of the capacitor group with respect to the integral time and a second sampling value of the second curve collected by the analog-to-digital conversion circuit are obtained, and the second insulation resistance and the second test current of the ceramic capacitor are determined based on the second relationship and the second sampling value.

[0036] Preferably, determining the performance state of the ceramic capacitor according to a comparison result between the final voltage and a threshold voltage of a preset threshold comparison circuit includes:

[0037] Determining a performance state of the ceramic capacitor at a positive threshold value based on a comparison result between the final voltage and a preset positive threshold voltage;

[0038] The performance state of the ceramic capacitor at the negative threshold is determined according to a comparison result between the final voltage and a preset negative threshold voltage.

[0039] Another aspect of an embodiment of the present invention further provides an electronic device, including a processor and a memory;

[0040] The memory is used to store programs;

[0041] The processor executes the program to implement the above method.

[0042] Another aspect of an embodiment of the present invention further provides a computer-readable storage medium, wherein the storage medium stores a program, and the program is executed by a processor to implement the above method.

[0043] The present invention also discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium and execute the computer instructions, causing the computer device to perform the above method.

[0044] The circuit provided by the present invention has a control unit that can control a relay drive circuit to adjust the capacitance and resistance values ​​of a capacitor group, so that the present invention can ensure that the specific values ​​of the capacitor group and the resistor group match the ceramic capacitor being measured according to the different capacitance and resistance values ​​configured for different ceramic capacitors. In particular, it can achieve low current measurement at the pA level. Moreover, the integrating operational amplifier can output a curve of the integral voltage of the capacitor group with respect to the integral time after the current of the ceramic capacitor is integrated over time, and the analog-to-digital conversion circuit can collect the sampled values ​​of the curve in real time. The control unit can quickly determine the insulation resistance and test current of the ceramic capacitor based on the sampled value and the relationship between the integral voltage and the voltage across the ceramic capacitor, thereby achieving efficient measurement of the insulation resistance and current of the ceramic capacitor using a simple measurement circuit with fewer components. In addition, the final voltage of the ceramic capacitor after integration can be obtained through the integrating operational amplifier, and the performance threshold of the ceramic capacitor can be quickly determined based on the final voltage and the threshold comparison circuit. Based on this performance threshold, the performance status of the ceramic capacitor can be simply and efficiently determined. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0046] Figure 1 A structural block diagram of a pA-level current measurement and threshold rapid judgment circuit for a super-insulation meter provided in an embodiment of the present invention;

[0047] Figure 2 A schematic flow chart of a method for measuring pA-level current and quickly determining a threshold value of a super-insulation meter provided in an embodiment of the present invention;

[0048] Figure 3 A circuit diagram of a pA-level current measurement and threshold rapid judgment circuit for a super-insulation meter provided in an embodiment of the present invention;

[0049] Figure 4 A graph showing the relationship between the integral voltage and the integral time under a negative power supply voltage provided by an embodiment of the present invention;

[0050] Figure 5 A graph showing the relationship between the integral voltage and the integral time under a positive power supply voltage provided by an embodiment of the present invention;

[0051] Figure 6 A graph showing the relationship between the integral voltage and the integral time under another negative power supply voltage provided by an embodiment of the present invention;

[0052] Figure 7 A graph showing the relationship between the integral voltage and the integral time under another positive power supply voltage provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0053] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0054] First, the components and connection relationship of the super insulation meter pA level current measurement and threshold value fast judgment circuit of the present invention are introduced. For details, please refer to Figure 1 .

[0055] Specifically, Figure 1The circuits in the apparatus may include: a control unit MCU01, an integrating operational amplifier circuit 02, a first current limiting resistor 03, a second current limiting resistor 04, a capacitor group 05, a resistor group 06, a relay circuit 07, a DAC1 non-inverting amplifier circuit 08, a DAC1 inverter circuit 09, a DAC2 non-inverting amplifier circuit 10, a DAC2 inverter circuit 11, a threshold 1 comparison circuit 12, a threshold 2 comparison circuit 13, a threshold 3 comparison circuit 14, a threshold 4 comparison circuit 15, an integrating capacitor charge clearing circuit 16, an ADC sampling circuit 17, a high-precision positive and negative power supply 18, a display screen 19, a button or keyboard 20, a host computer (PC) 21, and a product under test 22.

[0056] above Figure 1 The correspondence between the elements of the circuit and the elements of the circuit of the present invention may include: the control unit MCU01 may refer to the control unit, the integrating operational amplifier circuit 02 may refer to the integrating operational amplifier, the capacitor group 05 may refer to the capacitor group, the resistor group 06 may refer to the resistor group, the relay circuit 07 may refer to the relay and relay drive circuit, the integrating capacitor charge clearing circuit 16 may refer to the charge clearing circuit, the ADC sampling circuit 17 may refer to the analog-to-digital conversion circuit, the high-precision positive and negative power supply 18 may refer to the power supply, the display screen 19, the button or keyboard 20 and the host computer (PC) 21 may refer to the input unit, and the product under test 22 may refer to a ceramic capacitor.

[0057] The connection relationship of the various components of the present invention may include: the control unit is respectively connected to the input unit, the integrating operational amplifier, the analog-to-digital conversion circuit, the power supply, the charge clearing circuit and the relay drive circuit; the integrating operational amplifier is respectively connected to the ceramic capacitor, the analog-to-digital conversion circuit, the capacitor group and the resistor group; the relay drive circuit is respectively connected to the capacitor group and the resistor group; the charge clearing circuit is connected to the capacitor group; and the power supply is connected to the ceramic capacitor.

[0058] In addition, the circuit of the present invention can also add a threshold comparison circuit between the operational amplifier and the control unit to quickly detect the performance of the ceramic capacitor. The threshold comparison circuit can include: a first threshold comparison circuit, a second threshold comparison circuit, a third threshold comparison circuit, and a fourth threshold comparison circuit.

[0059] Still refer to Figure 1DAC1 non-inverting amplifier circuit 08 and threshold 1 comparison circuit 12 can form a first threshold comparison circuit, DAC1 inverter circuit 09 and threshold 2 comparison circuit 13 can form a second threshold comparison circuit, DAC2 non-inverting amplifier circuit 10 and threshold 3 comparison circuit 14 can form a third threshold comparison circuit, and DAC2 inverter circuit 11 and threshold 4 comparison circuit 15 can form a fourth threshold comparison circuit. The first threshold comparison circuit and the second threshold comparison circuit can form a positive voltage comparison window for comparing the test product, that is, the output voltage of the negative current of the ceramic capacitor or the micro negative current of the pA level after the time t integration. According to the comparison structure, the qualified status of the test product can be quickly determined. The third threshold comparison circuit and the fourth threshold comparison circuit can form a negative voltage comparison window for comparing the test product, that is, the output voltage of the positive current of the ceramic capacitor or the micro positive current of the pA level after the time t integration. According to the comparison structure, the qualified status of the test product can be quickly determined.

[0060] Specifically, the DAC1 in-phase amplifier circuit can be used to amplify the DAC1 voltage value output by the control unit, and the amplified voltage range can be 0 to 12V.

[0061] The DAC1 inverter circuit can be used to reverse the output voltage direction of the DAC1 non-inverting amplifier circuit, and its voltage adjustment range can be 0 to -12V.

[0062] The DAC2 in-phase amplifier circuit can be used to amplify the DAC2 voltage value output by the control unit, and the amplified voltage range can be 0 to 12V.

[0063] The DAC2 inverter circuit can be used to reverse the output voltage direction of the DAC3 non-inverting amplifier circuit, and its voltage adjustment range can be 0 to -12V.

[0064] Next, the functions of the various elements of the present invention will be described.

[0065] Specifically, the control unit may include multiple different types of communication interfaces, each of which can be connected to various components in the circuit. The communication interfaces may include serial ports, RS485 interfaces, SPI interfaces, I2C interfaces, parallel interfaces, Ethernet interfaces, etc., for transmitting information between the various module circuits.

[0066] In addition, the control unit may include a single chip microcomputer, a PLC, an FPGA, etc. The control unit may be used to control the components in the circuit of the present invention and obtain data sent back by the components for calculating the insulation resistance and test current of the ceramic capacitor.

[0067] The first current-limiting resistor can be used to prevent the current of the product under test from being too large, which may cause damage to the component.

[0068] The integrating operational amplifier circuit can be used to integrate the current of the measured product or a small current of pA level over time t to output the curve of the integrated voltage with respect to time;

[0069] The second current limiting resistor can be used to prevent the integration voltage from being too high and the current from being too large during the integration process, thereby burning the ADC dedicated sampling chip circuit.

[0070] Capacitor banks can be configured with different capacitance values ​​to accommodate various types of current tests.

[0071] The resistor group can be configured with different resistance values ​​to form various RC time constants with the capacitor group, thereby controlling the charging time of the capacitor group and the maximum value of the capacitor charging voltage.

[0072] Relay circuits can include relays and relay driver circuits. The closing and opening of different relays can configure various capacitance and resistance values. Relays can include common relays, dry reed relays, wetted reed relays, mercury relays, and other components that can switch on and off.

[0073] The integration capacitor charge clearing circuit can be used to release the charge of the integration capacitor group to zero, in preparation for the integration zero state response.

[0074] The ADC dedicated sampling chip can be used to collect the current of the measured product or the integrated output voltage of the pA-level tiny current over time t in real time, and send the collected sampling value to the control unit in real time to calculate the current of the measured product.

[0075] The high-precision positive and negative power supply is an adjustable high-precision low-ripple positive and negative voltage output power supply that can provide positive and negative power for the DUT. There is a forward or reverse current flowing inside the DUT, and the current can reach a tiny current at the pA level.

[0076] The display screen may include an LCD display screen, an OLED display screen, a dot matrix display screen module, etc., which is used to display a keyboard or buttons, so that the user can send various information such as configuration parameters, pA level current, super insulation resistance value, threshold judgment results, etc. through the keyboard or buttons.

[0077] The host computer (PC) can be used to send various information such as configuration parameter tables, pA level current, super insulation resistance value, threshold judgment results, etc. It can be applied to various super insulation test production lines to improve screening efficiency.

[0078] Next, the process of measuring the insulation resistance and test current of ceramic capacitors and judging the performance status of ceramic capacitors by the circuit of the present invention is introduced. For details, please refer to Figure 2 .

[0079] Step S100: turning on the charge clearing circuit to release the charge of the capacitor group to zero, and turning off the charge clearing circuit after the charge of the capacitor group is released to zero to start charging the capacitor group.

[0080] Specifically, in order to ensure the accuracy of the measurement, the control unit can first control the charge clearing circuit to be turned on. After it is turned on, the charge of the capacitor group begins to discharge and release. When the charge of the capacitor group is released to zero, the control unit can control the charge clearing circuit to be turned off. After it is turned off, the capacitor group can start charging and carry out subsequent measurement processes.

[0081] Step S110: determining the configuration of the resistor group according to the configuration parameters input by the user through the input unit, and determining the relationship between the integrated voltage of the capacitor group and the voltage across the ceramic capacitor according to the configuration.

[0082] Specifically, the user can input the configuration parameters of the resistor group and the capacitor group through the input unit, and the control unit can control the opening and closing of the corresponding relays in the relay drive circuit according to the configuration parameters, so that the resistance value of the resistor group and the capacitance value of the capacitor group reach the value equal to the value specified by the configuration parameters.

[0083] Whether the relay corresponding to the resistor group is closed can affect the current situation of the circuit. Different current conditions correspond to different relationships between the integral voltage of the capacitor group and the voltage across the ceramic capacitor. Therefore, the configuration of the resistor group can be determined, and then the relationship between the integral voltage of the capacitor group and the voltage across the ceramic capacitor can be determined based on the configuration.

[0084] Step S120: obtaining a curve of the integrated voltage of the capacitor group outputted by the integrating operational amplifier after time integration of the current of the ceramic capacitor with respect to the integration time, and determining a final voltage of the integrated voltage according to the curve.

[0085] Specifically, after the capacitor group starts to charge, the integrating operational amplifier can output a curve of the integrated voltage of the capacitor group with respect to the integration time after integrating the current of the ceramic capacitor over time.

[0086] In addition, after the capacitor bank is charged for a period of time t, its integrated voltage value can be used as the final voltage of the integrated voltage.

[0087] Step S130: determining the sampling value of the curve collected by the analog-to-digital conversion circuit.

[0088] Specifically, the analog-to-digital conversion circuit can collect sampling values ​​of the curve in real time. Since the curve is a curve of the integrated voltage with respect to the integration time, the sampling value can be a specific integrated voltage at a certain integration moment.

[0089] Step S140: determining the insulation resistance and the test current of the ceramic capacitor according to the relationship and the sampled value.

[0090] Specifically, the sampled value can be substituted into the above-determined relationship to derive the insulation resistance and test current of the ceramic capacitor.

[0091] Step S150: determining the performance status of the ceramic capacitor according to a comparison result between the final voltage and a threshold voltage of a preset threshold comparison circuit.

[0092] Specifically, the final voltage may be compared with a threshold voltage of a preset threshold comparison circuit to obtain a comparison result. Different comparison results may correspond to different performance states of the ceramic capacitor.

[0093] Next, the process of determining the relationship between the integrated voltage of the capacitor group and the voltage across the ceramic capacitor according to the configuration in the above step S110 will be further described.

[0094] Specifically, depending on the different closing conditions of the relays corresponding to the resistor group, the following may be included:

[0095] Case 1: If the relays of the resistor group are all disconnected, a first relationship between the integral voltage of the capacitor group and the voltage across the ceramic capacitor is derived according to Kirchhoff's current law.

[0096] Specifically, when the relay corresponding to the resistor group is completely disconnected, the resistance of the resistor group can be considered to be infinite, and the current situation of the circuit changes accordingly. Then, a first curve of the integral voltage of the capacitor group with respect to the integral time can be obtained, and the first sampling value of the first curve can be collected using the analog-to-digital conversion circuit. Then, the first insulation resistance and the first test current of the ceramic capacitor are determined based on the first relationship and the first sampling value.

[0097] Case 2: If the relay of the resistor group is configured to be closed, a second relationship between the integral voltage of the capacitor group and the voltage across the ceramic capacitor is derived according to Kirchhoff's current law.

[0098] Specifically, when the relay corresponding to the resistor group is closed, that is, the resistor of the resistor group is connected to the circuit, the current condition of the circuit will change due to the resistance of the connected resistor group, and then a second curve of the integral voltage of the capacitor group with respect to the integral time can be obtained, and the second sampling value of the second curve can be collected using the analog-to-digital conversion circuit, and then the second insulation resistance and the second test current of the ceramic capacitor are determined according to the second relationship and the second sampling value.

[0099] Next, the specific process of determining the performance status of the ceramic capacitor in the above step S150 is described, which may include the following:

[0100] S1. Determine the performance state of the ceramic capacitor at a positive threshold value based on a comparison result between the final voltage and a preset positive threshold voltage.

[0101] S2. Determine the performance state of the ceramic capacitor at a negative threshold voltage based on a comparison result between the final voltage and a preset negative threshold voltage.

[0102] Specifically, the performance status of the ceramic capacitor corresponding to the comparison result can be queried from the preset comparison result table, and then the performance of the ceramic capacitor can be efficiently tested based on the final voltage of the integral capacitor, which can be applied to testing occasions with high efficiency requirements.

[0103] The present invention can quickly measure the insulation resistance of ceramic capacitors, that is, it can achieve super-insulation testing of ceramic capacitors. Moreover, by supplying voltages in different directions to the ceramic capacitors, the present invention can also detect the test current of the ceramic capacitors. By configuring the capacitance of the capacitor group and the resistance of the resistor group, it can also achieve low current measurement at the pA level. In addition, by pre-setting the various thresholds under the positive and negative voltages of the ceramic capacitors, the threshold comparison circuit can be used to quickly determine the performance status of the ceramic capacitors, and then determine whether the ceramic capacitors are qualified. This can adapt to the automated rapid screening and testing needs of the production line and meet various customized testing requirements.

[0104] Next, in combination with all embodiments of the present invention, the process of measuring the insulation resistance and test current of a ceramic capacitor and the process of detecting the performance status of a ceramic capacitor are described with specific examples. For details, please refer to Figure 3 .

[0105] First, yes Figure 3 The circuit in is described.

[0106] Specifically, Figure 3 One end of the first current limiting resistor R3 is connected to the tested product VCC2, and the other end is connected to VCC3.

[0107] The integrating operational amplifier circuit includes an operational amplifier IC2, a zero adjustment potentiometer R8, a protection diode D1, a protection diode D2, a capacitor group, a resistor group and a switching relay. The capacitors in the capacitor group include C1, C2, C3, C4, and C5. The resistor group includes R4, R5, R6, and R7. The relay circuit includes relays RLY1, RLY2, RLY3, RLY4, RLY5, RLY6, RLY7, and RLY8. It drives the Darlington chip IC4 and the relay drives current limiting resistors R10, R11, R12, R13, R14, R15, R16, and R17. It controls the current limiting resistors R32, R33, R34, R35, R36, R37, R38, and R39 of the Darlington chip IC4, and its pull-down resistor row R44.

[0108] The non-inverting input pin 3 of the operational amplifier IC2 is connected to GND, the inverting input pin 2 is connected to VCC3, the output pin 6 is connected to VCC4, the positive power supply pin 7 is connected to the DC power supply +12V, the negative power supply pin 4 is connected to the DC power supply -12V, the 8th pin is connected to GND, the OFFSET NULL pin 1 and pin 5 are respectively connected to the two ends of the zero adjustment potentiometer R8, and the tap of the zero adjustment potentiometer R8 is connected to the DC power supply -12V.

[0109] One end of the capacitor C1 is connected to VCC3, and the other end is connected to VCC4.

[0110] One end of capacitor C2 is connected to VCC3, and the other end is connected to pin 1 of relay RLY1. Pin 2 of relay RLY1 is connected to VCC4. Pin 3 of relay RLY1 is connected to GND. Pin 4 of relay RLY1 is connected to one end of driving current limiting resistor R10.

[0111] One end of capacitor C3 is connected to VCC3, and the other end is connected to pin 1 of relay RLY2. Pin 2 of relay RLY2 is connected to VCC4. Pin 3 of relay RLY2 is connected to GND. Pin 4 of relay RLY2 is connected to one end of driving current limiting resistor R11.

[0112] One end of capacitor C4 is connected to VCC3, and the other end is connected to pin 1 of relay RLY3, pin 2 of relay RLY3 is connected to VCC4, pin 3 of relay RLY3 is connected to GND, and pin 4 of relay RLY3 is connected to one end of driving current limiting resistor R12.

[0113] One end of capacitor C5 is connected to VCC3, and the other end is connected to pin 1 of relay RLY4, pin 2 of relay RLY4 is connected to VCC4, pin 3 of relay RLY4 is connected to GND, and pin 4 of relay RLY4 is connected to one end of driving current limiting resistor R13.

[0114] One end of the resistor R4 is connected to VCC3, and the other end is connected to the first pin of the relay RLY5, the second pin of the relay RLY5 is connected to VCC4, the third pin of the relay RLY5 is connected to GND, and the fourth pin of the relay RLY5 is connected to one end of the driving current limiting resistor R14.

[0115] One end of the resistor R5 is connected to VCC3, and the other end is connected to the first pin of the relay RLY6. The second pin of the relay RLY6 is connected to VCC4. The third pin of the relay RLY6 is connected to GND. The fourth pin of the relay RLY6 is connected to one end of the driving current limiting resistor R15.

[0116] One end of the resistor R6 is connected to VCC3, and the other end is connected to the first pin of the relay RLY7. The second pin of the relay RLY7 is connected to VCC4. The third pin of the relay RLY7 is connected to GND. The fourth pin of the relay RLY7 is connected to one end of the driving current limiting resistor R16.

[0117] One end of the resistor R7 is connected to VCC3, and the other end is connected to the first pin of the relay RLY8, the second pin of the relay RLY8 is connected to VCC4, the third pin of the relay RLY8 is connected to GND, and the fourth pin of the relay RLY8 is connected to one end of the driving current limiting resistor R17.

[0118] The 18th output pin of the relay driver chip IC4 is connected to the other end of the current limiting resistor R10, the 17th output pin of the relay driver chip IC4 is connected to the other end of the current limiting resistor R11, the 16th output pin of the relay driver chip IC4 is connected to the other end of the current limiting resistor R12, the 15th output pin of the relay driver chip IC4 is connected to the other end of the current limiting resistor R13, the 14th output pin of the relay driver chip IC4 is connected to the other end of the current limiting resistor R14, the 13th output pin of the relay driver chip IC4 is connected to the other end of the current limiting resistor R15, the 12th output pin of the relay driver chip IC4 is connected to the other end of the current limiting resistor R16, and the 11th output pin of the relay driver chip IC4 is connected to the other end of the current limiting resistor R17.

[0119] The 10th pin of the relay driver chip IC4 is connected to GND, and the 9th pin of the relay driver chip IC4 output is connected to the DC power supply +12V.

[0120] The first input control pin of the relay driver chip IC4 is connected to one end of the current-limiting resistor R32, and the other end of the current-limiting resistor R32 is connected to the control unit IO_01; the second input control pin of the relay driver chip IC4 is connected to one end of the current-limiting resistor R33, and the other end of the current-limiting resistor R33 is connected to the control unit IO_02; the third input control pin of the relay driver chip IC4 is connected to one end of the current-limiting resistor R34, and the other end of the current-limiting resistor R34 is connected to the control unit IO_03; the fourth input control pin of the relay driver chip IC4 is connected to one end of the current-limiting resistor R35, and the other end of the current-limiting resistor R35 is connected to the control unit IO_04; The 5th input control pin of the relay driver chip IC4 is connected to one end of the current limiting resistor R36, and the other end of the current limiting resistor R36 is connected to the control unit IO_05; the 6th input control pin of the relay driver chip IC4 is connected to one end of the current limiting resistor R37, and the other end of the current limiting resistor R37 is connected to the control unit IO_06; the 7th input control pin of the relay driver chip IC4 is connected to one end of the current limiting resistor R38, and the other end of the current limiting resistor R38 is connected to the control unit IO_07; the 8th input control pin of the relay driver chip IC4 is connected to one end of the current limiting resistor R39, and the other end of the current limiting resistor R39 is connected to the control unit IO_08.

[0121] Pins 9, 11, 12, 13, 14, 15 and 16 of the pull-down resistor row R44 are all connected to GND, pin 1 is connected to the control unit IO_01, pin 2 is connected to the control unit IO_02, pin 3 is connected to the control unit IO_03, pin 4 is connected to the control unit IO_04, pin 5 is connected to the control unit IO_05, pin 6 is connected to the control unit IO_06, pin 7 is connected to the control unit IO_07, and pin 8 is connected to the control unit IO_08.

[0122] The integrating capacitor charge clearing circuit includes a photo MOS transistor IC1, a resistor R1, a resistor R2, a resistor R49, and a MOS transistor Q1; pin 4 of the photo MOS transistor IC1 is connected to VCC3, pin 3 of the photo MOS transistor IC1 is connected to VCC4, pin 1 of the photo MOS transistor IC1 is connected to a DC power supply +5V, pin 2 of the photo MOS transistor IC1 is connected to one end of the resistor R1, the other end of the resistor R1 is connected to the D electrode of the MOS transistor Q1, the S electrode of the MOS transistor Q1 is connected to GND, the G electrode of the MOS transistor Q1 is connected to one end of the resistor R2 and to one end of the resistor R49, the other end of the resistor R2 is connected to GND, and the other end of the resistor R49 is connected to the control unit IO_09.

[0123] In the DAC1 non-inverting amplifier circuit, the control unit output DAC1 is connected to one end of a resistor R23, the other end of R23 is connected to the non-inverting input terminal, pin 5, of the operational amplifier IC5B and to one end of a filter capacitor C7, the other end of which is connected to GND; one end of a resistor R22 is connected to the inverting input terminal, pin 6, of the operational amplifier IC5B, and the other end is connected to GND; one end of a resistor R27 is connected to the inverting input terminal, pin 6, of the operational amplifier IC5B, and the other end is connected to the output terminal, pin 7, of the operational amplifier IC5B; and the output terminal, pin 7 of the operational amplifier IC5B, is connected to DAC_V1.

[0124] In the DAC1 inverter circuit, one end of resistor R19 is connected to pin 7, the output terminal of operational amplifier IC5B, and the other end is connected to pin 6, the inverting input terminal of operational amplifier IC3B. One end of resistor R25 is connected to pin 6, the inverting input terminal of operational amplifier IC3B, and the other end is connected to pin 7, the output terminal of operational amplifier IC3B. Pin 7 of the output terminal of operational amplifier IC3B is connected to DAC_V3. Pin 5, the non-inverting input terminal of operational amplifier IC3B, is connected to GND.

[0125] In the DAC2 non-inverting amplifier circuit, the control unit output DAC2 is connected to one end of a resistor R21, the other end of R21 is connected to the non-inverting input terminal pin 3 of the operational amplifier IC5A and to one end of a filter capacitor C6, and the other end of the filter capacitor C6 is connected to GND; one end of a resistor R20 is connected to the inverting input terminal pin 2 of the operational amplifier IC5A, and the other end is connected to GND; one end of a resistor R26 is connected to the inverting input terminal pin 2 of the operational amplifier IC5A, and the other end is connected to the output terminal pin 1 of the operational amplifier IC5A; and the output terminal pin 1 of the operational amplifier IC5A is connected to DAC_V2.

[0126] In the DAC2 inverter circuit, one end of resistor R18 is connected to pin 1 of the output of operational amplifier IC5A, and the other end is connected to pin 2 of the inverting input of operational amplifier IC3A. One end of resistor R24 ​​is connected to pin 2 of the inverting input of operational amplifier IC3A, and the other end is connected to pin 1 of the output of operational amplifier IC3A. Pin 1 of the output of operational amplifier IC3A is connected to DAC_V4. Pin 3 of the non-inverting input of operational amplifier IC3A is connected to GND.

[0127] The positive power supply pin 8 of the operational amplifier IC3 is connected to the DC power supply +12V, and the negative power supply pin 4 is connected to the DC power supply -12V; the positive power supply pin 8 of the operational amplifier IC5 is connected to the DC power supply +12V, and the negative power supply pin 4 is connected to the DC power supply -12V.

[0128] The threshold 1 comparison circuit includes an input current-limiting resistor R31, an open-drain output comparator IC7B, an output current-limiting resistor R43, and a pull-up resistor R48; one end of the input current-limiting resistor R31 is connected to VCC4, and the other end is connected to the 5th pin of the non-inverting input terminal of the comparator IC7B; one end of the output current-limiting resistor R43 is connected to the 7th pin of the output terminal of the comparator IC7B, and the other end is connected to Over_01; one end of the pull-up resistor R48 is connected to the DC power supply 3.3V, and the other end is connected to Over_01; Over_01 is connected to the control unit monitoring threshold 01 pin.

[0129] The threshold 2 comparison circuit includes an input current limiting resistor R30, an open-drain output comparator IC7A, an output current limiting resistor R42, and a pull-up resistor R47; one end of the input current limiting resistor R30 is connected to VCC4, and the other end is connected to the second pin of the reverse input terminal of the comparator IC7A; one end of the output current limiting resistor R42 is connected to the first pin of the output terminal of the comparator IC7A, and the other end is connected to Over_02; one end of the pull-up resistor R47 is connected to the DC power supply 3.3V, and the other end is connected to Over_02; Over_02 is connected to the control unit monitoring threshold 02 pin.

[0130] The threshold 3 comparison circuit includes an input current limiting resistor R29, an open-drain output comparator IC6B, an output current limiting resistor R41, and a pull-up resistor R46; one end of the input current limiting resistor R29 is connected to VCC4, and the other end is connected to the inverting input pin 6 of the comparator IC6B; one end of the output current limiting resistor R41 is connected to the output pin 7 of the comparator IC6B, and the other end is connected to Over_03; one end of the pull-up resistor R46 is connected to the DC power supply 3.3V, and the other end is connected to Over_03; Over_03 is connected to the control unit monitoring threshold 03 pin.

[0131] The threshold 4 comparison circuit includes an input current limiting resistor R28, an open-drain output comparator IC6A, an output current limiting resistor R40, and a pull-up resistor R45; one end of the input current limiting resistor R28 is connected to VCC4, and the other end is connected to the third pin of the non-inverting input terminal of the comparator IC6A; one end of the output current limiting resistor R40 is connected to the first pin of the output terminal of the comparator IC6A, and the other end is connected to Over_04; one end of the pull-up resistor R45 is connected to the DC power supply 3.3V, and the other end is connected to Over_04; Over_04 is connected to the control unit monitoring threshold 04 pin.

[0132] The positive power supply pin 8 of the comparator IC6 used in the threshold comparison circuit is connected to the DC power supply +12V, and the negative power supply pin 4 is connected to the DC power supply -12V; the positive power supply pin 8 of the comparator IC7 used in the threshold comparison circuit is connected to the DC power supply +12V, and the negative power supply pin 4 is connected to the DC power supply -12V.

[0133] The high-precision power supply output end is connected to VCC1, and its communication interface is connected to the communication interface 1 of the control unit; the keyboard or key is connected to the input interface of the control unit; the host computer (PC) is connected to the communication interface 3 of the control unit; and the display is connected to the communication interface 4 of the control unit.

[0134] The sampling end of the ADC dedicated sampling chip is connected to one end of the second current limiting resistor R9, the other end of R9 is connected to VCC4, and the sampling output end is connected to the communication interface 1 of the control unit.

[0135] The capacitance C of the integrating capacitor is the capacitance of the capacitor connected alone or in parallel. There is one fixed integral capacitor and four relay switching capacitors in parallel in the circuit, which can be combined into two 4+1 capacitance values; if the number of switching capacitor relays is n (n≥1), 2 n+1 The capacitance value is C.

[0136] The RC constant resistance value R is the resistance value of the resistor connected alone or in parallel. There are 4 relay switching resistors in the circuit that are connected alone or in parallel, and 2 4 resistance value; if the number of switching capacitor relays is m (m≥1), 2 m The resistance value is R.

[0137] The keyboard, key or host computer (PC) sends a configuration parameter table to the control unit, and the control unit switches the relay according to the parameter table, and the capacitor is connected alone or in parallel to form an integrating capacitor C and the resistor is connected alone or in parallel to form a resistor R.

[0138] Next, the procedure for measuring the insulation resistance and test current of ceramic capacitors is explained.

[0139] When the measurement is not started, the control unit output port IO_09 is at a high level, the MOS tube Q1 is turned on and the optical MOS tube IC1 is turned on, releasing the charge of the integral capacitor group to zero, preparing for the integral zero state response.

[0140] When the measurement is started, the output port IO_09 of the control unit is at a low level, the MOS tube Q1 is turned off, the optical MOS tube IC1 is turned off, the measurement circuit starts integrating, and the control unit simultaneously counts time t.

[0141] The voltage at the non-inverting input of the operational amplifier IC2 is GND = 0V. Applying the "virtual short" working principle of the operational amplifier, the voltage at the reverse input of the operational amplifier is VCC3 = GND = 0V. Assuming that the voltage on the integrating capacitor C is VCC4 after time t, since the maximum output capacity of the integrating operational amplifier is 12V, if the integrating voltage VCC4 exceeds 12V, the integrating operational amplifier also loses its adjustment ability, and the subsequent integrating voltage VCC4 value is invalid.

[0142] According to Ohm's law, the current flowing through a ceramic capacitor is:

[0143] If all the relays in the resistor group are disconnected, the resistance R is infinite, and Kirchhoff's current law (KCL) shows that:

[0144]

[0145] The relationship between the power input voltage and the voltage on the capacitor bank is:

[0146]

[0147] When VCC1 in formula (3) is a constant, the integration time starts from 0, and after the integration time t, the voltage VCC4 on the integration capacitor is Wherein, when VCC1 is a negative voltage, the charging voltage VCC4 of the integral capacitor C and the corresponding curve of time t in formula (3) are as follows: Figure 4 As shown, when VCC1 is a positive voltage, the charging voltage VCC4 of the integral capacitor C in formula (3) corresponds to the curve of time t as shown in Figure 5 shown.

[0148] The control unit collects the value of the integral capacitor voltage VCC4 and the time t in real time through the ADC dedicated sampling chip to obtain the slope k value.

[0149] The super insulation resistance R of the tested product is obtained from formula (4): 测 :

[0150]

[0151] The current of the measured product i 测 for:

[0152]

[0153] If the relay of the resistor group is closed, the resistance of the resistor group is R, and Kirchhoff's current law (KCL) shows that:

[0154]

[0155]

[0156] Formula (8) is a linear constant first-order non-homogeneous calculus equation, and its maximum value of the charging voltage of the integral capacitor C is U S :

[0157]

[0158] From the zero-state response equation of the capacitor C charging voltage and equation (9), we can get:

[0159] Where the time constant τ = RC.

[0160]

[0161] When VCC1 is a negative voltage, the charging voltage VCC4 of the integral capacitor C in formula (8) and the corresponding curve of time t are as follows: Figure 6 As shown, when VCC1 is a positive voltage, the charging voltage VCC4 of the integral capacitor C in formula (8) corresponds to the curve of time t as shown in Figure 7 shown.

[0162] The control unit collects the integral capacitor voltage VCC4 and time t in real time through the ADC dedicated sampling chip, and the super insulation resistance R of the measured product is obtained by formula (11). 测 :

[0163]

[0164] The current of the measured product i 测 for:

[0165]

[0166] Next, the process of detecting the performance status of ceramic capacitors is described.

[0167] The control unit calculates the output DAC1 threshold voltage as DAC1_VCC and DAC2 threshold voltage as DAC2_VCC according to the configuration parameter table; the "virtual short" working principle of the operational amplifier is applied:

[0168] The output voltage of the DAC1 common-direction amplifier circuit is

[0169] In the DAC1 inverter circuit, resistor R19 = R25, and its output voltage is

[0170]

[0171] The output voltage of the DAC2 common-direction amplifier circuit is

[0172] In the DAC2 inverter circuit, resistor R18 = R24, and its output voltage is

[0173]

[0174] Among them, DAC_V1=-DAC_V3, DAC_V2=-DAC_V4, and DAC_V2>DAC_V1, DAC_V3>DAC_V4; the negative sign represents that the polarity of the voltage and current is negative.

[0175] The threshold 1 comparison circuit and the threshold 2 comparison circuit constitute a positive voltage comparison window, and the threshold value range is from DAC_V1 to DAC_V2;

[0176] The threshold 3 comparison circuit and the threshold 4 comparison circuit constitute a negative voltage comparison window, and the threshold value range is from DAC_V3 to DAC_V4;

[0177] When the voltage on the integrating capacitor is VCC4 from 0 to time t, the control unit starts the threshold comparison circuit and outputs the result:

[0178] When VCC4>0 and VCC4>DAC_V1, the Over_01 signal is high level H, reaching the lower limit of the positive threshold range;

[0179] When VCC4>0 and VCC4<DAC_V1, the Over_01 signal is low level L, which does not reach the lower limit of the positive threshold range;

[0180] When VCC4>0 and VCC4>DAC_V2, the Over_02 signal is low level L, exceeding the upper limit of the positive threshold range;

[0181] When VCC4>0 and VCC4<DAC_V2, the Over_02 signal is high level H, which is within the upper limit of the positive threshold range;

[0182] When VCC4 < 0 and VCC4 > DAC_V3, the Over_03 signal is low level L and does not reach the upper limit of the negative threshold range;

[0183] When VCC4 < 0 and VCC4 < DAC_V3, the Over_03 signal is high level H, reaching the upper limit of the negative threshold range;

[0184] When VCC4<0 and VCC4>DAC_V4, the Over_04 signal is high level H, which is within the lower limit of the negative threshold range;

[0185] When VCC4 is less than 0 and VCC4 is less than DAC_V4, the Over_04 signal is at a low level L, exceeding the lower limit of the negative threshold range.

[0186] The control unit outputs the results of the threshold comparison circuit described above. If Over_01 and Over_02 are both high level H, the control unit quickly determines that the product under test is within the positive threshold range and is in a qualified positive threshold state. If Over_01 or Over_02 is low level, it is in a poor positive threshold state. If Over_03 and Over_04 are both high level H, the control unit quickly determines that the product under test is within the negative threshold range and is in a qualified negative threshold state. If Over_03 or Over_04 is low level, it is in a poor negative threshold state.

[0187] The control unit transmits the identification result information of the tested product to the display screen and the host computer (PC) through the communication interface, and then processes and displays the identification result information. It can adapt to the automated rapid screening test requirements of the production line and meet various personalized testing needs.

[0188] The embodiment of the present invention also discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs Figure 2 The method shown.

[0189] In some optional embodiments, the function / operation mentioned in the block diagram may not occur in the order mentioned in the operation diagram. For example, depending on the function / operation involved, the two boxes shown in succession can actually be executed substantially simultaneously or the boxes can sometimes be executed in reverse order. In addition, the embodiment presented and described in the flow chart of the present invention is provided in an exemplary manner for the purpose of providing a more comprehensive understanding of the technology. The disclosed method is not limited to the operation and logic flow presented herein. Optional embodiments are contemplated in which the order of the various operations is changed and the sub-operations described as a part of a larger operation are performed independently.

[0190] Furthermore, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise indicated, one or more of the functions and / or features described may be integrated into a single physical device and / or software module, or one or more functions and / or features may be implemented in separate physical devices or software modules. It will also be understood that a detailed discussion of the actual implementation of each module is not necessary for understanding the present invention. More specifically, given the properties, functions, and internal relationships of the various functional modules in the devices disclosed herein, the actual implementation of the module will be understood within the ordinary skill of an engineer. Therefore, a person skilled in the art using ordinary skill will be able to implement the present invention set forth in the claims without undue experimentation. It will also be understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present invention, which is determined by the full scope of the appended claims and their equivalents.

[0191] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0192] The logic and / or steps represented in the flowcharts or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing the logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (e.g., a computer-based system, a system including a processor, or other system that can fetch and execute instructions from an instruction execution system, apparatus, or device). For purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by, or in conjunction with, an instruction execution system, apparatus, or device.

[0193] More specific examples (a non-exhaustive list) of computer-readable media include the following: an electrical connection with one or more wires (electronic devices), a portable computer disk cartridge (magnetic devices), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disc read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering, or processing in another suitable manner as necessary, and then stored in a computer memory.

[0194] It should be understood that various parts of the present invention can be implemented using hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0195] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0196] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to the embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the claims and their equivalents.

[0197] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the embodiments. Those skilled in the art can make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present invention.

Claims

1. A super-insulation meter pA level current measurement and threshold fast judgment circuit, characterized in that: include: A charge clearing circuit for releasing the charge of the capacitor bank to zero; An input unit, configured to receive configuration parameters determined by a user for the capacitor group and the resistor group; a relay driving circuit, configured to control the relays corresponding to the capacitor group and the resistor group according to the configuration parameters, so as to configure the capacitance value of the capacitor group and the resistance value of the resistor group; A power supply for supplying power to the ceramic capacitors; an integrating operational amplifier, configured to output a curve of the integrated voltage of the capacitor group with respect to the integration time after integrating the current of the ceramic capacitor over time; an analog-to-digital conversion circuit, configured to collect sampling values ​​of the curve; a threshold comparison circuit, for determining the performance status of the ceramic capacitor; Control unit for: Determining a configuration of the resistor group according to the configuration parameters, and determining a relationship between an integrated voltage of the capacitor group and a voltage across the ceramic capacitor according to the configuration; wherein the configuration is that all relays of the resistor group are disconnected or one is closed; Determining the insulation resistance and the test current of the ceramic capacitor according to the relationship and the sampled value; in: The control unit is respectively connected to the input unit, the threshold comparison circuit, the analog-to-digital conversion circuit, the power supply, the charge clearing circuit and the relay drive circuit; the integrating operational amplifier is respectively connected to the ceramic capacitor, the analog-to-digital conversion circuit, the threshold comparison circuit, the capacitor group and the resistor group; the relay drive circuit is respectively connected to the capacitor group and the resistor group; the charge clearing circuit is connected to the capacitor group; and the power supply is connected to the ceramic capacitor.

2. The super insulation meter pA level current measurement and threshold rapid judgment circuit according to claim 1 is characterized in that: The threshold comparison circuit includes: a first threshold comparison circuit, a second threshold comparison circuit, a third threshold comparison circuit, and a fourth threshold comparison circuit.

3. The super insulation meter pA level current measurement and threshold rapid judgment circuit according to claim 2 is characterized in that: The first threshold comparison circuit and the second threshold comparison circuit form a positive voltage comparison window for comparing a first integrated voltage output after the negative current of the ceramic capacitor is integrated over a first integration time; The third threshold comparison circuit and the fourth threshold comparison circuit form a negative voltage comparison window for comparing a second integrated voltage output after the positive current of the ceramic capacitor is integrated over a second integration time.

4. A method for measuring pA-level current and quickly judging threshold value of a super-insulation meter, characterized in that: The method applied to the pA-level current measurement and threshold rapid judgment circuit of the super insulation meter according to any one of claims 1 to 3 comprises: Turning on the charge clearing circuit to release the charge of the capacitor group to zero, and turning off the charge clearing circuit after the charge of the capacitor group is released to zero to start charging the capacitor group; Determining a configuration of the resistor group according to configuration parameters input by a user through an input unit, and determining a relationship between an integral voltage of the capacitor group and a voltage across the ceramic capacitor according to the configuration; obtaining a curve of the integrated voltage of the capacitor group with respect to the integration time after the current of the ceramic capacitor is integrated over time by an integrating operational amplifier, and determining a final voltage of the integrated voltage according to the curve; Determining a sampling value collected by an analog-to-digital conversion circuit for the curve; Determining the insulation resistance and the test current of the ceramic capacitor according to the relationship and the sampled value; The performance state of the ceramic capacitor is determined according to a comparison result between the final voltage and a threshold voltage of a preset threshold comparison circuit.

5. The method for measuring pA-level current and quickly judging threshold value of super insulation meter according to claim 4, characterized in that: The determining, according to the configuration, of a relationship between the integrated voltage of the capacitor group and the voltage across the ceramic capacitor includes: If the relays of the resistor group are all disconnected, a first relationship between the integral voltage of the capacitor group and the voltage across the ceramic capacitor is derived according to Kirchhoff's current law; If the relays of the resistor group are configured to be closed, a second relationship between the integrated voltage of the capacitor group and the voltage across the ceramic capacitor is derived according to Kirchhoff's current law.

6. The method for measuring pA-level current and quickly judging threshold value of a superinsulation meter according to claim 5, characterized in that: Determining the insulation resistance and the test current of the ceramic capacitor according to the relationship and the sampled value includes: If the relays of the resistor group are all disconnected, obtaining a first curve of the integrated voltage of the capacitor group with respect to the integration time, and a first sampled value of the first curve collected by the analog-to-digital conversion circuit, and determining a first insulation resistance and a first test current of the ceramic capacitor according to the first relationship and the first sampled value; If the relay of the resistor group is configured to be closed, a second curve of the integral voltage of the capacitor group with respect to the integral time and a second sampling value of the second curve collected by the analog-to-digital conversion circuit are obtained, and the second insulation resistance and the second test current of the ceramic capacitor are determined based on the second relationship and the second sampling value.

7. The method for measuring pA-level current and quickly judging threshold value of a superinsulation meter according to claim 4, characterized in that: Determining the performance state of the ceramic capacitor according to a comparison result between the final voltage and a threshold voltage of a preset threshold comparison circuit includes: Determining a performance state of the ceramic capacitor at a positive threshold value based on a comparison result between the final voltage and a preset positive threshold voltage; The performance state of the ceramic capacitor at the negative threshold is determined according to a comparison result between the final voltage and a preset negative threshold voltage.

8. An electronic device, characterized in that: including a processor and a memory; The memory is used to store programs; The processor executes the program to implement the method according to any one of claims 4 to 7.

9. A computer-readable storage medium, characterized in that The storage medium stores a program, and the program is executed by a processor to implement the method according to any one of claims 4 to 7.

10. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the method according to any one of claims 4 to 7 is implemented.

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