A method and device for measuring source parasitic parameters and drain current of a power device

Abstract

The present invention relates to a method and apparatus for measuring source parasitic parameters and drain current of a power device. The method comprises the following steps: connecting a power device, a load inductor, and a power supply in series to form a loop; collecting a voltage drop signal between the Kelvin source and the power source of the power device during a switching cycle; integrating the voltage drop signal and fitting the integrated voltage drop signal using a quadratic function to obtain a quadratic function whose time t is a variable; and calculating the parasitic resistance, parasitic inductance, and pulse initial drain load current of the power device based on the coefficients of the quadratic function, as well as the bus voltage and load inductance. The present invention can independently calculate the parasitic parameters and drain current of the power device during each switching cycle without the need for temperature compensation.

Description

Technical Field

[0001] The present invention relates to the technical field of power device parasitic parameter measurement, and in particular to a method and device for measuring source parasitic parameters and drain current of a power device. Background Art

[0002] Power semiconductor devices are key components in power conversion systems. With the increase in switching speed and power level, the impact of device parasitic parameters is becoming increasingly greater. At the same time, accurate measurement of current in high-power devices is also a problem.

[0003] Therefore, accurately characterizing a device's parasitic parameters and precisely measuring the current flowing through it are crucial. Existing parasitic parameter testing solutions primarily rely on offline testing, where the device is placed on a dedicated test bench. This testing environment differs significantly from the device's actual operating environment, potentially leading to significant errors in the test results. There are also online testing solutions that measure parasitic parameters in real time during device operation, but these typically require more complex detection circuits.

[0004] Numerous current measurement solutions are currently available for power devices such as IGBTs and MOSFETs. Series inductive resistors offer high accuracy and speed, but consume significant power at high load currents. Integrated proportional current measurement devices within power devices offer high integration density but also come at a higher cost. Rogowski coils and Hall sensors enable contactless measurement but are bulky. Device drain current can also be detected through gate voltage characteristics such as the Miller plateau voltage, but this requires pre-testing for each device and requires temperature compensation. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a method and device for measuring the source parasitic parameters and drain current of a power device, which can independently calculate the parasitic parameters and drain current of the power device in each switching cycle without the need for temperature compensation.

[0006] The present invention solves the technical problem by providing a method for measuring source parasitic parameters and drain current of a power device, comprising the following steps:

[0007] Connect the power device, load inductor and power supply in series to form a loop;

[0008] Collect the voltage drop signal between the Kelvin source and the power source of the power device during a switching cycle;

[0009] The voltage drop signal is integrated and fitted with a quadratic function to obtain a quadratic function V with time t as a variable. integ =at 2 +bt+c, where Vinteg is the integrated voltage drop signal, a, b and c are coefficients;

[0010] The parasitic resistance, parasitic inductance and pulse initial drain load current of the power device are calculated based on the coefficients a, b and c, as well as the bus voltage value and the load inductance value.

[0011] The parasitic resistance is The initial drain load current of the pulse is calculated to be The parasitic inductance is calculated by Calculated, where R S is the parasitic resistance, I DS0 is the pulse initial drain load current, L S is the parasitic inductance, V bus is the bus voltage, L load is the load inductance value.

[0012] The technical solution adopted by the present invention to solve the technical problem is to provide a device for measuring source parasitic parameters and drain current of a power device, comprising:

[0013] an integrator, configured to collect a voltage drop signal between a Kelvin source and a power source of the power device in one switching cycle and integrate the voltage drop signal;

[0014] an analog-to-digital converter, configured to convert the analog signal output by the integrator into a digital signal;

[0015] The processor is used to fit the digital signal using a quadratic function to obtain coefficients a, b and c of the quadratic function, and calculate the parasitic resistance, parasitic inductance and pulse initial drain load current of the power device using the coefficients a, b and c of the quadratic function, as well as the bus voltage value and the load inductance value.

[0016] The processor passes Calculate the parasitic resistance by Calculate the pulse initial drain load current by Calculate the parasitic inductance, where R S is the parasitic resistance, I DS0 is the pulse initial drain load current, L S is the parasitic inductance, V bus is the bus voltage, L load is the load inductance value.

[0017] Beneficial effects

[0018] By employing the aforementioned technical solution, the present invention offers the following advantages and positive effects compared to existing technologies: It independently calculates device parasitic parameters and drain current during each switching cycle, eliminating the need for temperature compensation. Furthermore, based on the extracted parasitic resistance and inductance, it can further calculate the initial drain load current during the device's on-time. This entire solution is applicable in hard-switching scenarios with linear current variations. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 Schematic diagram of a device for measuring source parasitic parameters and drain current of a power device according to an embodiment of the present invention;

[0020] Figure 2 It is a key signal waveform diagram in an embodiment of the present invention. DETAILED DESCRIPTION

[0021] Below in conjunction with specific embodiment, further set forth the present invention.Should be understood that these embodiments are only used to illustrate the present invention and are not used in limiting the scope of the present invention.In addition, should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms fall equally within the scope limited by the appended claims of the application.

[0022] The embodiment of the present invention relates to a method for measuring source parasitic parameters and drain current of a power device, comprising the following steps: connecting a power device, a load inductor and a power supply in series to form a loop (see Figure 1 ); collecting a voltage drop signal between the Kelvin source and the power source of the power device during a switching cycle; integrating the voltage drop signal and fitting the integrated voltage drop signal with a quadratic function to obtain a quadratic function with time t as a variable; calculating the parasitic resistance, parasitic inductance, and pulse initial drain load current of the power device based on coefficients a, b, and c of the quadratic function, as well as the bus voltage value and the load inductance value.

[0023] The measurement method of this embodiment can be based on Figure 1 The measuring device shown is implemented, and the measuring device includes an integrator, an analog-to-digital converter ADC and a processor.

[0024] for Figure 1 The power circuit shown in the figure, the current flowing through the power device at any time is as follows Figure 2 As shown: (t is the time after each pulse is turned on)

[0025]

[0026] Among them, V bus is the bus voltage, L loadis the load inductance of the power circuit. These two values are fixed values in the power circuit. The voltage drop between the Kelvin source and the power source at any time is:

[0027]

[0028] Taking the moment when the device starts to conduct as the starting point, V SS Perform integration and make appropriate simplifications and approximations, and we have:

[0029]

[0030] Analysis of the integral voltage expression shows that the integral expression of the voltage drop between the series source parasitic inductance and resistance is a quadratic function of time, and the coefficient expression of the quadratic function contains the parasitic resistance, parasitic inductance, and source leakage current information of the device.

[0031] Therefore, this embodiment integrates the voltage of the parasitic source of the power loop (during the current pulse), samples and fits the integrator output waveform, and then calculates the fitting coefficients to obtain the parasitic resistance, parasitic inductance and source leakage current of the device.

[0032] An analog-to-digital converter (ADC) is used to read the analog voltage output by the integrator and convert the read integrator voltage into a digital signal. A processor is then used to process and calculate the digital signal output by the ADC, fitting it with a quadratic function to obtain the coefficients of the quadratic function output by the integrator. The parasitic resistance, parasitic inductance, and source-drain current of the device can then be calculated. The processor in this embodiment can be an MCU, DSP, or FPGA, etc.

[0033] Assume that the fitted quadratic function is:

[0034] V integ =at 2 +bt+c(4)

[0035] Then, combining equations (3) and (4) we can get R S Expression, L S The quadratic equation expression and I DS0 The quadratic equation expression is:

[0036]

[0037] Then the parasitic resistance R of the device can be calculated S , parasitic inductance L S , and the pulse initial drain load current I DS0 :

[0038]

[0039] This embodiment can be applied to the fields of power device current detection, status monitoring and protection in power electronic systems such as PFC and DCDC.

[0040] It's easy to see that the present invention can independently calculate device parasitic parameters and drain current during each switching cycle, eliminating the need for temperature compensation. Furthermore, based on the extracted parasitic resistance and inductance, the present invention can further calculate the initial drain load current during the device's on-time. This entire solution is applicable in hard-switching scenarios with linear current variations.

Claims

1. A method for measuring source parasitic parameters and drain current of a power device, characterized in that: The following steps are involved: Connect the power device, load inductor and power supply in series to form a loop; Collect the voltage drop signal between the Kelvin source and the power source of the power device during a switching cycle; The voltage drop signal is integrated and fitted with a quadratic function to obtain a quadratic function V with time t as a variable. integ =at 2 +bt+c, where V integ is the integrated voltage drop signal, a, b and c are coefficients; The parasitic resistance, parasitic inductance and pulse initial drain load current of the power device are calculated based on the coefficients a, b and c, as well as the bus voltage value and the load inductance value; the parasitic resistance is calculated by The initial drain load current of the pulse is calculated to be The parasitic inductance is calculated by Calculated, where R S is the parasitic resistance, I DS0 is the pulse initial drain load current, L S is the parasitic inductance, V bus is the bus voltage, L load is the load inductance value.

2. A device for measuring source parasitic parameters and drain current of a power device, characterized in that: include: an integrator, configured to collect a voltage drop signal between a Kelvin source and a power source of the power device in one switching cycle and integrate the voltage drop signal; an analog-to-digital converter, configured to convert the analog signal output by the integrator into a digital signal; A processor is used to fit the digital signal using a quadratic function to obtain coefficients a, b and c of the quadratic function, and calculate the parasitic resistance, parasitic inductance and pulse initial drain load current of the power device using the coefficients a, b and c of the quadratic function, as well as the bus voltage value and the load inductance value; the processor is used to calculate the parasitic resistance, parasitic inductance and pulse initial drain load current of the power device using the coefficients a, b and c of the quadratic function, as well as the bus voltage value and the load inductance value; Calculate the parasitic resistance by Calculate the pulse initial drain load current by Calculate the parasitic inductance, where R S is the parasitic resistance, I DS0 is the pulse initial drain load current, L S is the parasitic inductance, V bus is the bus voltage, L load is the load inductance value.

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