driving backplane

Abstract

A driving backplane includes a transistor, a first insulating layer, a first conductive layer, a second insulating layer, a second conductive layer, a third insulating layer and a third conductive layer. The first insulating layer is disposed on the transistor. The first conductive layer is disposed on the first insulating layer. A connection pattern of the first conductive layer is electrically connected to the transistor through a contact window of the first insulating layer. The second insulating layer is disposed on the first conductive layer. The second conductive layer is disposed on the second insulating layer. A connection pattern of the second conductive layer is electrically connected to the connection pattern of the first conductive layer through a contact window of the second insulating layer. The third insulating layer is disposed on the second conductive layer. The third conductive layer is disposed on the third insulating layer. A first contact pad of the third conductive layer is electrically connected to the connection pattern of the second conductive layer through a contact window of the third insulating layer. At least one of the first conductive layer and the second conductive layer includes at least one conductive pattern. The conductive pattern has at least one fixed potential. The first contact pad of the third conductive layer overlaps the conductive pattern.

Description

Technical Field

[0001] This invention relates to a drive backplate. Background Technology

[0002] A light-emitting diode (LED) display panel includes a driver backplane and multiple LED elements mounted on the driver backplane. Inheriting the characteristics of LEDs, LED display panels offer advantages such as energy saving, high efficiency, high brightness, and fast response time. Furthermore, compared to organic light-emitting diode (OLED) display panels, LED display panels also offer advantages such as easier color calibration, longer lifespan, and no image burn-in. Therefore, LED display panels are considered the next generation of display technology.

[0003] Before transposing the LED element, an LC modulator can be used to check if each pixel on the driving backplane is functioning correctly. If an abnormality is found, the conduction path between the pad of the abnormal pixel and its pixel driving circuit can be cut to correct the abnormal pixel as a dark spot. However, after cutting the conduction path between the pad and the pixel driving circuit, the floating pads will still be affected by the pixel driving circuit, making it impossible for the LC modulator to correctly determine whether the abnormal pixel has been corrected as a dark spot. Summary of the Invention

[0004] This invention provides a drive backplane with excellent performance.

[0005] The driving backplane of the present invention includes a transistor, a first insulating layer, a first conductive layer, a second insulating layer, a second conductive layer, a third insulating layer, and a third conductive layer. The first insulating layer is disposed on the transistor and has a contact window. The first conductive layer is disposed on the first insulating layer. The first conductive layer includes a connection pattern, and the connection pattern of the first conductive layer is electrically connected to the transistor through the contact window of the first insulating layer. The second insulating layer is disposed on the first conductive layer and has a contact window. The second conductive layer is disposed on the second insulating layer. The second conductive layer includes a connection pattern, and the connection pattern of the second conductive layer is electrically connected to the connection pattern of the first conductive layer through the contact window of the second insulating layer. The third insulating layer is disposed on the second conductive layer and has a contact window. The third conductive layer is disposed on the third insulating layer. The third conductive layer includes a first pad, and the first pad of the third conductive layer is electrically connected to the connection pattern of the second conductive layer through the contact window of the third insulating layer. At least one of the first conductive layer and the second conductive layer includes at least one conductive pattern. The at least one conductive pattern is structurally separated from the connection patterns of the first conductive layer and the second conductive layer. At least one conductive pattern has at least one fixed potential, and the first pad of the third conductive layer overlaps with at least one conductive pattern. Attached Figure Description

[0006] Figure 1 This is a top view schematic diagram of the drive backplate according to an embodiment of the present invention.

[0007] Figure 2 A cross-sectional view of a driving backplane according to an embodiment of the present application.

[0008] Figure 3 An equivalent circuit diagram of a driving backplane and a light emitting diode element coupled to the driving backplane according to an embodiment of the present application.

[0009] Figure 4 A top view of a driving backplane according to another embodiment of the present application.

[0010] Figure 5 A cross-sectional view of a driving backplane according to another embodiment of the present application.

[0011] Figure 6 A cross-sectional view of a driving backplane according to still another embodiment of the present application.

[0012] Explanation of Reference Numerals:

[0013] 10, 10A, 10B: driving backplane

[0014] 110: first insulating layer

[0015] 112, 132, 152: contact hole

[0016] 120: first conductive layer

[0017] 122, 142: conductive pattern

[0018] 124, 144: connection pattern

[0019] 130: second insulating layer

[0020] 140: second conductive layer

[0021] 150: third insulating layer

[0022] 160: third conductive layer

[0023] 162: first contact pad

[0024] 162a: first portion

[0025] 162b: second portion

[0026] 164: second contact pad

[0027] C: capacitor

[0028] data: data line

[0029] EM: light emission control signal

[0030] LED: light emitting diode element

[0031] OVDD: supply voltage

[0032] OVSS: constant voltage

[0033] PC: pixel driving circuit structure

[0034] Scan1: first scan line

[0035] Scan2: second scan line

[0036] Scan3: third scan line

[0037] T1, T2, T3, T4, T5, T6, T7: transistor

[0038] T1a, T2a, T3a, T4a, T5a, T6a, T7a: first terminal

[0039] T1b, T2b, T3b, T4b, T5b, T6b, T7b: second terminal

[0040] T1c, T2c, T3c, T4c, T5c, T6c, T7c: control terminal

[0041] Vref: reference voltage

[0042] W162a, W162b: width

[0043] x: direction

[0044] I-I', II-II': cross-section line DETAILED DESCRIPTION

[0045] Reference will now be made in detail to exemplary embodiments of the present application, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the different drawings / taken to indicate the same or similar elements.

[0046] It is to be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element or intervening elements can also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, the term "connected" can mean physically and / or electrically connected. Further, "electrical connection" or "coupling" between two elements can be other elements present between them.

[0047] As used herein, "about," "approximately," or "substantially" include the stated value and mean within an acceptable range of deviation for an average of the particular value as determined by one of ordinary skill in the art to be within the scope of what is claimed in view of certain quantities associated with the measurement and error in the measurements (i.e., limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ± 30%, ± 20%, ± 10%, ± 5% of the stated value. Further, as used herein, "about," "approximately," or "substantially" can select a more acceptable range of deviation or standard deviation for optical properties, etching properties, or other properties, and can not apply one standard deviation to all properties.

[0048] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0049] Figure 1 A top view of a drive backplane according to an embodiment of the present application. Figure 2 A cross-sectional view of a drive backplane according to an embodiment of the present application. Figure 2 Corresponding Figure 1 to cross-section I-I'. Figure 2 A second end T3b of the transistor T3, the first insulating layer 110, the first conductive layer 120, the second insulating layer 130, the second conductive layer 140, the third insulating layer 150, and the third conductive layer 160 are shown, while other components of the drive backplane 10 are omitted. Figure 3 An equivalent circuit diagram of a drive backplane and a light emitting diode element bonded to the drive backplane according to an embodiment of the present application.

[0050] Please refer to Figure 1 , Figure 2 and Figure 3The driving backplane 10 includes a pixel driving circuit structure PC. The pixel driving circuit structure PC includes a transistor T3. In this embodiment, the pixel driving circuit structure PC includes, in addition to the transistor T3, a transistor T1, a transistor T2, a transistor T4, a transistor T5, a transistor T6, a transistor T7, and a capacitor C. The second terminal T5b of the transistor T5 receives a supply voltage OVDD and is electrically connected to the capacitor C. The control terminal T5c of the transistor T5 receives an emission control signal EM. The first terminal T5a of the transistor T5 is electrically connected to the second terminal T6b of the transistor T6 and the first terminal T7a of the transistor T7. The control terminal T6c of the transistor T6 is electrically connected to the second scan line Scan2. The first terminal T6a of the transistor T6 is electrically connected to the data line data. The control terminal T7c of the transistor T7 is electrically connected to the first terminal T2a of the transistor T2, the first terminal T1a of the transistor T1, and the capacitor C. The second terminal T7b of the transistor T7 is electrically connected to the second terminal T2b of the transistor T2 and the first terminal T4a of the transistor T4. The control terminal T2c of the transistor T2 is electrically connected to the second scan line Scan2. The first terminal T1a of the transistor T1 is electrically connected to the capacitor C and the first terminal T2a of the transistor T2. The control terminal T1c of the transistor T1 is electrically connected to the first scan line Scan1. The second terminal T1b of the transistor T1 is electrically connected to the first terminal T3a of the transistor T3 and receives a reference voltage Vref. The control terminal T4c of the transistor T4 receives the emission control signal EM. The second terminal T4b of the transistor T4 is electrically connected to the second terminal T3b of the transistor T3. The first terminal T3a of the transistor T3 receives the reference voltage Vref. The control terminal T3c of the transistor T3 is electrically connected to the third scan line Scan3. However, the present application is not limited thereto, and in other embodiments, the pixel driving circuit structure PC can also be other types of circuits.

[0051] Referring to Figure 1 and Figure 2 , the pixel driving circuit structure PC of the driving backplane 10 includes a first insulating layer 110 disposed on the transistor T3 and having a contact window 112. In this embodiment, the material of the first insulating layer 110 can be an inorganic material (for example, silicon oxide, silicon nitride, silicon oxynitride, or a stack of at least two of the above materials), an organic material, or a combination thereof.

[0052] Referring to Figure 1 and Figure 2 , the pixel driving circuit structure PC of the driving backplane 10 includes a first conductive layer 120 disposed on the first insulating layer 110. The first conductive layer 120 includes a connection pattern 124. The connection pattern 124 of the first conductive layer 120 is electrically connected to the transistor T3 through the contact window 112 of the first insulating layer 110. Referring to Figure 1 , Figure 2 andFigure 3 In detail, in the present embodiment, the connection pattern 124 of the first conductive layer 120 is electrically connected to the second terminal T3b of the transistor T3 and the second terminal T4b of the transistor T4, but the present application is not limited thereto. In the present embodiment, the first conductive layer 120 is made of a metal material based on the consideration of conductivity. However, the present application is not limited thereto, and in other embodiments, the first conductive layer 120 can also be made of other conductive materials. For example, an alloy, a nitride of a metal material, an oxide of a metal material, an oxynitride of a metal material, or a stacked layer of a metal material and other conductive materials.

[0053] Referring to Figure 1 and Figure 2 , the pixel driving circuit structure PC of the driving backplane 10 includes a second insulating layer 130 disposed on the first conductive layer 120 and having a contact window 132. In the present embodiment, the material of the second insulating layer 130 can be an inorganic material (for example, silicon oxide, silicon nitride, silicon oxynitride, or a stacked layer of at least two of the above materials), an organic material, or a combination thereof.

[0054] Referring to Figure 1 and Figure 2 , the pixel driving circuit structure PC of the driving backplane 10 includes a second conductive layer 140 disposed on the second insulating layer 130. The second conductive layer 140 includes a connection pattern 144. The connection pattern 144 of the second conductive layer 140 is electrically connected to the connection pattern 124 of the first conductive layer 120 through the contact window 132 of the second insulating layer 130. In the present embodiment, the second conductive layer 140 is made of a metal material based on the consideration of conductivity. However, the present application is not limited thereto, and in other embodiments, the second conductive layer 140 can also be made of other conductive materials. For example, an alloy, a nitride of a metal material, an oxide of a metal material, an oxynitride of a metal material, or a stacked layer of a metal material and other conductive materials.

[0055] Referring to Figure 1 and Figure 2 , the pixel driving circuit structure PC of the driving backplane 10 further includes a third insulating layer 150 disposed on the second conductive layer 140 and having a contact window 152. In the present embodiment, the material of the third insulating layer 150 can be an inorganic material (for example, silicon oxide, silicon nitride, silicon oxynitride, or a stacked layer of at least two of the above materials), an organic material, or a combination thereof.

[0056] Referring to Figure 1 and Figure 2 , the pixel driving circuit structure PC of the driving backplane 10 further includes a third conductive layer 160 disposed on the third insulating layer 150. The third conductive layer 160 includes a first contact pad 162. The first contact pad 162 is electrically connected to the connection pattern 144 of the second conductive layer 140 through the contact window 152 of the third insulating layer 150. Referring toFigure 1 , Figure 2 and Figure 3 In this embodiment, the first contact pad 162 is electrically connected to the second terminal T3b of the transistor T3 and the second terminal T4b of the transistor T4 through the connection pattern 144 of the second conductive layer 140 and the connection pattern 124 of the first conductive layer 120.

[0057] Referring to Figure 1 In this embodiment, the first contact pad 162 can include a first portion 162a and a second portion 162b, the width W162b of the second portion 162b in the direction x is less than the width W162a of the first portion 162a in the direction x. When the pixel where the first contact pad 162 is located needs to be fixed as a dark spot, the second portion 162b of the first contact pad 162 can be cut off so that the first portion 162a of the first contact pad 162 is floating.

[0058] Referring to Figure 1 , Figure 2 and Figure 3 In this embodiment, the third conductive layer 160 further includes a second contact pad 164, which is structurally separated from the first contact pad 162. The first contact pad 162 and the second contact pad 164 of the third conductive layer 160 are respectively used to be electrically connected to the anode and the cathode of the light-emitting diode element LED. In this embodiment, the first contact pad 162 is electrically connected to one of the transistors T3 of the pixel driving circuit structure PC through the connection pattern 144 of the second conductive layer 140 and the connection pattern 124 of the first conductive layer 120, and the second contact pad 164 of the third conductive layer 160 receives a constant voltage OVSS.

[0059] Referring to Figure 1 and Figure 2 It is worth noting that at least one of the first conductive layer 120 and the second conductive layer 140 includes at least one conductive pattern 122, 142, which is structurally separated from the connection pattern 124 of the first conductive layer 120 and the connection pattern 144 of the second conductive layer 140, has at least one fixed potential, and overlaps with the first contact pad 162 of the third conductive layer 160.

[0060] Since the conductive patterns 122, 142 having the fixed potentials are disposed directly below the first contact pad 162, when the second portion 162b of the first contact pad 162 is cut off to electrically isolate the first portion 162a of the first contact pad 162 from the pixel driving circuit structure PC, the first portion 162a of the first contact pad 162 which is floating is not easily affected by the conductive patterns 122, 142 having the fixed potentials to cause a change in electric field. In this way, after the second portion 162b of the first contact pad 162 is cut off, the liquid crystal modulator (LC modulator) can correctly determine whether the pixel in which the first contact pad 162 is located has been repaired to be a dark spot.

[0061] Please refer to Figure 1 and Figure 2 In the present embodiment, the conductive patterns 122, 142 having the fixed potentials disposed directly below the first contact pad 162 can include the first conductive patterns 122 of the first conductive layer 120 and the second conductive patterns 142 of the second conductive layer 140, the first conductive patterns 122 of the first conductive layer 120 are structurally separated from the connection patterns 124 of the first conductive layer 120, the second conductive patterns 142 of the second conductive layer 140 are structurally separated from the connection patterns 144 of the second conductive layer 140, and the first conductive patterns 122 of the first conductive layer 120 and the second conductive patterns 142 of the second conductive layer 140 respectively have a first fixed potential and a second fixed potential. Please refer to Figure 1 , Figure 2 and Figure 3 For example, in the present embodiment, one of the first fixed potential of the first conductive patterns 122 and the second fixed potential of the second conductive patterns 142 can be a supply voltage OVDD, and the other of the first fixed potential of the first conductive patterns 122 and the second fixed potential of the second conductive patterns 142 can be a reference voltage Vref, but the present application is not limited thereto.

[0062] Please refer to Figure 1 and Figure 2 In the present embodiment, in the top view of the driving backplane 10, the first portion 162a of the first contact pad 162 overlaps at least one conductive pattern 122, 124 having at least one fixed potential, and the contact window 132 of the second insulating layer 130 and the contact window 152 of the third insulating layer 150 are located on the same side of the first portion 162a of the first contact pad 162. In the present embodiment, in the top view of the driving backplane 10, the second portion 162b of the first contact pad 162, the contact window 152 of the third insulating layer 150, and the contact window 132 of the second insulating layer 130 are located on the same side of the first portion 162a of the first contact pad 162. In the present embodiment, in the top view of the driving backplane 10, the contact window 132 of the second insulating layer 130 is located between the first contact pad 162 and the second contact pad 164.

[0063] It must be noted that the following examples will be described with reference to the elements and parts of the previous embodiments, wherein the same reference numerals are used to designate the same or similar elements and parts, and the description of the same technical contents will be omitted. The description of the omitted parts can be referred to the previous embodiments, and the following examples will not be repeated.

[0064] Figure 4 A top view of a driving backplane according to another embodiment of the present application. Figure 5 A cross-sectional view of a driving backplane according to another embodiment of the present application. Figure 5 Corresponding Figure 4 to the cross-sectional line II-II'. Figure 5 The second end T3b of the transistor T3, the first insulating layer 110, the first conductive layer 120, the second insulating layer 130, the second conductive layer 140, the third insulating layer 150 and the third conductive layer 160 of the driving backplane 10A are shown, and other components of the driving backplane 10A are omitted.

[0065] The driving backplane 10A of the present embodiment is similar to the driving backplane 10 described above, and the differences between the two are as follows. Please refer to Figure 4 and Figure 5 In the present embodiment, the conductive pattern 142 of the second conductive layer 140 having the second fixed potential is provided directly below the first contact pad 162, and the conductive pattern 122 of the first conductive layer 120 having the first fixed potential is not provided directly below the first contact pad 162. In the present embodiment, the second fixed potential of the conductive pattern 142 of the second conductive layer 140 can be the supply voltage OVDD (please refer to Figure 3 ) or the reference voltage Vref (please refer to Figure 3 ), but the present application is not limited thereto.

[0066] Figure 6 A cross-sectional view of a driving backplane according to another embodiment of the present application. Figure 6 The second end T3b of the transistor T3, the first insulating layer 110, the first conductive layer 120, the second insulating layer 130, the second conductive layer 140, the third insulating layer 150 and the third conductive layer 160 of the driving backplane 10B are shown, and other components of the driving backplane 10B are omitted.

[0067] The driving backplane 10B of the present embodiment is similar to the driving backplane 10 described above, and the differences between the two are as follows. Please refer to Figure 6 In the present embodiment, the conductive pattern 122 of the first conductive layer 120 having the first fixed potential is provided directly below the first contact pad 162, and the conductive pattern 142 of the second conductive layer 140 having the second fixed potential is not provided directly below the first contact pad 162. In the present embodiment, the second fixed potential of the conductive pattern 122 of the first conductive layer 120 can be the supply voltage OVDD (please refer toFigure 3 ) or a reference voltage Vref (may refer to Figure 3 ), but the present application is not limited thereto.

Claims

1. A driving backplane, comprising: a transistor; a first insulating layer disposed on the transistor and having a contact window; a first conductive layer disposed on the first insulating layer, wherein the first conductive layer comprises a connection pattern, and the connection pattern of the first conductive layer is electrically connected to the transistor through the contact window of the first insulating layer; a second insulating layer disposed on the first conductive layer and having a contact window; a second conductive layer disposed on the second insulating layer, wherein the second conductive layer comprises a connection pattern, and the connection pattern of the second conductive layer is electrically connected to the connection pattern of the first conductive layer through the contact window of the second insulating layer; a third insulating layer disposed on the second conductive layer and having a contact window; and a third conductive layer disposed on the third insulating layer, wherein the third conductive layer comprises a first contact pad, and the first contact pad of the third conductive layer is electrically connected to the connection pattern of the second conductive layer through the contact window of the third insulating layer; at least one of the first conductive layer and the second conductive layer comprises at least one conductive pattern, the at least one conductive pattern is structurally separated from the connection pattern of the first conductive layer and the connection pattern of the second conductive layer, the at least one conductive pattern has at least one fixed potential, and the first contact pad of the third conductive layer overlaps the at least one conductive pattern, wherein the at least one conductive pattern comprises a first conductive pattern and a second conductive pattern, the first conductive layer and the second conductive layer respectively comprise the first conductive pattern and the second conductive pattern, the first conductive pattern of the first conductive layer is structurally separated from the connection pattern of the first conductive layer, the second conductive pattern of the second conductive layer is structurally separated from the connection pattern of the second conductive layer; at least one fixed potential comprises a first fixed potential and a second fixed potential, and the first conductive pattern of the first conductive layer and the second conductive pattern of the second conductive layer respectively have the first fixed potential and the second fixed potential.

2. The driving backplane of claim 1, wherein in a top view of the driving backplane, a first portion of the first contact pad overlaps the at least one conductive pattern having the at least one fixed potential, and the contact window of the second insulating layer and the contact window of the third insulating layer are located on the same side of the first portion of the first contact pad.

3. The driving backplane of claim 1, wherein the first contact pad comprises a first portion and a second portion, a width of the second portion in a direction is less than a width of the first portion in the direction; in a top view of the driving backplane, the second portion of the first contact pad, the contact window of the second insulating layer and the contact window of the third insulating layer are located on the same side of the first portion of the first contact pad.

4. The driving backplane of claim 1, wherein the third conductive layer further comprises a second contact pad which is structurally separated from the first contact pad; in a top view of the driving backplane, the contact window of the second insulating layer is located between the first contact pad and the second contact pad. ​

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