Method for depositing intrinsic amorphous silicon thin film by pecvd method, cell preparation method and cell

Abstract

The application discloses a method for depositing intrinsic amorphous silicon film by PECVD, a battery preparation method and a battery. The method comprises the following steps: taking silane as a reaction gas, and sequentially depositing a first intrinsic amorphous silicon film layer and a second intrinsic amorphous silicon film layer on a silicon wafer substrate, wherein the deposition rate V1 of the first intrinsic amorphous silicon film layer is 0.4 nm / s-1.2 nm / s; the radio frequency power W2 of the second intrinsic amorphous silicon film layer is less than the radio frequency power W1 of the first intrinsic amorphous silicon film layer; and a mixed gas of silane and hydrogen is taken as a reaction gas to deposit a third intrinsic amorphous silicon film layer on the second intrinsic amorphous silicon film layer. The embodiment of the application avoids the situation that the radio frequency source is suddenly reduced from high radio frequency power to zero, and further avoids the silicon powder layer formed on the amorphous silicon film due to the sudden reduction of the radio frequency power, so that the passivation effect of the intrinsic amorphous silicon film is improved.

Description

Technical Field

[0001] This invention relates to the field of heterojunction solar cells, and in particular to a method for depositing intrinsic amorphous silicon thin films by PECVD, a method for preparing solar cells, and a solar cell. Background Technology

[0002] With the development of solar cells, cell conversion efficiency is getting higher and higher. Heterojunction cells, as one of the development directions of high-efficiency cells, are accounting for an increasingly larger proportion in the industry.

[0003] Silicon-based heterojunction solar cells are hybrid solar cells made using crystalline silicon substrates and amorphous silicon thin films. They are characterized by depositing doped amorphous silicon thin films on both sides of a monocrystalline silicon wafer, forming a transparent conductive layer on top of the doped amorphous silicon thin films, and then forming electrodes on the transparent conductive layer. Due to the presence of a heterojunction interface, the PN junction of a silicon-based heterojunction solar cell exhibits high recombination activity; therefore, effective passivation of this interface is a core technology for heterojunction solar cells.

[0004] To suppress the high recombination activity at the heterojunction interface, an intrinsic amorphous silicon film is formed between the doped amorphous silicon film and the monocrystalline silicon wafer. This intrinsic amorphous silicon film serves as an amorphous silicon passivation layer on the surface of the monocrystalline silicon wafer, effectively passivating the surface of the silicon wafer and greatly reducing the surface recombination rate. At the same time, the larger band gap width, after forming a PN junction with the monocrystalline silicon wafer, can obtain a larger built-in electric field, resulting in a higher open-circuit voltage for the heterojunction cell.

[0005] Amorphous silicon is typically grown using radio frequency plasma deposition (RF-PECVD). A common problem during the growth of amorphous silicon thin films is the epitaxial growth of the amorphous silicon film on a single-crystal silicon wafer. Once epitaxial growth occurs, the passivation effect of the intrinsic amorphous silicon film will be greatly reduced, affecting the open-circuit voltage and conversion efficiency of the heterojunction cell. In order to suppress the epitaxial growth of amorphous silicon films, a high deposition rate is generally used when forming intrinsic amorphous silicon films. However, using a high deposition rate will result in the growth of the intrinsic amorphous silicon film being less dense, thus affecting the passivation effect.

[0006] Therefore, controlling the formation of intrinsic amorphous silicon thin films to achieve better passivation effects is of great significance. Summary of the Invention

[0007] The purpose of this invention is to provide a method for depositing intrinsic amorphous silicon thin films using PECVD, which addresses the shortcomings of existing technologies. This method effectively avoids the formation of a silicon powder layer on the amorphous silicon thin film due to a sudden decrease in radio frequency power, thereby improving the passivation effect of the intrinsic amorphous silicon thin film.

[0008] This invention provides a method for depositing intrinsic amorphous silicon thin films using PECVD, comprising the following steps:

[0009] Using silane as the reactant gas, a first intrinsic amorphous silicon film layer and a second intrinsic amorphous silicon film layer are sequentially deposited on a silicon wafer substrate. The deposition rate V1 of the first intrinsic amorphous silicon film layer is 0.4 nm / s-1.2 nm / s. The radio frequency power W2 of the second intrinsic amorphous silicon film layer is less than the radio frequency power W1 of the first intrinsic amorphous silicon film layer.

[0010] A third intrinsic amorphous silicon film is deposited on top of a second intrinsic amorphous silicon film using a mixture of silane and hydrogen as the reactant gas.

[0011] Furthermore, the difference δW between the radio frequency power W2 during the deposition of the second intrinsic amorphous silicon film and the radio frequency power W1 during the deposition of the first intrinsic amorphous silicon film does not exceed 600W.

[0012] Furthermore, both the first intrinsic amorphous silicon film and the second intrinsic amorphous silicon film are deposited and formed within the first reaction chamber, and the pressure within the first reaction chamber decreases during the deposition of the second intrinsic amorphous silicon film.

[0013] Furthermore, the deposition rate V3 of the third intrinsic amorphous silicon film is less than V1; the deposition rate V3 of the third intrinsic amorphous silicon film is between 0.03 nm / s and 0.3 nm / s.

[0014] Furthermore, the thickness of the third intrinsic amorphous silicon film is greater than the sum of the thicknesses of the first intrinsic amorphous silicon film and the second intrinsic amorphous silicon film.

[0015] Furthermore, during the deposition of the third intrinsic amorphous silicon film, the silane / hydrogen ratio in the mixed gas of silane and hydrogen ranges from 5:1 to 1:20.

[0016] Furthermore, the second intrinsic amorphous silicon film layer includes several layers sequentially deposited on the first intrinsic amorphous silicon film layer, wherein the radio frequency power during the deposition of the several layers decreases sequentially with the deposition order and is all less than the radio frequency power during the deposition of the first intrinsic amorphous silicon film layer.

[0017] This invention also discloses a battery manufacturing method, comprising the following steps:

[0018] Provide an N-type silicon wafer substrate and perform texturing and cleaning on the N-type silicon wafer substrate;

[0019] The method of depositing intrinsic amorphous silicon thin films using the PECVD method is used to deposit upper and lower intrinsic amorphous silicon films on the upper and lower sides of an N-type silicon substrate, respectively.

[0020] An N-type doped layer is deposited on the upper side of the intrinsic amorphous silicon film;

[0021] A P-type doped layer is deposited on the underside of an intrinsic amorphous silicon film.

[0022] Transparent conductive layers are respectively disposed on the lower side of the P-type doped layer and the upper side of the N-type doped layer;

[0023] An electrode is formed on the light-transmitting conductive layer.

[0024] This invention also discloses a battery, comprising:

[0025] N-type silicon substrate;

[0026] An upper intrinsic amorphous silicon film layer and a lower intrinsic amorphous silicon film layer are disposed on the upper and lower sides of the N-type silicon wafer substrate; both the upper and lower intrinsic amorphous silicon film layers are deposited and formed using the PECVD method for depositing intrinsic amorphous silicon thin films.

[0027] A p-type doped layer is disposed on the lower side of the underlying intrinsic amorphous silicon film;

[0028] An N-type doped layer is disposed on the upper side of the intrinsic amorphous silicon film;

[0029] A light-transmitting conductive layer is disposed on the upper side of the N-type doped layer and the lower side of the P-type doped layer;

[0030] An electrode is disposed on the light-transmitting conductive layer and electrically connected to the light-transmitting conductive layer.

[0031] Compared with the prior art, in this embodiment of the present invention, a second intrinsic amorphous silicon film is deposited between the first and third intrinsic amorphous silicon films. During the deposition of the second intrinsic amorphous silicon film, the radio frequency (RF) power emitted by the RF source is reduced. This avoids the situation where the RF power suddenly drops from high to zero, thereby preventing the formation of a silicon powder layer on the amorphous silicon film due to the sudden reduction in RF power, and improving the passivation effect of the intrinsic amorphous silicon film. Attached Figure Description

[0032] Figure 1 This is a schematic flowchart of the battery preparation method disclosed in the embodiments of the present invention;

[0033] Figure 2 This is a schematic diagram of the battery structure disclosed in an embodiment of the present invention. Detailed Implementation

[0034] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0035] An embodiment of the present invention discloses a method for depositing intrinsic amorphous silicon thin films using PECVD, comprising the following steps:

[0036] Using silane as the reactant gas, a first intrinsic amorphous silicon film layer and a second intrinsic amorphous silicon film layer are sequentially deposited on a silicon wafer substrate. The deposition rate V1 of the first intrinsic amorphous silicon film layer is 0.4 nm / s-1.2 nm / s. The radio frequency power W2 of the second intrinsic amorphous silicon film layer is less than the radio frequency power W1 of the first intrinsic amorphous silicon film layer. Both the first and second intrinsic amorphous silicon film layers are deposited and formed within a first reaction chamber.

[0037] A third intrinsic amorphous silicon film is deposited on the second intrinsic amorphous silicon film using a mixture of silane and hydrogen as the reaction gas. The third intrinsic amorphous silicon film can be a single-layer film structure or a multilayer film structure containing different SiH4 / H2 ratios. The third intrinsic amorphous silicon film is deposited in the second reaction chamber.

[0038] The intrinsic amorphous silicon thin film disclosed in this embodiment comprises three layers. The three intrinsic amorphous silicon thin films are sequentially deposited on a silicon wafer substrate, which can be an N-type single crystal silicon wafer. The first intrinsic amorphous silicon film layer is directly deposited on the silicon wafer substrate, and a high deposition rate is used when depositing the first intrinsic amorphous silicon film layer. The high deposition rate can effectively suppress the epitaxial growth of the amorphous silicon thin film.

[0039] The reason for the epitaxial growth of amorphous silicon thin films is that the silicon substrate is crystalline silicon. The surface states of crystalline silicon have a lot of unsaturated dangling bonds. If the deposition rate is low, the amorphous silicon thin film will preferentially combine with the dangling bonds of crystalline silicon during deposition, thus causing epitaxial growth to occur at the location of the dangling bonds.

[0040] By employing a high deposition rate, the large number of Si ions or functional groups ionized during the deposition of the amorphous silicon film do not have time to be selectively deposited, and thus simultaneously deposited on the upper surface of the silicon substrate, effectively preventing the epitaxial growth of the amorphous silicon film. In this embodiment, the power during the deposition of the first intrinsic amorphous silicon film is set to 0.4 nm / s-1.2 nm / s. The deposition rate within this range can effectively suppress the epitaxial growth of the amorphous silicon film.

[0041] While high deposition rates can effectively suppress the epitaxial growth of amorphous silicon films, they can also lead to less dense intrinsic amorphous silicon films, thus affecting passivation performance. To achieve better passivation of the intrinsic amorphous silicon film, a third intrinsic amorphous silicon film is typically formed on top of the first intrinsic amorphous silicon film using a low deposition rate. Furthermore, hydrogen is incorporated into the reaction gas source during the deposition of the third intrinsic amorphous silicon film. In other words, the gas in the reaction chamber during the deposition of the third intrinsic amorphous silicon film is a mixture of silane and hydrogen. The hydrogen doping allows the reaction gas source to ionize more Si-H bonds, which is beneficial for passivation.

[0042] Because the deposition of the third intrinsic amorphous silicon film uses a mixed gas of hydrogen and silane, unlike the deposition of the first intrinsic amorphous silicon film which uses only silane as the reaction gas source, the first and third intrinsic amorphous silicon films are generally completed in different reaction chambers in order to maintain the continuity of production.

[0043] A first intrinsic amorphous silicon film is deposited in a first reaction chamber, and the gas source supplied in the first reaction chamber is silane; a third intrinsic amorphous silicon film is deposited in a second reaction chamber, and the gas source supplied in the second reaction chamber is a mixture of silane and hydrogen. If deposition and molding in one reaction chamber requires a long gas exchange time, it will affect the production continuity of the equipment.

[0044] After the first intrinsic amorphous silicon film is deposited, a different reaction chamber needs to be replaced. When replacing the reaction chamber, the radio frequency source needs to be turned off. This causes the radio frequency power emitted by the radio frequency source to drop from a very high state to zero after the first intrinsic amorphous silicon film is deposited. At this time, a large number of ionized Si ions or groups will be diffused in the first reaction chamber. These ions or groups are too large to be pumped away in time, so a silicon powder layer is easily deposited on the first intrinsic amorphous silicon. The presence of the silicon powder layer will affect the passivation effect of the intrinsic amorphous silicon film.

[0045] To avoid the aforementioned technical problems, this embodiment creatively deposits a second intrinsic amorphous silicon film layer between the first intrinsic amorphous silicon film layer and the third intrinsic amorphous silicon film layer. Both the second intrinsic amorphous silicon film layer and the first intrinsic amorphous silicon film layer are deposited and formed in the first reaction chamber, and the reaction gas source supplied in the first reaction chamber during the deposition process is silane.

[0046] During the deposition of the second intrinsic amorphous silicon film, the radio frequency (RF) power W2 emitted by the RF source is lower than the RF power W1 used during the deposition of the first intrinsic amorphous silicon film. The second and first intrinsic amorphous silicon films are deposited and formed continuously in the first reaction chamber. After the first intrinsic amorphous silicon film is deposited, the RF source power is immediately reduced from high to the low RF power required for the deposition of the second intrinsic amorphous silicon film. After the second intrinsic amorphous silicon film is deposited, the RF source is turned off.

[0047] The second intrinsic amorphous silicon film layer prevents the RF source from suddenly dropping from high RF power to zero, thereby avoiding the formation of a silicon powder layer on the amorphous silicon film due to the sudden drop in RF power, and improving the passivation effect of the intrinsic amorphous silicon film.

[0048] Furthermore, the difference δW between the RF power W2 during the deposition of the second intrinsic amorphous silicon film and the RF power W1 during the deposition of the first intrinsic amorphous silicon film should not exceed 600W. The sudden decrease in RF power of the RF source during the deposition of the second intrinsic amorphous silicon film should not exceed 600W, as exceeding 600W can easily lead to the deposition of a silicon powder layer.

[0049] In specific embodiments, the radio frequency power during the deposition of the first intrinsic amorphous silicon film is generally 400-1000W, and the radio frequency power during the deposition of the second intrinsic amorphous silicon film is generally 100-300W.

[0050] The deposition rate of the third intrinsic amorphous silicon film is relatively low, and the corresponding radio frequency power is generally lower than that of the first intrinsic amorphous silicon film. In a specific embodiment, the radio frequency power of the third intrinsic amorphous silicon film deposition is 150W-400W.

[0051] To better avoid the formation of a silicon powder layer, the pressure P2 in the first reaction chamber during the deposition of the second intrinsic amorphous silicon film is lower than the pressure P1 in the first reaction chamber during the deposition of the first intrinsic amorphous silicon film. The reduced pressure decreases the total amount of gas in the first reaction chamber, thereby reducing the number of ionized gas molecules.

[0052] In a specific embodiment, the pressure in the first reaction chamber during the deposition of the first intrinsic amorphous silicon film ranges from 0.5 to 0.7 torr, and the pressure in the first reaction chamber during the deposition of the second intrinsic amorphous silicon film ranges from 0.2 to 0.5 torr.

[0053] Correspondingly, the amount of gas entering the reaction chamber can be reduced by controlling the flow rate of the gas source, thereby reducing the amount of ionized gas molecules. In this embodiment, the amount of gas in the reaction chamber is changed only by altering the gas pressure. During the deposition of the first intrinsic amorphous silicon film, the flow rate of silane in the first reaction chamber ranges from 500 to 2000 sccm, and during the deposition of the second intrinsic amorphous silicon film, the flow rate of silane in the second reaction chamber ranges from 500 to 2000 sccm.

[0054] The above embodiment describes the deposition of a second intrinsic amorphous silicon film layer between a first intrinsic amorphous silicon film layer and a third intrinsic amorphous silicon film layer. In another embodiment, the second intrinsic amorphous silicon film layer comprises several layers, and the radio frequency (RF) power during the deposition of each layer decreases sequentially with the deposition order and is always less than the RF power during the deposition of the first intrinsic amorphous silicon film layer. The first layer deposited on the first intrinsic amorphous silicon film layer has the highest RF power during deposition, and the RF power decreases continuously with each upward deposition.

[0055] It is understandable that as the layers are deposited layer by layer upwards, the pressure in the first reaction chamber gradually decreases. This decrease in pressure reduces the silane content in the reaction chamber, thereby reducing the number of ionized gas molecules.

[0056] The third intrinsic amorphous silicon film, as the outermost layer, primarily serves a passivation function. Therefore, to ensure a good passivation effect, the deposition rate V3 of the third intrinsic amorphous silicon film is less than V1. Preferably, the deposition rate V3 of the third intrinsic amorphous silicon film ranges from 0.03 nm / s to 0.3 nm / s. The deposition rate V2 of the second intrinsic amorphous silicon film ranges from 0.1 nm / s to 0.3 nm / s.

[0057] The second intrinsic amorphous silicon film is actually a transition layer between the first and second intrinsic amorphous silicon films. It is a product of the first intrinsic amorphous silicon film formed during the phased shutdown of the RF source. The first intrinsic amorphous silicon film primarily suppresses the epitaxial growth of the amorphous silicon film, while the third intrinsic amorphous silicon film primarily acts as a passivation layer. The second intrinsic amorphous silicon film mainly prevents the formation of a silicon powder layer after a sudden reduction in RF source strength; its passivation effect is weak. Therefore, the thickness of the second intrinsic amorphous silicon film is set to be no greater than the thickness of the first intrinsic amorphous silicon film. Simultaneously, the thickness of the third intrinsic amorphous silicon film is greater than the sum of the thicknesses of the first and second intrinsic amorphous silicon films. Since the third intrinsic amorphous silicon film primarily serves a passivation function, its thickness is set to be greater than the former two.

[0058] In a specific embodiment, the thickness of the first intrinsic amorphous silicon film layer ranges from 1 nm to 3 nm, the thickness of the second intrinsic amorphous silicon film layer ranges from 0.5 nm to 2 nm, and the thickness of the third intrinsic amorphous silicon film layer ranges from 2 nm to 10 nm.

[0059] To better enable the third intrinsic amorphous silicon film to achieve a passivation effect, the silane / hydrogen ratio in the silane and hydrogen mixture is in the range of 5:1-1:20 during the deposition of the third intrinsic amorphous silicon film.

[0060] The present invention also provides a specific embodiment 1. To verify the significant improvement of embodiment 1 using the scheme of the present invention, two sets of comparative experiments were set up. In comparative experiment 1, two deposition rates were controlled when forming the intrinsic amorphous silicon thin film, and two layers were deposited. In comparative experiment 1, a first film layer was first deposited at a high deposition rate to form a layer that inhibits the epitaxial growth of the amorphous silicon film, and then a second film layer was deposited at a low deposition rate to form a layer that provides passivation. In comparative experiment 2, a single deposition rate was used to directly deposit the intrinsic amorphous silicon thin film.

[0061] Specifically, the method for forming the intrinsic amorphous silicon thin film in Example 1 is as follows:

[0062] First, in the first reaction chamber, a first intrinsic amorphous silicon film is deposited using silane as the reaction gas source. During the deposition process, the temperature in the first reaction chamber is controlled at 200℃, the pressure in the first reaction chamber is controlled at 0.6 torr, the flow rate of silane SiH4 in the first reaction chamber is controlled at 1000 sccm, the radio frequency power W1 when using radio frequency chemical vapor deposition is 500W, the deposition rate is controlled at 0.7nm / s, and the deposition thickness is controlled at 2.2nm.

[0063] Secondly, in the first reaction chamber, a second intrinsic amorphous silicon film is deposited using silane as the reaction gas source. During the deposition of the second intrinsic amorphous silicon film, the temperature in the first reaction chamber is controlled at 200℃, the pressure in the first reaction chamber is controlled at 0.5 torr, the flow rate of silane SiH4 in the first reaction chamber is controlled at 1000 sccm, the radio frequency power W2 when using the radio frequency chemical vapor deposition method is 250W, the deposition rate is controlled at 0.2nm / s, and the deposition thickness is controlled at 1.2nm. After the deposition of the second intrinsic amorphous silicon film is completed, the radio frequency source in the first reaction chamber needs to be turned off, and then the silicon substrate is transferred to the second reaction chamber to continue deposition.

[0064] Finally, a third intrinsic amorphous silicon film is deposited in the second reaction chamber. During the deposition of the third intrinsic amorphous silicon film, the temperature in the second reaction chamber is controlled at 200℃, and the pressure in the second reaction chamber is controlled at 0.6 torr. At this time, the reaction gas source in the second reaction chamber is a mixture of silane and hydrogen, wherein the mixing ratio of silane to hydrogen is SiH4 / H2=500:1000. During the deposition of the third intrinsic amorphous silicon film, the radio frequency power W3 of the radio frequency chemical vapor deposition method is 150W, the deposition rate is controlled at 0.1nm / s, and the deposition thickness is controlled at 4.2nm.

[0065] The specific plan for comparative experiment 1 is as follows:

[0066] First, in the first reaction chamber, a first film layer is deposited using silane as the reaction gas source. During the deposition process, the temperature in the first reaction chamber is controlled at 200℃, the pressure in the first reaction chamber is controlled at 0.6 torr, the flow rate of silane SiH4 supplied in the first reaction chamber is controlled at 1000 sccm, the radio frequency power is controlled at 500W, the deposition rate is controlled at 0.7nm / s, and the deposition thickness is controlled at 2.2nm.

[0067] Then, in the second reaction chamber, a second film layer is deposited using a mixture of silane and hydrogen as the reaction gas source. During the deposition of the second film layer, the temperature in the second reaction chamber is controlled at 200℃, the pressure in the second reaction chamber is controlled at 0.6 torr, the mixing ratio of silane and hydrogen in the reaction gas source in the second reaction chamber is SiH4 / H2=500:1000, the radio frequency power when using the radio frequency chemical vapor deposition method is 150W, the deposition rate is controlled at 0.1nm / s, and the deposition thickness is controlled at 5.4nm.

[0068] The specific plan for comparative experiment 2 is as follows:

[0069] An intrinsic amorphous silicon thin film is deposited in the second reaction chamber. The deposition temperature is controlled at 200°C, and the pressure is controlled at 0.6 torr. The reaction gas supplied to the second reaction chamber during the deposition of the intrinsic amorphous silicon thin film is a mixture of silane and hydrogen, with a mixing ratio of SiH4 / H2 = 500:500. The RF power of the RF source is controlled at 200W, the deposition rate is controlled at 0.15nm / s, and the thickness is controlled at 5.4nm.

[0070] To verify the benefits of Example 1, relevant parameters were tested on the intrinsic amorphous silicon thin films of Example 1, Comparative Experiment 1, and Comparative Experiment 2, respectively. The test results are shown below:

[0071]

[0072] The test results show that:

[0073] Regarding the open-circuit voltage (Voc) of the solar cell, the solar cell using the intrinsic amorphous silicon thin film of Example 1 is 1.5 mV higher than the solar cell using the intrinsic amorphous silicon thin film of Comparative Experiment 1, and 1.7 mV higher than the solar cell using the intrinsic amorphous silicon thin film of Comparative Experiment 2.

[0074] The fill factor (FF) of the solar cell using the intrinsic amorphous silicon thin film of Example 1 was improved by 0.2% compared to the solar cell using the intrinsic amorphous silicon thin film of Comparative Experiment 1, and the solar cell using the intrinsic amorphous silicon thin film of Example 1 was improved by 0.5% compared to the solar cell using the intrinsic amorphous silicon thin film of Comparative Experiment 2.

[0075] The conversion efficiency (EFF) of the solar cell using the intrinsic amorphous silicon thin film of Example 1 was improved by 0.09% compared to the solar cell using the intrinsic amorphous silicon thin film of Comparative Experiment 1, and by 0.21% compared to the solar cell using the intrinsic amorphous silicon thin film of Comparative Experiment 2.

[0076] It can be seen that the amorphous silicon thin film deposited by the method disclosed in the embodiments of this application has a better passivation effect. The open-circuit voltage of the solar cell with the intrinsic amorphous silicon thin film is greatly improved. At the same time, the fill factor (FF) and conversion efficiency (EFF) of the solar cell are greatly improved, thus improving the utilization efficiency of the solar cell.

[0077] like Figure 2 As shown, the present invention also discloses a battery manufacturing method, comprising the following steps:

[0078] Provide an N-type silicon wafer substrate and perform texturing and cleaning on the N-type silicon wafer substrate;

[0079] The above-described PECVD method is used to deposit an upper intrinsic amorphous silicon film and a lower intrinsic amorphous silicon film on the upper and lower sides of an N-type silicon substrate, respectively.

[0080] An N-type doped layer is deposited on the upper side of the intrinsic amorphous silicon film;

[0081] A P-type doped layer is deposited on the underside of an intrinsic amorphous silicon film.

[0082] Transparent conductive layers are respectively disposed on the lower side of the P-type doped layer and the upper side of the N-type doped layer;

[0083] An electrode is formed on the light-transmitting conductive layer.

[0084] like Figure 1 As shown, another embodiment of the present invention also discloses a heterojunction solar cell, comprising:

[0085] N-type silicon substrate;

[0086] Upper intrinsic amorphous silicon film layer and lower intrinsic amorphous silicon film layer are disposed on the upper and lower sides of the N-type silicon wafer substrate;

[0087] A p-type doped layer is disposed on the lower side of the underlying intrinsic amorphous silicon film;

[0088] An N-type doped layer is disposed on the upper side of the intrinsic amorphous silicon film;

[0089] A light-transmitting conductive layer is disposed on the upper side of the N-type doped layer and the lower side of the P-type doped layer;

[0090] An electrode is disposed on the light-transmitting conductive layer and electrically connected to the light-transmitting conductive layer.

[0091] The above description, based on the embodiments shown in the figures, details the structure, features, and effects of the present invention. The above description is only a preferred embodiment of the present invention, but the present invention is not limited to the scope of implementation shown in the figures. Any changes made in accordance with the concept of the present invention, or equivalent embodiments modified to have equivalent changes, that do not exceed the spirit covered by the specification and figures, should be within the protection scope of the present invention.

Claims

1. A method of depositing intrinsic amorphous silicon thin film by PECVD method, characterized in that, The method comprises the following steps: Depositing a first intrinsic amorphous silicon film layer and a second intrinsic amorphous silicon film layer on a silicon wafer substrate in sequence with silane as a reaction gas, wherein the deposition rate V1 of the first intrinsic amorphous silicon film layer is 0.4-1.2 nm / s; the radio frequency power W2 during deposition of the second intrinsic amorphous silicon film layer is less than the radio frequency power W1 during deposition of the first intrinsic amorphous silicon film layer; The first intrinsic amorphous silicon film layer and the second intrinsic amorphous silicon film layer are both deposited in a first reaction chamber, and the pressure in the first reaction chamber is reduced during deposition of the second intrinsic amorphous silicon film layer; A third intrinsic amorphous silicon film layer is deposited on the second intrinsic amorphous silicon film layer in a second reaction chamber with a mixture of silane and hydrogen as a reaction gas.

2. The method of depositing intrinsic amorphous silicon thin film by PECVD process according to claim 1, characterized in that: The difference δW between the radio frequency power W2 during deposition of the second intrinsic amorphous silicon film layer and the radio frequency power W1 during deposition of the first intrinsic amorphous silicon film layer is not more than 600 W.

3. The method of deposition of intrinsic amorphous silicon thin film by PECVD process as claimed in claim 1 wherein: The deposition rate V3 of the third intrinsic amorphous silicon film layer is less than V1; the deposition rate V3 of the third intrinsic amorphous silicon film layer is between 0.03 nm / s and 0.3 nm / s.

4. The method of claim 1, wherein the intrinsic amorphous silicon thin film is deposited by a PECVD method. The thickness of the third intrinsic amorphous silicon film layer is greater than the sum of the thicknesses of the first intrinsic amorphous silicon film layer and the second intrinsic amorphous silicon film layer.

5. The method of depositing intrinsic amorphous silicon thin film by PECVD process according to claim 1, wherein: The silane / hydrogen ratio of the mixture of silane and hydrogen during deposition of the third intrinsic amorphous silicon film layer is between 5:1 and 1:

20.

6. The method according to claim 1, characterized in that, The second intrinsic amorphous silicon film layer comprises a plurality of sub-layers deposited in sequence on the first intrinsic amorphous silicon film layer, and the radio frequency power during deposition of the sub-layers decreases in sequence and is all less than the radio frequency power during deposition of the first intrinsic amorphous silicon film layer.

7. A method of producing a battery, characterized by The method comprises the following steps: Providing an N-type silicon wafer substrate and performing texturing and cleaning on the N-type silicon wafer substrate; Depositing an upper intrinsic amorphous silicon film layer and a lower intrinsic amorphous silicon film layer on the upper and lower sides of the N-type silicon wafer substrate respectively by using the method for depositing an intrinsic amorphous silicon film according to any one of claims 1 to 6; Depositing an N-type doped layer on the upper side of the upper intrinsic amorphous silicon film layer; Depositing a P-type doped layer on the lower side of the lower intrinsic amorphous silicon film layer; Providing a light-transmitting conductive layer on the lower side of the P-type doped layer and the upper side of the N-type doped layer respectively; Forming an electrode on the light-transmitting conductive layer.

8. A battery, characterized by The method comprises: An N-type silicon wafer substrate; An upper intrinsic amorphous silicon film layer and a lower intrinsic amorphous silicon film layer provided on the upper and lower sides of the N-type silicon wafer substrate; the upper intrinsic amorphous silicon film layer and the lower intrinsic amorphous silicon film layer are both deposited by using the method for depositing an intrinsic amorphous silicon film according to any one of claims 1 to 6; A P-type doped layer provided on the lower side of the lower intrinsic amorphous silicon film layer; An N-type doped layer provided on the upper side of the upper intrinsic amorphous silicon film layer; A light-transmitting conductive layer provided on the upper side of the N-type doped layer and the lower side of the P-type doped layer; An electrode provided on the light-transmitting conductive layer and electrically connected with the light-transmitting conductive layer.

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