Surface Plasmon-Based Silicon Semiconductor Lasers

Abstract

The present invention discloses a silicon-based semiconductor laser based on surface plasmon, which includes a substrate, a gain layer, a confinement isolation layer, an electrical isolation layer, an upper electrode layer and a lower electrode layer. A groove is provided at the top of the substrate; the gain layer includes a lower cladding layer, an active layer, an upper cladding layer and a contact layer which are stacked in sequence from bottom to top. The lower cladding layer is disposed in the groove and is suitable for optical confinement and electron injection; the active layer is suitable for carrier recombination and light emission; the upper cladding layer is suitable for optical confinement and hole injection; the contact layer is located on the upper cladding layer. The confinement isolation layer includes a confinement layer and an isolation filling layer: the confinement layer is located on both sides or one side of the gain layer and is suitable for generating a region where surface plasmon confines the optical field; the isolation filling layer is formed on both sides of the gain layer; the electrical isolation layer is formed on the confinement isolation layer and is located on the periphery of the contact layer; the upper electrode layer is formed on the electrical isolation layer and is electrically connected to the contact layer; the lower electrode layer is located in the area of the substrate not covered by the confinement isolation layer, and can confine light at the confinement layer on the side of the gain layer, having the effects of high confinement, low loss and high gain.

Description

Technical Field

[0001] The present invention relates to the technical fields of lasers and optoelectronics, and particularly to a silicon-based semiconductor laser based on surface plasmons. Background Art

[0002] With the improvement of the integration level of integrated circuits, the chip feature size has developed from the micron scale to the nanometer scale, and the reliability of manufacturing processes has also been challenged.

[0003] The higher the device integration level, the more serious the transmission delay and crosstalk between metals are. The signal quality cannot be guaranteed, the manufacturing power consumption increases, and the cost will also remain high. The development of traditional silicon-based microelectronic devices has encountered bottlenecks, and people have turned their attention to the optoelectronic field, that is, optical interconnection. The transmission delay of optical interconnection is smaller than that of electrical interconnection; the frequency of light is high, and the use of space-division multiplexing, time-division multiplexing, code-division multiplexing, and wavelength-division multiplexing technologies makes its bandwidth much larger than that of electrical interconnection; the reduction of size increases the complexity of the chip, while optical interconnection can reduce crosstalk and ensure signal quality; the energy loss of photons is lower than that of electrons, and it is not easily affected by external electromagnetic fields. These advantages make optical interconnection an optimal solution for realizing high-bandwidth and low-power signals, but the current gain performance and loss control and other indicators still have not reached the level of large-scale practical application. Summary of the Invention

[0004] In view of the existing technical problems, the present invention provides a silicon-based semiconductor laser based on surface plasmons, which is used to at least partially solve the above technical problems. By means of a gain layer and a confinement layer, light is confined at the confinement layer on the side of the gain layer to achieve local enhancement.

[0005] An embodiment of the present invention provides a silicon-based semiconductor laser based on surface plasmons, including:

[0006] A substrate, on the top of which a groove is provided;

[0007] A gain layer, disposed on the substrate, and including:

[0008] A lower cladding layer, disposed in the groove and higher than the upper surface of the substrate, suitable for light confinement and electron injection;

[0009] An active layer, located on the top of the lower cladding layer, suitable for carrier recombination and light emission;

[0010] An upper cladding layer, located on the top of the active layer, suitable for light confinement and hole injection; and

[0011] A contact layer, located on the top of the upper cladding layer;

[0012] A confinement isolation layer, formed on the substrate and located on both sides of the gain layer, and including:

[0013] A confinement layer, located on both sides or one side of the gain layer, suitable for generating a plasmon-confined optical field region; and

[0014] An isolation filling layer, formed on both sides of the gain layer, and electrically isolating the confinement layer and the gain layer;

[0015] An electrical isolation layer, formed on the confinement isolation layer and located at the periphery of the contact layer;

[0016] An upper electrode layer, formed on the electrical isolation layer, and the upper electrode layer is electrically connected to the contact layer; and

[0017] A lower electrode layer, suitable for cooperating with the upper electrode layer to inject current into the gain layer, and located in a region of the substrate not covered by the confinement isolation layer.

[0018] According to an embodiment of the present disclosure, the confinement layer includes:

[0019] A metal layer, located on both sides or one side of the gain layer; and

[0020] An insulating layer, disposed between the metal layer and the gain layer.

[0021] According to an embodiment of the present disclosure, a confinement insulating layer is further provided between the substrate and the confinement isolation layer.

[0022] According to an embodiment of the present disclosure, the substrate includes a silicon substrate or includes a bottom silicon layer, a silicon oxide layer, and a top silicon layer stacked in sequence from bottom to top.

[0023] According to an embodiment of the present disclosure, the material of the insulating layer is silicon dioxide, silicon nitride, hafnium oxide, or magnesium difluoride, and the thickness of the insulating layer is 5 nm - 90 nm.

[0024] According to an embodiment of the present disclosure, the material of the metal layer is gold, silver, sodium, or graphene, and the thickness of the metal layer is 50 nm - 300 nm.

[0025] According to an embodiment of the present disclosure, the material of the isolation filling layer is benzocyclobutene or polyimide.

[0026] According to an embodiment of the present disclosure, the material of the electrical isolation layer is silicon dioxide or silicon nitride, and the thickness of the electrical isolation layer is 100 nm - 800 nm.

[0027] According to an embodiment of the present disclosure, the electrically lasing wavelength range of the active layer is between 1300 nm and 1600 nm.

[0028] According to an embodiment of the present disclosure, a supplementary layer is further included, and the supplementary layer is located between any adjacent layers of the lower cladding layer, the active layer, the upper cladding layer, and the contact layer, and is adapted to enhance the connection stability between adjacent layers.

[0029] Based on the surface plasmon silicon-based semiconductor laser provided by the present invention, the gain layer provides optical gain and population inversion. The upper electrode layer and the lower electrode layer cooperate to inject current into the gain layer, so that the excitonic energy levels of the active layer transition and recombine. Most of the electrons near the confinement layer transition and couple to become surface plasmon polaritons, and thus propagate along the confinement layer without forming photons. This is the dark mode. The dark mode transmits along the confinement layer without radiative loss, that is, a coherent strong near-field is generated without radiating photons. Since the spontaneous emission of this mode couples into surface plasmon polaritons and does not radiate photons to the outside, it can be used to provide optical amplification with very low noise and large loss compensation. By breaking the symmetry of the nanostructure, the surface plasmon polaritons can be transformed from the dark mode to the light-emitting mode. The resonance of the surface plasmon polaritons near the confinement layer can lead to enhanced spontaneous emission and thus generate laser light. The silicon-based semiconductor laser utilizes the excitation of surface plasmon polaritons on the surface of the confinement layer to achieve three-dimensional confinement and transmission of the optical field, and has the effects of high confinement, low loss, and high gain. Brief Description of the Drawings

[0030] Figure 1 is a cross-sectional view of a first embodiment of a silicon-based semiconductor laser according to an embodiment of the present invention;

[0031] Figure 2 is a schematic diagram of the cross-sectional optical field distribution of a first embodiment of a silicon-based semiconductor laser according to an embodiment of the present invention;

[0032] Figure 3 is a cross-sectional view of a second embodiment of a silicon-based semiconductor laser according to an embodiment of the present invention;

[0033] Figure 4 is a cross-sectional view of a third embodiment of a silicon-based semiconductor laser according to an embodiment of the present invention; and

[0034] Figure 5 is a cross-sectional view of a fourth embodiment of a silicon-based semiconductor laser according to an embodiment of the present invention.

[0035] Reference Signs

[0036] 1, Substrate;

[0037] 11, Bottom silicon layer;

[0038] 12, Silicon oxide layer;

[0039] 13, Top silicon layer;

[0040] 2. Gain layer;

[0041] 21. Lower cladding layer;

[0042] 22. Active layer;

[0043] 23. Upper cladding layer;

[0044] 24. Contact layer;

[0045] 3. Limiting isolation layer;

[0046] 31. Limiting layer;

[0047] 311. Insulating layer;

[0048] 312. Metal layer;

[0049] 32. Isolation filling layer;

[0050] 4. Electrical isolation layer;

[0051] 5. Upper electrode layer;

[0052] 6. Lower electrode layer;

[0053] 7. Limiting insulating layer;

[0054] 8. Silicon substrate;

[0055] 9. Groove. Detailed implementation manners

[0056] To make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the following further elaborates on the present invention in detail with reference to specific embodiments and the accompanying drawings.

[0057] The structural embodiments and method descriptions of the present invention are disclosed herein. It should be understood that this is not intended to limit the present invention to the specifically disclosed embodiments, and the present invention can be implemented by using other features, elements, methods and embodiments. Similar elements in different embodiments are usually labeled with similar numbers.

[0058] With the improvement of the integration level of integrated circuits, the chip feature size has developed from the micron scale to the nanometer scale, and the reliability of manufacturing processes has also been challenged. The higher the device integration level, the more serious the transmission delay and crosstalk between metals, and the signal quality cannot be guaranteed. The transmission delay of optical interconnection is smaller than that of electrical interconnection; the frequency of light is high, and the use of space-division multiplexing, time-division multiplexing, code-division multiplexing, and wavelength-division multiplexing technologies makes its bandwidth much larger than that of electrical interconnection; the reduction of size causes an increase in the complexity of the chip, while optical interconnection can reduce crosstalk and ensure signal quality; the energy loss of photons is lower than that of electrons, and it is not easily affected by external electromagnetic fields. These advantages make optical interconnection an optimal solution for realizing high-bandwidth and low-power signals, but the current gain performance and loss control and other indicators still have not reached the level of large-scale practical application.

[0059] An embodiment of the present invention provides a surface plasmon-based silicon-based semiconductor laser, including a substrate 1, a gain layer 2, a confinement isolation layer 3, an electrical isolation layer 4, an upper electrode layer 5, and a lower electrode layer 6. A groove 9 is provided at the top of the substrate 1; the gain layer 2 is disposed on the substrate 1 and is located at the groove 9; the confinement isolation layer 3 is formed on the substrate 1 and is located on both sides of the gain layer 2, and includes a confinement layer 31 and an isolation filling layer 32. The confinement layer 31 is located on one or both sides of the gain layer 2 and is suitable for generating plasmon to confine the oscillation region of electrons; the isolation filling layer 32 is formed on both sides of the gain layer 2 and electrically isolates the confinement layer 31 and the gain layer 2; the electrical isolation layer 4 is formed on the confinement isolation layer 3 and is located on the periphery of the gain layer 2 and is in contact with the top of the gain layer 2; the upper electrode layer 5 is formed on the electrical isolation layer 4, and the upper electrode layer 5 is electrically connected to the gain layer 2; the lower electrode layer 6 is suitable for cooperating with the upper electrode layer 5 to inject current into the gain layer and is located in the region of the substrate 1 that is not covered by the confinement isolation layer 3.

[0060] According to the surface plasmon-based silicon-based semiconductor laser provided by the present invention, the gain layer 2 provides optical gain and population inversion, and the upper electrode layer 5 and the lower electrode layer 6 cooperate to inject current into the gain layer, so that the exciton energy level of the active layer 22 undergoes transition recombination, and most of the electrons near the confinement layer 31 undergo transition coupling to become surface plasmon polaritons, which then propagate along the confinement layer 31 without forming photons, which is the dark mode. The dark mode propagates along the confinement layer 31 without radiative loss, that is, a coherent strong near-field is generated without radiating photons. Since the spontaneous emission of this mode is coupled into surface plasmon polaritons and does not radiate photons to the outside world, it can be used to provide optical amplification with very low noise and large loss compensation. By breaking the symmetry of the nanostructure, the surface plasmon polaritons can be transformed from the dark mode to the light-emitting mode. The resonance of the surface plasmon polaritons near the confinement layer 31 can lead to enhanced spontaneous emission and then generate laser light. The silicon-based semiconductor laser realizes three-dimensional confinement and transmission of the optical field by exciting the surface plasmon polaritons of the confinement layer 31, and has the effects of high confinement, low loss, and high gain.

[0061] Figure 1 is a cross-sectional view of the first embodiment of a silicon-based semiconductor laser according to an embodiment of the present invention; Figure 2 is a schematic diagram of the cross-sectional optical field distribution of the first embodiment of a silicon-based semiconductor laser according to an embodiment of the present invention.

[0062] In an exemplary embodiment, as Figure 1 shown, the substrate 1 includes a bottom silicon layer 11, a silicon oxide layer 12, and a top silicon layer 13 that are stacked in sequence from bottom to top. The bottom silicon layer 11 is N-type or P-type doped, and the doping concentration is 17 cm -3 to 19 cm -3 , and a groove 9 is etched at the top of the top silicon layer 13, and the groove 9 is V-shaped. The substrate 1 realizes dielectric isolation of components in the integrated circuit, completely eliminates the parasitic latch-up effect in the bulk silicon circuit, and has the advantages of small parasitic capacitance, high integration density, high speed, simple process, small short-channel effect, and is particularly suitable for low-voltage and low-power circuits, etc., and will become the mainstream technology for deep sub-micron low-voltage and low-power integrated circuits.

[0063] In an exemplary embodiment, the gain layer 2 includes a lower cladding layer 21, an active layer 22, an upper cladding layer 23, and a contact layer 24. The lower cladding layer 21 is disposed in the groove 9 and is higher than the upper surface of the substrate 1, and is suitable for optical confinement and electron injection; the active layer 22 is located on the top of the lower cladding layer 21 and is suitable for carrier recombination and light emission; the upper cladding layer 23 is located on the top of the active layer 22 and is suitable for optical confinement and hole injection; the contact layer 24 is located on the top of the upper cladding layer 23.

[0064] According to an embodiment of the present disclosure, the lower cladding layer 21 of the gain layer 2 grows on the top silicon layer 13 of the substrate 1 and is suitable for coupling to related devices above the top silicon layer 13.

[0065] In an exemplary embodiment, the electrical lasing wavelength range of the active layer 22 is between 1300 nm and 1600 nm, such as 1300 nm, 1350 nm, 1400 nm, 1450 nm, 1500 nm, 1550 nm, 1600 nm.

[0066] According to an embodiment of the present disclosure, the gain layer 2 provides optical gain and population inversion. In the gain layer 2, the number of electrons at the bottom of the conduction band in the high-energy state is much larger than the number of holes at the top of the valence band in the low-energy state. This is achieved by applying a forward bias to the homojunction or heterojunction and injecting necessary carriers into the active layer 22, exciting electrons from the valence band with lower energy to the conduction band with higher energy. When a large number of electrons and holes in the population inversion state recombine, stimulated emission occurs.

[0067] In an exemplary embodiment, the surface plasmon-based silicon semiconductor laser further includes a supplementary layer made of silicon dioxide followed by silicon nitride. The supplementary layer is located between any adjacent layers of the lower cladding layer 21, the active layer 22, the upper cladding layer 23, and the contact layer 24, and is suitable for enhancing the connection stability between adjacent layers to show better process effects.

[0068] In an exemplary embodiment, the confinement isolation layer 3 is formed on the substrate 1 and is located on both sides of the gain layer 2, and includes a confinement layer 31 and an isolation filling layer 32.

[0069] Specifically, the confinement layer 31 is located on both sides of the gain layer 2 and is suitable for generating a plasmon to confine the oscillation region of electrons. The confinement layer 31 includes an insulating layer 311 and a metal layer 312. The metal layer 312 is located on both sides of the gain layer 2, and the insulating layer 311 is disposed between the metal layer 312 and the gain layer 2. The isolation filling layer 32 is formed on both sides of the gain layer 2 and is in contact with the metal layer 312 of the confinement layer 31 to electrically isolate the confinement layer and the gain layer.

[0070] Specifically, the material of the insulating layer 311 is silicon dioxide, silicon nitride, hafnium oxide, or magnesium difluoride, and the thickness of the insulating layer 311 is 5 nm - 90 nm, such as 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm.

[0071] Specifically, the material of the metal layer 312 is gold, silver, sodium, or graphene, and the thickness of the metal layer 312 is 50 nm - 300 nm, such as 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, 190 nm, 200 nm, 210 nm, 220 nm, 230 nm, 240 nm, 250 nm, 260 nm, 270 nm, 280 nm, 290 nm, 300 nm.

[0072] Specifically, the material of the isolation filling layer 32 is benzocyclobutene or polyimide.

[0073] According to an embodiment of the present disclosure, electron holes (excitons) in the upper cladding layer 23 are excited under the cooperation of the upper electrode layer and the lower electrode layer 6, and carriers in the lower cladding layer 21 are excited under the cooperation of the upper electrode layer 5 and the lower electrode layer 6, so that excitons in the active layer 22 undergo energy level transition and recombination. Most of the electrons close to the insulating layer 311 transition and couple to form surface plasmon polaritons, which then propagate along the insulating layer 311 without forming photons. This is the dark mode. The dark mode is transmitted along the interface between the insulating layer 311 and the metal layer 312 without radiative loss, that is, a coherent strong near-field is generated without radiating photons. Since the spontaneous emission of this mode couples into surface plasmon polaritons and does not radiate photons to the outside world, it can be used to provide optical amplification with very low noise and large loss compensation. By breaking the symmetry of the nanostructure, the surface plasmon polaritons can be transformed from the dark mode to the light-emitting mode. The resonance of the surface plasmon polaritons near the nanostructure of the metal layer 312 can lead to enhanced spontaneous emission and thus generate laser light. As Figure 2 described, the confinement layers 31 on both sides of the gain layer 2 confine the oscillation region of electrons and confine the optical field, achieving local enhancement and reducing leakage loss. The silicon-based semiconductor laser uses the excitation of surface plasmon polaritons on the surface of the confinement layer 31 to achieve three-dimensional confinement and transmission of the optical field, with the effects of high confinement, low loss, and high gain.

[0074] In one exemplary embodiment, a confinement insulating layer 7 is further provided between the substrate 1 and the confinement isolation layer 3, which is suitable for electrically isolating the gain layer 2.

[0075] Specifically, the confinement insulating layer 7 is located on both sides of the lower cladding layer 21 and between the top silicon layer 13 and the confinement isolation layer 3. The length of the confinement insulating layer 7 is less than the length of the top silicon layer 13, and the two side edges of the top silicon layer 13 away from the lower cladding layer 21 are not covered by the confinement insulating layer 7. The lower electrode layer 6 is located in the region of the top silicon layer 13 not covered by the confinement insulating layer 7.

[0076] In one exemplary embodiment, the material of the electrical isolation layer 4 is silicon dioxide or silicon nitride, and the thickness of the electrical isolation layer 4 is 100 nm - 800 nm. For example, 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, 400 nm, 450 nm, 500 nm, 550 nm, 600 nm, 650 nm, 700 nm, 750 nm, 800 nm.

[0077] Figure 3 is a cross-sectional view of the second embodiment of the silicon-based semiconductor laser according to an embodiment of the present invention.

[0078] In another exemplary embodiment, as Figure 3 shown, the substrate 1 includes a bottom silicon layer 11 and a silicon oxide layer 12 stacked in sequence from bottom to top. The bottom silicon layer 11 is doped with N-type or P-type, and the doping concentration is 17 cm-3 To 19 cm -3 。

[0079] Specifically, a groove 9 is etched at the top of the bottom silicon layer 11. The groove 9 is V-shaped. The lower cladding layer 21 is located in the groove 9, and the height of the lower cladding layer 21 is greater than the height of the silicon oxide layer 12. The silicon oxide layer 12 is located at the top of the bottom silicon layer 11. The silicon oxide layer 12 is suitable for electrical isolation, and the two side edges at the top of the bottom silicon layer 11 are not covered by the silicon oxide layer 12. The lower electrode layer 6 is located in the area of the bottom silicon layer 11 not covered by the silicon oxide layer 12.

[0080] According to an embodiment of the present disclosure, the lower cladding layer 21 of the gain layer 2 grows on the top silicon layer 13 of the substrate 1, and the light output position is above the silicon oxide layer 12 of the substrate 1; it can be coupled to related devices fabricated on the bottom silicon layer 11.

[0081] Figure 4 is a cross-sectional view of a third embodiment of a silicon-based semiconductor laser according to an embodiment of the present invention.

[0082] In another illustrative embodiment, as Figure 4 shown, the substrate 1 includes a silicon substrate 8. The silicon substrate 81 is N-type or P-type doped with a doping concentration of 17 cm-3 to 19 cm-3. A groove 9 is etched at the top of the silicon substrate 8. The groove 9 is V-shaped, and the lower cladding layer 21 is located in the groove 9.

[0083] Specifically, a confinement insulating layer 7 is further provided between the silicon substrate 8 and the confinement isolation layer 3, which is suitable for electrical isolation. The confinement insulating layer 7 is located on both sides of the lower cladding layer 21. The height of the confinement insulating layer 7 is lower than the height of the lower cladding layer 21 and is located between the silicon substrate 8 and the confinement isolation layer 3. The length of the confinement insulating layer 7 is less than the length of the silicon substrate 8. The two side edges of the silicon substrate 8 away from the lower cladding layer 21 are not covered by the confinement insulating layer 7. The lower electrode layer 6 is located in the area of the silicon substrate 8 not covered by the confinement insulating layer 7.

[0084] According to an embodiment of the present disclosure, the lower cladding layer 21 of the gain layer 2 grows on the groove 9 of the silicon substrate 8, and the light output position is above the silicon substrate 8; it can be coupled to related devices fabricated on the silicon substrate 8.

[0085] Figure 5 is a cross-sectional view of a fourth embodiment of a silicon-based semiconductor laser according to an embodiment of the present invention.

[0086] In another illustrative embodiment, as Figure 5 shown, the confinement isolation layer 3 is located above the top silicon layer 13 of the substrate 1 and on one side of the gain layer 2, and includes a confinement layer 31 and an isolation filling layer 32.

[0087] Specifically, the confinement layer 31 is located on one side of the gain layer 2 and is applicable to generating a plasmon confinement oscillation region for electrons and a region for confining an optical field. The confinement layer 31 includes an insulating layer 311 and a metal layer 312, and the metal layer 312 is located on one side of the gain layer 2; the insulating layer 311 is disposed between the metal layer 312 and the gain layer 2. The isolation filling layer 32 is applicable to electrical isolation, is located on both sides of the gain layer 2, and is in contact with the gain layer 2 and the metal layer 312 of the confinement layer 31.

[0088] According to the silicon-based semiconductor laser based on surface plasmon provided by the present invention, the gain layer 2 provides optical gain and population inversion, and the upper electrode layer 5 and the lower electrode layer 6 cooperate to inject current into the gain layer, so that the exciton energy levels of the active layer 22 transition and recombine, and most of the electrons near the confinement layer 31 transition and couple to become surface plasmon polaritons, thus propagating along the confinement layer 31 without forming photons, which is the dark mode. The dark mode propagates along the confinement layer 31 without radiative loss, that is, generating a coherent strong near-field without radiating photons. Since the spontaneous emission of this mode couples into surface plasmon polaritons and does not radiate photons to the outside world, it can be used to provide optical amplification with very little noise and large loss compensation. By breaking the symmetry of the nanostructure, the surface plasmon polaritons can be transformed from the dark mode to the light-emitting mode. The resonance of the surface plasmon polaritons near the confinement layer 31 can lead to enhanced spontaneous emission and then generate laser light. The silicon-based semiconductor laser realizes three-dimensional confinement and transmission of the optical field by exciting the surface plasmon polaritons of the confinement layer 31, and has the effects of high confinement, low loss and high gain.

[0089] The above specific embodiments further elaborate on the purpose, technical solutions and beneficial effects of the present invention. It should be understood that the above are only specific embodiments of the present invention and are not used to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A silicon-based semiconductor laser based on surface plasmons, characterized in that, Comprising: A substrate (1), on the top of which a groove (9) is provided; A gain layer (2), disposed on the substrate (1), and comprising: A lower cladding layer (21), disposed in the groove (9) and higher than the upper surface of the substrate (1), suitable for light confinement and electron injection; An active layer (22), located on the top of the lower cladding layer (21), suitable for carrier recombination and light emission; An upper cladding layer (23), located on the top of the active layer (22), suitable for light confinement and hole injection; and A contact layer (24), located on the top of the upper cladding layer (23); A confinement isolation layer (3), formed on the substrate (1) and located on both sides of the gain layer (2), and comprising: A confinement layer (31), located on one or both sides of the gain layer (2), suitable for generating a region for surface plasmon polariton confinement of the optical field; and An isolation filling layer (32), formed on both sides of the gain layer (2) and electrically isolating the confinement layer (31) and the gain layer (2); An electrical isolation layer (4), formed on the confinement isolation layer (3) and located around the contact layer (24); An upper electrode layer (5), formed on the electrical isolation layer (4), and the upper electrode layer (5) is electrically connected to the contact layer (24); and A lower electrode layer (6), suitable for cooperating with the upper electrode layer (5) to inject current into the gain layer (2), and located in the region of the substrate (1) not covered by the confinement isolation layer (3).

2. The silicon-based semiconductor laser according to claim 1, wherein The confinement layer (31) comprises: A metal layer (312), located on one or both sides of the gain layer (2); and An insulating layer (311), disposed between the metal layer (312) and the gain layer (2).

3. The silicon-based semiconductor laser according to claim 1, wherein A confinement insulating layer (7) is further provided between the substrate (1) and the confinement isolation layer (3).

4. The silicon-based semiconductor laser according to claim 1, wherein, The substrate (1) comprises a silicon substrate (8) or comprises a bottom silicon layer (11), a silicon oxide layer (12) and a top silicon layer (13) stacked in sequence from bottom to top.

5. The silicon-based semiconductor laser according to claim 2, wherein The material of the insulating layer (311) is silicon dioxide, silicon nitride, hafnium oxide or magnesium difluoride, and the thickness of the insulating layer (311) is 5 nm - 90 nm.

6. The silicon-based semiconductor laser according to claim 2, characterized in that, The material of the metal layer (312) is gold, silver, sodium or graphene, and the thickness of the metal layer (312) is 50 nm - 300 nm.

7. The silicon-based semiconductor laser according to claim 1, wherein The material of the isolation filling layer (32) is benzocyclobutene or polyimide.

8. The silicon-based semiconductor laser according to claim 1, characterized in that, The material of the electrical isolation layer (4) is silicon dioxide or silicon nitride, and the thickness of the electrical isolation layer (4) is 100 nm - 800 nm.

9. The silicon-based semiconductor laser according to claim 1, wherein The electrical lasing wavelength range of the active layer (22) is 1300 nm - 1600 nm.

10. The silicon-based semiconductor laser according to claim 1, wherein, It further comprises a supplementary layer, which is located between any adjacent layers of the lower cladding layer (21), the active layer (22), the upper cladding layer (23) and the contact layer (24), and is suitable for enhancing the connection stability between adjacent layers.

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