High receiving sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit

Abstract

The present invention provides a high-receiving-sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit, comprising an I2C interface circuit, a DC-DC conversion circuit, an APD bias boost circuit, an electro-optical conversion circuit, a photoelectric conversion circuit, a drive circuit, a CDR circuit, and a monitoring circuit; the IC interface circuit comprises an input / output interface circuit and a converter circuit. The high-receiving-sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit proposed in the present invention, through circuit optimization design, can achieve a single-mode light receiving sensitivity of ≤-26dBm, a multi-mode light output power of ≥-5dBm, an output light wavelength of 840nm-860nm multi-mode light, and a received light wavelength of 1270-1610nm single-mode light. In the receiving channel, an APD bias boost circuit is used to boost the external input DC3.3V power supply voltage to DC24V, providing a higher bias voltage for the photoelectric conversion detector, thereby significantly improving the module's receiving sensitivity. In terms of structural design, the electrical signal input / output pins are welded, and the integrated photoelectric conversion circuit is fixed to the printed circuit board by screws, thereby improving the product's resistance to vibration and impact.

Description

Technical Field

[0001] The present invention relates to the technical field of photoelectric conversion modules, and in particular to a high-receiving-sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit. Background Art

[0002] With the development of electronic information technology, optical communication technology is being used more and more widely in the radar field. Since multiple transmitting / receiving components distributed on the radar array need to simultaneously receive uplink control commands from the remote machine room, in order to ensure that multiple transmitting / receiving components work simultaneously, since there are EDFA optical amplifiers in the 1550nm band, the currently preferred approach is to amplify the uplink control optical signal through the EDFA and then split it into multiple optical signals through a passive optical power splitter and output them to the transmitting / receiving components on the array. In this way, when the optical cables connected to each transmitting / receiving component are of equal length, multiple transmitting / receiving components can receive the uplink control signal simultaneously.

[0003] Furthermore, the downlink echo signals from the radar array's multiple transmit / receive components are enormous. The data processing modules that process these signals often use multi-channel, parallel multimode optical modules with 12 / 24 / 48 channels for data reception, due to size and power consumption considerations. Traditional optical modules in SPF+, QSFP+, and SNAP12 form factors all operate in either single-mode or multimode mode, making them inadequate for this application.

[0004] With the increasing interface speed and the demand for low power consumption, the IO voltage levels of the FPGAs used in transmit / receive components have dropped from 5V and 3.3V to below 1.8V. However, the IO voltage level of conventional optical modules remains at 5V. This requires level conversion circuits to connect conventional optical modules and existing FPGAs, making direct connection impossible. Furthermore, the radar array's uplink control signals utilize optical amplification and optical power phase-splitting aggregation, resulting in weak optical signal strength and poor signal quality to each transmit / receive component. Summary of the Invention

[0005] In view of the needs and problems of the uplink / downlink optical links on the radar array, the purpose of the present invention is to provide a high-receiving-sensitivity single-mode receiving and multi-mode transmitting integrated optoelectronic conversion circuit, which can achieve single-mode optical receiving sensitivity ≤ -26dBm and multi-mode optical output power ≥ -5dBm, thereby improving receiving sensitivity.

[0006] According to a first aspect of the present invention, a high-receiving-sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit is proposed, comprising an I2C interface circuit, a DC-DC conversion circuit, an APD bias boost circuit, an electro-optical conversion circuit, a photoelectric conversion circuit, a drive circuit, a CDR circuit, and a monitoring circuit; the IC interface circuit comprises an input / output interface circuit and a converter circuit;

[0007] The DC-DC conversion circuit is connected to the input-output interface circuit and is used to convert the input voltage provided by the input-output interface circuit and output a stable DC power supply;

[0008] The output end of the DC-DC conversion circuit is connected to the APD bias boost circuit, and the APD bias boost circuit is used to boost the input DC power supply and provide it to the photoelectric conversion circuit;

[0009] The monitoring circuit is connected to the input-output interface circuit via the converter circuit, and the converter circuit is used to identify the data direction based on direction sensing and realize the conversion of the input to the IC interface circuit level to the monitoring circuit level;

[0010] The monitoring circuit is connected to the driving circuit and is used to control the driving circuit to control the operation of the electro-optical conversion circuit and the photoelectric conversion circuit;

[0011] The driving circuit is connected to the electro-optical conversion circuit and the photoelectric conversion circuit respectively, and is used to provide photoelectric conversion and electro-optical conversion APD bias, wherein the electro-optical conversion circuit is used to convert the electrical signal into an optical signal, and the photoelectric conversion circuit is used to convert the received optical signal into a current signal;

[0012] The driving circuit is connected to the input-output interface circuit via the CDR circuit. The CDR circuit is used to feed back the state of the CDR circuit locked to the input data to the monitoring circuit, and the monitoring circuit controls the adaptive adjustment of the optical port.

[0013] The high-sensitivity single-mode receiver and multi-mode transmitter integrated photoelectric conversion circuit proposed in this invention achieves single-mode optical receiving sensitivity ≤ -26dBm and multi-mode optical output power ≥ -5dBm through circuit optimization. It outputs multimode light with a wavelength of 840nm to 860nm and receives single-mode light with a wavelength of 1270nm to 1610nm. In the receiving channel, an APD bias boost circuit boosts the external DC 3.3V input power supply voltage to DC 24V, providing a higher bias voltage for the photoelectric conversion detector, significantly improving the module's receiving sensitivity. The positive and negative polarity of the signal input and output differential pair pins is software-configurable, facilitating circuit board layout and routing. Furthermore, the electrical signal input / output pins are soldered, and the integrated photoelectric conversion circuit is secured to the printed circuit board with screws, enhancing the product's resistance to vibration and shock.

[0014] It should be understood that all combinations of the foregoing concepts and the additional concepts described in more detail below, as long as such concepts are not mutually inconsistent, can be considered part of the inventive subject matter of this disclosure. In addition, all combinations of the claimed subject matter are considered part of the inventive subject matter of this disclosure.

[0015] The foregoing and other aspects, embodiments, and features of the present invention will be more fully understood from the following description in conjunction with the accompanying drawings. Other additional aspects of the present invention, such as features and / or beneficial effects of the exemplary embodiments, will become apparent from the following description or through practice of specific embodiments according to the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings are not intended to be drawn to scale. In the drawings, each identical or nearly identical component shown in various figures may be represented by the same reference numeral. For the sake of clarity, not every component is labeled in every figure. Embodiments of various aspects of the present invention will now be described by way of example and with reference to the accompanying drawings, in which:

[0017] Figure 1 It is a circuit principle diagram of a single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit according to an embodiment of the present invention.

[0018] Figure 2 Schematic diagram of a DC-DC conversion circuit according to an embodiment of the present invention.

[0019] Figure 3 FIG. 4 is a schematic diagram of an APD bias boost circuit according to an embodiment of the present invention.

[0020] Figure 4 Schematic diagram of an input and output interface circuit according to an embodiment of the present invention.

[0021] Figure 5 is a schematic diagram of a converter circuit according to an embodiment of the present invention.

[0022] Figure 6 FIG. 4 is a schematic diagram of a monitoring circuit according to an embodiment of the present invention.

[0023] Figure 7 FIG. 4 is a schematic diagram of a driving circuit according to an embodiment of the present invention.

[0024] Figure 8 FIG. 4 is a schematic diagram of a CDR circuit according to an embodiment of the present invention.

[0025] Figure 9 FIG. 4 is a schematic diagram of a photoelectric conversion circuit according to an embodiment of the present invention.

[0026] Figure 10 Schematic diagram of an electro-optical conversion circuit according to an embodiment of the present invention.

[0027] Figure 11 Schematic diagram of electrical pins and fixing method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0028] In order to better understand the technical content of the present invention, specific embodiments are given below in conjunction with the accompanying drawings.

[0029] Various aspects of the present invention are described in this disclosure with reference to the accompanying drawings, in which a number of illustrative embodiments are shown. The embodiments of the present disclosure are not necessarily intended to include all aspects of the present invention. It should be understood that the various concepts and embodiments introduced above, as well as those described in more detail below, can be implemented in any of many ways, because the concepts and embodiments disclosed herein are not limited to any embodiment. In addition, some aspects of the present disclosure may be used alone or in any appropriate combination with other aspects disclosed herein.

[0030] Combine Figure 1-10 The exemplary embodiment shown is a high receiving sensitivity single-mode receiving and multi-mode transmitting integrated optoelectronic conversion circuit, which includes an I2C interface circuit, a DC-DC conversion circuit 20, an APD bias boost circuit 30, an electro-optical conversion circuit 40, a photoelectric conversion circuit 50, a driving circuit 60, a CDR circuit 70 and a monitoring circuit 80; the I2C interface circuit includes an input-output interface circuit 10 and a converter circuit 11.

[0031] Combine Figure 1 As shown, the DC-DC converter circuit 20 is connected to the input-output interface circuit 10 for converting the input voltage provided by the input-output interface circuit 10 to output a stable DC power supply.

[0032] The output end of the DC-DC conversion circuit 20 is connected to the APD bias boost circuit 30 . The APD bias boost circuit 30 is used to boost the input DC power supply and provide it to the photoelectric conversion circuit 50 .

[0033] The monitoring circuit 80 is connected to the input / output interface circuit 10 via the converter circuit 11 . The converter circuit 11 is used to identify the data direction based on direction sensing and implement the conversion of the input level to the I2C interface circuit to the monitoring circuit level.

[0034] The monitoring circuit 80 is connected to the driving circuit 60 and is used to control the driving circuit 60 to control the operation of the electro-optical conversion circuit 40 and the photoelectric conversion circuit 50 .

[0035] The driving circuit 60 is connected to the electro-optical conversion circuit 40 and the photoelectric conversion circuit 50, respectively, and is used to provide APD bias for photoelectric conversion and electro-optical conversion. The electro-optical conversion circuit 40 is used to convert electrical signals into optical signals, and the photoelectric conversion circuit 50 is used to convert received optical signals into current signals.

[0036] The driving circuit 60 is connected to the input / output interface circuit 10 via the CDR circuit 70 . The CDR circuit 70 is used to feed back the state of the CDR circuit 70 locked to the input data to the monitoring circuit 80 , and the monitoring circuit 80 controls the adaptive adjustment of the optical port.

[0037] Combine Figure 2 As shown, the DC-DC conversion circuit 20 uses the TPS61002 power management chip, which converts the received input 1.8V~3.3VDC into a stable 3.3VDC output, output current, and output current ≥1000mA, making the module's operating voltage wider and improving response sensitivity.

[0038] Among them, the 1.8V~3.3VDC input from the input and output interface circuit 10 is connected to the TPS61002 power management chip through the VIN port, and the 3.3VDC output is achieved at the output terminal VOUT by adjusting two parallel voltage divider resistors, wherein the inductor L2 is connected to its EN terminal, VIN terminal and SW terminal.

[0039] like Figure 2 In the example shown, the DC / DC conversion circuit includes a U2 chip (such as the TPS61022 chip shown in the figure) and a peripheral circuit composed of L2, C15, C16, C17, R13 and R14. The U2 chip TPS61022 is a power management chip. The U2 chip converts the input DC 1.8V~3.3V into DC 3.3V, with an output current ≥1000mA, to power various functional circuits inside the integrated photoelectric conversion circuit module. The output voltage is regulated to 3.3V through the configuration of R13 and R14.

[0040] Combine Figure 3 In the example shown, the APD bias boost circuit 30 includes a boost DC / DC converter LT3482 with APD current monitoring function, which is used to boost the 3.3 VDC input from the DC-DC conversion circuit 20 to 24 VDC to provide a bias voltage for the photoelectric conversion circuit 50 .

[0041] In an embodiment of the present invention, the APD bias boost circuit is intended to provide the 24V voltage required for the operation of the selected photoelectric conversion circuit. Figure 3In the example, the APD bias boost circuit 30 includes a U1 chip, i.e., an LT3482 chip, and a peripheral circuit composed of R8 and R10. The U1 chip is a power boost management chip. In the present invention, the LT3482 chip is used to boost the input 3.3V voltage to 24V by setting the organization of R8 and R10 resistors to provide bias for the photoelectric conversion circuit.

[0042] Combine Figure 1 、 2 As shown in , 4, and 5, the input and output interface circuit 10 includes a J1 connector IC, such as Figure 4 As shown, it comprises a J1 connector IC and peripheral circuitry consisting of C24, C25, C33, and C39. In the embodiment of the present invention, J1 is preferably a 14-pin, high-speed, solderable electrical connector. It provides reliable contact between the integrated photoelectric conversion circuit and the printed circuit board, improving shock resistance, and provides power and status input / output for the module. C24, C25, C33, and C39 are AC coupling capacitors.

[0043] Among them, pins 7 and 8 of the J1 connector IC are the external I2C input / output pins of the module.

[0044] Combine Figure 5 As shown, the converter circuit 11 includes an I2C level converter, a buffer and a hub chip U3. Preferably, a TCA9416 chip is used to realize automatic direction sensing, so as to automatically identify the direction of the I2C data line and realize the conversion of the input I2C interface level to the monitoring circuit level. The monitoring circuit serves as a controller MCU, which is responsible for processing I2C messages. The controller MCU adopts a C8051F390 chip.

[0045] like Figure 1 Combine Figure 8 As shown, the CDR circuit 70 includes a GN2003 driver chip SU1, whose RTen port is connected to the driver circuit 60, for receiving input data signals and representing the photoelectric conversion signal. When it is not locked to the input data, it outputs a low level to the monitoring circuit 80 through the 23-pin LOL. After detecting the low level, the monitoring circuit 80 outputs a high level and turns off the data recovery circuit inside the CDR circuit 70 to achieve optical port rate adaptation.

[0046] Combine Figure 6 、 8 As shown, when the internal clock of the SU1 chip is not locked to the input data, it outputs a low level to the U5 chip of the monitoring circuit 80 through its pin 23. When the U5 chip of the monitoring circuit 80 detects this low level, it outputs a high level through pin 12, turning off the internal data recovery circuit of the SU1 chip, thereby adapting to the optical port rate adaptation.

[0047] Combine Figure 9 As shown, the photoelectric conversion circuit 50 includes a ROSA for converting the received optical signal into a current signal, using a RoSA_GN3362 chip U6. Figure 9 As shown, L8 and C44 form the peripheral circuit, and the U6 chip is an APD photoelectric device that converts the input light signal into a current signal.

[0048] Combine Figure 10 As shown, the electro-optical conversion circuit 40 includes a TOSA module for converting an electrical signal into an optical signal, and the intensity of the optical signal varies with the magnitude of the input current. Figure 10 As shown, the electrical-optical conversion circuit 40 includes a J2 chip, which converts electrical signals into optical signals. The intensity of the optical signal varies with the input current.

[0049] Combine Figure 7 As shown, the driving circuit 60 uses the GN1158 multi-rate optical transceiver control chip U4. Figure 4 The driving circuit 60 includes the U4 chip and its peripheral circuits, provides a bias circuit for the photoelectric and electro-optical conversion circuits, and reads the output light power and input power through the backlight tube.

[0050] Combine Figure 1 The photoelectric conversion circuit shown also includes an alarm circuit connected to the monitoring circuit 80. The alarm circuit includes an N-type MOS transistor Q1, whose base is connected to the monitoring circuit 80, its D terminal is grounded, and its S terminal is connected to the input / output interface circuit 10. When the monitoring circuit 80 detects that the optical power is lower than a preset threshold, it outputs a low level through its pin, triggering an alarm.

[0051] Combine Figure 1 、 8 As shown, the alarm circuit adopts a no-light alarm circuit. The output of the N-type MOS tube Q1 is controlled by the U5 chip of the monitoring circuit. When the U5 chip detects that the optical power is lower than the preset threshold, it outputs a low level through pin 21.

[0052] Combine Figure 1 As shown, the RxLos pin is the OD gate output, indicating a receiving alarm, which is convenient for interconnection with other level interfaces.

[0053] Combine Figure 1 、 11 As shown, in the embodiment of the present invention, an I2C level conversion circuit is used so that the I2C interface can adapt to both 1.8V and 3.3V level standards, reducing the external circuit used in the module; the input and output polarity reversal can be set through the I2C interface. Through this interface, the polarity of Tx+ and Tx-, Rx+ and RX- can be reversed, which facilitates circuit board layout; there is a configurable CDR circuit in the receiving channel, which can be turned on or off through external configuration pins or I2C software.

[0054] In the embodiment of the present invention, the module uses welded 14-pin electrical pins to improve electrical contact reliability, and is fixed using two M2.5 screws to improve the module's resistance to shock and vibration.

[0055] While the present invention has been disclosed above with reference to preferred embodiments, this is not intended to limit the present invention. Persons skilled in the art will readily appreciate that various modifications and variations can be made without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the claims.

Claims

1. A high receiving sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit, characterized in that: The invention comprises an I2C interface circuit, a DC-DC conversion circuit (20), an APD bias boost circuit (30), an electro-optical conversion circuit (40), a photoelectric conversion circuit (50), a drive circuit (60), a CDR circuit (70) and a monitoring circuit (80); the I2C interface circuit comprises an input / output interface circuit (10) and a converter circuit (11); The DC-DC conversion circuit (20) is connected to the input-output interface circuit (10) and is used to convert the input voltage provided by the input-output interface circuit (10) to output a stable DC power supply; The output end of the DC-DC conversion circuit (20) is connected to the APD bias boost circuit (30), and the APD bias boost circuit (30) is used to boost the input DC power supply and provide it to the photoelectric conversion circuit (50); The monitoring circuit (80) is connected to the input-output interface circuit (10) via the converter circuit (11), and the converter circuit (11) is used to identify the direction of data based on direction sensing, and realize the conversion of the input level to the I2C interface circuit to the monitoring circuit level; The monitoring circuit (80) is connected to the driving circuit (60) and is used to control the driving circuit (60) to control the operation of the driving electro-optical conversion circuit (40) and the photoelectric conversion circuit (50); The driving circuit (60) is connected to the electro-optical conversion circuit (40) and the photoelectric conversion circuit (50) respectively, and is used to provide APD bias for photoelectric conversion and electro-optical conversion, wherein the electro-optical conversion circuit (40) is used to convert an electrical signal into an optical signal, and the photoelectric conversion circuit (50) is used to convert a received optical signal into a current signal; The driving circuit (60) is connected to the input-output interface circuit (10) via the CDR circuit (70); the CDR circuit (70) is used to feed back a state of the CDR circuit (70) locked to input data to a monitoring circuit (80); and the monitoring circuit (80) controls the adaptive adjustment of the optical port.

2. The high receiving sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit according to claim 1 is characterized in that: The DC-DC conversion circuit (20) adopts a TPS61002 power management chip, receives an input of 1.8V to 3.3VDC and converts it into a stable 3.3VDC output, outputting a current ≥1000mA; The 1.8V to 3.3VDC input from the input-output interface circuit (10) is connected to the TPS61002 power management chip through the VIN port, and a 3.3VDC output is achieved at the output terminal VOUT by adjusting two voltage-dividing resistors connected in parallel, wherein the inductor L2 is connected to the EN terminal, the VIN terminal and the SW terminal.

3. The high receiving sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit according to claim 1, characterized in that: The APD bias boost circuit (30) includes a boost DC / DC converter LT3482 with APD current monitoring, and is used to boost 3.3VDC input from the DC-DC conversion circuit (20) to 24VDC, thereby providing a bias voltage for the photoelectric conversion circuit (50).

4. The high receiving sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit according to claim 1, characterized in that: The CDR circuit (70) includes a GN2003 driver chip, an RTen port of which is connected to the driver circuit (60) and is used to receive an input data signal and characterize a photoelectric conversion signal. When the input data is not locked, the CDR circuit (70) outputs a low level to the monitoring circuit (80) through the 23-pin LOL. After detecting the low level, the monitoring circuit (80) outputs a high level and turns off the data recovery circuit inside the CDR circuit (70) to achieve optical port rate adaptation.

5. The high receiving sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit according to claim 1, characterized in that: The electro-optical conversion circuit (40) comprises a TOSA module for converting an electrical signal into an optical signal, and the intensity of the optical signal varies with the magnitude of the input current.

6. The high receiving sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit according to claim 1, characterized in that: The photoelectric conversion circuit (50) comprises a ROSA for converting a received optical signal into a current signal, and adopts a RoSA_GN3362 chip.

7. The high receiving sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit according to claim 1, characterized in that: The driving circuit (60) adopts a GN1158 multi-rate optical transceiver control chip.

8. The high receiving sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit according to claim 1, characterized in that: The monitoring circuit (80) includes a C8051F39x microcontroller chip.

9. The high receiving sensitivity single-mode receiving and multi-mode transmitting integrated photoelectric conversion circuit according to claim 1, characterized in that: The photoelectric conversion circuit further includes an alarm circuit connected to the monitoring circuit (80); the alarm circuit includes an N-type MOS transistor, the base of which is connected to the monitoring circuit (80), the D pole is grounded, and the S pole is connected to the input-output interface circuit (10); wherein, when the monitoring circuit (80) detects that the optical power is lower than a preset threshold, it outputs a low level through its pin to trigger an alarm.

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