True random number generator

Abstract

This invention relates to a device for generating truly random numbers, comprising a digital chaotic oscillating autonomous Boolean network as an entropy source. According to the invention, the proposed digital chaotic oscillating autonomous Boolean network comprises three interconnected logic elements, two of which represent two-input XOR gates and / or XNOR gates, while the third logic element has three inputs and one output, and implements a logic "one-to-one counting" function, wherein if a logic 1 appears at no more than one input of the third logic element, the output of the third logic element is set to logic 1; otherwise, the output is set to logic 0. The resulting technical advantages include improved truly random number generation speed while reducing energy consumption.

Description

Technical Field

[0001] This invention relates to a device for generating true random numbers, including a digital chaotic oscillating autonomous Boolean network as an entropy source.

[0002] The following abbreviations are used in this specification:

[0003] RNG - Random Number Generator

[0004] PRNG - Pseudo-random number generator

[0005] PLIC - Programmable Logic Integrated Circuits

[0006] ABN - Autonomous Boolean Network

[0007] SCO-Synchronous Chaotic Oscillator

[0008] VLSIC - Very Large Scale Integrated Circuit

[0009] ASIC - Application-Specific Integrated Circuit Background Technology

[0010] Known digital pseudo-random number generators (PRNGs) in the prior art are based on some cyclic function and include, for example, linear congruential generators, linear feedback shift register generators, generalized feedback shift register generators, and Mersenne twisters. Optimal results are obtained by using a simple digital counter concatenated with a cryptographic algorithm (such as a block cipher or a one-way hash function).

[0011] A common drawback of all PRNGs is the deterministic nature of the resulting sequence. This precludes the use of pseudo-random numbers for cryptographic purposes or significantly complicates their application, as the entire pseudo-random number chain can be predicted if the device algorithm and the initial state or any prior state of such a generator are known. Furthermore, all these methods are computationally intensive, and the higher the quality requirement for the random numbers, the more computations need to be performed.

[0012] There exist known true random number generators based on specific physical principles. Historically, random physical phenomena such as dice rolling, radioactive decay, microphone digitization of environmental noise, and atmospheric noise picked up by radio waves have been used.

[0013] The drawbacks of these devices are that they require specialized physical setups, sensors or transducers, and computer interfaces. Furthermore, their operation can be highly dependent on environmental conditions. They consume significant amounts of energy, and the generation of random numbers is often too slow.

[0014] There are known generators that are based on physical principles but use only electronic components. For example, the ERNIE 1 system and the Ferranti Mark 1 computer use thermal noise from resistors. Generators that utilize avalanche breakdown of a reverse-biased pn junction in a Zener diode are often used [1].

[0015] The disadvantage of this device is that it requires the fabrication of a separate analog section, which excludes or significantly complicates the fabrication of digitally integrated circuits (VLSICs), including RNGs. Furthermore, this generator cannot be implemented in programmable logic integrated circuits (PLICs).

[0016] There are known RNGs that utilize the frequency difference between two oscillators caused by thermal drift. For example, the Intel 82802 firmware memory chip has two oscillators, a fast oscillator and a slow oscillator, located in different parts of the crystal, and measures the frequency difference between them. Such RNGs can be implemented entirely through digital logic, as typically, an inverter with feedback and a chain of buffer elements as delay lines are used as the oscillators.

[0017] The disadvantages of this type of generator include: the need to place the oscillators far apart in the crystal topology to reduce thermal dependence between them; low performance because drift must accumulate over some operating periods; and poor predictability of random number quality. Furthermore, this type of generator is practically difficult to implement in PLIC because the development tools do not allow control over the physical placement of components. Typically, in the case of automatic placement, logically connected oscillators will also be placed close to each other, meaning greater frequency dependence between them.

[0018] Over the past few years, there has been active exploration of so-called "autonomous Boolean networks" (ABNs). These networks represent a topological connection diagram of logic elements without providing external control or clock signals to the logic elements. However, this imposes significant additional requirements: no element should have a "floating" (not connected to any output) input, and two outputs should not be connected to each other. These requirements arise from the deterministic nature of the network's logic element states and the electrical safety of its operation. Depending on the topology, ABNs can exhibit different behaviors: they can be in a stable or quasi-stable state, oscillating at a certain frequency and waveform, or in a so-called "Boolean chaotic" state. A simple example of an ABN is a repeater with outputs connected to its inputs. Such a network is in a quasi-stable state, meaning it will remain in that state indefinitely, depending on the initial state (0 or 1). Another example is one or more inverters connected to each other in a loop. Depending on the number of inverters in the loop, their behavior will be stable, quasi-stable, or oscillating. An inverter is likely to be in a stable state (between 0 and 1) because the physical implementation of an inverter is as an amplifier with a high gain ratio and negative feedback equal to 1. For the same reason, it may not be generated in a very small network containing elements with low slew rates for the output signal. With an odd number of inverters, the network will oscillate periodically in proportion to the number of inverters. With an even number of inverters, the network is in a quasi-steady state. It can be seen that the random number generator implemented in the Intel 82802 integrated circuit based on two oscillators and a measurement of the frequency drift between them is actually a special case of ABN. It uses two rings with different odd numbers of inverters. More complex networks often lead to chaotic behavior.

[0019] There exists a direct, substantial physical analogy that helps to intuitively understand the behavior of ABNs under various conditions. Consider a pendulum. After being deflected and released, a simple pendulum begins to oscillate with a stable period. This is an example of oscillating behavior. If we turn the pendulum upwards, the point at the top represents a quasi-steady state; any small deviation will cause the pendulum to fall to the left or right. If we divide the pendulum's arms into two parts connected by a hinge, we obtain a so-called chaotic pendulum whose evolution is not accurately predictable in time, because any infinitesimal change in the initial state (up to the quantum level) increases over time and causes arbitrarily large changes in the pendulum's behavior. Through this analogy, it is possible to measure the random deviation of the frequencies of two pendulums due to chaotic externalities; however, this requires comprehensive analysis. On the other hand, it is possible to deflect a chaotic pendulum and obtain random values ​​in the shortest possible time.

[0020] As can be seen from the given examples, oscillating ABNs can indeed be used to generate random numbers. However, ABNs that initially exhibit chaotic behavior are more promising. The rate of development and qualitative characteristics of Boolean chaos are determined by many factors, the most important of which is the characteristic Lyapunov exponent. If the exponent factor is negative, the deviation gradually disappears over time. If the exponent factor is greater than zero, the system amplifies random deviations. If the exponent factor equals 0, the deviations are neither suppressed nor amplified, but rather accumulate as they enter the system from the outside. For rapid physical generation of random numbers, the exponent factor must be non-negative. A simple pendulum has a negative Lyapunov exponent, which means that the oscillation frequency stabilizes immediately without external influence. A chaotic pendulum is a special case of a system with a positive exponent, so any small shock will lead to completely different dynamics after a short time. In binary logic, there are no logic functions that amplify small deviations, but some functions do not allow the resulting changes to disappear—in the case of two parameters, these are the XOR (exclusive or multiple-or) and XNOR (multiple-or-multiple-or) functions. Any change in any input signal will lead to a change in the output signal. For this reason, it is preferable to use these functions in RNG.

[0021] From the current scientific perspective, ABN circuits are known to exhibit chaotic behavior. Chaos occurs when the operation of the network is determined by the minimum deviation of the power supply voltage, forward shift caused by thermal fluctuations, pickup, and other destabilizing factors. In reference [3], two-input and three-input logic XOR gates or XNOR gates are considered, where the output is returned to the input through two (or three) delay lines respectively. In such networks, chaotic behavior can be observed at certain ratios of delay line lengths. The problem with this network is that its behavior is not only highly dependent on the ratio of delay line lengths, but also highly dependent on their physical implementation rather than chaos, which may lead to oscillations. Furthermore, although the schematic of the device is simple, it requires a large number of logic elements because each delay line is an inverter chain. Thus, a circuit that looks simple can contain dozens of elements. In addition, three of the four variants of this generator have a fundamental drawback: the generation is lost after a period of time. XOR elements gain a steady state with 0 at the output regardless of the number of inputs, while XNOR elements have two inputs with 1 at the output. XOR elements with three inputs have an additional steady state with 1 at the output. As shown in reference [4], more or less stable generation can be observed with three-input XNOR elements and delay lines consisting of 18, 6 and 2 inverters.

[0022] In 2009, Rui Zhang et al. [2] proposed a circuit consisting of three two-input logic elements, two XOR gates and one XNOR gate, in which Boolean chaos occurred. To implement such a circuit, he used discrete components. Such circuits also have inherent drawbacks, which will be discussed below. When such a network is implemented in PLIC, the generation may vanish or may exhibit oscillations instead of random behavior.

[0023] In his paper [4], David Rosin proposed a more complex circuit that also exhibits chaotic behavior—a large loop of three-input XOR elements, where each element receives signals from itself and its two nearest neighbors as inputs. In this case, generated signals are picked up from several points in the loop and combined through the XOR elements. However, such a circuit is not feasible in its pure form because a loop consisting of an even number of elements has at most four different stable states and will inevitably stabilize in one of them: an all-zero, all-1 state, and two variants of alternating zeros and 1s.

[0024] To eliminate steady states, Rosin replaced one of the XOR elements in the generator with an XNOR element. The quality of chaos generated in such a generator depends on the number of logic elements in the ring. Rosin suggested using 16 elements. However, the excitation generated in such a system must pass through eight logic elements before reaching the other side of the ring, which is equivalent to one microprocessor clock cycle in time. Therefore, in terms of hardware implementation, it is desirable to wait several clock cycles to eliminate the correlation between consecutive values. A drawback of the Rosin and Zhang generators is that it is impossible to introduce externally destabilizing influences into the network.

[0025] A true random number generator is known in the prior art, which includes a digital chaotic oscillating autonomous Boolean network as an entropy source (see patent application specification WO2019222866 published in 2019). Similar to the Rosin generator, this generator uses a ring consisting of three XOR elements and one XNOR element, along with XOR elements for picking up signals from the ring. Unlike the Rosin generator, this generator uses an additional inverter to generate a high-frequency periodic signal and disrupts the stability of the autonomous Boolean network.

[0026] This device is the closest in terms of technical substance and the technical results achieved, and has been selected as the prototype of the proposed invention.

[0027] The prototype's drawbacks also include the excessive time required to generate truly random numbers, the multiple components, and the increased energy consumption. Summary of the Invention

[0028] Based on this initial observation, the main objective of the proposed invention is to provide a true random number generator, comprising a digital chaotic oscillating autonomous Boolean network as an entropy source, which would allow at least one of the aforementioned drawbacks to be mitigated, and specifically, to increase the true random number generation rate while reducing energy consumption, which is the task at hand.

[0029] The objective of this invention is to construct a partially controllable Boolean chaotic network (ABN) that has a minimal size and ensures that Boolean chaotic states are reached at the highest possible rate. The most important requirement is that the network cannot reach stable, quasi-stable, or oscillating states. Furthermore, the increase in the chaotic rate directly depends on the size of the cyclic signal propagation paths present in the network. The larger the path size, the longer the signal must take to return to its origin. Therefore, the network should be as small as possible. This becomes apparent when considering an oscillator composed of an odd number of inverters: the oscillation period is proportional to the length of the loop.

[0030] To perform further analysis, it is best to consider synchronous Boolean networks. The practical difference between synchronous Boolean networks and ABNs is that the signals at the outputs of all logic elements change simultaneously, so it can be assumed that the network transmits multiple states. Theoretically, ABNs become synchronous Boolean networks when the element operating speeds are the same, all conductor lengths are the same, and the element operating conditions are the same. In addition, as shown in reference [3], the mutual influence of different network segments leads to their forced synchronization. This is a very important influence that must be eliminated or minimized. Since the goal is to make the network as small as possible, such networks can be analyzed in order of increasing number of logic elements. Since many possible logic functions and the networks based on them are countable and ordered, a comprehensive analysis can be performed.

[0031] A single-element network can include either a repeater or an inverter. In the former case, there is no generation, while in the latter case, there is periodic oscillation. Therefore, a network consisting of a single logic element will not produce chaos.

[0032] We will now consider a network with two elements. Each element can contain no more than two inputs, and there are a total of four different network states. Many possible combinations of transitions exist between these states, but they can be grouped by attributes. The first class is when there exists a degenerate state, where the network can exist indefinitely. Such a network is clearly unusable. The second class is when there exists at least one cycle consisting of two or three states. In this case, one element is in a stable state while the second element oscillates, or both elements oscillate with the same period. Such a network is also unusable. The last possible case is when the network evolves through all four states. In this case, the total number of different cycles equals 3! = 6. Ordering all variants shows that in this case, one element oscillates with a period of T, while the other oscillates with a period of 2T, or both elements oscillate with the same period of 2T. Therefore, a two-element network cannot be a reliable source of chaos.

[0033] Therefore, to ensure chaotic behavior, a network consisting of at least three elements is required. In general, these should be two or three input elements, as the presence of a single input element would turn the network into a network with only two elements. Thus, at any given time, the network can be in one of eight different states. The Zhang generator is precisely a three-element network. However, according to the analysis of the Zhang generator's state change diagram, regardless of the initial state, such generators enter a cycle of four states, with one element oscillating with a period T, and the other two elements oscillating with a period 2T. Of course, this fact does not preclude the occurrence of chaos, but it demonstrates the network's sensitivity to implementation methods and the cross-influence of elements on each other.

[0034] To search for the desired network, we can immediately discard all networks with stable states. Furthermore, we can immediately exclude all networks with fewer than eight states, as these networks allow oscillations and cross-influences. The only remaining networks are those that evolve through all eight states. The total number of possible cycles is 7! = 5040, starting from state 000, going through all possible states, and returning to state 000 after 8 iterations.

[0035] To further consider this, it's necessary to introduce the concept of autocorrelation of the output signals of logic elements. During network evolution, the output of each element cycles through eight states, which can be represented by an eight-bit binary number, such as 01010101b. To calculate the autocorrelation, we shift this number seven times within a cycle (by moving the least significant bit to the most significant bit position), while counting the number of bits that match the original value at each position. If, after comparison, we find that all eight positions are different, then the correlation of this signal is as good as when all eight positions match. Minimal correlation would be the case of four matches and four differences. Total correlation is defined as half the sum of the seven absolute values ​​of the difference between the number of matches and four, since such a sum is always even.

[0036] For some sequences, zero autocorrelation is indeed possible. However, in such sequences, the number of 0s and 1s is different, and in the case that the network goes through a complete cycle of all eight states, each element must have the same number of states with 1s and 0s at the output. The minimum possible autocorrelation for all such sequences is equal to two. There are only four basic sequences with this autocorrelation: 00010111b, 00011011b, 00100111b, and 00101011b. All other sequences with the lowest possible autocorrelation are their derivatives obtained by cyclic shifting and inverting.

[0037] For a three-element network, the theoretically possible total autocorrelation is a minimum of 6 and a maximum of 26. A three-bit binary counter has an autocorrelation of 18, and chaotic behavior does not occur in such networks when the corresponding ABN is implemented.

[0038] There are a total of 648 networks with different topologies, going through all eight states in a complete cycle. Of these, 216 networks have a minimum possible total autocorrelation of 6. From these networks, it is necessary to discard those where the output signals of two different elements are correlated. In such networks, phase adjustment can theoretically be performed on element operations, leading to signal sorting. There even exist networks where the signals on all three elements are correlated. Such networks are particularly dangerous. In the selected networks, only 80 elements have no correlation between their signals. Since we are looking for the smallest possible networks, we will prioritize networks with two input elements. Only 24 such networks exist.

[0039] There is an even more important case that favors two-input elements. All the generators considered above are uncontrollable because there is no external destabilizing signal that can be connected to them to force chaos and allow the networks to cascade. Adding an additional input should transform one network into another, which also fully satisfies the specified criteria. This is most easily achieved by adding a third input to the two-input element. Since a two-input element can only be an XOR gate or an XNOR gate, a new input can only be added by obtaining a three-input XOR and XNOR gate. In this case, when a logic one is provided to the third input, the two-input XOR and XNOR gates convert each other.

[0040] It turns out that of the remaining 24 networks, only 8 can be reconfigured in this way, altering the generated properties while retaining all the fundamental characteristics. Furthermore, these networks exhibit a record-low level of complexity, with each such network consisting of two two-input elements. All eight networks are paired to form four reconfigurable networks, each consisting of three three-input logic elements. Each reconfigurable network corresponds to two of the original networks. These four networks are functionally completely equivalent, but one of them possesses a unique property: all its logic elements are symmetric with respect to their assigned inputs (the inputs of these elements are equivalent), which simplifies network implementation and allows for error avoidance.

[0041] These four Boolean networks are the essence of this invention. They satisfy all the requirements listed above and have additional modulation characteristics. They each consist of three logic elements: two 3-XOR or 3-XNOR gates, and a three-input-output gate with a more complex special function called "one-to-one counting." These four networks are identical in how the elements are connected to each other and differ only in the types of elements used. They are grouped into two groups: "A" and "B." Group "A" uses the same elements, all 3-XOR or 3-XNOR gates. Group "B" uses different elements: one is a 3-XOR, and the other is a 3-XNOR. The logic diagrams of all these networks are shown in the attached figures.

[0042] The "one-to-one counting" element can be described as follows: if no more than one input is 1, the output of the element is set to 1; otherwise, the output is 0. Therefore, if all three inputs are zero, the output is also logic 1 (see Table 1).

[0043] Table 1

[0044]

[0045] Depending on the network version, one or both inputs of this element can be inverted. Signals from all three logic elements are fed to the inputs of the "one-to-one counting" element. The two inputs of the first XOR / XNOR gate receive signals from the same gate and another XOR / XNOR gate. The two inputs of the second XOR / XNOR gate receive signals from the outputs of the first XOR / XNOR gate and the "one-to-one counting" element. The remaining idle inputs of these two XOR / XNOR gates are combined and represent the modulation inputs of the Boolean network.

[0046] Each described Boolean network is a basic block used to build a random number generator. We call this basic block a "chaotic oscillator." It has an output and a modulation input. A chaotic oscillator cannot self-modulate. It is easy to verify that with such modulation, a chaotic oscillator either degenerates into a normal oscillator or a stable level source. Furthermore, it is strongly discouraged to leave a chaotic oscillator unmodulated, as two unmodulated oscillators may behave very differently due to the peculiarities of this physical implementation. It is desirable to use mutually modulated oscillator blocks, and it is desirable that the loop formed by the modulation be as large as possible to reduce the cross-correlation of the oscillators.

[0047] In theory, a signal from an unmodulated oscillator can be picked up from any of the three logic elements. However, in order to reduce the cross-correlation of signals from different oscillators, chaotic signals must be extracted from the "one-to-one counting" element.

[0048] Autonomous Boolean networks are always in a state of chaotic oscillation, which requires energy. To stop generation, the network should be modified in such a way that it is guaranteed to reach a uniquely possible deterministic state regardless of the initial state. For the network described above, it is not possible to shut down only one logic element. At least two elements must be shut down, and in the best case, they will be the same XOR or XNOR input elements. The network can be shut down by forcing the outputs of these elements to switch to 0 or 1. In this case, if the output of the XOR / XNOR element is set to 0, the output of the network will be 1, and vice versa.

[0049] A chaotic oscillator cannot be used as a random number generator on its own because it has only one asynchronous output with a wideband chaotic analog signal. Every chaotic oscillator, regardless of its internal structure, must be placed within a synchronous "wrapper" that performs two functions at once. On one hand, it provides a stable output logic signal, and on the other hand, it stores the previous state, which can be used as a "seed" via a modulated input to obtain the next random number if needed. The name and internal diagram of this synchronous chaotic oscillator (SCO) are shown in the figure below.

[0050] An SCO (Synchronous Array) has clock and modulation inputs and two outputs: a synchronous output (used to generate random numbers) and an asynchronous output (necessary for modulating other SCOs). D flip-flops capture the value of the asynchronous signal along each leading edge of the clock signal. The obtained value is fed to the synchronous output, or, on the other hand, can be used for modulation with an external signal using a two-input XOR gate. Random number generators are based on such SCO blocks.

[0051] Despite mutual modulation, the distribution of zeros and ones at the output of the SCO block may be biased; that is, it is quite possible that one type of value is more likely to appear at the output than the other. This is also attributable to the details of the physical operation of the logic elements of the circuit. To eliminate this bias, a process known as "whitening" may be required for the obtained random numbers.

[0052] Therefore, the essence of this invention is: a digital chaotic oscillating autonomous Boolean network includes three interconnected logic elements, two of which are two-input XOR gates and / or XNOR gates, while the third logic element has three inputs and one output, and implements a special logic function "one-to-one counting", wherein if logic one appears at no more than one input of the third logic element, the output of the third logic element is set to logic one, otherwise the output is set to logic 0.

[0053] Because of these advantageous properties, it is possible to obtain truly random numbers in a very short time using a generator consisting of only three components.

[0054] A preferred embodiment of the device exists in which the output of the first two-input logic element is connected to the first input of the second two-input logic element and the second input of the third logic "one-to-one count" element; the output of the second two-input logic element is connected to its second input, the second input of the first two-input logic element and the third input of the third logic "one-to-one count" element; and the output of the third logic "one-to-one count" element is connected to its first input, the first input of the first two-input logic element and the output of the entire network.

[0055] Due to these advantageous properties, the chaotic behavior of autonomous Boolean networks, which serve as the basis for true random number generators, can be guaranteed.

[0056] Another embodiment of the device exists in which the second and / or third inputs of the third logic "one-to-one counting" element are inverted.

[0057] Due to these advantageous characteristics, specific implementations of true random number generators can be provided.

[0058] Another embodiment of the device exists in which both the two-input XOR gate and / or XNOR gate have additional third logic inputs, which are combined together and connected to additional external modulation inputs of the digital chaotic oscillating autonomous Boolean network.

[0059] These advantageous properties can improve the statistical characteristics of true random number generators.

[0060] Furthermore, there are embodiments of devices in which the generator has a shutdown input, and both the XOR gate and / or the XNOR gate have additional shutdown inputs that can force the outputs of the two gates to a logic zero or logic one state regardless of the state of the other inputs, and the inputs are combined together and connected to a designated generator shutdown input.

[0061] Because of these advantageous features, the true random number generator can be turned on and off.

[0062] In another embodiment of the device, a digital chaotic oscillating autonomous Boolean network is combined with a D flip-flop to form a synchronous chaotic oscillator block. The synchronous chaotic oscillator block has a clock input connected to the clock input of the D flip-flop, a modulation input connected to the modulation input of the autonomous Boolean network, an asynchronous output connected to the output of the autonomous Boolean network, and a synchronous output connected to the output of the D flip-flop, while the output of the autonomous Boolean network is connected to the data input of the D flip-flop.

[0063] Due to these advantageous characteristics, a true random number generator can be connected to an external clock timing circuit.

[0064] In addition, one embodiment of the device includes an additional two-input "XOR" and / or "XNOR" element, the first input of which is connected to an external modulation input, the second input of which is connected to the output of a D flip-flop, and the output of which is connected to the modulation input of an autonomous Boolean network.

[0065] Because of these advantageous properties, the statistical properties of a true random number generator can be improved by changing its initial state.

[0066] Finally, one embodiment of the device includes a set of N synchronous chaotic oscillator blocks arranged in a ring structure, the clock inputs of these synchronous chaotic oscillator blocks being combined together and connected to a common clock signal, and their synchronous outputs being connected to an N-bit output of a generator, and a set of N additional two-input XOR gates and / or XNOR gates, such that the output of each such gate is connected to the modulation input of the corresponding synchronous chaotic oscillator block, the first input of which is connected to the asynchronous output of the preceding synchronous chaotic oscillator block in the chain, and the second input of which is connected to the asynchronous output of the following synchronous chaotic oscillator block in the chain.

[0067] Due to these advantageous properties, multi-bit true random numbers can be generated.

[0068] With respect to methods with similar purposes, the combination of essential features of the proposed invention is unknown in the prior art, which allows it to be concluded that the novelty criterion of the invention relating to the method is met. Furthermore, the solution is not obvious to those skilled in the art. Attached Figure Description

[0069] Other distinctive features and advantages of the invention will become apparent from the description provided below, which uses reference to the accompanying drawings for illustrative and not limiting purposes, wherein:

[0070] Figure 1 A functional diagram of the autonomous Boolean network according to the present invention is shown;

[0071] Figure 2 The logical structure of an autonomous Boolean network using XOR elements according to the present invention is shown;

[0072] Figure 3 The logical structure of an autonomous Boolean network using XNOR elements according to the present invention is shown;

[0073] Figure 4 The logical structure of an autonomous Boolean network according to the present invention, using XOR elements and "one-to-one counting" elements to invert the inputs, is shown.

[0074] Figure 5 The logic structure of an autonomous Boolean network according to the present invention, using XNOR elements and input inversion of "one-to-one counting" elements, is shown.

[0075] Figure 6 The logical structure of an autonomous Boolean network using XOR and XNOR elements according to the present invention is shown;

[0076] Figure 7 The logical structure of an autonomous Boolean network using XNOR and XOR elements according to the present invention is shown.

[0077] Figure 8 The logic structure of an autonomous Boolean network according to the present invention, using XOR and XNOR elements and an input inversion of a "one-to-one counting" element, is shown.

[0078] Figure 9 The logic structure of an autonomous Boolean network according to the present invention, using XNOR and XOR elements and "one-to-one counting" elements to invert the inputs, is shown.

[0079] Figure 10The logical structure of an autonomous Boolean network with modulated input according to the present invention is shown;

[0080] Figure 11 The logical structure of an autonomous Boolean network with modulation input and enable, according to the present invention, is shown.

[0081] Figure 12 The layout of a synchronous chaotic oscillator based on the described Boolean network according to the present invention is shown.

[0082] Figure 13 The name of the synchronous chaotic oscillator according to the present invention is shown;

[0083] Figure 14 A variant of the synchronous chaotic oscillator according to the invention, using a previous value as a seed, is shown; and

[0084] Figure 15 A schematic diagram of a random number generator based on a synchronous chaotic oscillator according to the present invention is shown.

[0085] The reference numerals on the attached figure are as follows:

[0086] 1-First logic element;

[0087] 2-Second logic element;

[0088] 3-Third logic element;

[0089] 4-XOR gate;

[0090] 5-XNOR gate;

[0091] 6-Synchronous chaotic oscillator;

[0092] 7-Chaotic Oscillator;

[0093] 8-D flip-flop;

[0094] Modulation input;

[0095] Enable - Enables the generation of input;

[0096] Out - Output;

[0097] Sync out - synchronous output;

[0098] Async out - asynchronous output;

[0099] Clock - clock signal. Detailed Implementation

[0100] according to Figures 1-15The true random number generator, including the digital chaotic oscillating autonomous Boolean network as the entropy source, includes the following. The digital chaotic oscillating autonomous Boolean network includes three logic elements: 1—first, 2—second, and 3—third, interconnected logic elements, where two (1 and 2) represent two-input XOR gates and / or XNOR gates, while the third logic element (3) has three inputs (the inputs of all logic elements are specified by Roman numerals I, II, and III) and one output.

[0101] Logic element 3 implements a special logic "one-to-one counting" function, where if logic one appears at no more than one input, its output is set to logic one; otherwise, its output is set to logic zero.

[0102] The output of the first two-input logic element 1 is preferably connected to the first input of the second two-input logic element 2 and the second input of the third logic "one-to-one counting" element 3. The output of the second two-input logic element 2 is connected to its second input, the second input of the first two-input logic element 1, and the third input of the third logic "one-to-one counting" element 3. The output of the third logic "one-to-one counting" element 3 is connected to its first input, the first input of the first two-input logic element 1, and the output of the entire network.

[0103] The second and / or third inputs of the third logic "one-to-one counting" element 3 can be inverted.

[0104] In a particular embodiment of the invention, both input gates 1 and 2 (“XOR” and / or “XNOR”) have additional third logic inputs, which are combined together and connected to an additional external modulation input of the digital chaotic oscillating autonomous Boolean network (see [link to relevant documentation]). Figure 10 ).

[0105] In a particular embodiment of the invention, the generator has a shutdown input, and both the XOR gate and / or the XNOR gate have additional shutdown inputs that can force the outputs of both gates to a logic zero or logic one state regardless of the state of the other inputs. These inputs are combined and connected to a designated generator shutdown input (see [link to documentation]). Figure 11 ).

[0106] Specifically, a digital chaotic oscillating autonomous Boolean network can be combined with a D flip-flop to form a synchronous chaotic oscillator block. The synchronous chaotic oscillator block has a clock input connected to the clock input of the D flip-flop, a modulation input connected to the modulation input of the autonomous Boolean network, an asynchronous output connected to the output of the autonomous Boolean network, and a synchronous output connected to the output of the D flip-flop. The output of the autonomous Boolean network is connected to the data input of the D flip-flop (see...). Figures 12-13 ).

[0107] In a particular embodiment of the invention, the generator includes an additional two-input XOR gate and / or XNOR gate, the first input of which is connected to an external modulation input, the second input to the output of a D flip-flop, and the output to the modulation input of an autonomous Boolean network (see [link to relevant documentation]). Figure 14 ).

[0108] In a particular embodiment, the invention includes: a plurality of N synchronous chaotic oscillator blocks arranged in a ring structure, the clock inputs of these synchronous chaotic oscillator blocks being combined together and connected to a common clock signal, and their synchronous outputs being connected to an N-bit output of a generator; and a plurality of N additional two-input XOR gates and / or XNOR gates, such that the output of each such gate is connected to the modulation input of the corresponding synchronous chaotic oscillator block, the first input of the gate being connected to the asynchronous output of the preceding synchronous chaotic oscillator block in the chain, and the second input of the gate being connected to the asynchronous output of the following synchronous chaotic oscillator block in the chain (see [link to relevant documentation]). Figure 15 ).

[0109] Embodiments of the present invention

[0110] The true random number generator operates as follows. We will provide the most comprehensive examples of embodiments of the invention, wherein it is understood that these examples do not limit the application of the invention.

[0111] Three interconnected logic elements form a digital chaotic oscillating autonomous Boolean network, where two logic elements represent two-input XOR gates and / or XNOR gates, while the third logic element is used to implement a special logic "one-to-one counting" function, where if logic 1 appears in no more than one of the inputs of the third logic element, the output of the third logic element is set to logic 1, otherwise the output is set to logic 0.

[0112] A synchronous chaotic oscillator (SCO) was developed, which has a clock and modulation inputs and two outputs—a synchronous output for obtaining random numbers and an asynchronous output for modulating other SCOs.

[0113] The D flip-flop captures the value of the asynchronous signal along each leading edge of the clock signal. The obtained value is fed to the synchronous output and, on the other hand, is used to conditionally invert the input modulated signal using a two-input XOR gate.

[0114] A random number generator is constructed based on such SCO blocks. A multi-bit true random number generator is built using a loop of SCO blocks modulated in opposite directions. The modulation input of each SCO block receives a signal from an XOR gate, whose input is connected to the asynchronous outputs of the preceding and following SCO blocks in the loop.

[0115] Industrial applicability

[0116] The proposed true random number generator can be practically implemented by those skilled in the art, and once implemented, it will provide the realization of the stated purpose, thereby demonstrating that it meets the industrial applicability criteria of the present invention.

[0117] Based on the proposed invention, a prototype of a true random number generator was generated. During the research, the Zhang and Rosin generators mentioned earlier, as well as generators based on the described Boolean network, were experimentally tested in a PLIC. The following experiments confirm the randomness of the numbers generated by the proposed generator, conducted using the following PLIC: AlteraCyclone IV EP4CE22F17C6N. The network was in a "reset" state, i.e., the outputs of all logic elements were set to the predefined state "zero". Then, within one clock cycle, the reset signal was cleared, and within the next clock cycle, the output state of the chaotic oscillator was captured. The data obtained during multiple network restarts passed the randomness test and showed no significant correlation between each other at clock frequencies up to 150 MHz, indicating that chaos was initiated in less than 7 nanoseconds. After a whitening procedure, the obtained random numbers passed the NIST randomness test.

[0118] Therefore, testing of the prototype of the true random number generator shows that the claimed technical effect (i.e., increased true random number generation rate and reduced energy consumption) is achieved due to the following fact: the digital chaotic oscillating autonomous Boolean network includes three interconnected logic elements, two of which represent two-input XOR gates and / or XNOR gates, while the third logic element has three inputs and one output, and implements a special logic "one-to-one counting" function, wherein if logic one appears at no more than one input of the third logic element, the output of the third logic element is set to logic one, otherwise the output is set to logic 0.

[0119] Furthermore, the technical achievement of this invention is a set of only possible networks of logic elements, each network having the following characteristics:

[0120] 1. It does not possess stable states and short periods that would lead to the disappearance of ordered network operations and Boolean chaos.

[0121] 2. The output signals of all components have the lowest possible autocorrelation, which forces the network into chaotic behavior.

[0122] 3. The shapes of the output signals of all components are uncorrelated, which eliminates cross-phase modulation of components during network operation.

[0123] 4. It has the smallest possible size, and due to the short propagation loop within the network, it provides the fastest chaos establishment rate.

[0124] 5. It has an external modulation input that can disrupt network stability (thus preventing physical equilibrium) and uses cross-modulation to combine the network into scalable clusters.

[0125] Furthermore, only one network in this set uses input-symmetric logic elements.

[0126] Therefore, such a network can create random number generators with the following unique properties:

[0127] 1. The resulting numbers are truly random, which makes them suitable for encryption purposes.

[0128] 2. The random number generation rate is so high that the network's behavior remains unpredictable even as the signal propagates through multiple logic elements. Therefore, when implemented in a microprocessor system, random numbers can be obtained within a single clock cycle. Such a generation speed can satisfy virtually any possible need.

[0129] 3. Modulating the input allows for further improvement of the characteristics because another random number (the so-called "seed" of the proposed random number generator) can be fed into it. This forces the network to start from a new state each time.

[0130] 4. The same input allows for cross-modulation of the bits in the proposed generator, thereby increasing the rate of chaos occurrence.

[0131] 5. The minimum network size makes the proposed generator most economical in terms of energy consumption.

[0132] 6. The proposed generator can be implemented with the same efficiency on both discrete components and on a PLIC or ASIC.

[0133] 7. The proposed generator design is simple and the implementation cost is negligible, which makes it usable anywhere, including low-cost and energy-efficient equipment.

[0134] References

[0135] [1]Maxim Semiconductors.Building a Low-Cost White-NoiseGenerator.Application note 3469.

[0136] [2]R.Zhang,HLDde S.Cavalcante,Z.Gao,DJGauthier,JESSocolar,MMAdams,and DPLathrop.Boolean Chaos.Phys.Rev.E 80,045202(2009).

[0137] [3]David P.Rosin,Damien Rontani,Daniel J.Gauthier,and EckehardScholl.Experiments on autonomous Boolean networks.Chaos 23,025102(2013).

[0138] [4]Hugo LDde S.Cavalcante,Daniel J.Gauthier,Joshua ESSocolar andRui Zhang.On the origin of chaos in autonomous Booleannetworks.Phil.Trans.R.Soc.A368,495-513(2010).

[0139] [5]David Rosin,Dynamics of Complex Autonomous BooleanNetworks.Doctoral dissertation.Technische Universitft Berlin.

Claims

1. A true random number generator, comprising: A digital chaotic oscillating autonomous Boolean network, used as an entropy source, is characterized by: The digital chaotic oscillating autonomous Boolean network comprises three interconnected logic elements. The first logic element is a two-input XOR or XNOR gate; the second logic element is also a two-input XOR or XNOR gate; and the third logic element has three inputs and one output, implementing a logic "one-to-one counting" function. If a logic '1' appears at no more than one input of the third logic element, its output is set to logic '1'; otherwise, its output is set to logic '0'. The output of the first logic element is connected to the first input of the second logic element and the second input of the third logic "one-to-one counting" element. The output of the second logic element is connected to the second input of the second logic element, the second input of the first logic element, and the third input of the third logic "one-to-one counting" element. The output of the third logic "one-to-one counting" element is connected to the first input of the third logic "one-to-one counting" element, the first input of the first logic element, and the output of the entire network.

2. The generator according to claim 1, characterized in that, The second input and / or the third input of the third logic "one-to-one counting" element are inverted.

3. The generator according to any one of claims 1-2, characterized in that, Both the two-input XOR gate and / or XNOR gate have an additional third logic input, which is combined together and connected to the additional external modulation input of the digital chaotic oscillating autonomous Boolean network.

4. The generator according to any one of claims 1-2, characterized in that, The generator has a shutdown input, and both the "XOR" gate and / or the "XNOR" gate have additional shutdown inputs. Regardless of the state of other inputs, the additional shutdown inputs can force the outputs of the two gates to switch to a logic zero state or a logic one state. The additional shutdown inputs are combined together and connected to the designated generator shutdown input.

5. The generator according to claim 3, characterized in that, The digital chaotic oscillating autonomous Boolean network is combined with a D flip-flop to form a synchronous chaotic oscillator block. The synchronous chaotic oscillator block has a clock input connected to the clock input of the D flip-flop, a modulation input connected to the modulation input of the autonomous Boolean network, an asynchronous output connected to the output of the autonomous Boolean network, and a synchronous output connected to the output of the D flip-flop. The output of the autonomous Boolean network is connected to the data input of the D flip-flop.

6. The generator according to claim 5, characterized in that, The generator includes an additional two-input XOR gate and / or XNOR gate, the first input of which is connected to the input of an external modulation, the second input of which is connected to the output of the D flip-flop, and the output of which is connected to the modulation input of the autonomous Boolean network.

7. The generator according to claim 5, characterized in that, The generator includes a block of N synchronous chaotic oscillators arranged in a ring structure. The clock inputs of the synchronous chaotic oscillators are combined and connected to a common clock signal. The synchronous outputs of the synchronous chaotic oscillators are connected to the N-bit output of the generator. It also includes a set of N additional two-input XOR and / or XNOR gates, such that the output of each of the N additional two-input XOR and / or XNOR gates is connected to the modulation input of the corresponding block in the N synchronous chaotic oscillator blocks. The first input of each of the N additional two-input XOR and / or XNOR gates is connected to the asynchronous output of the preceding synchronous chaotic oscillator block in the chain, and the second input of each of the N additional two-input XOR and / or XNOR gates is connected to the asynchronous output of the following synchronous chaotic oscillator block in the chain.

Images