A Sampling Method, Device and Storage Medium for Radar Echo Signals

Abstract

The present invention provides a sampling method, device and storage medium for radar echo signals, which includes: S1, the FPGA inverts the clock CLK to obtain the inverted DCLK; S2, the FPGA receives the digital signals output by two A / D modules, where the two A / D modules use CLK and DCLK as clock signals respectively and both work on the rising edge of the signal, alternately sample the analog signal and convert the sampled analog signal into a digital signal; S3, the FPGA determines the number of sampling points C; S4, the FPGA receives the A / D data obtained by alternate sampling and processes the received A / D data. If the difference between the sampling values of two adjacent sampling points of the two A / D modules is greater than a predetermined threshold, it is determined that the sampling point with a larger sampling value among the sampling points is a noise point. This technical solution realizes the identification and preliminary filtering of noise points during the sampling process, which helps to improve the efficiency of subsequent signal processing.

Description

Technical Field

[0001] The present invention relates to the technical field of radar, and in particular, to a method, device, and storage medium for sampling radar echo signals. Background Art

[0002] A radar such as a centimeter-wave radar can be applied on a ship, which uses electromagnetic waves to detect targets. The detection method is to emit electromagnetic waves externally and sample the echo generated when hitting an object, so as to determine the distance between the radar and the object. The centimeter-wave radar can achieve the description of the distant terrain by sampling the reflected electromagnetic waves. However, the existing radar echo sampling method does not consider filtering noise during the sampling process. Summary of the Invention

[0003] Embodiments of the present invention provide a method, device, and storage medium for sampling radar echo signals, so as to preliminarily filter noise while sampling.

[0004] To achieve the above object, on the one hand, a method for sampling radar echo signals is provided, which uses an FPGA and two A / D modules connected to the FPGA to sample the analog signal of the radar echo, and includes the following steps:

[0005] S1, the FPGA inverts the clock CLK to obtain the inverted clock DCLK;

[0006] S2, the FPGA receives the digital signals output by the two A / D modules, where the two A / D modules use CLK and DCLK as clock signals respectively and both work on the rising edge of the signal, alternately sample the analog signal and convert the sampled analog signal into a digital signal;

[0007] S3, the FPGA determines the number of sampling points C according to the following formula:

[0008]

[0009] where S is the current range S of the radar, H is the frequency H of CLK, and c is the speed of light;

[0010] S4. The FPGA receives the A / D data obtained by alternating sampling and processes the received A / D data. Here, the A / D data sampled by two A / D modules are distinguished by A and B. The processing includes: The FPGA takes two adjacent sampling points A and B as a group. If the difference between the sampling values of two adjacent sampling points is greater than a predetermined threshold, it determines that the sampling point with the larger sampling value in this group of sampling points is a noise point. And when the number of sampling points C is less than the number of points N of the radar image drawing line, it retains these two sampling points and assigns the smaller sampling value to the sampling point corresponding to the larger sampling value; while when C is greater than N, it takes the smaller sampling value as the valid value and deletes the noise point.

[0011] Preferably, for the method of this embodiment, in step S2, the alternating sampling of the analog signal is as follows:

[0012] The first A / D module in the two A / D modules samples first, and the second A / D module starts sampling after a delay of half a CLK, and then the two A / D modules sample alternately.

[0013] Preferably, for the method of this embodiment, the predetermined threshold is set according to the maximum and minimum values in the sampling value range.

[0014] Preferably, for the method of this embodiment, step S4 further includes:

[0015] S41. When the number of sampling points C is less than N, interpolation processing is performed on the sampled A / D data to expand C sampling values to N;

[0016] S42. When half of the number of sampling points C / 2 is greater than N, valid value sampling processing is performed on the sampled A / D data to reduce C / 2 valid values to N;

[0017] S43. When the number of sampling points C is greater than N and C / 2 is less than N, the sampled A / D data is first taken as the valid value and then interpolation processing is performed, and then C / 2 valid values are expanded to N.

[0018] Preferably, for the method of this embodiment, step S41 includes:

[0019] Determine the approximate greatest common divisor x between N - C and C;

[0020] Use the following formula to uniformly expand the number of sampling points C to N:

[0021]

[0022] Preferably, in the method of this embodiment, in step S4, if the difference between the sampling values of two adjacent sampling points is less than a predetermined threshold, when C is greater than N, only one sampling point is retained, and the effective value of this sampling point is taken as the average value of the sampling values of the two adjacent sampling points.

[0023] Preferably, in the method of this embodiment, step S42 includes:

[0024] Determine And The approximate greatest common divisor y therebetween;

[0025] Use the following formula to reduce Valid values to N:

[0026]

[0027] Preferably, in the method of this embodiment, expanding C / 2 valid values into N in step S43 includes:

[0028] Determine And The approximate greatest common divisor z therebetween;

[0029] Use the following formula to expand Valid values into N:

[0030]

[0031] On the other hand, an FPGA is provided, including a memory and a processor, where the memory stores at least one segment of program, and the at least one segment of program is executed by the processor to implement the method as described in any one of the above.

[0032] In yet another aspect, a computer-readable storage medium is provided, where at least one segment of program is stored in the storage medium, and the at least one segment of program is executed by the processor to implement the method as described in any one of the above.

[0033] In yet another aspect, a sampling device for radar echo signals is provided, including an FPGA for implementing the method as described in any one of the above and two A / D modules.

[0034] In yet another aspect, a radar including the above FPGA or sampling device is provided.

[0035] The above technical solutions have the following technical effects:

[0036] The technical solution of the embodiment of the present invention realizes the preliminary filtering of noise during the sampling process by inverting the clock CLK, enabling two A / D modules to alternately sample the analog signal of the radar echo, and determining the sampling points where the difference between the sampling values of two adjacent sampling points of the two A / D modules is greater than a predetermined threshold as noise points.

[0037] In a further embodiment of the present invention, by comparing the number of sampling points C and the number of points N of the radar image drawing line, different processing of the sampled A / D data is determined according to the size relationship between C and N. For example, when C is less than N, interpolation processing is performed on the sampled A / D data; when half of C is greater than N, effective value sampling processing is performed on the sampled A / D data; when C is greater than N and C / 2 is less than N, the effective value is first taken from the sampled A / D data and then interpolation processing is performed, thereby realizing pre-image processing during the sampling process, which helps to improve the efficiency and accuracy of subsequent radar image drawing. Description of the Drawings

[0038] Figure 1 It is a schematic flowchart of the sampling method of the radar echo signal in an embodiment of the present invention;

[0039] Figure 2 It is the clock signal CLK adopted by the A / D module in the sampling method of an embodiment of the present invention;

[0040] Figure 3 It is the inverted clock DCLK of the clock signal CLK in the sampling method of an embodiment of the present invention. Detailed Embodiments

[0041] To further illustrate the embodiments, the present invention provides drawings. These drawings are part of the disclosure of the present invention, mainly used to illustrate the embodiments, and can be used to explain the operation principle of the embodiments in conjunction with the relevant descriptions in the specification. With reference to these contents, those of ordinary skill in the art should be able to understand other possible implementation manners and the advantages of the present invention. The components in the drawings are not drawn to scale, and similar component symbols are usually used to represent similar components.

[0042] The present invention will be further described below in conjunction with the drawings and specific embodiments.

[0043] Embodiment 1:

[0044] Figure 1 It is a schematic flowchart of the sampling method of the radar echo signal in an embodiment of the present invention. The sampling method of this embodiment uses an FPGA and two A / D modules connected to the FPGA to sample the analog signal of the radar echo; such as Figure 1 , the sampling method of this embodiment includes the following steps:

[0045] S1, the FPGA inverts the clock CLK to obtain the inverted clock DCLK;

[0046] S2, the FPGA receives the digital signals output by two A / D modules. The two A / D modules use CLK and DCLK as clock signals respectively and both work on the rising edge of the signals, alternately sample the above analog signals and convert the sampled analog signals into digital signals;

[0047] S3, the FPGA determines the number of sampling points C according to the following formula:

[0048]

[0049] where S is the current range S of the radar, H is the frequency H of CLK, and c is the speed of light;

[0050] S4, the FPGA receives the A / D data obtained by alternate sampling and processes the received A / D data. The A / D data sampled by the two A / D modules are distinguished by A and B. The processing includes: the FPGA takes two adjacent sampling points A and B as a group. If the difference between the sampling values of two adjacent sampling points is greater than a predetermined threshold, it is determined that the sampling point with the larger sampling value among the two adjacent sampling points is a noise point. When the number of sampling points C is less than the number of points N of the radar image drawing line, these two sampling points are retained and the smaller sampling value is assigned to the larger sampling value; when C is greater than N, the smaller sampling value is taken as the valid value and the noise point is deleted.

[0051] Preferably, the predetermined threshold is set according to the maximum and minimum values in the sampling value range.

[0052] The technical solution of the embodiment of the present invention identifies and preliminarily filters noise points during the sampling process, which helps to improve the efficiency of subsequent signal processing.

[0053] Embodiment 2:

[0054] The specific steps of the radar echo signal sampling method of another embodiment of the present invention are described below. Exemplarily, the radar in this embodiment is a centimeter wave radar. In this embodiment, an FPGA is used with two A / D modules for sampling. The FPGA is implemented as a chip set inside the radar for data processing; the A / D module is implemented as a digital-to-analog converter for converting the echo analog signal received by the radar external receiver, such as an electromagnetic wave signal, into a digital signal; the A / D module is connected to the FPGA through the FPGA pin; after the radar external receiver receives the analog signal, such as an electromagnetic wave signal, the signal is transmitted to the A / D module, and after being converted into a digital signal by the A / D module, the A / D data signal output by the A / D module is transmitted to the FPGA, and the FPGA completes the processing of the A / D signal and completes the sampling work. The method of this embodiment includes:

[0055] Step 1: FPGA inverts the clock signal CLK to form a new DCLK; Figure 2 The CLK signal from the example; Figure 3 is an exemplary inverted DCLK signal. Figure 2 and Figure 3 , a peak and a trough are collectively called a complete clock signal cycle, also known as a clk.

[0056] Step 2: The two A / D modules use CLK and DCLK as clock signals respectively, and both work at the rising edge of the signal. The two IO ports control the A / D modules to convert analog signals into digital signals at a predetermined rate, such as the highest rate, and then transmit them to the FPGA through the IO ports; wherein the two A / D modules sample the input analog signals alternately, specifically: for example, the first A / D module of the two A / D modules starts sampling first, and the second A / D module starts sampling after a delay of half a clk, and then the two modules sample alternately;

[0057] Step 3: FPGA processes the two alternately sampled A / D data input. For the convenience of explanation, the A / D data and B data are used to distinguish the A / D data of the sampling points obtained by the two A / D modules. It is assumed that A is the data obtained by sampling first, and B is the A / D data obtained after sampling with a delay of half a clk.

[0058] The number of sampling points C is determined according to the current range S of the radar and the frequency H of clk. The formula is as follows, where c is the speed of light:

[0059]

[0060] The function of a radar is to detect targets within a certain distance, and this certain distance is the range of the radar. When the radar is applied on a ship, the unit is nautical miles. The specific ranges can be: 0.125 nautical miles, 0.25 nautical miles, 0.5 nautical miles, 1 nautical mile, 2 nautical miles, 4 nautical miles, etc. When applying the above formula, unit conversion is carried out as needed.

[0061] Step Four: N is the number of points of the radar image drawing line. Taking N as the dividing line, when C is less than N, interpolation processing is performed on the sampling points to expand the C sampling values to N; when C / 2 is greater than N, effective value sampling processing is performed on the sampling points to reduce the C / 2 effective values to N; when C is greater than N but C / 2 is less than N, first take the effective values of the sampling points, and then perform interpolation processing to expand the C / 2 effective values to N.

[0062] The different processes above are described in detail through different steps below. For the convenience of elaboration, the steps have serial numbers, but the serial numbers of the steps here are not used to represent the execution sequence of the steps.

[0063] Step Five: Interpolation processing

[0064] Taking two adjacent sampling points A and B as a group, if the difference between the two sampling values is more than a predetermined threshold. For example, the predetermined threshold can be set according to the maximum and minimum values in the sampling value range. For example, the threshold can be set as a selected percentage of the quantity related to the sampling value range. If the difference is more than 80%, then the sampling point with the larger sampling value is determined as a noise point, and the smaller sampling value is assigned to the larger sampling value, so that the values of the two adjacent sampling points are both the smaller sampling value. Exemplarily, the difference of 80% here refers to 80% of the total number of levels of the quantized sampling value range. For example, if the quantized range of the sampling value is [0, 255], that is, the total number of levels of the sampling value range is 256, then the difference of 80% here is 256 * 80% = 240.8. The range of the sampling value is related to the actual measurable distance of the radar. Of course, other thresholds can be set as needed.

[0065] Expand C evenly to N:

[0066] x=(N - C, C) (1)

[0067]

[0068] Where (a, b) represents the approximate greatest common divisor of a and b, then x=(N - C, C) means the approximate greatest common divisor between N - C and C; expand the number of sampling points C to the number of drawing line points N according to formula (2), and fill in the approximate part in the last group or two groups of data.

[0069] Exemplarily, the sampled values of C sampling points are divided into x data groups, with C / x data in each group. The number of sampling points C is evenly expanded to N by repeating a selected number of data in each group a predetermined number of times;

[0070] Taking the example of expanding 324 to 1024 for illustration:

[0071] First, find the approximate greatest common divisor between 700 obtained after 1024 - 324 and 324, that is

[0072] x = (1024 - 324, 324) = (700, 324) ≈ 54

[0073] 54 * (700 / 54 + 324 / 54) => 1024

[0074] Meaning: Divide 324 data into 54 data groups, with 6 data in each group. Expand each group of data into approximately 6 + 700 / 54 ≈ 19 data. One way of expansion is to repeat data from 1 - 5 three times and the 6th data four times. In this way, 19 * 54 = 1026 data are achieved. Then, in the last group of data, the 6th data is repeated two times to deduct the extra two data. The above-mentioned repeating method is only exemplary, and other repeating methods can be selected according to needs to expand the data to N.

[0075] Step Six: Effective value sampling processing

[0076] 1. Take two adjacent sampling points A and B as a group. If the difference between the two sampled values is more than a predetermined threshold, such as more than 80% different, then it is determined that among these two adjacent sampling points, the sampling point with the larger sampled value is a noise point. Delete the sampling point determined to be a noise point, take the smaller sampled value as the effective value, and only retain the sampling point with the smaller sampled value; the meaning of the threshold and the 80% difference here and in Step Seven is the same as described before and will not be elaborated here;

[0077] 2. If the difference between the two sampled values of A and B is less than the above-mentioned predetermined threshold, for example, less than 80% different, then only retain one sampling point, and the effective value of this sampling point is the average of the two sampled values of A and B;

[0078] 3. Reduce C / 2 effective values to N:

[0079]

[0080]

[0081] Where (a, b) represents the approximate greatest common divisor of a and b, then That is to say And The approximate greatest common divisor between; reduce C / 2 valid values to the number of plotted points N according to formula (4), and supplement the approximate part in the last group or two groups of data.

[0082] Exemplarily, divide C / 2 valid values into y data groups, with each group data, and reduce the data in each group to N / y by deleting of each group to achieve dividing C / 2 valid values into y data groups;

[0083] For example, C is 3872 and N is 1024:

[0084] Through the processing of steps 1 and 2, the number of obtained valid values C / 2 is 1936, and 1936 needs to be reduced to 1024

[0085] y = (1936 - 1024, 1936) = (912, 1936) ≈ 114

[0086] 1936 – 114 * (912 / 114) => 1024

[0087] It means that 912 data need to be deleted from 1936 data, which is decomposed into deleting 912 / 114 data from 1936 / 114 data; among them, 1936 / 114 ≈ 17, 912 / 114 = 8, that is, 8 data are deleted from every 17 data;

[0088] Exemplarily, a deletion method is to delete the data numbered 1 - 17, and only the data numbered 1, 3, 5... 15, 17 remain; that is, the data with even numbers in the middle are all deleted, and since 114 * 17 = 1938, 1 data is deleted less in each of the two groups of data, so 1024 data are obtained; the deletion method here is only exemplary and not used for limitation, and those skilled in the art can adopt other deletion methods according to needs to group and delete 1936 data to obtain the required 1024 data;

[0089] Step Seven: When C is greater than N but C / 2 is less than N

[0090] 1. Take two adjacent sampling points A and B as a group. If the difference between the two sampling values is greater than a predetermined threshold, such as more than 80% difference, then determine this point as a noise point, and take the smaller sampling value as the valid value;

[0091] 2. If the difference between the two sampling values of A and B is less than the above - mentioned predetermined threshold, such as less than 80% difference, then only retain one sampling point, and the sampling point takes the average value of the two sampling values of A and B as the valid value;

[0092] 3. Expand C / 2 valid values to N:

[0093]

[0094]

[0095] Where (a, b) represents the approximate greatest common divisor of a and b, then That is, it represents And The approximate greatest common divisor between; Expand C / 2 valid values into the number of plotted line points N according to formula (6), and complete the approximation in the last group or two groups of data.

[0096] Exemplarily, divide C / 2 valid values into z data groups, with C / (2z) data in each group, and evenly expand the sampling points C / 2 to N by repeating a selected number of data in each group a predetermined number of times.

[0097] The expansion method in step seven is similar to that in step five. The difference is that the situation applicable to step seven is that the value of C is greater than N and C / 2 is less than N. For example, if N = 1024, then C / 2 is greater than 512 and less than 1024;

[0098] For example, if C is 1856, then the valid value C / 2 is 928;

[0099] Expand 928 into 1024:

[0100] z = (1024 - 928, 928) = (96, 928) = 32

[0101] 32 * (96 / 32 + 928 / 32) => 1024

[0102] Meaning: Divide 928 data into 32 data groups, with 29 data in each group, and expand each group of data into 29 + 96 / 32 = 32; An exemplary expansion method is: number the 29 data, and in the data numbered 1 - 29, repeat the data numbered 1, 10, and 19 once to complete the expansion into 1024; In other expansion methods, other selected 3 numbered data can be repeated once to expand each group of data to 32, so as to expand the valid value of C / 2 to N, and no limitation is made here.

[0103] Step eight: Return to step three for the next round of sampling.

[0104] The sampling method of this embodiment of the present invention realizes the preliminary filtering of noise and the preliminary processing of the image during the sampling process. The above processing during the sampling process helps to improve the processing efficiency of the signal after sampling and improve the accuracy of radar image drawing.

[0105] Embodiment three:

[0106] The present invention also provides an FPGA, which includes a memory and a processor. The memory stores at least one program, and the at least one program is executed by the processor to implement the method described in any one of the above.

[0107] An embodiment of the present invention also provides a sampling device for radar echo signals, which includes an FPGA for implementing the method described in any one of the above and an A / D module connected to the FPGA.

[0108] An embodiment of the present invention also provides a radar including the above sampling device.

[0109] An embodiment of the present invention also provides a centimeter-wave radar including the above sampling device.

[0110] Embodiment 4:

[0111] The present invention also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method in the above embodiments of the present invention are implemented.

[0112] If the modules / units integrated by the computer unit are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on such an understanding, to implement all or part of the processes in the above embodiment methods of the present invention, it can also be completed by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by a processor, the steps of the above various method embodiments can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in the form of source code, object code, executable file, or some intermediate form, etc. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disc, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), and software distribution medium, etc. It should be noted that the content included in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction.

[0113] Although the present invention is specifically shown and described in conjunction with the preferred embodiments, those skilled in the art should understand that various changes can be made to the present invention in terms of form and details without departing from the spirit and scope of the present invention defined by the appended claims, and all of them fall within the protection scope of the present invention.

Claims

1. A sampling method for radar echo signals, characterized in that Use an FPGA and two A / D modules connected to the FPGA to sample the analog signal of the radar echo, including the following steps: S1, the FPGA inverts the clock CLK to obtain the inverted clock DCLK; S2, the FPGA receives the digital signals output by the two A / D modules. The two A / D modules use CLK and DCLK as clock signals respectively and both work on the rising edge of the signal, alternately sample the analog signal and convert the sampled analog signal into a digital signal; S3, the FPGA determines the number of sampling points C according to the following formula: Where S is the current range S of the radar, H is the frequency H of CLK, and c is the speed of light; S4, the FPGA receives the A / D data obtained by alternate sampling and processes the received A / D data. The A / D data sampled by the two A / D modules are distinguished by A and B. The processing includes: the FPGA takes two adjacent sampling points A and B as a group. If the difference between the sampling values of two adjacent sampling points is greater than a predetermined threshold, it is determined that the sampling point with the larger sampling value in this group of sampling points is a noise point. And when the number of sampling points C is less than the number of points N of the radar image drawing line, retain these two sampling points and assign the smaller sampling value to the sampling point corresponding to the larger sampling value; while when C is greater than N, take the smaller sampling value as the valid value and delete the noise point.

2. The method according to claim 1, characterized in that In step S2, the alternate sampling of the analog signal is as follows: The first A / D module in the two A / D modules samples first, the second A / D module starts sampling after delaying half a CLK, and then the two A / D modules sample alternately.

3. The method according to claim 1, wherein The predetermined threshold is set according to the maximum and minimum values in the sampling value range.

4. The method according to claim 1, characterized in that Step S4 further includes: S41, when the number of sampling points C is less than N, perform interpolation processing on the sampled A / D data to expand C sampling values to N; S42, when half of the number of sampling points C, i.e., C / 2, is greater than N, perform valid value sampling processing on the sampled A / D data to reduce C / 2 valid values to N; S43, when the number of sampling points C is greater than N and C / 2 is less than N, first take the valid value of the sampled A / D data and then perform interpolation processing, and then expand C / 2 valid values into N.

5. The method according to claim 4, wherein Step S41 includes: Determine the approximate greatest common divisor x between N - C and C; Use the following formula to evenly expand the number of sampling points C to N:

6. The method according to claim 4, wherein In step S4, if the difference between the sampling values of two adjacent sampling points is less than the predetermined threshold, then when C is greater than N, only retain one sampling point, and the valid value of this sampling point is the average of the sampling values of the two adjacent sampling points.

7. The method according to claim 6, wherein Step S42 includes: Determine and approximate greatest common divisor y therebetween; Reduce valid values to N using the following formula: ​ 8. The method according to claim 6, wherein In step S43, expanding C / 2 valid values into N includes: Determine and the approximate greatest common divisor z therebetween; Expand valid values into N values using the following formula: ​ 9. An FPGA, including a memory and a processor. The memory stores at least one segment of program, and the at least one segment of program is executed by the processor to implement the method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that, At least one program is stored in the storage medium, and the at least one program is executed by a processor to implement the method according to any one of claims 1 to 8.

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