Information acquisition method, device, equipment, storage medium and program product

Abstract

Embodiments of the present application provide an information obtaining method, device, equipment, storage medium and program product. The method comprises: obtaining an assembly sequence of an MSA vector program, the assembly sequence comprising a first MSA assembly instruction, the first MSA assembly instruction comprising an operation instruction, a register identifier and a first memory address of execution information, the execution information being information stored in a target register indicated by the register identifier; executing the first MSA assembly instruction, and storing the execution information in the target register or at the first memory address according to the operation instruction; and when a trigger instruction is received, obtaining the execution information stored at the first memory address from the memory, the data length of the execution information being equal to the data bits of the target register. The information obtaining method, device, equipment, storage medium and program product provided by the embodiments of the present application can obtain complete execution information in a target vector register.

Description

Technical Field

[0001] This application relates to the field of code debugging technology, and in particular to an information acquisition method, apparatus, device, storage medium, and program product. Background Technology

[0002] Currently, software development often involves using predefined functions to process data. Some of these predefined functions are inefficient at processing data, so they are typically transformed into vectorized functions using a Single Instruction Multiple Data (SIMD) architecture. For example, on a microprocessor without interlocked piped stages (MIPS), data processing efficiency can be improved by using MSA (MIPS SIMD Architecture) vectorized functions. During development, MSA vectorized functions may contain errors. Therefore, it is usually necessary to debug these functions, obtain execution information, and analyze the specific reasons for errors when they exist, thus allowing for modifications to the MSA vectorized functions.

[0003] In related technologies, the debugging process for MSA-vectorized functions includes: converting the MSA-vectorized function into an assembly sequence, which includes MSA assembly instructions; executing the MSA assembly instructions; and after executing the MSA assembly instructions, using a register printing command (e.g., `info r$f0`) to obtain execution information from the MSA vector register (e.g., the MSA vector register corresponding to f0). Because in MIPS CPUs, the lower 64 bits of the MSA vector register are shared with the floating-point unit (FPU) floating-point registers, and the floating-point register numbers $f0-$f31 are used externally to represent the MSA vector register, when obtaining execution information through the register printing command, only the data in the lower 64 bits of the MSA vector register can be obtained, and the complete execution information (which includes both the higher and lower 64 bits) cannot be obtained. This makes it impossible to analyze the specific cause of errors when there are errors in the MSA-vectorized function. Summary of the Invention

[0004] This application provides an information acquisition method, apparatus, device, storage medium, and program product for acquiring complete execution information in a target vector register.

[0005] In a first aspect, embodiments of this application provide an information acquisition method, comprising: acquiring an assembly sequence of an MSA vector program, the assembly sequence including a first MSA assembly instruction, the first MSA assembly instruction including an operation instruction, a register identifier and a first memory address of execution information, the execution information being information stored in a target register indicated by the register identifier;

[0006] Execute the first MSA assembly instruction, and store the execution information in the target register or at the first memory address according to the operation instruction;

[0007] When a trigger instruction is received, the execution information stored at the first memory address is retrieved from memory. The data length of the execution information is equal to the data bits of the target register.

[0008] In one optional implementation, the trigger instruction is a print instruction. When the trigger instruction is received, the execution information stored at the first memory address is retrieved from memory, including:

[0009] Display the assembly sequence;

[0010] Receive a print command input by the user, the print command including a first memory address;

[0011] Based on the print command, obtain the execution information stored at the first memory address.

[0012] In one optional implementation, the operation instruction is a storage operation instruction;

[0013] Execute the first MSA assembly instruction, and according to the operation instruction, store the execution information to the target register or the first memory address, including:

[0014] Execute the first MSA assembly instruction, and according to the store operation instruction, store the execution information stored in the target vector register to the first memory address.

[0015] In one optional implementation, the operation instruction is a download operation instruction;

[0016] Execute the first MSA assembly instruction, and according to the operation instruction, store the execution information to the target register or the first memory address, including:

[0017] Execute the first MSA assembly instruction, and according to the download operation instruction, store the execution information stored at the first memory address into the target register.

[0018] In one optional implementation, the assembly sequence further includes: a second MSA assembly instruction, which includes: register identifier and execution information;

[0019] Before executing the first MSA assembly instruction and storing the execution information to the target register or the first memory address according to the operation instruction, the method further includes:

[0020] Execute the second MSA assembly instruction and store the execution information into the target register according to the register identifier.

[0021] In one optional implementation, the assembly sequence further includes a third MSA assembly instruction and a fourth MSA assembly instruction; the third MSA assembly instruction includes a register identifier and a second memory address, the second memory address being different from the first memory address; the fourth MSA assembly instruction includes a register identifier and an operation value.

[0022] Before executing the first MSA assembly instruction and storing the execution information to the target register or the first memory address according to the operation instruction, the method further includes:

[0023] Execute the third MSA assembly instruction to store the first information stored at the second memory address into the target register according to the register identifier;

[0024] The fourth MSA assembly instruction is executed. Based on the operation value, the first information in the target register is processed to obtain the execution information. Based on the register identifier, the execution information is stored in the target register.

[0025] In one alternative implementation, the method further includes:

[0026] Display the MSA vector program, which includes the source code corresponding to the fourth MSA assembly instruction;

[0027] Receive source code instructions entered by the user at the corresponding location in the source code; the source code instructions are used to determine the first memory address.

[0028] The source code instructions are compiled to obtain the first MSA assembly instructions.

[0029] In one alternative implementation, obtaining the assembly sequence of the MSA vector program includes:

[0030] The MSA vector program is compiled to obtain the corresponding executable program.

[0031] Execute the executable program and obtain the execution result;

[0032] If the execution result indicates that there is an error in the MSA vector program, the executable program is decompiled to obtain the assembly sequence of the MSA vector program.

[0033] Secondly, embodiments of this application provide an information acquisition device, comprising: an acquisition module, a first execution module, and a second execution module; wherein...

[0034] The acquisition module is used to acquire the assembly sequence of the MSA vector program. The assembly sequence includes a first MSA assembly instruction. The first MSA assembly instruction includes an operation instruction, a register identifier, and a first memory address of execution information. The execution information is the information stored in the target register indicated by the register identifier.

[0035] The first execution module is used to execute the first MSA assembly instruction and store the execution information to the target register or the first memory address according to the operation instruction.

[0036] The second execution module is used to retrieve the execution information stored at the first memory address from memory when a trigger instruction is received. The data length of the execution information is equal to the data bits of the target register.

[0037] In one alternative implementation, the second execution module is specifically used for:

[0038] Display the assembly sequence;

[0039] Receive a print command input by the user, the print command including a first memory address;

[0040] Based on the print command, obtain the execution information stored at the first memory address.

[0041] In one optional implementation, the operation instruction is a storage operation instruction; the first execution module is specifically used for:

[0042] Execute the first MSA assembly instruction, and according to the store operation instruction, store the execution information stored in the target vector register to the first memory address.

[0043] In one optional implementation, the operation instruction is a download operation instruction; the first execution module is specifically used for:

[0044] Execute the first MSA assembly instruction, and according to the download operation instruction, store the execution information stored at the first memory address into the target register.

[0045] In one optional implementation, the assembly sequence further includes: a second MSA assembly instruction, which includes: register identifier and execution information;

[0046] The device also includes: a third execution module; the third execution module is used for:

[0047] Before executing the first MSA assembly instruction and storing the execution information to the target register or the first memory address according to the operation instruction, the second MSA assembly instruction is executed and stores the execution information to the target register according to the register identifier.

[0048] In one optional implementation, the assembly sequence further includes a third MSA assembly instruction and a fourth MSA assembly instruction; the third MSA assembly instruction includes a register identifier and a second memory address, the second memory address being different from the first memory address; the fourth MSA assembly instruction includes a register identifier and an operation value.

[0049] The device also includes: a third execution module; the third execution module is used for:

[0050] Before executing the first MSA assembly instruction and storing the execution information to the target register or the first memory address according to the operation instruction, the third MSA assembly instruction is executed to store the first information stored at the second memory address into the target register according to the register identifier; the fourth MSA assembly instruction is executed to process the first information in the target register according to the operation value to obtain the execution information, and to store the execution information into the target register according to the register identifier.

[0051] In one alternative embodiment, the apparatus further includes a fourth execution module: the fourth execution module is used for:

[0052] Display the MSA vector program, which includes the source code corresponding to the fourth MSA assembly instruction;

[0053] Receive source code instructions entered by the user at the corresponding location in the source code; the source code instructions are used to determine the first memory address.

[0054] The source code instructions are compiled to obtain the first MSA assembly instructions.

[0055] In one optional implementation, the acquisition module is further configured to: compile the MSA vector program to obtain an executable program corresponding to the MSA vector program; execute the executable program to obtain an execution result; if the execution result indicates that there is an error in the MSA vector program, then decompile the executable program to obtain an assembly sequence of the MSA vector program.

[0056] Thirdly, embodiments of this application provide an electronic device, including: a processor and a memory;

[0057] The memory stores the instructions that the computer executes;

[0058] The processor executes computer execution instructions stored in memory, causing the processor to perform any of the information acquisition methods described in the first aspect above.

[0059] Fourthly, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the information acquisition method described in any of the first aspects above.

[0060] Fifthly, embodiments of this application provide a computer program product, including a computer program, which, when executed by a processor, implements the information acquisition method described in any of the first aspects above.

[0061] This application provides an information acquisition method, apparatus, device, storage medium, and program product. The information acquisition method includes: acquiring an assembly sequence of an MSA vector program, the assembly sequence including a first MSA assembly instruction, the first MSA assembly instruction including a register identifier and a first memory address containing execution information; executing the first MSA assembly instruction to store the execution information stored in the target vector register at the first memory address, or to store the execution information stored at the first memory address in the target register; and when a trigger instruction is received, retrieving the execution information stored at the first memory address from memory to obtain the execution information stored in the target register, wherein the data length of the execution information is equal to the data bits of the target register. In this application, when a trigger instruction is received, the execution information stored at the first memory address is retrieved from memory, such that the data length of the retrieved execution information is equal to the data bits of the target register, thereby obtaining complete execution information in the target vector register. This allows the user to analyze the specific cause of errors in the MSA vector program based on the complete execution information. Attached Figure Description

[0062] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0063] Figure 1 A schematic diagram of the spatial layout of the MSA vector register and the FPU floating-point register provided in the embodiments of this application;

[0064] Figure 2 Flowchart of the information acquisition method provided in the embodiments of this application Figure 1 ;

[0065] Figure 3 Flowchart of the information acquisition method provided in the embodiments of this application Figure 2 ;

[0066] Figure 4 Flowchart of the information acquisition method provided in the embodiments of this application Figure 3 ;

[0067] Figure 5Schematic diagram of the structure of the information acquisition device provided in the embodiments of this application Figure 1 ;

[0068] Figure 6 Schematic diagram of the structure of the information acquisition device provided in the embodiments of this application Figure 2 ;

[0069] Figure 7 This is a schematic diagram of the hardware structure of the electronic device provided in the embodiments of this application.

[0070] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0071] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0072] First, the technical terms used in this application will be explained.

[0073] An instruction set is a collection of instructions used by a central processing unit (CPU) to compute and control a computer system. Examples of instruction sets that can include: general-purpose instruction sets, floating-point instruction sets, and MSA assembly instruction sets.

[0074] Registers are small storage areas within the CPU used to temporarily store data involved in calculations and the results of those calculations. Different instruction sets have their own corresponding registers. For example, the general-purpose instruction set corresponds to 32 64-bit general-purpose registers, the floating-point instruction set corresponds to 32 64-bit FPU floating-point registers, and the MSA assembly instruction set corresponds to 32 128-bit MSA vector registers. Currently, CPU designers, after balancing factors such as CPU computing speed, design area, and power consumption, typically share the lower 64 bits of the 32 128-bit MSA vector registers with the 32 64-bit FPU floating-point registers.

[0075] Source code refers to an uncompiled text file written according to a specific programming language specification; it is a series of human-readable computer language instructions. For example, programming language specifications could include C programming specifications, C# programming specifications, C++ programming specifications, etc.

[0076] A compiler (GCC) is a tool used to transform source code into an executable program. Different compiler options control whether the compiler translates source code into assembly code or an executable program. For example, the compiler option `gcc -S test.c` can translate source code into assembly code.

[0077] A debugger (GDB) is used to control the execution of a program (such as assembly code). For example, it can control the program to pause at a specified location, print the values ​​of variables, etc.

[0078] Disassembly refers to the process of converting an executable program into assembly code.

[0079] Store and download instructions are instructions that instruct the MSA vector register to interact with memory.

[0080] The store operation instruction (st.b) is used to transfer information from the MSA vector register to a specific memory address.

[0081] The load operation instruction (such as ld.b or ld.h) is used to transfer information stored at a certain memory address in memory to the MSA vector register.

[0082] In existing technology, when debugging MSA-vectorized functions, the MSA-vectorized function is converted into an assembly sequence, which includes MSA assembly instructions; the MSA assembly instructions are executed; after executing the MSA assembly instructions, a command to print registers is used to obtain the execution information in the MSA vector register. Because in MIPS CPUs, the lower 64 bits of the MSA vector register are shared with the FPU floating-point register (for details, please refer to...),... Figure 1 The MSA vector register is represented externally using floating-point register numbers $f0-$f31. Therefore, when obtaining execution information via the command to print the registers, only the lower 64 bits of the MSA vector register can be retrieved; the complete execution information (which includes both the higher and lower 64 bits) cannot be obtained. This makes it impossible to analyze the specific cause of errors when there are errors in the MSA vectorized function.

[0083] Figure 1 This is a schematic diagram of the spatial layout of the MSA vector register and the FPU floating-point register provided in an embodiment of this application. Figure 1 As shown, for a given register, the MSA vector register occupies 128 bits (bits 0-127) of the register; the FPU floating-point register occupies the lower 64 bits (bits 0-63) of the register. The MSA vector register and the FPU floating-point register share the lower 64 bits of the register.

[0084] In order to obtain the complete execution information in the MSA vector register, the inventors discovered during the debugging of MSA vectorized functions that: before the MSA assembly instructions included in the assembly sequence, there is usually a download operation instruction (ld.b), and after the MSA assembly instructions included in the assembly sequence, there is usually a store operation instruction (st.b). This allows the complete execution information in the MSA vector register to be stored at a certain memory address. Because the complete execution information in the MSA vector register can be retrieved from a certain memory address based on the download operation instruction or the store operation instruction, the goal of obtaining the complete execution information in the MSA vector register can be achieved.

[0085] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0086] Figure 2 Flowchart of the information acquisition method provided in the embodiments of this application Figure 1 .like Figure 2 As shown, the method includes:

[0087] S201. Obtain the assembly sequence of the MSA vector program. The assembly sequence includes a first MSA assembly instruction. The first MSA assembly instruction includes operation instructions, register identifiers, and execution information stored in the target register indicated by the execution information register identifier at a first memory address.

[0088] Optionally, the execution subject of this application embodiment can be an electronic device or an information acquisition device installed in the electronic device. The information acquisition device can be implemented through a combination of software and / or hardware.

[0089] Examples of electronic devices include, but are not limited to, desktop computers and laptops. Examples of software include, but are not limited to, compilers and debuggers. Examples of hardware include, but are not limited to, processors.

[0090] MSA vector programs are functions that users write in source code to vectorize MSA.

[0091] Specifically, the MSA vector program can be compiled using a compiler to obtain an assembly sequence.

[0092] Optionally, the operation instructions can be storage operation instructions (st.b) or download operation instructions (ld.b or ld.h, etc.).

[0093] For example, when the operation instruction is st.b, the first MSA assembly instruction can be st.b$f0,48(s8).

[0094] For example, when the operation instruction is ld.h, the first MSA assembly instruction can be ld.h$f0,112(s8).

[0095] $f0 is the register identifier, and 48 (s8) and 112 (s8) are memory addresses.

[0096] The target register is the MSA vector register.

[0097] S202. Execute the first MSA assembly instruction and store the execution information to the target register or the first memory address according to the operation instruction.

[0098] In one optional implementation, when the operation instruction is st.b, S202 includes: executing a first MSA assembly instruction and, according to the storage operation instruction, storing the execution information stored in the target vector register to a first memory address.

[0099] Specifically, when the first MSA assembly instruction is st.b$f0,48(s8), the first MSA assembly instruction is executed, and according to the operation instruction st.b, the execution information in the target vector register indicated by $f0 is stored at the first memory address 48(s8).

[0100] In one optional implementation, when the operation instruction is ld.h, S202 includes: executing the first MSA assembly instruction and storing the execution information stored at the first memory address into the target register according to the download operation instruction.

[0101] Specifically, when the first MSA assembly instruction is ld.h$f0,112(s8), the first MSA assembly instruction is executed, and the execution information stored at the first memory address 112(s8) is stored in the target vector register indicated by $f0.

[0102] S203. When a trigger instruction is received, the execution information stored at the first memory address is retrieved from memory. The data length of the execution information is equal to the data bits of the target register.

[0103] It should be noted that the execution information stored at the first memory address is the complete execution information in the target register.

[0104] Specifically, the assembly sequence is displayed in the GDB assembly code window (asm).

[0105] For example, when the first MSA assembly instruction is st.b$f0,48(s8) and the execution information is -1, firstly, the command ir$f0 is received through the GDB command window (cmd), and the execution information in the target vector register is obtained and printed as 0x00000000000000008; secondly, the command ni is received through the command window, the first MSA assembly instruction is executed, and the execution information stored in the target vector register is stored at the first memory address; finally, the command x / 4xw$s8+48 is received through the command window, and the complete execution information 0xffffffff 0xffffffff 0xffffffff0xffffffff in the target vector register is obtained and printed.

[0106] For example, when the first MSA assembly instruction is ld.h$f0,112(s8) and the first memory address stores 0xffffffff 0xffffffff 0xffffffff 0xffffffff, firstly, the command ir$f0 is received through the GDB command window (cmd), and the execution information in the target vector register is obtained and printed as 0x0000000000000000; secondly, the command ni is received through the command window, the first MSA assembly instruction is executed, and 0xffffffff 0xffffffff 0xffffffff0xffffffff is stored in the target vector register; finally, the command x / 4xw$112(s8) is received through the command window, and the complete execution information 0xffffffff 0xffffffff 0xffffffffff0xffffffff in the target vector register is obtained and printed.

[0107] x / 4xw is a memory inspection command. Memory instructions typically have the format x / nfu, where x is short for examine, n represents the number of memory locations to display (when n is 4, it means displaying 4 memory locations), f represents the display mode (when f is x, it means displaying data in hexadecimal format), and u represents the length of one address unit (when u is w, it means four bytes). x / 4xw means printing 32 bits of data in each of the four consecutive memory locations at memory address $s8+48 in hexadecimal form.

[0108] In the execution message 0xffffffff 0xffffffff 0xffffffff 0xffffffff, each f represents 4 binary bits, so 0xffffffff 0xffffffff 0xffffffff 0xffffffff has 128 bits, which is the same as the data bits in the target vector register.

[0109] It should be noted that -1, when converted to hexadecimal, can become the execution information 0xffffffff0xffffffff 0xffffffff 0xffffffff.

[0110] Optionally, the trigger instruction can be x / 4xw ADDR, or other instructions, which will not be detailed here. ADDR is the first memory address in memory where the execution information is located. For example, ADDR can be $s8+48 as mentioned above.

[0111] Unlike existing technologies, in MIPS CPUs, the lower 64 bits of the MSA vector register are shared with the FPU floating-point register (see details). Figure 1 The previous method used floating-point register numbers $f0-$f31 to represent the MSA vector register. Therefore, if the user enters the command `ir$f0` in the command window after executing the first MSA assembly instruction, the information `f0: 0xffffffffffffffff` will be retrieved and printed, meaning only the lower 64 bits of the target vector register indicated by `$f0` will be printed. This makes it impossible to analyze the specific cause of errors in the MSA vector program. However, in this application, when a trigger instruction is received, the execution information stored at the first memory address is retrieved from memory. This allows the user to obtain the complete execution information (0xffffffff 0xffffffff 0xffffffff 0xffffffff) in the target vector register, enabling the user to analyze the specific cause of errors in the MSA vector program based on the complete execution information.

[0112] Figure 2The information acquisition method provided in this embodiment includes: acquiring an assembly sequence of an MSA vector program, the assembly sequence including a first MSA assembly instruction, the first MSA assembly instruction including a register identifier and a first memory address containing execution information; executing the first MSA assembly instruction to store the execution information stored in the target vector register at the first memory address, or to store the execution information stored at the first memory address in the target register; when a trigger instruction is received, retrieving the execution information stored at the first memory address from memory to obtain the execution information stored in the target register, wherein the data length of the execution information is equal to the data bits of the target register. In this application, when a trigger instruction is received, the execution information stored at the first memory address is retrieved from memory, such that the data length of the retrieved execution information is equal to the data bits of the target register, thereby obtaining complete execution information in the target vector register, allowing the user to analyze the specific cause of the error in the MSA vector program based on the complete execution information.

[0113] Based on the above embodiments, the information acquisition method provided in this application will be further described below with reference to specific embodiments. For details, please refer to [link to specific embodiments]. Figure 3 Example.

[0114] Figure 3 Flowchart of the information acquisition method provided in the embodiments of this application Figure 2 .like Figure 3 As shown, the method includes:

[0115] S301. Compile the MSA vector program to obtain the executable program corresponding to the MSA vector program.

[0116] The MSA vector program is compiled using a compiler to obtain the corresponding executable program.

[0117] S302. Execute the executable program and obtain the execution result.

[0118] Specifically, the compiler executes the executable program and obtains the execution result.

[0119] S303. If the execution result indicates that there is an error in the MSA vector program, the executable program is decompiled to obtain the assembly sequence of the MSA vector program, which includes the first MSA assembly instruction and the second MSA assembly instruction.

[0120] The second MSA assembly instruction includes register identifiers and execution information.

[0121] The first MSA assembly instruction includes a storage operation instruction, a register identifier, and the first memory address for execution information.

[0122] The second MSA assembly instruction can be located before and adjacent to the first MSA assembly instruction. For example, the second MSA assembly instruction can be ldi.b$f0,-1, and the first MSA assembly instruction can be st.b$f0,48(s8). ldi.b$f0,-1 indicates that the execution information -1 is stored in the target vector register indicated by $f0.

[0123] The following example illustrates the errors present in the MSA vector program.

[0124] For example, for the vector shuffling instruction `ilvr.df Dest,Src1,Src2`, `df` can be selected as one of three variants: `b` (byte), `h` (half-word), and `w` (word). This means that the values ​​in `Src1` and `Src2` are alternately combined into a new data set in `Dest` using bytes, half-words, or words. In RGB applications, after calculating an R, G, B component, this instruction is needed to combine the three components into a single RGB pixel. Assuming the R component is 0x01020304 (lower 32 bits) and the G component is 0x11223344, a programmer might incorrectly use the instruction `ilvr.h Dest,Src1,Src2` to achieve this. This would lead to image display errors during program execution; specifically, using alternating half-word combinations of values ​​from `Src1` and `Src2` to create a new data set in `Dest` will result in image display errors during program execution. Through debugging, it was found that the value in the Dest register was 0x33440304 (lower 32 bits), instead of the expected 0x33034404. It can be determined that the instruction ilvr.b Dest,Src1,Src2 should be used to accomplish this requirement, that is, to combine the values ​​in Src1 and Src2 into a new data and put it into the Dest register by alternating bytes.

[0125] S304, Display assembly sequence.

[0126] Specifically, the assembly sequence is displayed in the assembly code window.

[0127] S305. Execute the second MSA assembly instruction and store the execution information into the target register according to the register identifier.

[0128] For example, the second MSA assembly instruction is ldi.b$f0,-1. Executing the second MSA assembly instruction will store the execution information -1 into the target register indicated by the register identifier $f0.

[0129] S306. Execute the first MSA assembly instruction and, according to the store operation instruction, store the execution information stored in the target vector register to the first memory address.

[0130] For a detailed explanation of S306, please refer to S202, which will not be repeated here.

[0131] Specifically, during the sequential execution of S305 and S306, the command ni is first received through the GDB command window to execute the second MSA assembly instruction; then, the command ni is received again through the GDB command window to execute the first MSA assembly instruction.

[0132] S307. Receive a trigger instruction input by the user. The trigger instruction is a print instruction, which includes the first memory address.

[0133] S308. According to the print instruction, obtain the execution information stored at the first memory address. The data length of the execution information is equal to the data bits of the target register.

[0134] Figure 3 The information acquisition method provided in this embodiment includes: compiling an MSA vector program to obtain an executable program corresponding to the MSA vector program; executing the executable program to obtain an execution result; if the execution result indicates that there is an error in the MSA vector program, then decompiling the executable program to obtain an assembly sequence of the MSA vector program, the assembly sequence including a first MSA assembly instruction and a second MSA assembly instruction; displaying the assembly sequence; executing the second MSA assembly instruction and storing the execution information in the target register according to the register identifier; executing the first MSA assembly instruction and storing the execution information stored in the target vector register to a first memory address according to the store operation instruction; receiving a trigger instruction input by the user, the trigger instruction being a print instruction, the print instruction including the first memory address; and obtaining the execution information stored at the first memory address according to the print instruction, the data length of the execution information being equal to the data bits of the target register. In the above method, the execution information in the MSA vector register is saved to the first memory address using the first MSA assembly instruction. This ensures that the first memory address stores the complete execution information from the MSA vector register. Therefore, after executing the second and first MSA assembly instructions sequentially, when the execution information is retrieved from the first memory address according to the print instruction, the complete execution information can be obtained. This allows the user to analyze the specific cause of the error based on the complete execution information. In other words, in this application, the complete execution information in the MSA vector register can be obtained relatively easily using the first MSA assembly instruction.

[0135] In some cases, a download or store instruction may not immediately follow a vectorized operation (i.e., MSA assembly instruction) in the context of an assembly sequence of an MSA vector program. For example, for several consecutive arithmetic and shift instructions, there is usually no need for temporary storage, so a download or store instruction may not immediately follow an arithmetic or shift instruction.

[0136] In practical applications, to obtain complete execution information from the target vector register in scenarios where there is no need for temporary storage, download or store operation instructions can be inserted into the assembly sequence. This allows for the acquisition of complete execution information from the target vector register even in such scenarios. The following explanation uses the insertion of download operation instructions into the assembly sequence as an example to illustrate the information acquisition method provided in this application. For details, please refer to... Figure 4 Example.

[0137] Figure 4 Flowchart of the information acquisition method provided in the embodiments of this application Figure 3 .like Figure 4 As shown, the method includes:

[0138] S401. Display the MSA vector program, which includes the source code corresponding to the fourth MSA assembly instruction.

[0139] Specifically, the MSA vector program is displayed in the GDB source code window (src).

[0140] The MSA vector program also includes the source code corresponding to the third MSA assembly instructions.

[0141] The third MSA assembly instruction includes a register identifier and a second memory address, which are different from the first memory address. For example, the third MSA assembly instruction is ld.h$f0,112(s8). 112(s8) is the second memory address.

[0142] The fourth MSA assembly instruction includes register identifiers and operand values. For example, the fourth MSA assembly instruction is srli.h,$f0,$f0 0x2. srli.h indicates a logical shift operation instruction, 0x2 is the operand value, and $f0 is the register identifier.

[0143] If the fourth MSA assembly instruction is executed, then the first MSA assembly instruction needs to be inserted.

[0144] The first MSA assembly instruction includes a storage operation instruction, a register identifier, and the first memory address for execution information.

[0145] S402: Receive source code instructions entered by the user at the corresponding location in the source code. The source code instructions are used to determine the first memory address.

[0146] The source code is the source code corresponding to the fourth MSA assembly instruction.

[0147] Here, the corresponding position is the position after the location of the source code and adjacent to that location of the source code.

[0148] For example, the first MSA assembly instruction is st.b$f0,160(s8). 160(s8) is the first memory address.

[0149] Optionally, the first memory address can be determined based on the second memory address and the memory length of the preset storage unit. For example, when the second memory address is 112 (s8) and the first memory address is 160 (s8), the memory length of the preset storage unit is 40. Optionally, the memory length of the preset storage unit can be a user-defined length.

[0150] S403. Compile the MSA vector program, which includes source code instructions, to obtain an assembly sequence, which includes the third MSA assembly instruction, the fourth MSA assembly instruction, and the first MSA assembly instruction.

[0151] The source code instructions are compiled to obtain the first MSA assembly instructions.

[0152] It should be noted that before S401, the process may include: compiling the MSA vector program to obtain the corresponding executable program; executing the executable program to obtain the execution result; if the execution result indicates that there is an error in the MSA vector program, then decompiling the executable program to obtain the assembly sequence of the MSA vector program. For details, please refer to the execution process of S301 to 303, which will not be elaborated here.

[0153] S404. Execute the third MSA assembly instruction to store the first information stored at the second memory address into the target register according to the register identifier.

[0154] For example, when the third MSA assembly instruction is ld.h$f0,112(s8), the first information stored at the second memory address 112(s8) is stored in the target register indicated by $f0.

[0155] S405. Execute the fourth MSA assembly instruction, process the first information in the target register according to the operation value, obtain the execution information, and store the execution information in the target register according to the register identifier.

[0156] For example, when the fourth MSA assembly instruction is srli.h,$f0,$f0 0x2, the fourth MSA assembly instruction is executed. Based on the operation value 0x2, the value in the target vector register indicated by $f0 is shifted right by 2 bits to obtain the execution information, and the execution information is stored again in the target vector register indicated by $f0.

[0157] S406. Execute the first MSA assembly instruction and, according to the store operation instruction, store the execution information stored in the target vector register to the first memory address.

[0158] The source code instruction is the source code instruction corresponding to the store operation instruction. The corresponding position is after the position corresponding to the fourth MSA assembly instruction and adjacent to the position corresponding to the fourth MSA assembly instruction.

[0159] S407, Display assembly sequence.

[0160] Specifically, the execution method of S407 is the same as that of S304, and will not be repeated here.

[0161] S408: Receive a trigger instruction input by the user. The trigger instruction is a print instruction, which includes the first memory address.

[0162] S409. According to the print instruction, obtain the execution information stored at the first memory address. The data length of the execution information is equal to the data bits of the target register.

[0163] Specifically, the execution methods for S408 to S409 are the same as those for S307 to S308, and will not be repeated here.

[0164] For example, three consecutive instructions are: addv.w$f0,$f1,$f0, subv.w$f0,$f1,$f0, and srai.w$f0,$f0,0x6.

[0165] The instruction `addv.w$f0,$f1,$f0` means to overlay the information in the target vector register indicated by `$f0` with the information in the vector register indicated by `$f1`, and store the overlaid information in the target vector register indicated by `$f0`. `addv.w` indicates the overlay operation instruction.

[0166] The instruction `subv.w$f0,$f1,$f0` means subtracting the information in the target vector register pointed to by `$f0` from the information in the vector register pointed to by `$f1`, obtaining the difference, and storing the difference in the target vector register pointed to by `$f0`. `subv.w` indicates a difference operation instruction.

[0167] The instruction `srai.w$f0,$f0,0x6` means to arithmetically shift the information in the target vector register indicated by `$f0` to the right. The shift amount is determined by 0x6, and the shifted information is stored in the target vector register indicated by `$f0`. `srai.w` indicates an arithmetic shift operation instruction. `0x6` indicates the amount of arithmetic shift.

[0168] When it is necessary to obtain the complete execution information in the target vector register indicated by $f0 between addv.w$f0,$f1,$f0 and subv.w$f0,$f1,$f0, the source code instructions corresponding to the store operation instructions can be added between the source code instructions corresponding to addv.w$f0,$f1,$f0 and subv.w$f0,$f1,$f0 respectively. After compiling the source code instructions corresponding to the store operation instructions, the store operation instructions are obtained, thereby adding store operation instructions between addv.w$f0,$f1,$f0 and subv.w$f0,$f1,$f0.

[0169] When it is necessary to obtain the complete execution information in the target vector register indicated by $f0 before addv.w$f0,$f1,$f0, the source code instructions corresponding to the download operation instructions can be added before the source code instructions corresponding to addv.w$f0,$f1,$f0. After compiling the source code instructions corresponding to the download operation instructions, the download operation instructions are obtained, thus realizing the addition of download operation instructions before addv.w$f0,$f1,$f0.

[0170] exist Figure 4 In the information acquisition method provided in the embodiment, in application scenarios where there is no need for temporary storage, the source code instructions input by the user at the corresponding location in the source code are received. After compiling the source code instructions, a first MSA assembly instruction is obtained. The first MSA assembly instruction includes a first memory address containing execution information. After executing the first MSA assembly instruction, the execution information is obtained based on the first memory address. The complete execution information in the target vector register can be obtained, allowing the user to analyze the specific cause of the error based on the complete execution information.

[0171] Figure 5 Schematic diagram of the structure of the information acquisition device provided in the embodiments of this application Figure 1 .like Figure 5 As shown, the information acquisition device 10 includes: an acquisition module 11, a first execution module 12, and a second execution module 13; wherein,

[0172] The acquisition module 11 is used to acquire the assembly sequence of the MSA vector program. The assembly sequence includes a first MSA assembly instruction. The first MSA assembly instruction includes an operation instruction, a register identifier, and a first memory address of execution information. The execution information is the information stored in the target register indicated by the register identifier.

[0173] The first execution module 12 is used to execute the first MSA assembly instruction and store the execution information to the target register or the first memory address according to the operation instruction;

[0174] The second execution module 13 is used to retrieve the execution information stored at the first memory address from memory when a trigger instruction is received. The data length of the execution information is equal to the data bits of the target register.

[0175] The information acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0176] Figure 6 The structural schematic diagram of the information acquisition device provided in the embodiments of this application Figure 2 .like Figure 6 As shown, the information acquisition device 10 further includes: a third execution module 14; the third execution module 14 is used for:

[0177] When the assembly sequence also includes a second MSA assembly instruction, which includes a register identifier and execution information, the second MSA assembly instruction is executed before the first MSA assembly instruction is executed and the execution information is stored in the target register or the first memory address according to the operation instruction.

[0178] When the assembly sequence also includes a third MSA assembly instruction and a fourth MSA assembly instruction; the third MSA assembly instruction includes a register identifier and a second memory address, the second memory address being different from the first memory address; and the fourth MSA assembly instruction includes a register identifier and an operation value, before executing the first MSA assembly instruction and storing the execution information to the target register or the first memory address according to the operation instruction, the third MSA assembly instruction is executed to store the first information stored at the second memory address to the target register according to the register identifier; the fourth MSA assembly instruction is executed to process the first information in the target register according to the operation value to obtain the execution information, and then stores the execution information to the target register according to the register identifier.

[0179] The information acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0180] In one alternative implementation, the second execution module 13 is specifically used for:

[0181] Display the assembly sequence;

[0182] Receive a print command input by the user, the print command including a first memory address;

[0183] Based on the print command, obtain the execution information stored at the first memory address.

[0184] In one optional implementation, the operation instruction is a storage operation instruction; the first execution module 12 is specifically used for:

[0185] Execute the first MSA assembly instruction, and according to the store operation instruction, store the execution information stored in the target vector register to the first memory address.

[0186] In one optional implementation, the operation instruction is a download operation instruction; the first execution module 12 is specifically used for:

[0187] Execute the first MSA assembly instruction, and according to the download operation instruction, store the execution information stored at the first memory address into the target register.

[0188] In one alternative embodiment, the apparatus further includes a fourth execution module: the fourth execution module is used for:

[0189] Display the MSA vector program, which includes the source code corresponding to the fourth MSA assembly instruction;

[0190] Receive source code instructions entered by the user at the corresponding location in the source code; the source code instructions are used to determine the first memory address.

[0191] The source code instructions are compiled to obtain the first MSA assembly instructions.

[0192] In one optional embodiment, the acquisition module 11 is further configured to: compile the MSA vector program to obtain an executable program corresponding to the MSA vector program; execute the executable program to obtain an execution result; if the execution result indicates that there is an error in the MSA vector program, then decompile the executable program to obtain an assembly sequence of the MSA vector program.

[0193] Figure 7 This is a schematic diagram of the hardware structure of the electronic device provided in an embodiment of this application. Figure 7 As shown, the electronic device 20 includes a memory 21 and a processor 22.

[0194] The memory 21 and the processor 22 are interconnected via bus 23.

[0195] The memory 21 is used to store computer-executed instructions.

[0196] The processor 22 is used to execute the computer execution instructions stored in the memory 21, causing the processor 22 to perform the information acquisition method shown in any of the above method embodiments. The specific implementation process of the processor 22 can be found in the above method embodiments, and its implementation principle and technical effects are similar; therefore, it will not be repeated here.

[0197] In the above Figure 7 In the illustrated embodiments, it should be understood that the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this application can be directly manifested as being executed by a hardware processor, or executed by a combination of hardware and software modules within the processor.

[0198] The memory may include high-speed RAM, or it may also include non-volatile memory (NVM), such as disk storage.

[0199] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, the buses shown in the accompanying drawings are not limited to a single bus or a single type of bus.

[0200] This application also provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the above-described information acquisition method.

[0201] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the information acquisition method described above.

[0202] All or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a readable memory. When the program is executed, it performs the steps of the above method embodiments; and the aforementioned memory (storage medium) includes: read-only memory (ROM), RAM, flash memory, hard disk, solid-state drive, magnetic tape, floppy disk, optical disk, and any combination thereof.

[0203] This application describes embodiments with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processing unit of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processing unit of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0204] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0205] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0206] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this application without departing from the spirit and scope of this application. Therefore, if these modifications and variations to the embodiments of this application fall within the scope of the claims of this application and their equivalents, this application also intends to include these modifications and variations.

[0207] In this application, the term "comprising" and its variations can refer to non-limiting inclusion; the term "or" and its variations can refer to "and / or". The terms "first", "second", etc., in this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. In this application, "multiple" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

Claims

1. An information acquisition method, characterized in that, include: Obtain the assembly sequence of the MSA vector program, the assembly sequence including a first MSA assembly instruction, the first MSA assembly instruction including an operation instruction, a register identifier and a first memory address of execution information, the execution information being the information stored in the target register indicated by the register identifier; Execute the first MSA assembly instruction, and store the execution information in the target register or at the first memory address according to the operation instruction; When a trigger instruction is received, the execution information stored at the first memory address is retrieved from the memory, and the data length of the execution information is equal to the data bits of the target register.

2. The method according to claim 1, characterized in that, The trigger instruction is a print instruction. The step of retrieving the execution information stored at the first memory address from the memory when the trigger instruction is received includes: Display the assembly sequence; Receive a print command input by the user, wherein the print command includes the first memory address; According to the print instruction, the execution information stored at the first memory address is obtained.

3. The method according to claim 1 or 2, characterized in that, The operation instruction is a storage operation instruction; The step of executing the first MSA assembly instruction and storing the execution information to the target register or the first memory address according to the operation instruction includes: Execute the first MSA assembly instruction, and according to the store operation instruction, store the execution information stored in the target register to the first memory address.

4. The method according to claim 1 or 2, characterized in that, The operation instruction is a download operation instruction; The step of executing the first MSA assembly instruction and storing the execution information to the target register or the first memory address according to the operation instruction includes: Execute the first MSA assembly instruction, and according to the download operation instruction, store the execution information stored at the first memory address into the target register.

5. The method according to claim 3, characterized in that, The assembly sequence further includes: a second MSA assembly instruction, which includes: the register identifier and the execution information; Before executing the first MSA assembly instruction and storing the execution information to the target register or the first memory address according to the operation instruction, the method further includes: The second MSA assembly instruction is executed, and the execution information is stored in the target register according to the register identifier.

6. The method according to claim 3, characterized in that, The assembly sequence also includes a third MSA assembly instruction and a fourth MSA assembly instruction; the third MSA assembly instruction includes the register identifier and a second memory address, the second memory address being different from the first memory address; the fourth MSA assembly instruction includes the register identifier and an operation value. Before executing the first MSA assembly instruction and storing the execution information to the target register or the first memory address according to the operation instruction, the method further includes: Execute the third MSA assembly instruction to store the first information stored at the second memory address into the target register according to the register identifier; The fourth MSA assembly instruction is executed to process the first information in the target register according to the operation value to obtain the execution information, and the execution information is stored in the target register according to the register identifier.

7. The method according to claim 6, characterized in that, The method further includes: The MSA vector program is displayed, and the MSA vector program includes the source code corresponding to the fourth MSA assembly instruction; Receive source code instructions input by the user at the corresponding location in the source code, the source code instructions being used to determine the first memory address; The source code instructions are compiled to obtain the first MSA assembly instructions.

8. The method according to any one of claims 1-2 and 5-7, characterized in that, Obtain the assembly sequence of the MSA vector program, including: The MSA vector program is compiled to obtain the executable program corresponding to the MSA vector program; Execute the executable program to obtain the execution result; If the execution result indicates that there is an error in the MSA vector program, the executable program is decompiled to obtain the assembly sequence of the MSA vector program.

9. An information acquisition device, characterized in that, include: The module includes an acquisition module, a first execution module, and a second execution module; among which, The acquisition module is used to acquire the assembly sequence of the MSA vector program. The assembly sequence includes a first MSA assembly instruction. The first MSA assembly instruction includes an operation instruction, a register identifier, and a first memory address of execution information. The execution information is the information stored in the target register indicated by the register identifier. The first execution module is configured to execute the first MSA assembly instructions and, according to the operation instructions, store the execution information in the target register or at the first memory address; The second execution module is used to retrieve the execution information stored at the first memory address from the memory when a trigger instruction is received, wherein the data length of the execution information is equal to the data bits of the target register.

10. An electronic device, characterized in that, include: Processor and memory; The memory stores computer-executed instructions; The processor executes computer execution instructions stored in the memory, causing the processor to perform the information acquisition method as described in any one of claims 1-8.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by the processor, implement the information acquisition method as described in any one of claims 1-8.

12. A computer program product, characterized in that, It includes a computer program that, when executed by a processor, implements the information acquisition method as described in any one of claims 1-8.

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