A defect level classification method and system based on template matching and defect segmentation

Abstract

The application provides a defect level classification method and system based on template matching and defect segmentation, and relates to the field of defect detection.The method steps are as follows: (1) obtaining a defect sample set; (2) training a defect detection model based on the defect sample set; (3) outputting a target frame through the defect detection model; (4) obtaining a defect contour image based on the target frame; (5) setting a standard template and extracting a specific circuit structure corresponding to the standard template; (6) comprehensively classifying the defect level according to the defect category, the defect contour image size and the position relationship between the defect and the specific circuit structure.The application uses an image contour extraction algorithm to segment and extract the defect and the specific circuit structure in the target frame and the whole image on the basis of the detection result of the deep learning model, so as to calculate the defect size and the spatial position relationship between the two, and comprehensively consider to obtain the defect level; the application can significantly enhance the accuracy of model pattern judgment, and provide a basis for subsequent defect influence evaluation and repair process selection.

Description

Technical Field

[0001] This invention relates to the field of defect detection technology, and more specifically, to a defect level classification method and system based on template matching and defect segmentation. Background Technology

[0002] Display panel manufacturing plants generate numerous defects during panel production. However, the entire panel manufacturing process is complex and time-consuming, often requiring a considerable amount of time from substrate preparation to final processing. Therefore, defects generated at each stage of the process need constant monitoring to prevent them from flowing into the next process and reducing yield. Defect detection requires identifying and classifying defects. Traditional defect detection relies on manual image interpretation, which is costly and prone to errors due to human subjectivity and fatigue. Therefore, to save manpower and time, automated defect classification systems (ADCs) based on artificial intelligence technology are widely adopted to replace manual panel defect detection. However, existing automated defect classification systems for display panels can only determine the type and location of defects, but cannot further subdivide the defect severity level.

[0003] Because existing automatic defect classification systems cannot accurately classify the defect levels of display panels, they cannot distinguish the severity of defects and repair methods, making it difficult to meet the needs of display panel production and processing. Summary of the Invention

[0004] To address the problem that existing automatic defect classification systems cannot subdivide the defect levels of display panels, embodiments of the present invention provide a defect level classification method and system based on template matching and defect segmentation.

[0005] In a first aspect, embodiments of the present invention provide a defect level classification method based on template matching and defect segmentation, the method comprising the following steps:

[0006] Defect samples are obtained from defect image P0 and labeled to obtain a defect sample set;

[0007] Construct a defect detection model M, and train the defect detection model M based on a defect sample set;

[0008] Input the image P1 to be predicted into the defect detection model M, and output the target bounding box Bbox containing defect type and location information through the defect detection model M;

[0009] Based on the target bounding box (Bbox), the defect contour image is extracted from the image to be predicted to obtain the defect contour image.

[0010] Based on the defect image P0, specific circuit structures of PS holes, PS pillars, Gate lines and Common lines are obtained as standard templates, and the specific circuit structures corresponding to the standard templates are extracted in the image P1 to be predicted.

[0011] Defect levels are classified based on a combination of defect type, defect outline image size, and the positional relationship between the defect and a specific circuit structure.

[0012] In the above embodiments, based on the detection results of the deep learning model, the present invention uses an image contour extraction algorithm to segment and extract defects and specific circuit structures in the target bounding box (Bbox) and the whole image respectively, in order to calculate the defect size and the spatial relationship between the two. Finally, the defect level is obtained by comprehensive consideration, which can significantly enhance the accuracy of the model's image judgment and provide a basis for subsequent defect impact assessment and repair process selection.

[0013] As some optional embodiments of this application, the method uses the labeling tool LabelImg to label samples according to defect categories.

[0014] As some optional embodiments of this application, the method constructs a defect detection model M using the Faster R-CNN object detection algorithm.

[0015] As some optional embodiments of this application, the method extracts the specific circuit structure corresponding to the standard template by performing similarity matching on the standard template in the image P1 to be predicted.

[0016] As some optional embodiments of this application, the process by which the method outputs a target bounding box (Bbox) containing defect type and location information through the defect detection model M is as follows:

[0017] Input the image P1 to be predicted into the defect detection model M, and output the location, type and confidence of all defects through the defect detection model M;

[0018] The location of the defect is filtered based on the confidence level to obtain a target box (Bbox) containing the defect type and location information.

[0019] As some optional embodiments of this application, the process of classifying defects by combining defect category, defect contour image size, and positional relationship between the defect and a specific circuit structure is as follows:

[0020] Preset defect categories, defect contour image sizes, and weight values ​​corresponding to the positional relationship between defects and specific circuit structures;

[0021] The relevant parameters, such as defect category, defect contour image size, and the positional relationship between the defect and a specific circuit structure, are weighted and summed based on the weighted summation value, and the defect level is classified based on the weighted summation result.

[0022] As some optional embodiments of this application, the method performs a weighted summation of relevant parameters such as defect category, defect contour image size, and the positional relationship between the defect and a specific circuit structure based on weight values, and the process of classifying the defect level based on the weighted summation result is as follows:

[0023] Preset reference bases for different defect categories and specific circuit structures for PS holes, PS pillars, Gate lines, and Common lines respectively;

[0024] Determine whether the defect intersects with PS holes, PS pillars, Gate lines, or Common lines. If they intersect, obtain the corresponding reference base.

[0025] A weighted sum is performed based on the reference base of the defect category, the reference base of the specific circuit structure, and the size of the defect contour image.

[0026] In the above embodiments, since different defect categories have a direct impact on defect level classification, defect categories need to be taken into priority in the defect level classification calculation process. At the same time, the size of the defect also has a direct impact on defect level classification, so the size of the defect also needs to be taken into consideration in the defect level classification calculation process. Furthermore, since the impact of defects falling on different circuit structures on the entire panel is different, the intersection of different specific circuit structures with defects also needs to be comprehensively considered in the defect level classification calculation process. By comprehensively analyzing the display panel, the defect level of the display panel can be subdivided, which can better meet the needs of display panel production and processing.

[0027] In a second aspect, the present invention provides a defect level classification system based on template matching and defect segmentation, the system comprising:

[0028] A defect sample unit, which acquires defect samples based on a defect image P0 and annotates the defect samples to obtain a defect sample set;

[0029] A model training unit is used to construct a defect detection model M and train the defect detection model M based on a defect sample set.

[0030] A defect localization unit is used to input the image P1 to be predicted into the defect detection model M, and output a target box Bbox containing defect type and location information through the defect detection model M.

[0031] A contour extraction unit extracts defect contour images from the image to be predicted based on the target bounding box (Bbox) to obtain defect contour images.

[0032] The circuit structure extraction unit obtains specific circuit structures such as PS holes, PS pillars, Gate lines, and Common lines as standard templates based on the defect image P0, and extracts the specific circuit structures corresponding to the standard templates in the image to be predicted P1.

[0033] The defect level classification unit is used to classify defects based on a combination of defect category, defect contour image size, and the positional relationship between the defect and a specific circuit structure.

[0034] In a third aspect, the present invention provides a computer device including a memory, a processor, and a computer program stored in the memory and executable on the processor, the processor performing the defect level classification method based on template matching and defect segmentation.

[0035] In a fourth aspect, the present invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the defect level classification method based on template matching and defect segmentation.

[0036] The beneficial effects of this invention are as follows: Based on the detection results of the deep learning model, this invention uses an image contour extraction algorithm to segment and extract defects and specific circuit structures in the target bounding box (Bbox) and the whole image, respectively, to calculate the defect size and the spatial relationship between the two. Finally, the defect level is obtained by comprehensive consideration, which can significantly enhance the accuracy of the model's image judgment and provide a basis for subsequent defect impact assessment and repair process selection. Attached Figure Description

[0037] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This is a flowchart illustrating the steps of the defect level classification method according to an embodiment of the present invention;

[0039] Figure 2 This is a flowchart illustrating the steps of defect level classification according to an embodiment of the present invention;

[0040] Figure 3 This is a schematic diagram of defect contour image extraction according to an embodiment of the present invention.

[0041] Figure 4 This is a schematic diagram of standard template extraction according to an embodiment of the present invention;

[0042] Figure 5 This is a schematic diagram showing the spatial relationship between the defects and specific circuit structures described in the embodiments of the present invention. Detailed Implementation

[0043] To better understand the above technical solutions, the technical solutions of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solutions of the present invention, rather than limitations on the technical solutions of the present invention. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.

[0044] It should also be understood that, in order to simplify the description of the invention and thus aid in the understanding of at least one embodiment, multiple features may sometimes be grouped into a single embodiment, drawing, or description thereof in the foregoing description of the embodiments of the invention. However, this method of disclosure does not imply that the subject matter of the invention requires more features than those mentioned in the claims. In fact, the embodiments contain fewer features than all the features of the single embodiment disclosed above.

[0045] Example 1

[0046] This invention provides a defect level classification method based on template matching and defect segmentation. Please refer to [link to relevant documentation]. Figure 1 The method includes the following steps:

[0047] (1) Collect the cleaning defect image P0, and obtain defect samples based on the defect image P0. Use the labeling tool LabelImg to label the defect samples according to the defect category to obtain the defect sample set.

[0048] (2) Construct a defect detection model M using the Faster R-CNN object detection algorithm, and train the defect detection model M based on the defect sample set. That is, input the defect samples in the defect sample set into the defect detection model M, extract image features and train the model to obtain the defect detection model M.

[0049] (3) Input the image P1 to be predicted into the defect detection model M. The defect detection model M outputs the target bounding box Bbox containing defect type and location information. Please refer to [link to relevant documentation]. Figure 3 .

[0050] In this embodiment of the invention, the process of outputting a target bounding box (Bbox) containing defect type and location information through the defect detection model M is as follows:

[0051] (3.1) Input the image P1 to be predicted into the defect detection model M, and output the location, type and confidence of all defects through the defect detection model M;

[0052] (3.2) Filter the location of the defect based on the confidence level to obtain the target box Bbox containing the defect type and location information.

[0053] (4) Extract the image near the target box Bbox in the image P1 to be predicted, and first perform Gaussian filtering to remove noise from the image, then perform image binarization and dilation and erosion to filter interference, and finally extract the contour of the image to segment the defect foreground and calculate the size of the defect.

[0054] (5) Extract specific circuit structures containing PS holes, PS pillars, Gate lines, and Common lines from the defect image P0 as standard templates, and use a similarity matching algorithm to segment and extract the corresponding specific circuit structures from the image to be predicted P1. Please refer to [link to relevant documentation]. Figure 4 .

[0055] In this embodiment of the invention, the process of extracting a specific circuit structure containing PS holes, PS pillars, Gate lines, and Common lines from the defect image P0 as a standard template is as follows:

[0056] (5.11) Perform image recognition and image cropping processing on the defect image P0 to obtain initial templates containing specific circuit structures such as PS holes, PS pillars, Gate lines, and Common lines respectively. That is, obtain several initial templates corresponding to PS holes, PS pillars, Gate lines, and Common lines respectively.

[0057] (5.12) Perform binarization and edge contour extraction on the initial template to obtain standard templates containing specific circuit structures such as PS holes, PS pillars, Gate lines, and Common lines. That is, obtain standard template T1 containing PS holes, standard template T2 containing PS pillars, standard template T3 containing Gate lines, and standard template T4 containing Common lines. In addition, if there are other specific circuit structures, set the corresponding standard templates accordingly.

[0058] In this embodiment of the invention, the process of segmenting and extracting the corresponding specific circuit structure in the image P1 to be predicted using a similarity algorithm is as follows:

[0059] (5.21) Perform edge contour extraction processing on the image P1 to be predicted, and obtain the lower left corner pixel of the image P1 to be predicted;

[0060] (5.22) Take the lower left corner pixel of the image P1 to be predicted as the lower left corner coordinate, and use the lower left corner coordinate as the reference point to obtain a candidate box with the same size as the standard template; that is, take the standard template T1, standard template T2, standard template T3, and standard template T4 as examples, and obtain four candidate boxes I1, I2, I3, and I4 with the same size as the standard template T1, standard template T2, standard template T3, and standard template T4 respectively;

[0061] (5.23) Shift the candidate boxes one pixel to the right / up in sequence to obtain several candidate boxes, that is, shift the candidate boxes I1, I2, I3 and I4 respectively to obtain several candidate boxes I1, I2, I3 and I4;

[0062] (5.24) Calculate the similarity between several candidate boxes and the standard template in turn. If the similarity is greater than the matching threshold, the corresponding candidate box matches the standard template. Then, the specific circuit structure corresponding to the candidate box is segmented and extracted. The matching threshold is a preset value. That is, calculate the similarity R1 between several candidate boxes I1 and the standard template T1, the similarity R2 between candidate boxes I2 and the standard template T2, the similarity R3 between candidate boxes I3 and the standard template T3, and the similarity R4 between candidate boxes I4 and the standard template T4 in turn. The corresponding matching thresholds are TH1, TH2, TH3, and TH4, respectively. If the similarity R1 between candidate box I1 and the standard template T1 is greater than the matching threshold TH1, the corresponding candidate box I1 is segmented and extracted. In addition, this method is also used for the extraction of other specific circuit structures.

[0063] (6) Defect severity classification is based on a combination of defect category, defect outline image size, and the positional relationship between the defect and a specific circuit structure. Please refer to [link / reference]. Figure 5 .

[0064] In the embodiments of the present invention, please refer to Figure 2 The process for classifying defects by comprehensive factors such as defect category, defect contour image size, and the positional relationship between the defect and a specific circuit structure is as follows:

[0065] (6.1) Preset the weight values ​​corresponding to the defect category, defect outline image size, and positional relationship between the defect and a specific circuit structure, i.e., the weight value of the defect category is W1, the weight value of the defect outline image size is W2, and the weight value of the intersection of the defect and the specific circuit structure is W3.

[0066] (6.2) Based on the weight values, the relevant parameters of defect category, defect contour image size, and positional relationship between defect and specific circuit structure are weighted and summed, and the defect level is classified based on the weighted summation result.

[0067] In this embodiment of the invention, the process of weighted summation of relevant parameters such as defect category, defect contour image size, and the positional relationship between the defect and a specific circuit structure, and the defect level classification based on the weighted summation result, is as follows:

[0068] (6.21) Preset the reference bases corresponding to different defect categories and specific circuit structures as the reference bases corresponding to PS holes, PS pillars, Gate lines, and Common lines, respectively. That is, set the reference bases for PS holes, PS pillars, Gate lines, and Common lines as BN1, BN2, BN3, and BN4, and preset the reference bases for defect categories as BI1, BI2, ..., BI n Where n is the total number of defect categories;

[0069] (6.22) Determine whether the defect intersects with PS hole, PS post, Gate line, or Common line. If it intersects, obtain the corresponding reference base. At the same time, obtain the corresponding reference base according to the defect category.

[0070] That is, if the defect intersects with the PS hole, the reference base BN1 of the PS hole is obtained. Similarly, if the defect intersects with other specific circuit structures, the corresponding reference base is obtained. If the defect intersects with two or more specific circuit structures, the reference bases of multiple specific circuit structures are obtained simultaneously.

[0071] (6.23) Perform a weighted summation based on the reference base of the defect category, the reference base of the specific circuit structure, and the size of the defect contour image;

[0072] That is, if the reference base corresponding to the defect category is BI1, the reference base of the specific circuit structure is BN1, and the area of ​​the defect contour image is S, then the weighted summation result R = BI1 × W1 + BN1 × W3 + S × W2;

[0073] (6.24) Classify the defect level according to the weighted summation result, that is, preset the parameter range of defect level classification, and then determine the parameter range corresponding to the weighted summation result, and then obtain the corresponding defect level classification.

[0074] In this embodiment of the invention, the process for determining whether a defect intersects with a specific circuit structure is as follows:

[0075] (6.25) Obtain the coordinate set M1 of the defect and the coordinate set M2 of the specific circuit structure;

[0076] (6.26) Determine whether coordinate set M1 and coordinate set M2 have overlapping data. If they do, determine that the defect intersects with the corresponding specific circuit structure.

[0077] Based on the detection results of the deep learning model, this invention uses an image contour extraction algorithm to segment and extract defects and specific circuit structures in the target bounding box and the whole image, respectively, to calculate the defect size and the spatial relationship between the two. Finally, the defect level is determined by comprehensive consideration, which can significantly improve the accuracy of the model's image judgment and provide a basis for subsequent defect impact assessment and repair process selection.

[0078] Example 2

[0079] This invention provides a defect level classification system based on template matching and defect segmentation, the system comprising:

[0080] A defect sample unit, which acquires defect samples based on a defect image P0 and annotates the defect samples to obtain a defect sample set;

[0081] A model training unit is used to construct a defect detection model M and train the defect detection model M based on a defect sample set.

[0082] A defect localization unit is used to input the image P1 to be predicted into the defect detection model M, and output a target box Bbox containing defect type and location information through the defect detection model M.

[0083] A contour extraction unit extracts defect contour images from the image to be predicted based on the target bounding box (Bbox) to obtain defect contour images.

[0084] The circuit structure extraction unit obtains specific circuit structures such as PS holes, PS pillars, Gate lines, and Common lines as standard templates based on the defect image P0, and extracts the specific circuit structures corresponding to the standard templates in the image to be predicted P1.

[0085] The defect level classification unit is used to classify defects based on a combination of defect category, defect contour image size, and the positional relationship between the defect and a specific circuit structure.

[0086] Specifically, the data and image processing flow of each functional unit of the system corresponds one-to-one with the method described in Embodiment 1. To avoid repetition, it will not be described again here.

[0087] Example 3

[0088] The present invention provides a computer device, the computer device including a memory and a processor, the memory storing a computer program, the computer program executing a defect level classification method based on template matching and defect segmentation as described in Embodiment 1 when the processor is running.

[0089] The computer device provided in this embodiment can implement the method described in Embodiment 1. To avoid repetition, it will not be described again here.

[0090] Example 4

[0091] The present invention provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements a defect level classification method based on template matching and defect segmentation as described in Embodiment 1.

[0092] The computer-readable storage medium provided in this embodiment can implement the method described in Embodiment 1. To avoid repetition, it will not be described again here.

[0093] The processor can be a central processing unit (CPU), or other general-purpose processors, digital signal processors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0094] The memory can be used to store the computer program and / or modules. The processor implements various functions of the defect level classification system based on template matching and defect segmentation in the invention by running or executing the data stored in the memory. The memory may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback function, image playback function, etc.). In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, RAM, plug-in hard disk, smart memory card, secure digital card, flash memory card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0095] A defect level classification system based on template matching and defect segmentation, if implemented as a software functional unit and sold or used as an independent product, can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of the present invention can also be implemented by a computer program storable in a computer-readable storage medium. When executed by a processor, this computer program can implement the steps of the various method embodiments described above. The computer program includes computer program code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory, random access memory, dot carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction.

[0096] The basic concepts of this invention have been described. It is obvious to those skilled in the art that the detailed disclosure above is merely illustrative and does not constitute a limitation of this specification. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and corrections to this specification. Such modifications, improvements, and corrections are suggested in this specification and therefore remain within the spirit and scope of the exemplary embodiments described herein.

[0097] Furthermore, this specification uses specific terms to describe embodiments thereof. For example, "an embodiment," "one embodiment," and / or "some embodiments" refer to a particular feature, structure, or characteristic associated with at least one embodiment of this specification. Therefore, it should be emphasized and noted that references to "an embodiment," "one embodiment," or "an alternative embodiment" in different locations throughout this specification do not necessarily refer to the same embodiment. Moreover, certain features, structures, or characteristics in one or more embodiments of this specification can be appropriately combined.

[0098] Furthermore, those skilled in the art will understand that various aspects of this specification can be described and illustrated in several patentable ways or situations, including any new and useful combination of processes, machines, products, or substances, or any new and useful improvements thereof. Accordingly, various aspects of this specification can be implemented entirely by hardware, entirely by software (including firmware, resident software, microcode, etc.), or by a combination of hardware and software. All of the above hardware or software may be referred to as a “data block,” “module,” “engine,” “unit,” “component,” or “system.” Furthermore, various aspects of this specification may be represented as a computer product located on one or more computer-readable media, including computer-readable program code.

[0099] Computer storage media may contain a propagated data signal containing computer program code, for example, on baseband or as part of a carrier wave. This propagated signal may take various forms, including electromagnetic, optical, and suitable combinations thereof. Computer storage media can be any computer-readable medium other than a computer-readable storage medium, which can be connected to an instruction execution system, apparatus, or device to enable communication, propagation, or transmission of a program for use. The program code located on the computer storage medium can be propagated through any suitable medium, including radio, cable, fiber optic cable, RF, or similar media, or any combination of the above media.

Claims

1. A defect level classification method based on template matching and defect segmentation, characterized by, The method comprises the following steps: Obtain a defect sample based on the defect image P0, and perform sample labeling on the defect sample to obtain a defect sample set; Construct a defect detection model M, and perform model training on the defect detection model M based on the defect sample set; Input the to-be-predicted image P1 into the defect detection model M, and output a target box Bbox containing defect type and position information through the defect detection model M; Extract a defect contour image based on the target box Bbox of the to-be-predicted image P1, and obtain the defect contour image; Obtain a specific circuit structure of a PS hole, a PS column, a Gate line, and a Common line as a standard template based on the defect image P0, and extract a specific circuit structure corresponding to the standard template in the to-be-predicted image P1; Classify the defect level by comprehensively considering the defect category, the size of the defect contour image, and the positional relationship between the defect and the specific circuit structure; The method classifies the defect level by comprehensively considering the defect category, the size of the defect contour image, and the positional relationship between the defect and the specific circuit structure, and the process is as follows: Predefine weight values corresponding to the defect category, the size of the defect contour image, and the positional relationship between the defect and the specific circuit structure; Weighted sum the related parameters of the defect category, the size of the defect contour image, and the positional relationship between the defect and the specific circuit structure based on the weight values, and classify the defect level based on the weighted sum result; The method classifies the defect level by comprehensively considering the defect category, the size of the defect contour image, and the positional relationship between the defect and the specific circuit structure, and the process is as follows: Predefine reference bases corresponding to different defect categories and reference bases corresponding to specific circuit structures, respectively PS holes, PS columns, Gate lines, and Common lines; Determine whether the defect intersects with the PS hole, the PS column, the Gate line, or the Common line, and if so, obtain the corresponding reference base; Weighted sum the reference base of the defect category, the reference base of the specific circuit structure, and the size of the defect contour image.

2. The method of claim 1, wherein the method is characterized by: The method performs sample labeling according to the defect category through a labeling tool LabelImg.

3. The method of claim 1, wherein the method further comprises: The method constructs the defect detection model M through a Faster R-CNN target detection algorithm.

4. The method of claim 1, wherein the method further comprises: The method performs similarity matching on the standard template based on the to-be-predicted image P1, and extracts the specific circuit structure corresponding to the standard template.

5. The method of claim 1, wherein the method is characterized by: The method outputs the target box Bbox containing the defect type and the positioning information through the defect detection model M, and the process is as follows: Input the to-be-predicted image P1 into the defect detection model M, and output the position, type, and confidence of all defects through the defect detection model M; Screen the position of the defect according to the confidence, and obtain the target box Bbox containing the defect type and the positioning information.

6. A defect level classification system based on template matching and defect segmentation, characterized by, The system comprises: A defect sample unit that obtains a defect sample based on a defect image P0, and performs sample labeling on the defect sample to obtain a defect sample set; A model training unit that constructs a defect detection model M, and performs model training on the defect detection model M based on the defect sample set; A defect positioning unit is configured to input a to-be-predicted image P1 into a defect detection model M, and output a target box Bbox containing defect type and location information through the defect detection model M; A contour extraction unit is configured to perform defect contour image extraction on the to-be-predicted image P1 based on the target box Bbox, and obtain a defect contour image; A circuit structure extraction unit is configured to obtain specific circuit structures of PS holes, PS columns, Gate lines and Common lines as standard templates based on the defect image P0, and extract specific circuit structures corresponding to the standard templates in the to-be-predicted image P1; A defect grade classification unit is configured to comprehensively classify defect grades based on defect categories, defect contour image sizes and location relationships between defects and specific circuit structures; The method comprehensively classifies defect grades based on defect categories, defect contour image sizes and location relationships between defects and specific circuit structures, and the process is as follows: preset weight values corresponding to defect categories, defect contour image sizes and location relationships between defects and specific circuit structures; weighting and summing related parameters of defect categories, defect contour image sizes and location relationships between defects and specific circuit structures based on the weight values, and classifying defect grades based on the weighted sum result; The method weights and sums related parameters of defect categories, defect contour image sizes and location relationships between defects and specific circuit structures based on the weight values, and classifies defect grades based on the weighted sum result, and the process is as follows: preset reference bases corresponding to different defect categories and reference bases corresponding to specific circuit structures, i.e., PS holes, PS columns, Gate lines and Common lines; determining whether the defect intersects with the PS holes, PS columns, Gate lines and Common lines, and if so, obtaining the corresponding reference base; weighting and summing the reference base of the defect category, the reference base of the specific circuit structure and the defect contour image size.

7. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: The processor executes the computer program to implement the defect grade classification method based on template matching and defect segmentation according to any one of claims 1-5.

8. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, and the computer program is executed by the processor to implement the defect grade classification method based on template matching and defect segmentation according to any one of claims 1-5.

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