A multi-stage automatic wafer alignment method for semiconductor equipment and semiconductor equipment

Abstract

The application discloses a kind of semiconductor equipment multistage automatic wafer alignment method and semiconductor equipment, and the method comprises: when equipment performs work menu for the first time, after wafer is placed, the template image and template required by primary wafer alignment are automatically acquired in wafer center area, at least one target image acquisition position on wafer is determined according to grain periodicity, target image is collected and is matched with template, and primary wafer alignment is completed;Then from the wafer alignment template image of current level or successfully matched target image, the template image acquisition position of higher level wafer alignment is automatically acquired, higher level template image and target image are collected, then higher level wafer alignment is completed, and the remaining wafer alignment of each level is completed in the same way, and wafer alignment work menu is generated according to the obtained results, for subsequent wafer alignment used.The application avoids the risk of selecting template error when manually creating wafer alignment work menu, without occupying equipment machine time on production line.

Description

Technical Field

[0001] This invention relates to semiconductor equipment, and more particularly to a multi-level automated wafer alignment method and semiconductor equipment. Background Technology

[0002] Large-scale integrated circuit (IC) manufacturing and testing processes require the use of semiconductor equipment. After wafer fabrication, most equipment requires wafer alignment (WA). In existing technologies, such as... Figure 1 As shown, the aforementioned semiconductor device 100 typically includes a basic Equipment Front End Module (EFEM) 110 for wafer loading and unloading, housing a wafer cassette 112 containing a wafer pre-aligner 113 and a robotic arm 114 for loading and unloading wafers. The device also includes a mechanical motion platform 115, typically capable of movement and rotation in the X, Y, and Z directions, on which wafers 120 can be placed. Furthermore, the semiconductor device includes an Optical Microscope (OM) 130, which has lower resolution but a larger field of view (FOV), typically used for primary wafer alignment. Subsequent advanced wafer alignment can switch to high-magnification OM objectives, or more commonly, use the core task / core function component 131 of the higher-resolution inspection and measurement equipment itself, such as the Time Delayed Integration (TDI) system in optical defect inspection equipment, with pixel sizes reaching the 100nm level, or electron beam inspection (EBI) or re-inspection (EBR) equipment. In EBR equipment, the electron optical imaging / scanning electron microscopy (SEM) system can have pixel sizes in the 10nm–1nm range. These devices typically require three stages of wafer alignment, but usually no more than that, otherwise it would significantly reduce the equipment throughput. Additionally, the semiconductor device 100 also includes a computer 140 and software 141 running thereon, including user interface (GUI), system software and algorithm software, hardware control and communication modules.

[0003] The wafer pre-alignment of the above-mentioned wafer loading systems is not particularly accurate, for example, the uncertainty of the wafer center position is about 200 pm, and the uncertainty of the wafer orientation is about ±1°, so the wafer alignment needs to be performed on this basis, and after completion, the device can perform subsequent work including its own work / core tasks (including defect detection, review, critical dimension measurement, etc.). Since the image acquisition system needs to consider the field of view (FOV) and the accuracy required by the final core task, the above-mentioned devices usually need multiple levels of wafer alignment to gradually achieve the accuracy required by the core task from the pre-alignment accuracy of the wafer center position and orientation. Generally, the primary wafer alignment starts from an optical microscope (OM), and the secondary alignment can still use an OM with multiple high-magnification objectives, or can use the core task components of the device itself, such as the time delayed integration (TDI) system in many optical defect detection devices, or the scanning electron microscopy (SEM) based system.

[0004] The work of the semiconductor device includes two parts of creating a work menu (Recipe) and executing the Recipe. The Recipe includes the Recipe of the core task of the device and the Recipe required for the preparation work before carrying out the core task, which includes the WA Recipe (Wafer Alignment Recipe).

[0005] In addition, most of the applications of most semiconductor devices involve patterned wafers.

[0006] Reference Figure 2 When creating the WA Recipe, a template image 201 is usually collected near the center of the wafer / region, from which a template 202 is selected, which is a sub-image / region that has uniqueness in the figure and the brightness and contrast must meet the established requirements, then the wafer / mechanical motion platform 115 is moved by the distance of a die, a target image 211 is collected, and template matching is performed using the template 202 to search for the best matching position 212. There are many commonly used algorithms for template matching, such as image similarity algorithms, including normalized cross correlation (NCC) algorithms or feature-based template matching methods, which can achieve sub-pixel accuracy. In addition, the dies on the wafer are arranged periodically in the X and Y directions, and there are standard sizes between the dies, which are streets. Reference Figure 3A, 312, 313, 314, 315, 316, in the same row (column), and gradually get more template matching positions away from the wafer center, and then fit a straight line through the matching points to get the wafer orientation angle θ, and correct it by rotating the wafer / mechanical motion platform in the opposite direction. There are many ways to select the target image acquisition positions on the wafer during wafer alignment, not limited to Figure 3A all in the horizontal direction, but are all selected based on the periodicity of the dies. For example, refer to Figure 3B , 322, 323, 324, 325, some in the horizontal direction and some in the vertical direction, all or part of which can also be used as target image acquisition positions to acquire target images, get each matching position through template matching, and finally achieve wafer alignment (theoretically, two matching positions can determine a straight line, but in practical applications, more matching positions and greater distance can reduce measurement error). The principle is similar, and only examples in Figure 3A will be used to illustrate. It should be noted that there is no automatic wafer alignment in the prior art, so the template image and at least the first / initial matching position, such as Figure 3A matching position 311 or 312, need to be determined manually, which is usually done when creating a recipe, and the remaining matching positions can be automatically obtained based on the known die periodicity. After completing the current level of WA, transition to the next level of WA with higher magnification, and then use the same method to perform the next level of WA with higher resolution images, such as OM images or TDI / SEM images with high magnification, until the final level of wafer alignment is completed. The method of transitioning from one level of wafer alignment to the next level in the prior art is to manually select the matching templates at each level. Usually, depending on different applications, WA often has 2-4 levels, and the most common is 3 levels. Then save the templates at each level and the successful matching positions (after correction).

[0007] In addition, a wafer coordinate reference point, simply referred to as a reference point, is usually selected after the wafer has completed WA, although it is not theoretically part of WA itself. In practice, it is usually necessary to establish a wafer X, Y coordinate system with the reference point as the center, and after WA is completed, it has only a translation relationship with the X, Y coordinate system of the mechanical motion platform within a certain accuracy range. For example, the reference point is selected at the corner of a die closest to the center of the wafer. Strictly speaking, the reference point position is determined by the image at that location (e.g., the center position of the image). Usually, a specially designed alignment mark (AM) on the wafer can be used, for example, refer to Figure 4A, images 401 collected at the center of the wafer, where there are AMs 402, 403 and 404 of different sizes (shapes are not limited, and are all placed in the same figure for convenience of illustration). For the initial inspection equipment, the wafer reference point is usually determined in its work, and there is no pre-determined reference point, and sometimes there is no such AM on the wafer, but a feature position near the center of the wafer can be used, for example, the reference Figure 4B The center 412 of the image 411 at the required magnification, or a position 413 near a corner of a die contained therein can be used. In this way, the image center has a feature (for example, a corner point) that can be more advantageous for subsequent template matching that can be required, because the image at the reference point is usually saved to the Recipe for subsequent determination of the wafer coordinate system. This reference point selection method is suitable for many applications of most of the aforementioned initial inspection equipment, including detection-type Bright Field (BF) wafer defect detection equipment, Dark Field (DF) wafer defect detection equipment, Macro Defect Inspection equipment, e-beam inspection (EBI) equipment, and also Metrology-type CD-SEM equipment. Of course, it is more convenient to use a uniform AM as the reference point in actual applications.

[0008] In addition, the semiconductor equipment referred to herein also includes many IC post-manufacturing packaging and testing equipment such as Prober equipment and Dicing equipment, and the wafer alignment of such equipment usually uses an OM system with low and high 2 levels of magnification, which is simpler.

[0009] When the semiconductor equipment is working, the wafer is first subjected to wafer alignment Recipe, and the process is the same as when the Recipe is created, and the template saved in the Recipe is used to reach the matching position saved in the Recipe, for example, the positions near 311 to 316 in Figure 3A The image is collected to perform wafer alignment, the matching position that meets the threshold condition is obtained, the current wafer orientation is determined together, then angle correction is performed, and the next level of WA is entered, and the same way is performed until the last level is completed. Then, according to the reference point template image, template matching is performed to search for the reference point, and the steps are the same as when the Recipe is created, but all are performed automatically by the equipment according to the Recipe.

[0010] The problems in the prior art described above are:

[0011] 1. WA Recipe's creation relies on manual selection of templates for template matching (strict requirements on brightness, contrast, feature content, uniqueness, etc.), and the probability of error is high when operated by inexperienced personnel. If the device performs wafer alignment work menu on the production line, and the device actually works on some wafers with image quality drift, including noise and local changes, such as optical image contrast / pattern changes caused by multi-layer film interference on the wafer surface, SEM image charging effect due to local material polarization, etc., it is more likely to cause wafer alignment failure / error, resulting in serious consequences;

[0012] 2. After wafer alignment is completed, only the wafer reference point / reference point template image at the highest magnification in the last stage of wafer alignment is provided, which is not convenient to use, whether it is an existing alignment mark on the wafer or a pattern on the wafer. Because the imaging mechanism used in subsequent applications such as wafer defect review may have different magnifications, more reference point / reference point template image selection at different magnifications will bring convenience and save time;

[0013] 3. More importantly, the current industry trend is to generate device work Recipe offline as much as possible, that is, to develop work Recipe without occupying valuable machine time on the production line. The biggest and even the only obstacle to generating Recipe offline is the generation of wafer alignment work menu, which requires collecting template images on the device, at which time the device cannot perform other work and needs to stop its core task, which has a great impact on the operation and economic levels of the production line. And the current semiconductor devices in the industry still lack a multi-level automatic wafer alignment (AWA) method.

[0014] Therefore, in view of the above problems, the present application provides a semiconductor device multi-level automatic wafer alignment method and a semiconductor device through embodiments and drawings, which aims to solve the above problems. SUMMARY

[0015] The present application aims to provide a semiconductor device multi-level automatic wafer alignment method and a semiconductor device to solve the problem of high error risk caused by the method of completely relying on manual selection of templates for template matching in wafer alignment, and the problem of no multi-level automatic wafer alignment method and inability to generate device work menu offline.

[0016] To achieve this purpose, the embodiments of the present application provide a semiconductor device multi-level automatic wafer alignment method, comprising:

[0017] When the device performs the work defined in its menu for the first time, after wafer loading, the template image and template required for primary wafer alignment are automatically acquired in the center area of the wafer, at least one target image acquisition position on the wafer is determined according to the grain periodicity, the wafer is moved to the target image acquisition position to acquire a target image and perform template matching with the template, and primary wafer alignment is completed.

[0018] From the template image or the successfully matched target image of the current level wafer alignment, the template image acquisition position for higher level wafer alignment is automatically acquired, and a higher level template image is acquired, from which the required template is determined, the target image acquisition position of the higher level is determined according to the grain periodicity and the target image is acquired, and then the higher level wafer alignment is completed, and the remaining wafer alignment levels are completed in the same way, and the wafer alignment work menu is generated according to the results for subsequent wafer alignment.

[0019] The embodiment of the present application also provides a semiconductor device, which performs the following steps after wafer loading: determining whether the device has a work menu for wafer alignment, if not, using the method to automatically align the wafer, saving the wafer alignment work menu, and then performing the primary work of the device; if yes, acquiring and executing the work menu, and then performing the primary work of the device.

[0020] The semiconductor device multi-level automatic wafer alignment method and semiconductor device provided by the above embodiment of the present application first simplify the creation process of the work menu of the semiconductor device, avoiding the risk of errors in selecting templates when manually creating the wafer alignment work menu. More importantly, it does not need to occupy the valuable machine time of the semiconductor device, especially the online semiconductor device, making it possible to produce the wafer alignment work menu and even the entire work menu of the semiconductor device offline.

[0021] Further, since the method of multi-level automatic wafer alignment is only needed for the first / first few times of using the device for the same type of wafer and the same type of work, the additional time consumption it brings in actual application is actually negligible, that is, there is no additional time cost. Therefore, its significance is extraordinary. Because the creation of the work menu on the current semiconductor device most depends on the device, and often is the only part that depends on the device, that is, the creation of the wafer alignment work menu. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 A schematic diagram of a semiconductor device related to the embodiment of the present application;

[0023] Figure 2 A schematic diagram of a template matching for wafer alignment in the prior art;

[0024] Figure 3AA schematic diagram of matching positions in a certain stage of wafer alignment in the prior art;

[0025] Figure 3B A schematic diagram of matching positions in a certain stage of wafer alignment in another prior art;

[0026] Figure 4A A schematic diagram of a method of using an alignment mark on a wafer as a reference point of a wafer coordinate system in the prior art;

[0027] Figure 4B A schematic diagram of another method of selecting a reference point of a wafer coordinate system in the prior art;

[0028] Figure 5A A schematic diagram of a method of determining a matching template from an OM image of a primary wafer in an embodiment of the present application;

[0029] Figure 5B A schematic diagram of another method of determining a matching template from an OM image of a primary wafer in an embodiment of the present application;

[0030] Figure 5C A schematic diagram of a method of constructing a peak region from a single main maximum in projection data in an embodiment of the present application;

[0031] Figure 5D A schematic diagram of a method of constructing a plurality of peak regions from a plurality of different combinations of peaks in projection data in an embodiment of the present application;

[0032] Figure 5E A schematic diagram of a method of constructing a peak region from a single main maximum peak close to an edge in projection data in an embodiment of the present application;

[0033] Figure 5F A schematic diagram of a method of obtaining a plurality of initial template regions from projections in the X and Y directions in an embodiment of the present application;

[0034] Figure 5G A schematic diagram of a method of optimizing an initial template region in an embodiment of the present application;

[0035] Figure 6 A schematic diagram of a method of splicing OM images of a wafer for determining a matching template in an embodiment of the present application;

[0036] Figure 7 A schematic diagram of a method of determining a higher-stage wafer template image acquisition position in an image of a wafer in an embodiment of the present application;

[0037] Figure 8 A schematic diagram of a multi-stage wafer automatic alignment process in a semiconductor device in an embodiment of the present application. DETAILED DESCRIPTION

[0038] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings.

[0039] The embodiment of the present application provides a multi-stage automatic wafer alignment method for semiconductor equipment, which comprises the following steps:

[0040] When the equipment performs the work defined in the menu for the first time, the template image and the template required for the primary wafer alignment are automatically obtained in the center area of the wafer after the wafer is placed, at least one target image acquisition position on the wafer is determined according to the grain periodicity, the wafer is moved to the target image acquisition position to acquire the target image and perform template matching with the template, and the primary wafer alignment is completed.

[0041] From the template image or the successfully matched target image of the current stage wafer alignment, the template image acquisition position for the wafer alignment of the next stage is automatically obtained, and the template image of the next stage is acquired to determine the required template, the target image acquisition position of the next stage is determined according to the grain periodicity and the target image is acquired, then the wafer alignment of the next stage is completed, and the wafer alignment of the remaining stages is completed in the same way, and the wafer alignment work menu is generated according to the obtained results for subsequent wafer alignment.

[0042] In the embodiment of the present application, the multi-stage refers to at least two stages, that is, it can be set to two stages or at least three stages, and generally three stages of automatic wafer alignment can be set.

[0043] In the embodiment of the present application, the template image and the template required for the primary wafer alignment are automatically obtained in the center area of the wafer after the wafer is placed, which comprises the following steps:

[0044] In the center area of the wafer, a frame of template image is obtained and preprocessed, the preprocessing comprises edge extraction and noise filtering; two projections of the edge image along X and Y directions are obtained, and the peak value information satisfying the predetermined threshold condition is detected from the projections, including the primary maximum and the secondary primary maximum peak values arranged by size, the peak value region in the projection is determined according to the primary maximum and / or the secondary primary maximum peak value according to the predetermined rule, and the peak value region is back projected to the template image along the X and Y directions respectively, the intersection of the back projections is taken as the initial template region, and the template for the primary wafer alignment is obtained based on the initial template region. It should be noted that the X / Y direction in the present application refers to the horizontal / vertical direction of the image or the row / column direction of the image.

[0045] In one AWA embodiment of the present invention, no WA Recipe is needed for the semiconductor equipment to work on a Patterned Wafer. Most applications of most semiconductor equipment involve Patterned Wafers. When a Recipe is executed, the equipment is in normal state at this time, including the OM system (one or more magnifications) is focused, and the subsequent image acquisition system such as Time Delay Integration (TDI) camera or Scanning Electron Microscope (SEM) system is also focused, which are part of the normal operation of the equipment. After the wafer is loaded, the primary OM camera of the AWA is moved to the center of the wafer, which is the “ideal wafer center” because there is always an error in the center of the wafer each time it is loaded, for example, the pre-alignment step when the wafer is loaded ensures that the center of the wafer is offset by less than 200 µm. The possible errors are considered in the embodiments of the present invention. In addition, the embodiments of the present invention only take the current 300 mm wafer as an example, which is also applicable to the previous 200 mm and 150 mm wafers, the principle is the same, and it is only relatively easier to implement. Generally, the field of view (FOV) of the primary OM image of the semiconductor equipment is not too small due to the pre-alignment accuracy within a certain range, and the FOV is also not too large due to the limitations of camera CCD size, signal-to-noise ratio, processing speed, etc. For example, it is usually in the range of 2–8 mm. In this way, the actual wafer center offset does not exceed 1 / 10 of the FOV. Considering that the current 300 mm wafer has a grain period of 2 mm - 4 mm, the grain period includes a street size of 70 um. Therefore, even when the FOV is as small as 4 mm, a single primary OM image can always contain at least one 4-grain intersection, the center of which will not deviate too much from the image center / field of view center, and this area is usually a good template selection (its contrast, feature content, uniqueness, etc. are all good), as shown in the case of Figure 2 It is additionally explained that if the 4-grain intersection closest to the center of the wafer on the wafer is not located near the center of the wafer due to different grain layouts, but due to the large field of view (FOV) of the current primary OM system, it is usually included. If not, there are sufficient countermeasures in the following. In addition, the size and layout of the grains on the given wafer are known information. In addition, the pixel size under each magnification is calibrated and known. Referring to Figure 2 , the 202 area in the OM image 201 contains a 4-grain intersection, which is also a good template area. As shown in Figure 5A , the OM image 511 (for convenience, the edge image of the original OM grayscale image is shown in the figure) also contains a 4-grain intersection. Generally, the FOV of the primary OM system is larger than Figure 2 A larger FOV in the image ensures that it includes 4-grid intersections. If the image FOV corresponds to a larger grain size, the primary OM (Optical Object Model) may even contain nearly two 4-grid intersections, but this is acceptable as long as one of these methods is used. There are many ways to find the location of 4-grid intersections; one method is given below, and others can be obtained using the same approach.

[0046] In this embodiment of the invention, the OM image is first preprocessed, including edge extraction, for example, by using the first-order partial derivative / gradient of the Gaussian function / kernel G to obtain the edge image (intensity part).

[0047] Ei=▽G⦻I,i=X,Y

[0048] Where ▽ represents the first-order partial derivative / gradient, I represents the image, ⦻ represents the convolution operation, and Ei is the edge image in a single direction (X / Y). The second-order partial derivative / Laplace operation ∆ can also be used instead of the first-order partial derivative / gradient operation ∆. The above operation is often decomposed into independent operations in two directions: X (horizontal, i.e., the direction of rows in the image) and Y (vertical, i.e., the direction of columns in the image), obtaining the edge image Ex in the X direction and the edge image Ey in the Y direction, ultimately yielding the intensity component E of the edge image (referred to as the edge image itself).

[0049]

[0050] Additionally, the portions of the edge image with smaller E values ​​can be filtered out, i.e., noise reduction. Many other image edge extraction algorithms exist, such as Sobel and wavelet transform, but the advantage of using a Gaussian function is that it allows for better control over its shape (σ), especially in frequency domain operations. It is certain that for a primary wafer alignment OM image, the vast majority of edges in the aforementioned edge image E are horizontal and vertical, including the strongest edge portions, even if the image includes grain boundaries.

[0051] Then, the edge image E is projected along the X and Y directions to obtain 1D projection data. Projection refers to simply summing the pixel values ​​in the edge image E along the X / Y directions, i.e., along the row / column directions of the image. (Reference) Figure 5A, the image 511 is the edge image E of the original OM image (i.e. I in the above formula), then projection along X, Y direction is performed, and the projection along X direction 512 and the projection along Y direction 513 are obtained, then the position of the primary maximum peak and the secondary primary maximum peak respectively satisfying the predetermined threshold condition are found in the projection along X, Y direction, preferably the distance between the secondary primary maximum peak and the primary maximum peak satisfies the distance threshold requirement, wherein the primary maximum peak 5121 and the secondary primary maximum peak 5122 are in the projection along X direction 512, and the primary maximum peak 5131 and the secondary primary maximum peak 5132 are in the projection along Y direction 513. Wherein the primary maximum peak and the secondary primary maximum peak are the maximum value and the second maximum value in the projection data respectively, and both need to satisfy the predetermined threshold condition, and preferably the distance between the two also satisfies the distance threshold requirement. Then the position of the primary maximum peak and the secondary primary maximum peak of the above projection along X, Y direction is expanded and widened by a distance r respectively to the two sides, and the peak value region is determined, such as Figure 5A The peak value region boundary projected along the horizontal direction has 5123, 5124, and the peak value region boundary projected along the vertical direction has 5133, 5134, then back projection is performed to the template image, and thus the intersection region 516 of the region boundary along X, Y direction back projection gives the position of the 4-grain intersection position region 530, which can be called the initial template region, and the preliminary wafer alignment template is obtained based on the initial template region, and in the embodiment of the present application, the initial template region is further optimized to obtain the template.

[0052] In the embodiment of the present application, the distance r can be set by any of the following methods: the r can be a preset fixed value, for example 64 pixels; or a relatively fixed value, for example a fraction of the smaller one of the width and height of the image, for example r = min(W, H) × c%, wherein W and H are the width and height of the template image, and c is a preset constant, for example 5; or a preset multiple of the full-width-half-maximum (FWHM) of the primary maximum peak, for example r = d × FWHM, wherein d is a constant, for example 3.5. When the above widening is performed, if the image edge is encountered, the widening is stopped, and optionally, compensation is performed in the opposite direction.

[0053] In the embodiment of the present application, the shape of the above single primary maximum / secondary primary maximum peak, for example the FWHM, also has a requirement, and must be within a certain range, that is, not too wide or too narrow, which can generally be determined according to experience and the width and height (W, H, unit: pixel) of the image used for the wafer alignment.

[0054] In the embodiments of the present application, no matter what r is in the above various cases, the finally generated peak region (both along the X direction and along the Y direction) must be within [MinS, MaxS], and before the peak region is back-projected to the template image, it is limited, which includes judging whether the size of the peak region is within the set [MinS, MaxS] range, if not, the size of the peak region is reduced or expanded to make it within the range, wherein MinS and MaxS are respectively the preset minimum template size and maximum template size. For example, the peak region can be enlarged / reduced symmetrically to meet the range requirement of [MinS, MaxS].

[0055] In the embodiments of the present application, in the optimization, although the uniqueness of the template in the image is checked, the main maximum peak refers to the maximum value in the projection data and its FMWM satisfies certain conditions, cannot be too wide, that is, within a certain threshold range, the secondary maximum peak also has similar requirements, that is, the maximum value in the region outside a certain distance from the main maximum peak, that is, f x FWHM (f is an empirical parameter, for example, f = 1.5) and the FMWM also satisfies certain conditions (the same as the condition of the main maximum peak). In addition, in the embodiments of the present application, it is also stipulated that the two cannot be too far apart, and the distance between the two peak positions is ≤ g x MinS (where g is an empirical parameter, for example, g = 0.75). In addition, both of them need to satisfy certain threshold conditions (which will be described below).

[0056] The template thus constituted for the template matching of the WA template is very reliable in a statistical sense, because it is supported by two most important elements of the template, that is, sufficient features and uniqueness. Actually, the position region 530 also does not need to be very accurate, and generally moving a few or even tens of pixels (not more than 1 / 10 of the template size) is also acceptable.

[0057] It is additionally explained that the above certain threshold conditions for the main maximum peak and the secondary maximum peak of the projection data include that both the main maximum peak and the secondary maximum peak need to reach a certain threshold, and the threshold condition includes an absolute threshold Ta and / or a relative threshold Tr condition, for example, an absolute threshold Ta must be reached (see Figure 5A ), and the absolute threshold condition includes:

[0058] Pi≥ Ta, i = X, Y

[0059] Wherein Pi is the main maximum peak and the secondary maximum peak to be investigated along the X, Y projection. The absolute threshold Ta is a preset constant, which is usually determined by experience combined with the size of the image, the depth of the image pixel gray value and the data type (for example, 8-bit, 10-bit, 16-bit, etc.).

[0060] At the same time, in the embodiments of the present application, a relative threshold Tr ( Figure 5A For example, one of them can be:

[0061] Tr= (Pmax- Pm) x C1

[0062] Wherein C1 is between 0-100%, i.e. (0,1), for example 50%. Pmax is the maximum value of the projection data, i.e. the main maximum peak value, and Pm is the minimum value or the average of n minimum values in a certain interval, for example in the range of b pixels on both sides of the peak Pi to be investigated (not shown in the figure, and not limited to be symmetrical on both sides with b / 2 pixels each), the pixel range b is a preset constant, for example b = min(W, H) x 10%, n ≤ 5. For example, the second one can be:

[0063] Tr= Pavg x C2

[0064] Wherein Pavg is the average value in the range of b pixels on both sides of the peak to be investigated (also not limited to be symmetrical on both sides with b / 2 pixels each), b is a preset constant, and C2 is a preset constant, for example, it can be 3.0. Then the main maximum peak value and the secondary maximum peak value are investigated according to the following relative threshold condition:

[0065] Pi ≥ Tr, i = X, Y

[0066] The peak values meeting this condition can also guarantee the most basic conditions such as uniqueness and contrast ratio of the qualified template. It is also noted that in actual application, the maximum value of the above-mentioned b value can not be limited, and bmax can be the length of the entire projection data.

[0067] The use method of the two threshold values is not limited in the embodiment of the application, and the absolute threshold value Ta can be used alone, or the absolute threshold value Ta (used relatively independently, lowered) can be combined with one of the above-mentioned relative threshold values. It is noted that the peak meeting the above-mentioned condition, on the one hand, the main maximum peak value and the secondary maximum peak value are global requirements, and on the other hand, the relative threshold value requirement about the local b pixel range and the requirement about the peak width FWHM are combined, which will effectively guarantee that the template generated by the above-mentioned method has more uniqueness.

[0068] It is also noted that even if the peak value in the above-mentioned projection corresponds to an area deviating from or not being a wafer 4 grain intersection, because it can meet the conditions of the matching template such as X (horizontal) and Y (vertical) direction feature content, contrast ratio, and uniqueness, it can also become the template required by the WA without any doubt, such as Figure 5BSimilar to the single principal maximum peak 523, its left and right sides together form at least a MinS range and a maximum MaxS range. After backprojection, this can also constitute the initial template region. Then, it is further optimized using the same method as above (when there are principal and secondary principal maximum peaks) to finally obtain a matching template. Here, a single principal maximum peak that meets the conditions can usually guarantee the contrast and uniqueness requirements most needed by the template. Even if its position is not necessarily at the intersection of 4 dies on the wafer, due to the periodic arrangement of dies on the wafer and the pre-alignment in the wafer ensuring that the wafer orientation angle is within ±1º, such a template can be used for applications like... Figure 3A The wafer alignment shown in the prior art is as follows (in this case, template matching positions 312-316 are not near the die intersection). This is more suitable for situations where templates are automatically acquired in more advanced WA (Width Assumption) scenarios, because as the field of view decreases, the image may not include all die intersections. (Additional note:) Figure 3A The matching positions 311-316 are only for illustrating the embodiments of the present invention. Matching position 311 is the template image acquisition position, and the subsequent matching positions 312-316 are the matching positions obtained through template matching. In actual applications, there are at least two matching positions, such as matching positions 311 and 312, and at most more than six, and there can be more matching positions.

[0069] In extremely rare or unusual situations, such as when the FOV of the device's OM system is relatively small compared to the die size, the wafer position deviation after mounting is relatively large, or the die distribution on the wafer (equivalent to the wafer center) is asymmetrical, it is difficult to include a complete 4-die intersection in a single frame of the OM image. The countermeasure in this embodiment of the invention is as follows: when a primary maximum peak satisfying a predetermined threshold condition is detected from the projection, but a secondary primary maximum peak satisfying the same threshold condition is not detected, if the distance between the primary maximum peak and the image boundary on either side satisfies a distance threshold condition, then the peak region is formed by extending outwards from the position of the primary maximum peak to a range up to a preset maximum template size MaxS; otherwise, based on the position of the primary maximum peak on the wafer, the wafer is moved to that position to re-acquire a template image, and then the positions of the primary and secondary primary maximum peaks satisfying the predetermined threshold condition are re-detected to determine the peak region.

[0070] For example, first, the projection along the X and Y directions is obtained using the method described above. When the principal maximum peak P1 in a certain projection along X / Y far exceeds the secondary principal maximum peak P2 (e.g., P2 < P1 × 70%), only the position of the principal maximum peak P1 is used, i.e., the peak region is constructed using the single principal maximum peak described above, and used for backprojection to determine the initial template region. However, if the single principal maximum peak is too close to the image edge (e.g., distance from the image edge < 3 × FWHM or a preset constant h multiplied by the image size in that direction, e.g., h = 15%), and if there is also a secondary principal peak in the space away from the image edge (e.g., its peak value exceeds C% of the principal maximum peak, e.g., C = 10), even though it does not satisfy the above absolute or relative threshold conditions, it can still expand in that direction to form a peak region. A peak region with only one peak satisfying the above threshold conditions is acceptable. Figure 5E As shown, there are dominant maxima near the image edge, where G is the distance from the peak region to the edge of the projected data. If it is within a predetermined threshold range, a peak region of 552 can be obtained using the method described above. Alternatively, when G is less than the predetermined threshold, a template image centered on the region corresponding to the dominant maxima can be re-acquired in one go, and the appropriate template position can be determined using the method described above. This additional acquisition of the template image, including a close-range movement of the wafer / mechanical motion platform, constitutes the maximum additional time consumption, but it is very limited. The time consumption of image acquisition and all the above image processing is even more limited and negligible. Furthermore, as will be discussed later, this actually has little or no impact on the wafer alignment of the equipment on the production line, because it is only necessary in the initial wafer alignment. Once the AWA is completed and a Recipe is generated, it is no longer needed. The benefit of doing so is that it can further guarantee the AWA, ensuring that a usable template can always be obtained to complete this stage of wafer alignment, thus increasing the insurance. In addition, when the single dominant peak is too close to the image edge, and the secondary dominant peak meets the predetermined threshold requirement that it is not too close to the image edge, the peak region can also be formed by using only the secondary dominant peak (the same as the case of forming the peak region by using a single dominant peak, which will not be repeated here), thereby avoiding moving the wafer to acquire the image.

[0071] Optionally, the embodiments of the present application are not limited to using a single peak region, that is, not limited to using a single template. The method further comprises: when at least three peak values meeting the predetermined threshold condition are detected (i.e., including a main maximum peak value and at least two secondary main maximum peak values, the secondary main maximum peak values at least including a first secondary main maximum peak value and a second secondary main maximum peak value, the peak values of the first secondary main maximum peak value and the second secondary main maximum peak value are often different, but it is not excluded that they can be the same, at this time, the embodiments of the present application will be referred to as secondary main maximum peak values for peak values meeting the predetermined threshold condition and non-main maximum peak values, and in addition, each of the above maximums meets the requirements of the peak width FWHM and the distance between the peaks), according to the peak values and the preset rules, a maximum of three different peak regions (satisfying a maximum of three different peak regions in the X direction and the Y direction, respectively) are formed, and then are back-projected to the template image to determine a maximum of six initial template regions, and the initial template regions are screened according to the preset conditions, and at least one and a maximum of four templates are obtained for wafer alignment (in practice, multiple templates are usually supported, although only one template is usually used). For example, referring to Figure 5C , the projection data 513 can be used to form a peak region 5130 with the aforementioned main maximum peak value 5131 and secondary main maximum peak value 5132, a peak region 51310 and 51320 can be formed with a single main maximum peak value 5131 or a single secondary main maximum peak value 5132 as the center and in the periphery thereof, or a peak region can be formed with a single main maximum / secondary maximum peak value and a main maximum / secondary maximum peak value reaching a predetermined threshold T (such as Ta or Ta combined with Tr), in summary, in the embodiments of the present application, a plurality of peak regions (a maximum of 3 in the embodiments of the present application, the region width / region meeting predetermined requirements such as a minimum and maximum size between [MinS, MaxS], and the center distance between regions also meeting predetermined requirements such as not less than MinS / 3 in the X and Y directions, respectively, and two regions can partially overlap) are formed with a peak value combination reaching a predetermined threshold condition, and then are back-projected to the image to form a plurality of initial template regions (such as Figure 5DThe initial template regions 541, 542, 543, and possibly more, for example 6, in the middle template image 511 are optimized in the same way as the single initial template region described above (each requires uniqueness in the image), and further screened, including excluding those that are too close to each other and those that have relatively low feature content, and those that are too far from the center of the image / close to the edge of the image, and finally form a minimum of 1 and a maximum of M templates, where M is the upper limit of the number of templates, for example 4. The features described here are nothing more than edges, corner points, etc. in the image, which can be extracted using edge / gradient extraction, corner point extraction such as Harris, FAST or SIFT, etc. Using multiple matching templates will generally make subsequent template matching more flexible and reliable, and the same as using a single template method, as described above, which is optional and will not be repeated.

[0072] As an example, Figure 5F This multi-template situation is shown, where there are 4 templates, and the image 570 is projected along the X, Y directions 517, 572, and the primary maximum and secondary primary maximum peaks can be obtained using the above method to obtain 4 initial template regions 573, 574, 575 and 576, which can also be further screened and optimized later.

[0073] In addition, it can be further improved as a contingency plan (which is usually not encountered in normal circumstances), that is, when the primary maximum and secondary primary maximum peaks that meet the threshold conditions described above cannot be found in the projection along the X / Y direction in a single frame template image, the countermeasure given in the embodiment of the present application is to collect multiple frames of images around the current image acquisition position, and splice them into a spliced template image with the original template image, and perform the same operations as the original template image without splicing, including the preprocessing, projection and back projection to obtain the primary wafer alignment template. For example, collect multiple frames of images at the center of the wafer to splice into a large image, for example Figure 6In the nine-square grid of the stitching template image 601, the center region 602 is selected, whose X, Y direction size is ≥ 1.5 times of the corresponding direction grain size, enough to ensure that there is at least one 4-grain intersection. One specific operation method is to stitch the images, perform edge extraction, select the center region 602 as a complete image, and then use the same method as when processing a single frame image, i.e., projection in the X / Y direction, determine the position of the main maximum / secondary maximum peak in the projection, and back projection to the image region to determine the 4-grain intersection, which is also a region with rich features and uniqueness in the image, as the initial template region, and then further optimize to obtain the matching template. Another specific operation method is that the images in t2-t9 can be collected one by one according to the specified rules, and if there is a main maximum peak that meets the main maximum threshold condition, the image is taken as the template image, and the template is obtained according to the same method as the automatic extraction of the template in the above template image, and the collection of other images in the nine-square grid is terminated. In practical applications, only any 4-frame image (including the original template image t1) in the four-square grid, such as t1, t2, t3, t4 or t1, t6, t7, t8, is needed. Figure 6 The four / nine-square grid stitching method seems more time-consuming, but first of all, it should not happen under normal circumstances, and secondly, as will be described later, even if it does, it only affects the first wafer alignment of the same type of equipment, the same type of wafer, and the same type of recipe on the production line. The stitching can be non-overlapping stitching (for primary WA using OM images, mechanical motion platform error is sub-pixel, which can be ignored), or overlapping (based on features at the image overlap) stitching. The result does not affect the position of the main maximum and secondary maximum in the X / Y direction projection in the stitching template image (completely unnecessary to be accurate to sub-pixel). Although it is more time-consuming, first of all, it is difficult to encounter such a situation in primary wafer alignment, and secondly, considering that (described later) in practical applications, AWA is not needed every time the wafer is loaded, and once the initial AWA is completed, it is no longer needed, the time cost of AWA is extremely limited. In return, as a safety guarantee, it ensures that the final AWA can find a suitable template.

[0074] Furthermore, in this embodiment of the invention, the initial template region obtained by the above method is further processed / optimized. Obtaining a template for primary wafer alignment based on the initial template region includes: directly using the initial template region as a template when it meets the uniqueness condition; or including: optimizing the initial template region, wherein the optimization method includes searching for a region with the center of the initial template region as the center, whose size is within the range of [MinS, MaxS], and which has the highest feature content ratio under the uniqueness condition, and selecting it as the template. Specifically, in method one, for an initial template region, its uniqueness within the template image is examined. If it is unique, the region can be directly used as the template / template region. If it is not unique (actually a rare / low-probability case, because along the X, Y directions, i.e., in one-dimensional projection data, each corresponds to a primary / secondary primary maxima peak, which are all unique), it can be considered that the region with the highest feature content ratio / concentration, centered on the center of the initial template region, with the minimum template size MinS as the lower bound and the maximum template size MaxS as the upper bound, is selected as the template region. Figure 5G As shown, in the template image 580, an initial template region 581 is used as the center, with a minimum template region 582 and a maximum template region 583. Then, the region with the highest feature content ratio / density is selected using the method described above. The features are the edges / gradient areas and corners in the image. Method two involves searching for the region with the highest final feature content ratio within the size range [MinS, MaxS] that satisfies the uniqueness condition, regardless of whether the initial template region is unique in the template image, using the center of the initial template region as the center. This region is then used as the template. Further explanation: for any given region in the image, the feature content ratio, i.e., the feature density ρ, is defined as:

[0075]

[0076] The feature content refers to the number of pixels in the region that belong to the aforementioned features, and the region area is measured in square pixels. In this embodiment of the invention, after selecting the WA template for the primary OM, the steps for the current-level (primary OM) WA are similar to those in the prior art, such as... Figure 3AFor example, the closest primary OM's WA match point / position 311 to the wafer center has been determined and the template image and template have been acquired by the above method, then according to the known Die Pitch, it is easy to run the distance of an integer multiple of the X direction Die size to find 312 (the wafer pre-alignment ensures that the target image / FOV has the corresponding match with the template, although there may be some deviation from the expected position, and the subsequent match is easier), collect the target image for template matching, and then according to the matching result, that is, the more accurate actual wafer orientation (2-point straight line slope, and the result of multiple points far apart is more accurate) and the more accurate actual Die size calculated at this time, continue to obtain the positions such as 313, 314, 315, 316, etc. that are an integer multiple of the X direction Die size apart, from the position close to the wafer center to the position far from the wafer center. These matching positions that meet the template matching threshold requirement jointly participate, for example, fitting a straight line or the current wafer orientation angle θ, and are corrected to complete the WA of the current level (primary OM). Among them, the wafer orientation correction can be performed once after obtaining all the successfully matched matching positions 312-316, or the wafer orientation correction can be performed once after obtaining each successfully matched matching position, for example, after obtaining the successfully matched matching position 312, the wafer orientation is corrected once through the matching positions 311 and 312, after obtaining the successfully matched matching position 313, the wafer orientation is corrected again through at least two of the matching positions 311-313, and so on, which will not be repeated here, and then enter the higher level WA, which may be using a higher magnification OM (smaller FOV) or a lower magnification TDI / SEM image, and then perform higher level / magnification larger WA until all levels of WA are completed. It is supplemented that the wafer orientation correction can be a rotating mechanical motion platform, or it can only record the current wafer orientation angle, which is used for compensation when the subsequent coordinates on the wafer are involved.

[0077] It is supplemented that when the current level WA is completed, the position of the template for the next level WA needs to be determined automatically. In the prior art, the template positions / images for these higher level WA are determined manually when creating the Recipe, while in the embodiment of the present application, they must be automatically selected in place in the AWA.

[0078] In the embodiment of the present application, the template image acquisition position for the higher level wafer alignment is automatically acquired from the template image or the successfully matched target image of the current level, and the template image of the higher level is collected to determine the required template, including:

[0079] a) from the images involved in the current stage wafer alignment, including the template image and the target images that have successfully matched, select one image according to certain rules, called the working image. The rules can be, for example, using the template image of the current stage WA, or using one of the target images that have successfully matched in the current WA, for example, the target image that contains the most features among the target images that have successfully matched with the template (for example, in the case of Figure 3A the image at 311 can be a template image, and the images at 312-316 can be target images). As above, the features can also be nothing but edges, corner points, or feature points extracted by certain algorithms, such as SIFT feature points;

[0080] b) find J local regions from the working image, the size of which is equal to the size of the field of view (FOV) of the image used in the wafer alignment of the next stage in the current image, J ≥ 2, for example, after selecting one as the working image, select regions that meet the requirements in terms of feature types and / or quantities from the working image as the local regions, which is easy to achieve in the WA image of the primary OM, although J = 1 is theoretically possible; refer to Figure 7 For example, in the template image 701, the template region 702 can be selected, and from the template region 702, the local regions 705, 706, 707, and 708 can be selected, and the corresponding positions of each of the local regions 705-708 on the wafer (which can be easily calculated according to the positions of the local regions in the image and the collection position of the image on the wafer) can be used as candidate collection positions of the next stage WA template image; or, in the above target image 711, there is a template matching success / target region 712 (the position of which is the matching position) in the current stage wafer alignment, and from the template matching success / target region 712, the local regions 715, 716, 717, and 718 can be selected, and the corresponding positions of each of the local regions 715-718 on the wafer can be used as candidate collection positions of the next stage WA template image;

[0081] c) sort the J local regions according to certain rules, the most direct and most effective rule being to consider the amount of features in the local regions, that is, sort the J local regions in descending order of the amount of features;

[0082] d) The device is switched to the next level of wafer alignment image acquisition field of view (in the original WA, this step is done in the original WA, and the next level of image is acquired at a higher magnification), and the wafer is moved to access the candidate positions on the wafer corresponding to the J local areas in the order described above, and the template image is acquired. The template is determined in the same way as the original template in the primary wafer alignment, or in a different way, and once it is obtained, the next of the J local areas is immediately terminated, where the current template is used to complete the wafer alignment at the current level. This includes the same way as searching for the template area above, including preprocessing, edge extraction, X, Y direction projection, searching for the primary maximum and secondary maximum peak, back projection to the template image to determine the initial template area and further optimize its position and size, and determine the template. It should be noted that at this time, since the template image FOV is smaller, the image cannot include the 4-die intersection, and the requirement for the secondary maximum peak in the X / Y projection is changed, and only requires that the back projection area is MaxS range to the left and right of the primary maximum peak that meets the threshold condition, and Figure 5B The case is similar to Figure 7 , where the primary maximum peak is 523. Then the area boundary is determined by back projection to the initial template area, and then it is optimized in position and size in the same way as above. In addition, it should be noted that the correlation threshold includes the absolute threshold Ta and the two relative thresholds Tr, which are relatively relaxed. Still taking Figure 7 as an example, so that at the higher level of WA, assuming that the local area 705 in the template image 701 is the template image acquisition position used for the next level of template matching, the next level of template image 7051 is acquired at the position on the wafer corresponding to the local area 705, where there is a template 7052 that can be used for the template of the WA. Similarly, taking the local area 717 in the target image 711 as an example, the template image acquisition position used for the next level of template matching is the local area 717, and the next level of template image 7171 is acquired at the position on the wafer corresponding to the local area 717, where there is a template 7172. Taking as an example, so that the projection of the template image 7051 in the vertical direction in the next level of wafer alignment is shown as data / curve 7053, and the projection of the template image 7171 in the horizontal direction is shown as data / curve 7173, where the more prominent peaks can generate an initial template area that constitutes a good template, and its uniqueness and contrast in the image should be guaranteed. The different method refers to other feature-based template selection methods, and since the field of view (whether it is an OM image at a high magnification or a device's own working system image such as a TDI or SEM image) is smaller at this time, the content and features contained therein are less than in the primary OM WA, and some commercial image processing / machine vision software has corresponding template automatic selection functions, and the success rate for the image at this time is higher.

[0083] In this embodiment, the template required for higher-level wafer alignment is automatically obtained using the same method, and the wafer alignment at that level is completed, until the wafer alignment at all other levels is completed.

[0084] At this point, the device has completed each level of the WA process, and can then proceed with subsequent tasks according to the recipe, including executing its core tasks. However, as described in the background section, it is often still necessary to determine the wafer reference point at this stage.

[0085] Depending on the situation, there are at least two methods. First, if the wafer has an alignment mark printed on it, such as... Figure 4A For images 402, 403, or 404, as long as their geometry and approximate dimensions are known, geometric shape matching algorithms in template matching can be used. These are available in some commercial machine vision / image processing software, such as the Geometric Model Finder (GMF) in the Matrox® Imaging Library, thus eliminating the need for prior image acquisition. Alignment marks typically have good symmetry, so their center can be used as the wafer reference point, applicable to various image acquisition methods (e.g., OM images, TDI images (bright or dark field), SEM images). However, searching in this case will be time-consuming. Secondly, if there is no alignment mark, the reference point can be freely selected from the highest magnification (i.e., the last level) WA image closest to the wafer center. For example, the image itself (the wafer reference point is the image's origin, its center, its upper left corner, or one of its corner points (which looks more like a point, but are essentially the same). For example, selecting...) Figure 7the upper left corner of the template 7052 in the image as the reference point. Of course, in actual use, the selection of the reference point specifically refers to the selection of an image including the reference point, referred to as a reference point template image, and the selection result of the reference point includes the reference point template image (strictly speaking, the reference point position is the position on the wafer corresponding to a specific point such as the center point in the reference point template image), and the result of the AWA is also required to be saved, which can be used for subsequent wafers. Further, unlike the prior art, the number of reference points is not limited in the embodiment of the application, and one reference point can be selected under the magnification of the last stage WA, or a reference point can be determined after each wafer alignment, so that there are reference points with different magnifications to meet different needs in the future. For example, the current device is a wafer initial inspection device, and the subsequent wafer re-inspection device such as an EBR device, and the magnification of the OM image used is often different from the former, and the magnification of the SEM image used by the EBR device needs to be higher relative to the initial inspection device, so it is more meaningful to save the wafer reference points (reference template images) under different magnifications, which is beneficial to determining the reference points used by the previous device in the subsequent device. In the embodiment of the application, after completing each stage of wafer alignment, the existing alignment mark on the wafer or the template image from the last stage of wafer alignment or the successfully matched target image near the center of the wafer is selected to select a position meeting the predetermined condition as the wafer coordinate reference point; or after completing each stage of wafer alignment, the existing alignment mark on the wafer or the template image from each stage of wafer alignment or the successfully matched target image near the center of the wafer is selected to select a position meeting the predetermined condition as the wafer coordinate reference point. It is supplemented that if the device does not do the initial work such as defect initial inspection, but does the subsequent work such as defect re-inspection, at this time the reference point (reference point template image) of the initial inspection already exists, at this time only the known reference point template image needs to be searched / matched to the predetermined position, which involves some details beyond the scope of the application, and since it does not affect the correctness of the application, it is not described here.

[0086] The AWA result can then be saved, and a Recipe for WA is generated therefrom, which includes the templates of each stage of WA and the matched positions after wafer orientation correction.

[0087] It is important to note that although the above WA method does add a step of automatic searching for the template matching needed for the right WA when the device is executing a Recipe, which includes image processing (edge extraction, X / Y direction projection, and finding the primary and secondary primary maximum peaks in it, etc.), with the current computer capability, the additional time consumption can be limited to less than 100 ms, which is negligible compared to the time of mechanical movement. Only in rare cases where multiple images need to be collected for stitching, such as using a four-quadrant, it is more time-consuming to move the wafer to collect additional images, which takes about several seconds of additional time. But even so, for the same device, only the first wafer of the same type of wafer needs to be done once, and after the WA is completed, all levels of WA templates and successful matching positions can be saved to the computer 140 on the device (in memory or added to the currently running Recipe), which is equivalent to establishing a WA Recipe. The subsequent WA of the same type of wafer can be completed automatically using these saved results (templates and successful matching positions of each level of WA), just like in the prior art. In addition, more importantly, such automatically generated WA Recipe can not only be used for the same task (Recipe) of the same wafer on the same device, but also can be transmitted to the management center of the IC factory (Fab) through the Fab Automation (FA) mechanism, so that other devices can share it, and even other fabs can share it. Therefore, the method in the embodiments of the present application does not substantially increase the additional time consumption in the actual production line.

[0088] The embodiments of the present application also disclose a semiconductor device, which performs the following steps after wafer loading: determining whether the device has a work menu for wafer alignment, if not, performing automatic wafer alignment using the method and saving it as a work menu for wafer alignment, and then performing the main work of the device; if yes, obtaining and executing the work menu, and then performing the main work of the device.

[0089] Specifically, the AWA-related process involved in the work of the device is as shown in Figure 8 The steps include:

[0090] 801, wafer loading of the device, the content of which is the same as in the prior art, including pre-alignment.

[0091] 802, determining whether the device (its computer) has a WA Recipe at this time. If not, go to step 803 to perform AWA, otherwise go to step 805 to obtain the previously saved WA Recipe from the computer memory / database.

[0092] 803, perform AWA in the embodiment of the present application as described above. Save the result, i.e. the new WA Recipe, after completion. In this embodiment, the wafer reference point is determined as well.

[0093] 804, after step 803, save the AWA result in the equipment computer memory and database for later use in the same job (no need to perform AWA again). Further, send the result to the Fab management center through the equipment Host for sharing with other equipment when performing the same job. It is to be noted that the embodiment of the present application supports one AWA to generate the WA Recipe, i.e. after the first wafer in the same type of wafer is aligned by the equipment in multiple stages, the result is used as the job menu for the subsequent wafer alignment. The embodiment of the present application also supports k AWAs and then selects one of them according to a predetermined rule to generate the WA Recipe, e.g. the result of the best one, k ≥ 1. Then the equipment continues the current job, which is mainly the job of the equipment. The best result includes 1) the maximum number of template matching points reaching a predetermined threshold in AWA, or 2) the highest average score of successful template matching in all stages in the result of the best one.

[0094] 805, get the previously saved WA Recipe, no matter where it comes from, including the one generated by the previous AWA on the same equipment, or the one obtained from the Fab management center and saved on the current equipment.

[0095] 806, execute the current WA Recipe. The steps are the same as in the prior art, and the WA is completed. This includes the selection of the wafer reference point.

[0096] 807, complete the job of the semiconductor equipment. After the WA is completed, whether it is through AWA or according to the previously saved WA Recipe, execute the job Recipe of the equipment. After completion, the equipment continues the subsequent job, including the next wafer, which does the same thing (once the WA Recipe is obtained, there is no need for AWA).

[0097] As can be seen, the method in the embodiment of the present application first simplifies the semiconductor equipment Recipe creation process, avoiding the risk of errors in selecting templates when creating the WA Recipe manually. More importantly, it does not need to occupy the valuable machine time of the semiconductor equipment, especially the online semiconductor equipment, making it possible to generate the WA Recipe offline, or even the entire Recipe of the semiconductor equipment.

[0098] Further, since the multi-stage automatic wafer alignment method only needs to be used for the first / first few times of the same wafer and the same work of the same equipment, the additional time consumption it brings in practical application is actually negligible. Therefore, it is of great significance. Because the creation of the recipe on the current semiconductor equipment is most dependent on the equipment, and often the only part that depends on the equipment is the creation of the wafer recipe.

[0099] The above embodiments only illustrate the basic principles and characteristics of the present application, and the present application is not limited to the above embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor under the premise of not departing from the spirit and scope of the present application shall belong to the protection scope of the present application.

Claims

1. A multi-stage automated wafer alignment method for semiconductor equipment, characterized in that, include: When the device first performs the work defined in its menu, it automatically acquires the template image and template required for primary wafer alignment in the central region of the wafer after wafer loading. It determines at least one target image acquisition position on the wafer based on the die periodicity, moves the wafer to the target image acquisition position to acquire the target image, and uses the template to perform template matching to complete the primary wafer alignment. From the template image or successfully matched target image of the current level wafer alignment, the acquisition position of the template image of the higher level wafer alignment is automatically obtained, and the higher level template image is acquired. The required template is determined from it. The acquisition position of the target image of the higher level is determined according to the periodicity of the die and the target image is acquired. Then the higher level wafer alignment is completed. The wafer alignment of the remaining levels is completed in the same way. The wafer alignment working menu is generated according to the obtained results for use in subsequent wafer alignment. After wafer mounting, the template image and template required for primary wafer alignment are automatically acquired in the center region of the wafer. In the central region of the wafer, a template image is acquired and preprocessed, including edge extraction and noise filtering. Two projections of the edge image along the X and Y directions are obtained, and peak information satisfying predetermined threshold conditions, including major maxima and minor maxima peaks arranged in order of size, are detected from the projections respectively. The major maxima and / or minor maxima peaks are expanded according to predetermined rules to determine the peak regions in the projections. The peak regions are then back-projected onto the template image along the X and Y directions respectively. The intersection of the back-projections is taken as the initial template region. The template for primary wafer alignment is obtained based on the initial template region.

2. The method according to claim 1, characterized in that, The threshold conditions include absolute threshold Ta and / or relative threshold Tr conditions, wherein the absolute threshold conditions include: Pi ≥ Ta, i = X, Y Where Ta is a preset constant, the relative threshold condition includes: Pi ≥Tr, i=X,Y Where Pi represents the principal and secondary principal maxima to be examined along the X / Y projection, and the relative threshold is defined as: Tr = (Pmax - Pm) × C1 Where Pm is the minimum value or the average of n minimum values ​​within a range of b pixels on either side of the peak value to be examined (the principal or secondary principal maximum), b is a preset constant, n ≤ 5, C1 is between (0, 1), and Pmax is the maximum value of the data in the projection, which is the principal maximum peak value; or the relative threshold is defined as: Tr = Pavg × C2 Where Pavg is the average value projected along the X / Y direction over a range of b pixels on either side of the peak of the primary or secondary primary maxima to be examined, where b is a preset constant and the coefficient C2 is a preset constant.

3. The method according to claim 1, characterized in that, Extend a distance r on both sides of the main maxima and the secondary maxima to determine the peak region, and use any of the following methods to set the distance r: r is a preset fixed value; r = min(W, H)×c%, where W and H are the width and height of the template image, and c is a preset constant; r is a preset multiple of the half-width (FWHM) of the main maxima in the projection data.

4. The method according to claim 1, characterized in that, Before backprojecting the peak region onto the template image, the peak region is constrained. The constraint includes: determining whether the size of the peak region is within a set range of [MinS, MaxS]. If not, the size of the peak region is reduced or expanded to make it fall within the range, where MinS and MaxS are the preset minimum template size and maximum template size, respectively.

5. The method according to claim 4, characterized in that, Obtaining a template for primary wafer alignment based on the initial template region includes: directly using the initial template region as a template when the initial template region satisfies the uniqueness condition; or optimizing the initial template region, wherein the optimization method includes selecting the region with the center of the initial template region as the center, the size within the range of [MinS, MaxS], and the region with the highest feature content ratio under the uniqueness condition as the template.

6. The method according to claim 1, characterized in that, include: When a primary maximum peak that meets a predetermined threshold condition is detected from the projection but no secondary primary maximum peak that meets the threshold condition is detected, if the distance between the primary maximum peak and the image boundary on either side meets the distance threshold condition, then the peak region is formed by expanding to both sides according to the position of the primary maximum peak until the preset maximum template size MaxS. Otherwise, based on the position of the main maximum peak on the wafer, the wafer is moved to that position to re-acquire the template image, and then the positions of the main maximum and secondary main maximum peaks that satisfy the predetermined threshold conditions are re-detected to determine the peak region.

7. The method according to claim 1, characterized in that, include: When at least three peak information that meet the predetermined threshold conditions are detected, up to three different peak regions are formed according to the peak information and preset rules. Then, they are back-projected onto the template image to determine up to six initial template regions. The initial template regions are filtered according to preset conditions, and at least one and at most four templates are obtained after filtering for wafer alignment.

8. The method according to claim 1, characterized in that, When the primary and secondary primary maxima peaks that meet the predetermined threshold conditions cannot be detected from the projection, multiple frames of images are acquired around the current image acquisition position and stitched together with the original template image to form a stitched template image. The same operations as the unstitched original template image are performed on the stitched template image, including the preprocessing, projection and backprojection, to obtain the template for the primary wafer alignment.

9. The method according to claim 1, characterized in that, The process of automatically acquiring the template image acquisition position of a higher-level wafer alignment from the current-level template image or the successfully matched target image, and acquiring the higher-level template image to determine the required template includes: a) selecting one working image from the images involved in the current-level wafer alignment, including the template image and the successfully matched target image, according to certain rules; b) finding J local regions from the working image, the size of which is equal to the field of view size of the image used for the next-level wafer alignment, where J≥2; c) sorting the J local regions according to certain rules; d) switching the device to the image acquisition field of view of the next-level wafer alignment, moving the wafer to access the positions on the wafer corresponding to the J local regions one by one according to the sorting, acquiring template images, and determining the higher-level template using the same method or a different method as the automatic generation of the wafer alignment template in the primary wafer alignment. After encountering a template that meets the predetermined conditions, the access to the next of the J local regions is terminated.

10. The method according to claim 9, characterized in that, After selecting a template image for the current-level wafer alignment or a target image involved in the current-level wafer alignment as the working image, select a region from the working image that meets the requirements for feature type and / or quantity as the local region; sort the J local regions in descending order of the number of features.

11. The method according to claim 1, characterized in that, After completing the alignment of each level of wafer, the existing alignment mark on the wafer is selected as the wafer coordinate reference point, or a position that meets the predetermined conditions is selected from the template image of the last level of wafer alignment or the target image of a successfully matched target image close to the center of the wafer. Alternatively, after completing each level of wafer alignment, a position that meets predetermined conditions can be selected as a wafer coordinate reference point from the existing alignment mark on the wafer, or from the template image of each level of wafer alignment, or from the successfully matched target image near the wafer center.

12. The method according to claim 1, characterized in that, After the device completes automatic wafer alignment for the first wafer of the same type, or completes k automatic wafer alignments for the initial k wafers, it selects one of the following according to a predetermined rule, where k ≥ 1, and uses the result to form the working menu for subsequent wafer alignments.

13. A semiconductor device, characterized in that, After the wafer is mounted, the device performs the following steps: determining whether the device already has a working menu for wafer alignment; if not, automatically aligning the wafer using the method described in any one of claims 1-12, saving the working menu for wafer alignment, and then performing the device's primary function; if yes, acquiring and executing the working menu, and then performing the device's primary function.

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