A low-noise charge vertical transfer pixel structure and driving method
By adopting a low-noise vertical transmission pixel structure and specific driving timing control in the image sensor, the problems of dark current and white point noise in the vertical transmission gate structure are solved, and a lower noise pixel design is achieved.
Patent Information
- Application Number
- CN202211634922.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-19
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2042-12-19
AI Technical Summary
In the prior art, the pixel dark current of the image sensor with a vertical transmission gate structure is relatively large, and it is more likely to generate white point defects, resulting in increased noise.
A low-noise charge vertical transmission pixel structure is adopted, including forming an N-type photodiode on a p-type substrate for photosensitive, a P-type heavily doped region wraps the transmission electrode for channel control, an N-type doped floating diffusion node is isolated from the P-type heavily doped region, forming an N-type channel for charge transmission, and controlling the transfer of electrons through a specific driving timing.
While ensuring the pixel size, the influence of dark current and white point noise caused by defects in the pixel is reduced, effectively suppressing the generation of dark current and white point noise.
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Figure CN115881748B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a pixel integrated circuit, and more particularly to a low-noise charge vertical transfer pixel structure and driving method. Background Art
[0002] With the development of image sensing technology, pixel design has gradually evolved towards smaller sizes, and small-sized pixels have extensive applications in the field of consumer electronics.
[0003] To reduce the pixel size, multiple pixels usually share a floating diffusion node FD, or a vertical gate structure is adopted to shorten the distance between the FD and the PD. The structure with the transfer gate perpendicular to the PD also reduces the area occupied by the transfer transistor in traditional pixels, improving pixel sensitivity under low-light conditions. However, the pixel dark current of an image sensor with such a vertical transfer gate structure is relatively large, and it is more prone to generating multiple white dot defects.
[0004] As Figure 1a shown, taking the double vertical transfer gate pixel structure as an example, since the gate penetrates deeply into the Si, the contact area between SiO2 and Si increases. After the TX is turned on and the channel is inverted, surface dangling bond defects are likely to capture electrons ( Figure 1b ), and after the TX is turned off, the trapped electrons are released by the traps. These electrons are released into the PD and FD regions ( Figure 1c ), and there is a certain degree of randomness, resulting in dark current and white dot defect noise. In addition, after the TX is turned off, if the electric field between the TX and the FD is strong, the defect-assisted tunneling effect is enhanced, which will also lead to an increase in dark current.
[0005] In view of this, the present invention is specifically proposed. Summary of the Invention
[0006] The purpose of the present invention is to provide a low-noise charge vertical transfer pixel structure and driving method to solve the above technical problems existing in the prior art.
[0007] The purpose of the present invention is achieved through the following technical solutions:
[0008] The low-noise charge vertical transfer pixel structure of the present invention includes:
[0009] Based on a p-type substrate and a p-type epitaxy 101, an N-type photodiode 102 is formed by N-type implantation for photosensing, and a P-well 103 is formed by P-type implantation as pixel isolation;
[0010] A P-type heavily doped region 104 wraps a transfer electrode 105 for channel control;
[0011] A shallow trench isolation 106 is used as isolation between the N-type doped floating diffusion node 107 and the P-type heavily doped region 104;
[0012] A charge transfer channel N-type channel 109 is formed by N-type implantation between the N-type photodiode 102 and the floating diffusion node 107;
[0013] Between the P-type heavily doped region 104 and the regions of the N-type photodiode 102 and the floating diffusion node 107, a P-type lightly doped region 108 is used as a transition;
[0014] The transfer electrode 105 is externally connected to the TX signal, and the floating diffusion node 107 is connected to a capacitor (110) and externally connected to the BOOST signal.
[0015] The driving method of the above low-noise charge vertical transfer pixel structure includes:
[0016] In the exposure stage, the TX is connected to a voltage of -2.0V. The P-type heavily doped region 104 pinches off the channel through a strong negative potential, a potential barrier is formed between the N-type photodiode 102 and the floating diffusion node 107, and photoelectrons accumulate in the N-type photodiode 102;
[0017] In the charge transfer stage, the TX is connected to 0V, the capacitor BOOST in the floating diffusion node 107 region is connected to 3V, the potential of the P-type heavily doped region 104 is lower, and the potential of the floating diffusion node 107 region increases, thereby completing the transfer of electrons in the N-type photodiode 102 to the floating diffusion node 107 region.
[0018] Compared with the prior art, the low-noise charge vertical transfer pixel structure and driving method provided by the present invention can reduce the influence of dark current and white point noise caused by defects in the pixel while ensuring the pixel size through structural improvement in cooperation with the corresponding driving timing control scheme. Description of the Drawings
[0019] Figure 1a It is a schematic diagram of a double vertical transfer gate pixel structure in the prior art;
[0020] Figure 1b It is a schematic diagram of the TX high level turn-on of a double vertical transfer gate pixel in the prior art;
[0021] Figure 1c It is a schematic diagram of the TX low level turn-off of a double vertical transfer gate pixel in the prior art;
[0022] Figure 2 It is a schematic diagram of the low-noise charge vertical transfer pixel structure provided by the embodiment of the present invention;
[0023] Figure 3a It is a schematic diagram of the pixel working state of the embodiment of the present invention. In the exposure stage, TX = -2.5V and BOOST = 0;
[0024] Figure 3bThis is a schematic diagram of the pixel working state in the embodiment of the present invention. During the charge transfer stage, TX = 0V and BOOST = 3.0V.
[0025] In the figure:
[0026] Specific embodiments
[0027] Next, in combination with the accompanying drawings in the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments, which do not constitute a limitation to the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of the present invention.
[0028] First, the following explanations are given for the terms that may be used in this article:
[0029] The term "and / or" means that either one or both of the two can be realized. For example, X and / or Y means that it includes both the case of "X" or "Y" and the three cases of "X and Y".
[0030] The description of terms such as "including", "comprising", "containing", "having" or other similar semantics should be interpreted as non-exclusive inclusion. For example, including a certain technical feature element (such as raw materials, components, ingredients, carriers, dosage forms, materials, dimensions, parts, components, mechanisms, devices, steps, processes, methods, reaction conditions, processing conditions, parameters, algorithms, signals, data, products or articles, etc.) should be interpreted as not only including the clearly listed certain technical feature element, but also including other technical feature elements well-known in the art that are not clearly listed.
[0031] The term "consisting of" means excluding any technical feature element that is not clearly listed. If this term is used in a claim, then this term will make the claim a closed type, making it not include technical feature elements other than the clearly listed technical feature elements, except for related conventional impurities. If this term only appears in a certain clause of the claim, then it only limits the elements clearly listed in that clause, and the elements recorded in other clauses are not excluded from the overall claim.
[0032] Unless otherwise expressly specified or limited, terms such as "installation", "connection", "attachment", "fixation", etc. shall be construed broadly. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be a direct connection or an indirect connection through an intermediate medium, and it may be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in this text can be understood according to specific circumstances.
[0033] The orientation or positional relationship indicated by terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of description and simplification of the description, rather than expressly or implicitly indicating that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to this text.
[0034] The content not described in detail in the embodiments of the present invention belongs to the prior art well-known to those of ordinary skill in the art. For those conditions not specified in the embodiments of the present invention, they shall be carried out according to the conventional conditions in the art or the conditions recommended by the manufacturer. For the reagents or instruments not specified in the embodiments of the present invention for the manufacturer, they are all conventional products that can be obtained through commercial purchase.
[0035] The low-noise charge vertical transfer pixel structure of the present invention includes:
[0036] Based on the p-type substrate and p-type epitaxy 101, an N-type photodiode 102 is formed by N-type implantation for photosensing, and a P-well 103 is formed by P-type implantation as pixel isolation;
[0037] A P-type heavily doped region 104 wraps the transfer electrode 105 for channel control;
[0038] A shallow trench isolation 106 is used as isolation between the N-type doped floating diffusion node 107 and the P-type heavily doped region 104;
[0039] A charge transfer channel N-type channel 109 is formed by N-type implantation between the N-type photodiode 102 and the floating diffusion node 107;
[0040] A P-type lightly doped region 108 is used as a transition between the P-type heavily doped region 104 and the regions of the N-type photodiode 102 and the floating diffusion node 107;
[0041] The transfer electrode 105 is externally connected to the TX signal, and the floating diffusion node 107 is connected to a capacitor (110) and externally connected to the BOOST signal.
[0042] The driving method for the above-mentioned low-noise charge vertical transfer pixel structure includes:
[0043] During the exposure stage, TX is connected to a voltage of -2.0V. The P-type heavily doped region 104 pinches off the channel through a strong negative potential. A potential barrier is formed between the N-type photodiode 102 and the floating diffusion node 107, and photoelectrons are accumulated in the N-type photodiode 102.
[0044] During the charge transfer stage, TX is connected to 0V, the capacitor BOOST in the floating diffusion node 107 region is connected to 3V, the potential of the P-type heavily doped region 104 is relatively low, and the potential of the floating diffusion node 107 region increases, thereby completing the transfer of electrons in the N-type photodiode 102 to the floating diffusion node 107 region.
[0045] In summary, for the low-noise charge vertical transfer pixel structure and driving method of the embodiments of the present invention, through structural improvements in cooperation with corresponding driving timing control schemes, it is possible to reduce the influence of dark current and white point noise caused by defects in the pixel while ensuring the pixel size. While reducing the pixel size, it effectively suppresses the influence of dark current and white point noise caused by defects.
[0046] In order to more clearly show the technical solutions provided by the present invention and the technical effects produced, the following uses specific embodiments to describe in detail what is provided by the embodiments of the present invention.
[0047] Embodiment 1
[0048] For the low-noise charge vertical transfer pixel structure and driving method, the basic device structure is as Figure 2 shown: Based on the p-type substrate and p-type epitaxy 101, the Ntype-PD region 102 is formed by N-type implantation for photosensing, and the Pwell region 103 is formed by P-type implantation as isolation between pixels; the P+ layer implantation 104 wraps the transmission electrode 105 for channel control; the N-type doped floating diffusion node FD107 and the P+ layer implantation 104 are isolated by STI106; a charge transfer channel n-channel109 is formed between the PD and FD by N-type implantation; between the electrode wrapping the P+ layer and the PD and FD regions, a lightly doped p-type doping 108 is used as a transition to avoid the too strong electric field around the FD and PD, resulting in band-to-band tunneling effect and reducing the generation of dark current. The transmission electrode is externally connected to the TX signal, the FD region is connected to the capacitor (110), and the external BOOST signal is used to enhance the charge transfer efficiency.
[0049] The schematic diagram of the working state of the pixel of the present invention is as Figure 3a 、 Figure 3bAs shown. During the exposure stage, the TX is connected to a voltage of -2.0V. The P+ region pinches off the channel through a strong negative potential, forming a potential barrier between the PD and the FD, and the photoelectrons accumulate in the PD. During the charge transfer stage, the TX is connected to 0V, the BOOST capacitor in the FD region is connected to 3V, the potential of the P+ region is relatively low, and the potential of the FD region increases, thus completing the transfer of electrons in the PD to the FD region. The working principle of the PD-channel-FD channel of this structure is relatively similar to that of a JFET device. The charge transfer is controlled by the voltage of the P+ region, and the BOOST signal in the FD region can improve the charge transfer efficiency, reducing the dark current and white dot noise caused by the traps on the SiO2 and Si surfaces in the traditional vertical gate pixel structure.
[0050] At the same time, due to the existence of the n-channnel, the pixel blooming effect can be effectively suppressed, improving the imaging quality.
[0051] As described above, only the preferred specific embodiments of the present invention are given, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims. The information disclosed in the background art part of this article is only intended to deepen the understanding of the overall background technology of the present invention, and should not be regarded as an admission or any form of implication that this information constitutes the prior art known to those skilled in the art.
Claims
1. A low-noise charge vertical transfer pixel structure, characterized in that, it includes: Based on the p-type substrate and p-type epitaxy (101), N-type implantation is used to form an N-type photodiode (102) for photosensing, and P-type implantation is used to form a P-well (103) as pixel isolation; The P-type heavily doped region (104) wraps the transfer electrode (105) for channel control; A shallow trench isolation (106) is used as isolation between the N-type doped floating diffusion node (107) and the P-type heavily doped region (104); An N-type channel (109) of the charge transfer channel is formed by N-type implantation between the N-type photodiode (102) and the floating diffusion node (107); A P-type lightly doped region (108) is used as a transition between the P-type heavily doped region (104) and the regions of the N-type photodiode (102) and the floating diffusion node (107); The transfer electrode (105) is externally connected to the TX signal, and the floating diffusion node (107) is connected to a capacitor (110) and externally connected to the BOOST signal.
2. A driving method for the low-noise charge vertical transfer pixel structure according to claim 1, characterized in that, it includes: Exposure stage: The TX is connected to a voltage of -2.0V. The P-type heavily doped region (104) pinches off the channel through a strong negative potential, a potential barrier is formed between the N-type photodiode (102) and the floating diffusion node (107), and photoelectrons are accumulated in the N-type photodiode (102); Charge transfer stage: The TX is connected to 0V, the capacitor BOOST in the floating diffusion node (107) region is connected to 3V, the potential of the P-type heavily doped region (104) is lower, and the potential of the floating diffusion node (107) region increases, so as to complete the transfer of electrons in the N-type photodiode (102) to the floating diffusion node (107) region.
Citation Information
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