Photovoltaic device

Abstract

The application provides a photovoltaic device, comprising: a flexible substrate layer, a water vapor barrier layer, an electrode layer, a first buffer layer, an absorption layer, a window layer and a light-transmitting conductive layer which are arranged in layers, wherein the first buffer layer comprises: a copper-doped layer and a separation layer without copper element doping, and the separation layer is located between the copper-doped layer and the absorption layer. The technical scheme of the application can effectively solve the problem of low battery efficiency of a solar cell in the prior art.

Description

Technical Field

[0001] This invention relates to the field of solar cells, and more specifically, to a photovoltaic device. Background Technology

[0002] CdTe / CdS(e) solar cells are among the most promising thin-film solar cells. CdTe has a near-ideal bandgap of 1.45 eV, enabling it to convert sunlight into electricity. Traditional CdTe solar cells like FirstSolar are typically fabricated on a 3-5 mm thick glass substrate coated with a transparent conductive oxide (TCO), a structure known as a cladding structure. This requires highly transparent glass and a high-TCO content. Another structure, called a substrate structure, begins with a back contact, an absorber layer, a window layer, and a TCO serving as the front contact. It does not require high-quality glass and can be deposited on inexpensive, lightweight, and flexible substrates.

[0003] The current world record efficiency for solar cells is 22.1%. To further improve cell performance, two main technical challenges need to be addressed: increasing the p-type doping of CdTe and forming an ohmic contact with p-type CdTe. For unobstructed contact, the work function of the metal must be greater than that of p-type CdTe (5.9 eV). Unfortunately, no metal meets this requirement. In practice, three strategies can achieve good ohmic contacts. The first is etching CdTe to adjust and control surface stoichiometry. The second method is heavily doping the CdTe surface to create a p+ layer; the barrier between CdTe and the contact will narrow, allowing free carriers to tunnel freely through the barrier. The third is using another p-type semiconductor with high electron affinity and high conductivity as a buffer layer, which can more easily contact CdTe, reduce resistance, and thus achieve better cell performance, such as HgTe and ZnTe. Copper is commonly used in industry today to increase the doping concentration, thus enabling tunneling contacts so that free carriers can tunnel freely through the barrier. However, copper diffusion into the CdS (window layer) is considered the primary cause of degradation. For the substrate structure, the back contact is the first step. Subsequently, the high-temperature CdTe / CdS(e) deposition and CdCl2 processing cause copper diffusion into the (window layer), thereby reducing device performance.

[0004] Achieving ohmic contact is the biggest challenge in substrate structure. Attempts have been made to develop CdTe / CdS(e) solar cells on flexible metal foil substrates. However, due to the aforementioned back contact problem, the efficiency is limited to the range of 3.5-8%. Buffer layers such as ZnTe, Sb₂Te₃, Te, and Au have been tried, but they do not work well due to the high temperatures. More advanced structures are needed to overcome this problem. Summary of the Invention

[0005] The main purpose of the present application is to provide a photovoltaic device to solve the problem of low battery efficiency of solar cells in the prior art.

[0006] In order to achieve the above-mentioned purpose, the present application provides a photovoltaic device, comprising: a flexible substrate layer, a water vapor barrier layer, an electrode layer, a first buffer layer, an absorption layer, a window layer and a light-transmitting conductive layer which are stacked, wherein the first buffer layer comprises: a copper-doped layer and a separation layer without copper element doping, and the separation layer is located between the copper-doped layer and the absorption layer.

[0007] In one embodiment, the copper-doped layer is a copper-doped molybdenum layer; and / or, the separation layer is a molybdenum layer or a nickel layer.

[0008] In one embodiment, the copper / molybdenum ratio of the copper-doped molybdenum layer is greater than 0% and less than or equal to 20%.

[0009] In one embodiment, the thickness of the copper-doped layer is between 10 and 1000 nm, and the thickness of the separation layer is greater than 0 and less than or equal to 300 nm.

[0010] In one embodiment, the photovoltaic device further comprises: a tellurium layer disposed between the first buffer layer and the absorption layer.

[0011] In one embodiment, the photovoltaic device further comprises: a second buffer layer disposed between the first buffer layer and the absorption layer, the second buffer layer comprising: a first sub-buffer layer and a second sub-buffer layer located between the first sub-buffer layer and the absorption layer, the first sub-buffer layer being a tellurium layer, and the material of the second sub-buffer layer comprising one or more of molybdenum oxide, tungsten oxide, antimony telluride or zinc telluride.

[0012] In one embodiment, the thickness of the tellurium layer is between 10 and 1000 nm, and the thickness of the second sub-buffer layer is greater than 0 and less than or equal to 1000 nm.

[0013] In one embodiment, the light-transmitting conductive layer comprises a first sub-light-transmitting conductive layer and a second sub-light-transmitting conductive layer located between the first sub-light-transmitting conductive layer and the window layer, the first sub-light-transmitting conductive layer being a TCO layer, and the material of the second sub-light-transmitting conductive layer comprising one or more of tin oxide or zinc oxide.

[0014] In one embodiment, the absorption layer is a cadmium telluride layer with a thickness of 1000 to 5000 nm.

[0015] In one embodiment, the thickness of the window layer is between 20 and 300 nm, and the material of the window layer comprises one or more of cadmium sulfide or cadmium selenide.

[0016] In one embodiment, the water vapor barrier layer has a thickness of 100-2000 nm, and the water vapor barrier layer is made of one or more of silicon oxide, titanium nitride, or silicon nitride.

[0017] According to the technical solution of the present application, the first buffer layer is provided in two layers, the copper-doped layer doped with copper is close to the electrode layer, and the separation layer without copper doping is close to the absorption layer. The doping of copper makes the surface of the absorption layer close to the first buffer layer form a p+ layer, so that the potential barrier between the absorption layer and the contact will be narrowed, so that the free carriers can freely tunnel through the potential barrier, thereby obtaining a good ohmic contact. The purpose of providing the separation layer above the copper-doped layer is to make the copper-doped layer farther away from the absorption layer, so as to control the amount of copper, since copper is particularly prone to diffuse at high temperatures, the separation layer can reduce the amount of copper diffusing to the window layer, and ensure the device performance. Therefore, according to the technical solution of the present embodiment, the electrode layer and the absorption layer can form a good ohmic contact, and the window layer is not affected after heat treatment, thereby ensuring the performance of the device and improving the efficiency of the cell.

[0018] In addition to the purposes, features and advantages described above, the present application has other purposes, features and advantages. The present application will be further described below with reference to the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0019] The drawings accompanying the specification of the present application serve to provide further understanding of the present application, and the illustrative embodiments of the present application and their descriptions serve to explain the present application, and do not constitute an improper limitation on the present application. In the drawings:

[0020] Figure 1 A structural schematic diagram of an embodiment of a photovoltaic device according to the present application is shown.

[0021] Among them, the above drawings include the following reference signs:

[0022] 10, flexible substrate layer; 20, water vapor barrier layer; 30, electrode layer; 40, first buffer layer; 41, copper-doped layer; 42, separation layer; 50, second buffer layer; 51, tellurium layer; 52, second sub-buffer layer; 60, absorption layer; 70, window layer; 80, light-transmitting conductive layer; 81, second sub-light-transmitting conductive layer; 82, first sub-light-transmitting conductive layer. DETAILED DESCRIPTION

[0023] It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict. The present application will be described in detail below with reference to the drawings and in combination with the embodiments.

[0024] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate for the embodiments of the invention described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0026] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0027] like Figure 1 As shown, the photovoltaic device of this embodiment includes: a flexible substrate layer 10, a water vapor barrier layer 20, an electrode layer 30, a first buffer layer 40, an absorption layer 60, a window layer 70, and a light-transmitting conductive layer 80 stacked together. The first buffer layer 40 includes: a copper doped layer 41 and a non-copper doped separator layer 42, with the separator layer 42 located between the copper doped layer 41 and the absorption layer 60.

[0028] The technical scheme of the embodiment is applied, the first buffer layer 40 is provided as two layers, the copper-doped layer 41 doped with copper is close to the electrode layer 30, and the separation layer 42 without copper doping is close to the absorption layer 60. The doping of copper makes the surface of the absorption layer 60 close to the first buffer layer 40 form a p+ layer, so that the barrier between the absorption layer 60 and the contact will be narrowed, so that the free carriers can freely tunnel through the barrier, thereby obtaining a good ohmic contact. The purpose of providing the separation layer 42 above the copper-doped layer 41 is to make the copper-doped layer 41 a little farther from the absorption layer 60, so as to control the amount of copper. Since copper is particularly prone to diffusion at high temperatures, the separation layer 42 can reduce the amount of copper diffused to the window layer 70, thereby ensuring the performance of the device. Therefore, by applying the technical scheme of the embodiment, a good ohmic contact can be formed between the electrode layer 30 and the absorption layer 60, and the window layer 70 is not affected after heat treatment, thereby ensuring the performance of the device and improving the efficiency of the battery.

[0029] In the embodiment, the copper-doped layer 41 is a copper-doped molybdenum layer. The copper / molybdenum ratio of the copper-doped molybdenum layer is greater than 0% and less than or equal to 20%. Table 1 is a table of the relationship between the copper / molybdenum ratio of the copper-doped layer 41 and the battery efficiency.

[0030] Table 1 is a table of the relationship between the copper / molybdenum ratio of the copper-doped layer 41 and the battery efficiency.

[0031]

[0032] The first group, the sixth group and the seventh group are comparative examples. From the above table, the following two cases can be seen, the battery efficiency is reduced:

[0033] First, the copper-doped layer 41 is not doped with copper.

[0034] Second, the copper-doped layer 41 is doped with too much copper.

[0035] Therefore, only when the copper / molybdenum ratio of the copper-doped molybdenum layer is within the above predetermined range, the efficiency of the battery is relatively high.

[0036] In the embodiment, the separation layer 42 is a molybdenum layer or a nickel layer.

[0037] In the embodiment, the thickness of the copper-doped layer 41 is between 10 nm and 1000 nm. Table 2 is a table of the relationship between the thickness of the copper-doped layer 41 and the battery efficiency.

[0038] Table 2 is a table of the relationship between the thickness of the copper-doped layer 41 and the battery efficiency.

[0039]

[0040] The 2nd to 4th groups in Table 2 are within the scope of the present embodiment, and the 1st, 5th and 6th groups are comparative examples. As can be seen from the above table, the battery efficiency is reduced when the copper-doped layer 41 is too thick or too thin. The battery efficiency is higher only when the thickness of the copper-doped molybdenum layer is within the above-mentioned predetermined range.

[0041] In the present embodiment, the thickness of the separation layer 42 is greater than 0 nm and less than or equal to 300 nm. Table 3 is a table of the relationship between the thickness of the separation layer 42 and the battery efficiency.

[0042] Table 3 Table of the relationship between the thickness of the separation layer 42 and the battery efficiency

[0043]

[0044] The 2nd to 4th groups in Table 3 are within the scope of the present embodiment, and the 1st, 5th and 6th groups are comparative examples. As can be seen from the above table, the battery efficiency is reduced in the following two cases:

[0045] First, the separation layer 42 is not provided.

[0046] Second, the thickness of the separation layer 42 is too thick.

[0047] Therefore, the battery efficiency is higher only when the thickness of the separation layer 42 is within the above-mentioned predetermined range.

[0048] As Figure 1 shown in the present embodiment, the photovoltaic device further includes a second buffer layer 50 provided between the first buffer layer 40 and the absorption layer 60, the second buffer layer 50 including a first sub-buffer layer and a second sub-buffer layer 52 located between the first sub-buffer layer and the absorption layer 60, the first sub-buffer layer being a tellurium layer 51, and the material of the second sub-buffer layer 52 including one or more of molybdenum oxide, tungsten oxide, antimony telluride or zinc telluride. In the above structure, the second buffer layer 50 constitutes a p-type semiconductor with high electron affinity and high conductivity, which can more easily contact the absorption layer 60 and reduce resistance, thereby obtaining better battery performance. Table 4 is a table of the relationship between the provision of the second buffer layer 50 and the battery efficiency.

[0049] Table 4 Table of the relationship between the provision of the second buffer layer 50 and the battery efficiency

[0050] As can be seen from the above table, the provision of the second buffer layer 50 can effectively improve the battery efficiency relative to the scheme in which the second buffer layer 50 is not provided.

[0051] Is the second buffer layer 50 provided? Yes No Battery efficiency % 18.61 18.12

[0052] Of course, in other embodiments, the second buffer layer 50 can only include a tellurium layer 51 provided between the first buffer layer 40 and the absorption layer 60.

[0053] In this embodiment, the thickness of the tellurium layer 51 is between 10 nm and 1000 nm, and the thickness of the second sub-buffer layer 52 is greater than 0 nm and less than or equal to 1000 nm.

[0054] Table 5. Relationship between the thickness of each layer of the second buffer layer 50 and battery efficiency.

[0055]

[0056] In Table 5, groups 1 to 5 are within the scope of this embodiment, while groups 6 to 8 are comparative examples. As can be seen from the table above, the battery efficiency is only high when the thickness of each layer of the second buffer layer 50 is within the aforementioned preset range.

[0057] like Figure 1 As shown, in this embodiment, the light-transmitting conductive layer 80 includes a first sub-light-transmitting conductive layer 82 and a second sub-light-transmitting conductive layer 81 located between the first sub-light-transmitting conductive layer 82 and the window layer 70. The first sub-light-transmitting conductive layer 82 is a TCO layer, and the material of the second sub-light-transmitting conductive layer 81 includes one or more of tin oxide or zinc oxide. In this embodiment, the second sub-light-transmitting conductive layer 81 is a high-resistivity layer. The above structure makes it difficult for current to be conducted even if pinhole defects exist. Preferably, in this embodiment, the material of the first sub-light-transmitting conductive layer 82 is aluminum-doped zinc oxide, and the sheet resistance is between 5 and 50 ohms.

[0058] In this embodiment, the absorber layer 60 is a cadmium telluride layer with a thickness between 1000 and 5000 nm. The absorber layer can be treated with high-temperature CdCl2 to increase the grain size.

[0059] In this embodiment, the thickness of the window layer 70 is between 20 and 300 nm, and the material of the window layer 70 includes one or more of cadmium sulfide or cadmium selenide.

[0060] In this embodiment, the water vapor barrier layer 20 is used to block water and oxygen, protecting the device. The thickness of the water vapor barrier layer 20 is between 100 nm and 2000 nm, and the material of the water vapor barrier layer 20 is one or more of silicon oxide, titanium nitride, or silicon nitride.

[0061] It should be noted that, in this embodiment, the flexible substrate layer 10 can be a metal foil or a plastic substrate. The thickness of the electrode layer 30 is between 100 and 2000 nm, and the electrode layer 30 can be a metal layer, preferably a nickel layer or a molybdenum layer.

[0062] The foregoing is considered as illustrative only of the principles of the application. Further, since numerous modifications and changes will readily occur to those skilled in the art, it is not desired to limit the application to the exact construction and operation described. Accordingly, all such variations are intended to be included within the scope of the present application as defined in the claims. The application is also not limited to the details of the foregoing embodiment.

[0063] For purposes of the description hereinafter, the terms "upper", "lower", "right", "left", "vertical", "horizontal", "top", "bottom", and derivatives thereof shall relate to the application as it is oriented in use. There can be other embodiments of the application which are not explicitly described or illustrated. It is intended that each embodiment and variant thereof covers all those and only those variations or modifications which fall within the scope of the present application. Thus, the present application is not to be limited to the specific forms set forth herein, but on the contrary, it is intended to cover such alternatives, modifications, and equivalents, as can be included within the spirit and scope of the application. The summary of the application and the abstract are provided to comply with 37 C.F.R. § 1.72 and are submitted with the understanding that they will not be used to interpret or limit the scope or meaning of the claims. In this connection, the claims are intended to cover all of the legitimate equivalents of the specific features recited therein.

[0064] In the description of the present application, it is to be understood that the specific structural or functional details disclosed herein are representative, but do not serve to limit the scope of the underlying claims. Furthermore, the terms and phrases used herein are not intended to exclude the broader scope to the concepts described herein. It is also to be understood that the terminology used herein is for the purpose of describing only the particular embodiments of the application and is not intended to be limiting. In addition, it should be noted that in the development of this application, that numerous implementation-specific decisions can be made to achieve the developer's specific goals, such as compliance with system-related, business-related, governmental-related and other constraints, which will vary from one implementation to another. Moreover, it is understood that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure.

[0065] The specific embodiments of the present application have been shown and described for the purposes of illustrating the principles of and the best mode of practicing the application. Since the application can be implemented other ways, the application should not be limited by the embodiments shown but should be limited only by the claims.

Claims

1. A photovoltaic device, characterized in that, include: The photovoltaic device comprises a flexible substrate layer (10), a moisture barrier layer (20), an electrode layer (30), a first buffer layer (40), an absorption layer (60), a window layer (70), and a light-transmitting conductive layer (80) stacked together. The first buffer layer (40) includes a copper-doped layer (41) and a copper-free separator layer (42). The separator layer (42) is located between the copper-doped layer (41) and the absorption layer (60). The copper-doped layer (41) is a copper-doped molybdenum layer; and / or, the separator layer (42) is a molybdenum layer or a nickel layer. The copper / molybdenum ratio of the copper-doped molybdenum layer is greater than 0% and less than or equal to 20%. The thickness of the copper-doped layer (41) is between 10 and 1000 nm, and the thickness of the separator layer (42) is greater than 0 nm and less than or equal to 300 nm. The photovoltaic device further includes: A second buffer layer (50) is disposed between the first buffer layer (40) and the absorber layer (60). The second buffer layer (50) includes a first sub-buffer layer and a second sub-buffer layer (52) located between the first sub-buffer layer and the absorber layer (60). The first sub-buffer layer is a tellurium layer (51). The material of the second sub-buffer layer (52) includes one or more of molybdenum oxide, tungsten oxide, antimony telluride, or zinc telluride. The absorber layer (60) is a cadmium telluride layer with a thickness between 1000 and 5000 nm. The thickness of the window layer (70) is between 20 and 300 nm. The material of the window layer (70) includes one or more of cadmium sulfide or cadmium selenide.

2. The photovoltaic device according to claim 1, characterized in that, The thickness of the tellurium layer (51) is between 10 and 1000 nm, and the thickness of the second sub-buffer layer (52) is greater than 0 and less than or equal to 1000 nm.

3. The photovoltaic device according to claim 1, characterized in that, The light-transmitting conductive layer (80) includes a first sub-light-transmitting conductive layer (82) and a second sub-light-transmitting conductive layer (81) located between the first sub-light-transmitting conductive layer (82) and the window layer (70). The first sub-light-transmitting conductive layer (82) is a TCO layer, and the material of the second sub-light-transmitting conductive layer (81) includes one or more of tin oxide or zinc oxide.

4. The photovoltaic device according to claim 1, characterized in that, The thickness of the water vapor barrier layer (20) is between 100 and 2000 nm, and the material of the water vapor barrier layer (20) is one or more of silicon oxide, titanium nitride, or silicon nitride.

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