Media access control circuit and packet management method

Abstract

This application discloses a media access control circuit and a packet management method. The media access control circuit is coupled to a physical layer circuit and includes a storage circuit, a receiving circuit, a checking circuit, and a protection circuit. The storage circuit stores a first value and a second value. The receiving circuit receives a packet from the physical layer circuit. The checking circuit checks the packet. The protection circuit performs the following steps: updating the first value according to a clock; and discarding the packet when the absolute difference between the first value and a reference value is less than the second value. This reduces the load on the main circuitry.

Description

TECHNICAL FIELD

[0001] The present application relates to a network, and in particular, to a media access control (MAC) and packet management method. BACKGROUND

[0002] Figure 1 An electronic device in the prior art is shown. The main circuit 110 receives or sends packets from / to the network 150 (e.g., an Ethernet network) through the media access control circuit 120, the physical layer circuit 130, and the transformer 140. However, in some cases (e.g., device failure or under attack), the electronic device can receive a large number of packets, causing the load of the main circuit 110 to increase, thereby causing the user experience to decrease or even causing the electronic device to fail. SUMMARY

[0003] In view of the deficiencies of the prior art, one purpose of the present application is to provide a media access control circuit and a packet management method to improve the deficiencies of the prior art.

[0004] One embodiment of the present application provides a media access control circuit. The media access control circuit is coupled to a physical layer circuit and includes a storage circuit, a receiving circuit, a checking circuit, and a protection circuit. The storage circuit is configured to store a first value and a second value. The receiving circuit is configured to receive a packet from the physical layer circuit. The checking circuit is configured to check the packet. The protection circuit is configured to perform the following steps: updating the first value according to a clock; and discarding the packet when an absolute difference between the first value and a reference value is less than the second value.

[0005] Another embodiment of the present application provides a packet management method applied to a media access control circuit. The media access control circuit is coupled to a physical layer circuit and includes a storage circuit configured to store a first value, a second value, and a reference value. The packet management method includes: updating the first value according to a clock; receiving a packet from the physical layer circuit; checking the packet; and discarding the packet when an absolute difference between the first value and the reference value is less than the second value.

[0006] The technical means embodied by the embodiments of the present application can improve at least one of the shortcomings of the prior art, so that the present application can improve the user experience and / or avoid electronic device failure compared with the prior art.

[0007] The technical solution provided by the embodiments of the present application can detect the received packet by the detection circuit, check the packet, and discard the packet by the protection circuit when it is determined that the packet does not need to be processed according to the first value and the second value, thereby reducing the load caused by a large number of packets. Attached Figure Description

[0008] The features, instances, and effects of this invention are described in detail below with reference to the accompanying drawings.

[0009] Figure 1 Displaying electronic devices in the prior art;

[0010] Figure 2 A functional block diagram showing an embodiment of the electronic device of the present invention;

[0011] Figure 3 A functional block diagram showing one embodiment of the protection circuit of the present invention is displayed;

[0012] Figure 4 This shows a functional block diagram of one embodiment of the token control circuit of the present invention;

[0013] Figure 5 This is a flowchart of one embodiment of the packet management method of the present invention;

[0014] Figure 6 This invention displays the target number of tokens, token consumption, step value, token base value, and number of packets discarded for several types of packets.

[0015] Figure 7 yes Figure 5 Detailed steps of steps S534 and S542; and

[0016] Figure 8 This is an operational embodiment of the media access control circuit and packet management method of the present invention. Detailed Implementation

[0017] The technical terms used in the following description are based on the customary terms in this technical field. If this specification provides explanations or definitions for certain terms, the explanations or definitions in this specification shall prevail.

[0018] The present invention discloses a media access control circuit and a packet management method. Since some components of the media access control circuit described in this invention may be known individually, details of known components will be omitted in the following description without affecting the full disclosure and implementability of the device invention. Furthermore, some or all of the processes of the packet management method of this invention may be in the form of software and / or firmware, and can be executed by the media access control circuit described in this invention or its equivalent. Without affecting the full disclosure and implementability of the method invention, the following description of the method invention will focus on the steps rather than the hardware.

[0019] Figure 2A function block diagram of an embodiment of the electronic device is shown. The electronic device 200 includes a media access control circuit 201, a computing circuit 202, a physical layer circuit 203, and an external memory 204. The electronic device 200 accesses a network through the media access control circuit 201 and the physical layer circuit 203. The media access control circuit 201 is coupled to the physical layer circuit 203 through a transmission interface 205 to transmit and receive data through the physical layer circuit 203. The transmission interface 205 includes, but is not limited to, a media-independent interface (MII), a reduced media-independent interface (RMII), a gigabit media-independent interface (GMII), or a reduced gigabit media-independent interface (RGMII).

[0020] The computing circuit 202 can be a circuit or an electronic element with program execution capability, such as a central processing unit, a microprocessor, a micro-processing unit, a digital signal processor, an application specific integrated circuit (ASIC), or an equivalent circuit. The computing circuit 202 implements all or part of the functions of the electronic device 200 by executing program codes and / or program instructions stored in the external memory 204 (e.g., a dynamic random access memory (DRAM)).

[0021] The media access control circuit 201 includes a direct memory access (DMA) circuit 210, a packet generation circuit 220, a transmission circuit 225, a clock generation circuit 230, a reception circuit 242, a check circuit 244, a protection circuit 246, and a storage circuit 250. The storage circuit 250 includes a memory 252 (e.g., a static random access memory (SRAM)) and a setting circuit 254 (e.g., a register). The media access control circuit 201 is used to copy or migrate data from the external memory 204 to the memory 252, or from the memory 252 to the external memory 204.

[0022] The computing circuit 202 is coupled to the external memory 204 and the setting circuit 254 through a memory bus to access the external memory 204 and the setting circuit 254 (e.g., to change the setting value of the setting circuit 254).

[0023] The packet generation circuit 220, the transmission circuit 225, the reception circuit 242, the check circuit 244 and the protection circuit 246 are coupled to the setting circuit 254, and these circuits operate according to the setting values (e.g. temporary values) in the setting circuit 254. In other words, the calculation circuit 202 can control the media access control circuit 201 by changing the setting values of the setting circuit 254. On the other hand, the media access control circuit 201 can also transmit an interrupt Intr to the calculation circuit 202 by changing the setting values of the setting circuit 254. For the sake of brevity, Figure 2 The setting circuit 254 and the connections between the setting circuit 254 and the packet generation circuit 220, the transmission circuit 225, the reception circuit 242, the check circuit 244 and the protection circuit 246 are omitted.

[0024] When the media access control circuit 201 transmits data, the packet generation circuit 220 first encapsulates the data into a packet, and then the transmission circuit 225 transmits the packet to the physical layer circuit 203 through the transmission interface 205.

[0025] When the media access control circuit 201 receives data, the reception circuit 242 receives the packet PT from the physical layer circuit 203 through the transmission interface 205, the check circuit 244 checks the packet PT (including but not limited to length check and legality check of cyclic redundancy check (CRC)), and then the protection circuit 246 decides whether the packet PT can be accessed by the calculation circuit 202. More specifically, when the protection circuit 246 decides that the packet PT can be accessed by the calculation circuit 202, the protection circuit 246 stores the packet PT in the memory 252 of the storage circuit 250, and then the direct memory access circuit 210 copies or migrates the packet PT to the external memory 204 for the calculation circuit 202 to read; on the other hand, when the protection circuit 246 decides that the packet PT cannot be accessed by the calculation circuit 202, the protection circuit 246 discards the packet PT. The detailed operation process of the protection circuit 246 will be described below in conjunction with Figure 3 and Figure 5 Explanation.

[0026] Figure 3A function block diagram of one embodiment of the protection circuit of the present application is shown. The protection circuit 246 includes a packet type checking circuit 310, a broadcast token control circuit 320, a multicast token control circuit 330, and a unicast token control circuit 340. The packet type checking circuit 310 determines the type of the packet PT (e.g., a broadcast packet, a multicast packet, or a unicast packet) according to the content (e.g., specific bits) of the packet PT, and transmits the packet PT to the corresponding token control circuit according to the type of the packet PT. Those skilled in the art can implement the packet type checking circuit 310 according to the definition or specification of the broadcast packet, the multicast packet, and the unicast packet, and thus the details are not described herein.

[0027] Figure 4 A function block diagram of one embodiment of the token control circuit of the present application is shown. Figure 3 Any of the broadcast token control circuit 320, the multicast token control circuit 330, and the unicast token control circuit 340 can be instantiated by the token control circuit 400. Figure 4 The token control circuit 400 includes a determination circuit 410 and a counting circuit 420. The determination circuit 410 and the counting circuit 420 can be instantiated by digital logic circuits.

[0028] The determination circuit 410 controls the counting circuit 420 to update the current token number Tc according to the clock CLK, the current token number Tc, the token reference value Tc ini, the token consumption number Tc csm, the step value Tc step, and the target token number Tc tar.

[0029] In the first embodiment, the target token number Tc tar is greater than the token reference value Tc ini. In the second embodiment, the target token number Tc tar is less than the token reference value Tc ini.

[0030] When the determination circuit 410 detects the rising edge and / or the falling edge of the clock CLK and the current token number Tc is less than (in the first embodiment) or greater than (in the second embodiment) the target token number Tc tar, the determination circuit 410 controls the counting circuit 420 to increase (in the first embodiment) or decrease (in the second embodiment) the current token number Tc by one step value Tc step (e.g., 1). In other words, in the first embodiment, the minimum value and the maximum value of the current token number Tc are the token reference value Tc ini and the target token number Tc tar, respectively; in the second embodiment, the minimum value and the maximum value of the current token number Tc are the target token number Tc tar and the token reference value Tc ini, respectively.

[0031] In some embodiments, the clock CLK is an internal clock CLK mac of the medium access control circuit 201. In other embodiments, the clock CLK is a clock CLK phy inherent to the transmission interface 205 itself. Using the clock CLK phy can simplify the design of the electronic device 200 (as no additional clock needs to be generated) and improve the accuracy of the electronic device 200 in packet counting (as the clock CLK phy and the packet PT belong to the same clock domain) compared to the internal clock CLK mac.

[0032] When the determination circuit 410 receives the packet PT, the determination circuit 410 judges whether the absolute difference between the current token number Tc and the token reference value Tc ini is greater than or equal to the token consumption number Tc csm. If yes, the determination circuit 410 controls the counting circuit 420 to subtract the token consumption number Tc csm from the current token number Tc (i.e., Tc = Tc - Tc csm, first embodiment) or to add the token consumption number Tc csm to the current token number Tc (i.e., Tc = Tc + Tc csm, second embodiment), and sends an interrupt Intr to the calculation circuit 202. If no, the determination circuit 410 discards the packet PT.

[0033] Please refer to Figure 5 , Figure 5 is a flowchart of one embodiment of the packet management method of the present application, which includes the following steps. Please note that the broadcast token control circuit 320, the groupcast token control circuit 330, and the unicast token control circuit 340 all use the flowchart of Figure 5 , but can have their own target token number Tc tar, token consumption number Tc csm, step value Tc step, token reference value Tc ini, and discarded packet number N drop, as shown in Figure 6 .

[0034] Step S505: initialization step, the determination circuit 410 sets the current token number Tc to the token reference value Tc ini (e.g., 0) and the discarded packet number N drop to the initial value (e.g., 0).

[0035] Step S512: the determination circuit 410 receives the clock CLK, and when the clock CLK undergoes a level transition, it performs step S514.

[0036] Step S514: The determination circuit 410 determines whether the absolute difference between the current token number Tc and the target token number Tc_tar is greater than the step value Tc_step. If yes (i.e., Tc_tar-Tc>Tc_step (first embodiment) or Tc-Tc_tar>Tc_step (second embodiment)), step S516 is performed; if no (indicating that the current token number Tc has reached or is close to the target token number Tc_tar), step S512 is returned.

[0037] Step S516: The token control circuit 400 updates the current token number Tc according to the step value Tc_step. More specifically, the determination circuit 410 controls the counting circuit 420 to increase the current token number Tc by the step value Tc_step (i.e., Tc=Tc+Tc_step, first embodiment) or decrease the current token number Tc by the step value Tc_step (i.e., Tc=Tc-Tc_step, second embodiment). In some embodiments, the step value Tc_step is 1.

[0038] In short, after the initialization step S505, the token control circuit 400 adjusts the current token number Tc according to the clock CLK (steps S512-S516) and manages the packets (transmitting the packets to the computing circuit 202 or discarding the packets, i.e., steps S522-S546 discussed below) on the one hand.

[0039] Step S522: The protection circuit 246 receives a packet PT. As shown, this packet PT has been checked by the checking circuit 244. Figure 2

[0040] Step S524: The packet type checking circuit 310 identifies the packet type, i.e., determines whether the packet PT is a broadcast packet, a groupcast packet, or a unicast packet according to the content of the packet PT.

[0041] Step S526: The packet type checking circuit 310 determines whether the packet type needs to be filtered. More specifically, the computing circuit 202 can decide which types of packets need to be filtered and / or which types of packets do not need to be filtered by controlling the setting circuit 254. For example, in the case where broadcast packets need to be filtered and groupcast and unicast packets do not need to be filtered, when the packet PT is not a broadcast packet, the protection circuit 246 transmits the packet PT to the computing circuit 202 (i.e., step S532 is performed); when the packet PT is a broadcast packet, the protection circuit 246 performs step S528.

[0042] ​Step S528: The protection circuit 246 judges whether the packet PT is a packet of a Virtual Local Area Network (VLAN). More specifically, when the packet PT is not a packet of a VLAN, the protection circuit 246 transmits the packet PT to the computing circuit 202 (i.e., step S532 is executed) ; when the packet PT is a packet of a VLAN, the protection circuit 246 executes step S534.

[0043] Step S532: The protection circuit 246 stores the packet PT in the memory 252 and notifies the computing circuit 202 of an interrupt Intr, and then returns to step S522 to receive the next packet. Since the packet PT stored in the memory 252 is copied or migrated to the external memory 204 by the direct memory access circuit 210, the protection circuit 246 is equivalent to storing the packet PT in the external memory 204 in step S532, and the computing circuit 202 can read the packet PT from the external memory 204 in response to the interrupt.

[0044] Step S534: The token control circuit 400 acquires the token consumption number Tc_csm. Details of this step will be described below in cooperation with Figure 7 the description of the token control circuit 400.

[0045] Step S540: The determination circuit 410 judges whether the absolute difference between the current token number Tc and the token reference value Tc_ini is greater than or equal to the token consumption number Tc_csm (i.e., whether the current token number Tc is sufficient). If yes (i.e., the current token number Tc is sufficient), the current token number Tc is updated in accordance with the token consumption number Tc_csm (step S542) and the packet is transmitted to the computing circuit 202 (step S532) ; if no, the packet is discarded (steps S544, S546).

[0046] Step S542: The determination circuit 410 controls the counting circuit 420 to update the current token number Tc to Tc=Tc-Tc_sum (first embodiment) or Tc=Tc+Tc_sum (second embodiment). Details of this step will be described below in cooperation with Figure 7 the description of the counting circuit 420.

[0047] Step S544: The determination circuit 410 updates the discarded packet number N_drop, for example, by adding 1 to the discarded packet number N_drop.

[0048] Step S546: The protection circuit 246 discards the packet PT, i.e., does not store the packet PT into the memory 252, which is equivalent to not allowing the packet PT to be stored into the external memory 204, and is also equivalent to not transmitting the packet PT to the computing circuit 202; therefore, the computing circuit 202 cannot obtain the packet PT. After step S546, the flow returns to step S522 to receive the next packet.

[0049] Please refer to Figure 7 , Figure 7 Step S534 and step S542 are detailed steps. Here, it is assumed that the current token number Tc is sufficient (i.e., the determination of step S540 is YES).

[0050] The packet type checking circuit 310 first determines whether the packet PT is a broadcast packet, a groupcast packet, or a unicast packet (step S534_1).

[0051] When the packet PT is a broadcast packet, the broadcast token control circuit 320 obtains the broadcast token consumption number Tc_csm1 from the storage circuit 250 (step S534_2), and then the counting circuit 420 of the broadcast token control circuit 320 updates the current token number Tc1 of the broadcast packet to Tc1-Tc_csm1 (Embodiment 1) or Tc1+Tc_csm1 (Embodiment 2) in step S542_2.

[0052] When the packet PT is a groupcast packet, the groupcast token control circuit 330 obtains the groupcast token consumption number Tc_csm2 from the storage circuit 250 (step S534_4), and then the counting circuit 420 of the groupcast token control circuit 330 updates the current token number Tc2 of the groupcast packet to Tc2-Tc_csm2 (Embodiment 1) or Tc2+Tc_csm2 (Embodiment 2) in step S542_4.

[0053] When the packet PT is a unicast packet, the unicast token control circuit 340 obtains the unicast token consumption number Tc_csm3 from the storage circuit 250 (step S534_6), and then the counting circuit 420 of the unicast token control circuit 340 updates the current token number Tc3 of the unicast packet to Tc3-Tc_csm3 (Embodiment 1) or Tc3+Tc_csm3 (Embodiment 2) in step S542_6.

[0054] From the above description, when the current token number Tc is the target token number Tc_tar, the protection circuit 246 allows the computing circuit 202 to continuously receive at most M packets, M=(Tc_tar-Tc_ini) / Tc_csm (Embodiment 1) or M=(Tc_ini-Tc_tar) / Tc_csm (Embodiment 2). Details are shown in the flow of Figure 8 ​

[0055] Step S810: The protection circuit 246 continuously receives M packets.

[0056] Step S820: The protection circuit 246 allows the M packets to be accessed by the computing circuit 202, i.e., the M packets are stored in the external memory 204, which is equivalent to performing M times of the step S532. Figure 5

[0057] Steps S810-S820 are equivalent to continuously performing M times of the steps S522-S542 until the determination of the step S540, i.e., until Tc-Tc_ini<Tc_csm (Embodiment One) or Tc_ini-Tc<Tc_csm (Embodiment Two). Figure 5

[0058] Step S830: The protection circuit 246 discards the next packet of the M packets, i.e., does not allow the next packet of the M packets to be transmitted to the computing circuit 202. Since the continuous M packets have consumed all or almost all of the current token number Tc in the steps S810 and S820, the protection circuit 246 discards the next packet (i.e., the steps S544, S546) to protect the computing circuit 202.

[0059] Figure 8 is an operational embodiment of the media access control circuit and the packet management method of the present application, which illustrates how the protection circuit 246 prevents the computing circuit 202 from continuously receiving more than M packets. In other words, the maximum number of packets that the computing circuit 202 can continuously receive at a moment is M, and the manufacturer, developer or user of the electronic device 200 can change the value of M by adjusting the token reference value Tc_ini, the target token number Tc_tar and / or the token consumption number Tc_csm.

[0060] For example, assuming that the token consumption number Tc_csm=40,000 and Tc_ini=40000, for a 100M Ethernet network using the media-independent interface (the receiving clock is 25MHz), the computing circuit 202 can receive at most 625 (=25M / 40000) packets per second, and at most 1000 packets continuously at a moment; for a 100M Ethernet network using the reduced media-independent interface (the receiving clock is 50MHz), the computing circuit 202 can receive at most 1250 (=50M / 40000) packets per second, and at most 1000 packets continuously at a moment.

[0061] ​​In some embodiments, the current token number Tc, the step value Tc_step, the token consumption number Tc_csm, the target token number Tc_tar, the token reference value Tc_ini, and the discarded packet number N_drop described above can be stored in the storage circuit 250.

[0062] In other embodiments, Figure 5 Step S526 can be performed by the checking circuit 244 instead of the protection circuit 246. When the checking circuit 244 determines that the type of the packet PT is a packet type that does not need to be filtered, the checking circuit 244 directly performs step S532, so that the protection circuit 246 does not need to process the packet PT.

[0063] Although the above embodiments take broadcast packets, groupcast packets, and unicast packets as examples, this is not a limitation of the present application. Those skilled in the art can appropriately apply the present application to other types of packets according to the disclosure of the present application.

[0064] Although the embodiments of the present application are described above, these embodiments are not intended to limit the present application. Those skilled in the art can make changes to the technical features of the present application according to the explicit or implicit content of the present application. Any such changes can fall within the scope of the patent protection sought by the present application. In other words, the scope of the patent protection of the present application should be determined according to the scope of the patent application defined in the specification.

[0065]

Symbol Description

[0066] 110: main circuit;

[0067] 120, 201: medium access control circuit;

[0068] 130, 203: physical layer circuit;

[0069] 140: transformer;

[0070] 150: network;

[0071] 200: electronic device;

[0072] 202: calculation circuit;

[0073] 204: external memory;

[0074] 205: transmission interface;

[0075] 210: direct memory access circuit;

[0076] 220: packet generation circuit;

[0077] 225: transmission circuit;

[0078] 230: clock generation circuit

[0079] 242: reception circuit

[0080] 244: inspection circuit

[0081] 246: protection circuit

[0082] 250: storage circuit

[0083] 252: memory

[0084] 254: setting circuit

[0085] Intr: interrupt

[0086] PT: packet

[0087] CLK, CLK_mac, CLK_phy: clock

[0088] 310: packet type inspection circuit

[0089] 320: broadcast token control circuit

[0090] 330: groupcast token control circuit

[0091] 340: unicast token control circuit

[0092] 400: token control circuit

[0093] 410: determination circuit

[0094] 420: counting circuit

[0095] Tc_tar: target token number

[0096] Tc: current token number

[0097] Tc_step: step value

[0098] Tc_csm: token consumption number

[0099] N_drop: number of discarded packets

[0100] Tc_ini: token reference value

[0101] Tc_csm1: broadcast token consumption number

[0102] Tc1: current token number of broadcast packet

[0103] Tc_csm2: groupcast token consumption number

[0104] Tc2: current token number of groupcast packet

[0105] Tc_csm3: number of consumed tokens for unicast;

[0106] Tc3: current number of tokens for unicast packets;

[0107] S505, S512, S514, S516, S522, S524, S526, S528, S532, S534, S540, S542, S544, S546, S810, S820, S830, S534_1, S534_2, S534_4, S534_6, S542_2, S542_4, S542_6: step.

Claims

1. A medium access control circuit, characterized by, a physical layer circuit coupled to the media access control circuit, the physical layer circuit comprising: a storage circuit configured to store a first value and a second value; a receiving circuit configured to receive a packet from the physical layer circuit; a checking circuit configured to check the packet; and a protection circuit configured to: update the first value according to a clock; and discard the packet when an absolute difference between the first value and a reference value is less than the second value. The media access control circuit is further coupled to a computing circuit, and the protection circuit is further configured to: allow the packet to be accessed by the computing circuit and update the first value according to the second value when the absolute difference between the first value and the reference value is greater than or equal to the second value.

2. The medium access control circuit of claim 1, wherein, The media access control circuit is further coupled to an external memory, and the method further comprises:

3. The medium access control circuit of claim 1, wherein, storing the packet to the external memory and transmitting an interrupt to the computing circuit when the absolute difference between the first value and the reference value is greater than or equal to the second value.

4. The medium access control circuit of claim 3, wherein, The protection circuit is further configured to:

5. The medium access control circuit of claim 4, wherein, stop updating the first value according to the clock when the first value is equal to a target value.

6. The medium access control circuit of claim 1, wherein, The protection circuit is further configured to:

7. The medium access control circuit of claim 1, wherein, allow at most M consecutive packets to be accessed by the computing circuit, M being a quotient of an absolute difference between the target value and the reference value divided by the second value. The protection circuit is further configured to: discard a next packet of the M consecutive packets.

8. The medium access control circuit of claim 7, wherein, The step of updating the first value according to the second value comprises updating the first value to a difference between the first value and the second value or a sum of the first value and the second value.

9. The medium access control circuit of claim 1, wherein, The protection circuit is further configured to:

10. A packet management method, characterized by, determine a packet type of the packet; and determine the second value according to the packet type of the packet. The packet type comprises a broadcast packet, a groupcast packet, and a unicast packet. The media access control circuit is coupled to the physical layer circuit through a transport interface, and the media access control circuit receives the clock from the transport interface. A method applied to a media access control circuit coupled to a physical layer circuit and comprising a storage circuit configured to store a first value, a second value, and a reference value, the method comprising: updating the first value according to a clock; receiving a packet from the physical layer circuit; 11. The packet management method of claim 10, wherein, checking the packet; and discarding the packet when an absolute difference between the first value and the reference value is less than the second value.

12. The packet management method of claim 10, wherein, The media access control circuit is further coupled to a computing circuit, and the method further comprises: allowing the packet to be accessed by the computing circuit and updating the first value according to the second value when the absolute difference between the first value and the reference value is greater than or equal to the second value.

13. The packet management method of claim 12, wherein, The media access control circuit is further coupled to an external memory, and the method further comprises: storing the packet to the external memory and transmitting an interrupt to the computing circuit when the absolute difference between the first value and the reference value is greater than or equal to the second value. The method further comprises: stopping updating the first value when the first value is equal to a target value. The method further comprises: allowing at most M consecutive packets to be accessed by the computing circuit, M being a quotient of an absolute difference between the target value and the reference value divided by the second value. The method further comprises: discarding a next packet of the M consecutive packets. The step of updating the first value according to the second value comprises updating the first value to a difference between the first value and the second value or a sum of the first value and the second value. The method further comprises: determining a packet type of the packet; and determining the second value according to the packet type of the packet. The packet type comprises a broadcast packet, a groupcast packet, and a unicast packet. The media access control circuit is coupled to the physical layer circuit through a transport interface, and the media access control circuit receives the clock from the transport interface. allowing up to M consecutive packets to be accessed by the computing circuit, M being equal to an absolute difference between the target value and the reference value divided by the second value.

14. The packet management method of claim 13, wherein, Further comprising: discarding a next packet of the M packets.

15. The packet management method of claim 10, wherein, The step of updating the first value according to the second value comprises updating the first value to a difference between the first value and the second value or a sum of the first value and the second value.

16. The packet management method of claim 10, wherein, Further comprising: identifying a packet type of the packet; and determining the second value according to the packet type of the packet.

17. The packet management method of claim 16, wherein, The packet type comprises a broadcast packet, a groupcast packet, and a unicast packet.

18. The packet management method of claim 10, wherein, The media access control circuit is coupled to the physical layer circuit through a transport interface, and the media access control circuit receives the clock from the transport interface.

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