A method for preparing a thermally isolated MEMS chip and its structure

Abstract

The present invention provides a method for preparing a thermal isolation MEMS chip and its structure, which includes taking a silicon wafer, setting a first and a second thermal insulation dielectric film on the silicon wafer, and preparing a connected groove body and an inner cavity on the back of the silicon wafer through multiple steps, thereby forming a variable diameter hole whose upper end is connected to the second thermal insulation dielectric film, thereby completing the preparation of a miniaturized MEMS thermal isolation chip structure. Provided is a miniaturized MEMS thermal isolation chip structure with a small opening and a large inner cavity and a preparation method, which reduces the requirements on the processing equipment capacity while keeping the chip area small, has a simple process, and is suitable for the final design and manufacture of MEMS thermal isolation chips.

Description

Technical field:

[0002] The invention relates to the field of micro-mechanical electronic technology, in particular to a method for preparing a thermal isolation MEMS chip and a structure thereof. Background technology:

[0004] MEMS is the abbreviation of Micro Electro Mechanical System, which is a system that integrates microcircuits and micromechanics on a chip according to functional requirements. MEMS components have the advantages of small size, low cost, high reliability, low power consumption, high intelligence, easy calibration and integration, and are widely used in aerospace, medical, industrial production and various consumer products.

[0005] Thermopile chips and heat flow chips manufactured using MEMS technology, micro-hotplate chips used in MEMS gas sensor manufacturing and other products are all prepared based on a micro-nano thermal insulation structure, which is a dielectric film, and the silicon substrate underneath has been completely removed. For example, in the thermopile chip structure, the thermocouple structure is located on a closed thermal insulation film, wherein the part located on the thermal insulation film is the hot end, and the part connected to the silicon substrate is the cold end, forming a temperature difference thermocouple structure. MEMS gas sensors and thermal flow sensors usually work in a certain temperature environment, therefore, a micro-heating structure is required to keep the sensor in working condition. The prior art is to form a micro-nano membrane bridge thermal insulation structure through MEMS technology to form a micro-heating structure.

[0006] At present, the MEMS thermal insulation chip structure is generally formed by removing the silicon substrate under the dielectric film and taking advantage of the low thermal conductivity of the dielectric film. The MEMS thermal insulation chip structure is generally prepared by two methods, one is the dry deep silicon etching process, and the other is the wet etching process. The dry deep silicon etching process is a through-type single-chip etching, which has high requirements on the equipment processing capability and low processing efficiency; the wet etching process is limited by the crystal orientation of the silicon material, and the cross-section of the etching window 10 can only be a trapezoid (such as Figure 1 As shown), that is, a larger process window 11 needs to be opened from the back of the silicon wafer 8, and the designed thermal insulation film structure 9 can only be obtained after the silicon is etched to the bottom, resulting in a significant increase in the chip area. Summary of the invention:

[0008] The present invention aims to overcome the deficiencies in the prior art and provide a method for preparing a thermal isolation MEMS chip and a structure thereof.

[0009] This application provides the following technical solutions:

[0010] A method for preparing a thermal isolation MEMS chip, characterized in that it comprises the following steps: S1, taking a silicon wafer, and preparing a first and a second thermal isolation dielectric film on the front and back surfaces of the silicon wafer respectively;

[0011] S2, preparing a groove of a certain depth on the back of the silicon wafer by photolithography and dry etching;

[0012] S3, oxide layers are prepared on the front and back surfaces of the silicon wafer, respectively, and the oxide layer on the back surface of the silicon wafer 1 covers the side wall and bottom surface of the groove body;

[0013] S4, removing the oxide layer on the lower surface of the silicon wafer and the bottom surface of the tank body, and retaining the oxide layer on the side wall of the tank body;

[0014] S5, wet etching is performed on the silicon wafer 1 to etch an inner cavity from the bottom surface of the tank body inwards, and the top opening of the inner cavity is connected to the first thermal insulation dielectric film;

[0015] S6. Apply glue to the front side of the wafer processed in step S5 for protection, and perform wet etching to remove the oxide layer on the side wall of the groove to complete the preparation of the final miniaturized MEMS thermal insulation chip structure.

[0016] On the basis of the above technical solutions, there are also the following further technical solutions:

[0017] The first and second thermal insulation dielectric films in S1 are oxide layers or silicon nitride, and the first and second thermal insulation dielectric films are made of different materials.

[0018] The solution used for the wet etching in S5 is a KOH solution or a TMAH solution.

[0019] The solution used for the wet etching in S5 is a BOE solution.

[0020] A thermal isolation MEMS chip structure includes a silicon wafer, characterized in that a first thermal insulation dielectric film and a second thermal insulation dielectric film are sequentially provided on the front and back sides of the silicon wafer, an oxide layer is provided on the second thermal insulation dielectric film on the front side of the silicon wafer, and a variable diameter hole is provided on the back side of the silicon wafer, and the top opening of the variable diameter hole is connected to the first thermal insulation dielectric film on the front side of the silicon wafer.

[0021] The diameter of the top opening of the variable diameter hole is smaller than the diameter of the bottom opening of the variable diameter hole, and the diameter of the middle part of the variable diameter hole is larger than the diameter of the bottom opening of the variable diameter hole.

[0022] Advantages of the invention:

[0023] The present invention has simple steps and is easy to operate. It can release the heat-insulating medium film layer by etching the window while keeping the chip area small, thereby reducing the requirements on the processing equipment capacity. The process is simple and the processing efficiency is high, and it is suitable for the manufacture of miniaturized MEMS heat-insulating chips. Description of the drawings:

[0025] Figure 1 It is a schematic diagram of a trapezoidal cross section in the prior art;

[0026] Figure 2 It is a schematic diagram after completing step S1;

[0027] Figure 3 It is a schematic diagram after completing step S2;

[0028] Figure 4 It is a schematic diagram after completing step S3;

[0029] Figure 5 is a schematic diagram after completing step S4;

[0030] Figure 6 is a schematic diagram after completing step S5;

[0031] Figure 7 This is a schematic diagram after completing step S6. Specific implementation method:

[0033] like Figure 2-7 As shown, a method for preparing a thermal isolation MEMS chip includes the following steps: S1, taking a silicon wafer 1 with a crystal orientation of 100 as an initial processing wafer. A layer of oxide is grown on the front and back surfaces of the silicon wafer 1 by thermal oxidation as a first thermal isolation dielectric film 2, and then a layer of silicon nitride is grown on the surface of the first thermal isolation dielectric film 2 by LPCVD as a second thermal isolation dielectric film 3.

[0034] S2. A groove body 4 is formed on the back side of the silicon wafer 1 by using photolithography and dry etching processes. The groove body 4 penetrates the first thermal insulation dielectric film 2 and the second thermal insulation dielectric film 3 on the back side of the silicon wafer 1 and extends into the silicon wafer 1 to a certain depth.

[0035] S3. An oxide layer 5 is grown on the front and back surfaces of the silicon wafer 1 by LPCVD. The oxide layer 5 on the back surface of the silicon wafer 1 covers the side wall and bottom surface of the groove body 4.

[0036] S4. Using a dielectric layer etching device, remove the oxide layer 5 on the lower surface of the silicon wafer 1 and the bottom surface of the groove body 4, and retain the oxide layer 5 on the side wall of the groove body 4.

[0037] S5 , wet-etching the silicon wafer 1 with a KOH solution to etch an inner cavity 6 from the bottom surface of the groove body 4 inwardly into the silicon wafer 1 , wherein the top opening of the inner cavity 6 is connected to the first thermal insulation dielectric film 2 located on the front surface of the silicon wafer 1 .

[0038] This step completes the release of the first thermal insulation dielectric film 2 on the front of the silicon wafer 1. In this step, multiple silicon wafers can be wet-etched simultaneously, which effectively improves the preparation efficiency. Moreover, the interconnected groove body 4 and the inner cavity 6 form a structure of a variable diameter hole 7. The diameter of the top opening of the variable diameter hole 7 is smaller than the diameter of the bottom opening of the variable diameter hole, and the diameter of the middle of the variable diameter hole is larger than the diameter of the bottom opening of the variable diameter hole. By opening a smaller process window on the back of the silicon wafer, the designed thermal insulation film structure can be obtained after silicon etching to the bottom, thereby reducing the requirements on the processing equipment capacity while keeping the chip area small. The process is simple and suitable for the final design and manufacturing of MEMS thermal insulation chips.

[0039] S6. The front side of the wafer processed in step S5 is coated with glue for protection, and the oxide layer 5 on the side wall of the groove body 4 is removed by wet etching with BOE solution to complete the preparation of the miniaturized MEMS thermal insulation chip structure.

[0040] A thermal isolation MEMS chip structure comprises a silicon wafer 1, wherein a first thermal insulation dielectric film 2 and a second thermal insulation dielectric film 3 are sequentially arranged on the front and back sides of the silicon wafer 1, an oxide layer 5 is arranged on the second thermal insulation dielectric film 3 on the front side of the silicon wafer 1, and a variable diameter hole 7 is arranged on the back side of the silicon wafer 1, and the top opening of the variable diameter hole 7 is connected to the first thermal insulation dielectric film 2 on the front side of the silicon wafer 1.

Claims

1. A method for preparing a thermally isolated MEMS chip, Features: It includes the following steps: S1, taking a silicon wafer (1), and preparing a first and a second heat-insulating dielectric film (2, 3) on the front and back surfaces of the silicon wafer (1), respectively; S2, forming a groove (4) of a certain depth on the back side of the silicon wafer (1); S3, an oxide layer (5) is prepared on the front and back surfaces of the silicon wafer (1), respectively, and the oxide layer (5) located on the back surface of the silicon wafer 1 covers the side wall and bottom surface of the groove body (4); S4, removing the oxide layer (5) on the lower surface of the silicon wafer (1) and the bottom surface of the tank body (4), and retaining the oxide layer (5) on the side wall of the tank body (4); S5, wet etching the silicon wafer 1 to etch an inner cavity (6) from the bottom surface of the tank body (4) inwards, wherein the top opening of the inner cavity (6) is connected to the first thermal insulation dielectric film (2); S6, applying glue to the front side of the wafer processed in step S5 for protection, and removing the oxide layer (5) on the side wall of the groove body (4) by wet etching, thereby completing the preparation of the miniaturized MEMS thermal insulation chip structure; a first thermal insulation dielectric film (2) and a second thermal insulation dielectric film (3) are provided on the front and back sides of the silicon wafer (1) in sequence, an oxide layer (5) is provided on the second thermal insulation dielectric film (3) on the front side of the silicon wafer (1), and a variable diameter hole (7) is provided on the back side of the silicon wafer (1), and the top opening of the variable diameter hole (7) is connected to the first thermal insulation dielectric film (2) on the front side of the silicon wafer (1).

2. According to the method for preparing a thermal isolation MEMS chip as described in claim 1, Features: The first and second thermal insulation dielectric films (2, 3) in S1 are oxide layers or silicon nitride, and the first and second thermal insulation dielectric films are made of different materials.

3. According to the method for preparing a thermal isolation MEMS chip as described in claim 1, Features: The solution used for the wet etching in S5 is a KOH solution or a TMAH solution.

4. According to the method for preparing a thermal isolation MEMS chip as described in claim 1, Features: The solution used for the wet etching in S5 is a BOE solution.

5. According to the method for preparing a thermal isolation MEMS chip as described in claim 1, Features: The diameter of the top opening of the variable diameter hole (7) is smaller than the diameter of the bottom opening of the variable diameter hole (7), and the diameter of the middle part of the variable diameter hole (7) is larger than the diameter of the bottom opening of the variable diameter hole (7).

Images