A memory test method, system, device and readable storage medium

Abstract

This invention belongs to the field of computer science, specifically relating to a memory testing method, system, device, and medium. The method includes: configuring a target machine based on a corresponding memory testing strategy, and performing multiple rounds of restart testing on the memory on the target machine based on the memory testing strategy; acquiring test data output by the target machine in real time during each round of restart testing, comparing the test data with predetermined data and / or test data from other rounds, and determining the memory test result based on the comparison results. This memory testing method effectively improves the testing efficiency of RMT (Real-Time Metrics) memory testing in the server field. Under normal circumstances, it requires almost no manual intervention, effectively saving testing manpower and avoiding errors caused by repeated data collection during manual testing, thus preventing omissions in manual testing. It saves time costs, makes testing more flexible, and can effectively replace traditional RMT testing methods.

Description

Technical Field

[0001] This invention belongs to the field of computer science, and specifically relates to a memory testing method, system, device, and readable storage medium. Background Technology

[0002] Server memory testing is a necessary test to verify the stability of server platforms and memory. In traditional memory testing, the current Eagle Stream (Intel's server solution) platform memory margin test standard has two options: 2x5x5 or 3x3x5, requiring the collection of 50 or 45 sets of data, and currently requires manual configuration of the RMT BIOS. Manually collecting 50 sets of data requires an average of 25 hours of manpower, which is time-consuming and lacks flexibility; manually configuring the RMT BIOS is complex and may result in omissions or hidden items. Therefore, an automated data collection and storage method is needed to achieve flexible testing, save time, and deliver test results more accurately and on time. Summary of the Invention

[0003] To address the above problems, this invention proposes a memory testing method, comprising:

[0004] Configure the target machine based on the corresponding memory testing strategy, and perform multiple rounds of restart tests on the memory on the target machine based on the memory testing strategy;

[0005] The test data output by the target machine in each round of restart test is acquired in real time, and the test data is compared with predetermined data and / or test data from other rounds, and the result of memory test is determined based on the comparison result.

[0006] In some embodiments of the present invention, performing multiple rounds of reboot testing on the memory of the target machine based on the memory testing strategy includes:

[0007] In response to the completion of any round of restart tests, the corresponding memory insertion method is changed by modifying the memory slot mapping relationship in the BIOS.

[0008] In some embodiments of the present invention, performing multiple rounds of restart testing on the memory of the target machine based on the memory testing strategy further includes:

[0009] In response to the completion of the scheduled round of restart tests, the corresponding memory is moved to a different position in the target machine's memory slot to proceed with the next round of restart tests.

[0010] In some embodiments of the present invention, performing multiple rounds of restart testing on the memory of the target machine based on the memory testing strategy further includes:

[0011] In response to an anomaly in the comparison results, the abnormal memory and the corresponding memory slot number are determined, and the test data corresponding to the abnormal memory is recorded.

[0012] The next round of restart tests is conducted by changing the position of the corresponding memory in the memory slot of the target machine, and the test data corresponding to the abnormal memory and the test data of the new memory in the abnormal memory slot are collected.

[0013] The test data corresponding to the abnormal memory is compared with the test data corresponding to the memory collected in the next round of restart test and the test data corresponding to the new memory on the abnormal memory slot;

[0014] The memory switching method for subsequent restart tests will be determined based on a comparison of the three types of test data.

[0015] In some embodiments of the present invention, determining the memory switching method for subsequent restart tests based on a comparison of the three types of test data includes:

[0016] If the test data corresponding to the abnormal memory is different from the test data of the abnormal memory collected in the next round of restart test, and the test data of the abnormal memory collected in the next round of restart test is the same as the predetermined data, then for subsequent restart tests, the corresponding memory insertion method is changed by modifying the memory slot mapping relationship in the BIOS, and the test data of different memory are saved with the memory number.

[0017] In some embodiments of the present invention, determining the memory switching method for subsequent restart tests based on a comparison of the three types of test data further includes:

[0018] If the test data of the new memory corresponding to the memory slot of the abnormal memory in the next round of testing is different from the test data of the new memory in the current round of testing, and the test data of the abnormal memory collected in the next round of restart testing is different from the predetermined data, then the subsequent restart test will be performed by changing the position of the corresponding memory in the memory slot of the target machine.

[0019] In some embodiments of the present invention, determining the memory switching method for subsequent restart tests based on a comparison of the three types of test data further includes:

[0020] If the test data of the memory slot corresponding to the abnormal memory in the next round of testing is the same as the test data of the new memory in the current round of testing, and the test data of the abnormal memory collected in the next round of restart testing is different from the predetermined data, then the subsequent restart tests will use the method of modifying the memory slot mapping relationship in the BIOS to change the insertion method of the corresponding memory and save the test data of different memory with the memory number.

[0021] Another aspect of the present invention provides a memory testing system, comprising:

[0022] The test configuration module is configured to configure the target machine based on the corresponding memory test strategy, and to perform multiple rounds of restart tests on the memory on the target machine based on the memory test strategy.

[0023] The testing module is configured to acquire the test data output by the target machine in each round of restart testing in real time, compare the test data with predetermined data and / or test data from other rounds, and determine the result of the memory test based on the comparison result.

[0024] Another aspect of the present invention provides a computer device comprising:

[0025] At least one processor; and

[0026] A memory storing computer instructions executable on the processor, which, when executed by the processor, implement the steps of any of the methods described in the above embodiments.

[0027] Another aspect of the present invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of any of the methods described in the above embodiments.

[0028] The memory testing method proposed in this invention can effectively improve the testing efficiency of memory RMT testing in the server field. It collects test data in real time during testing and compares the results after each round of testing. Based on the comparison results, the test plan can be flexibly configured. Under normal circumstances, almost no manual intervention is required, effectively saving testing manpower. It also avoids errors caused by repeated data collection during manual testing (often dozens of data collections) and avoids omissions in manual testing. It saves time costs, makes testing more flexible, and can effectively replace traditional RMT testing methods. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a flowchart illustrating a memory testing method provided in an embodiment of the present invention.

[0031] Figure 2 This is a schematic diagram of the structure of a memory testing system provided in an embodiment of the present invention;

[0032] Figure 3 A schematic diagram of the structure of a computer device provided in an embodiment of the present invention;

[0033] Figure 4 This is a schematic diagram of the structure of a computer-readable storage medium provided in an embodiment of the present invention. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to specific examples and the accompanying drawings.

[0035] This invention aims to solve the problem of low efficiency in RMT (Rank Margin Test) memory testing in the field of memory testing. RMT is a BIOS-based memory testing solution, with the entire testing solution embedded in the BIOS. By enabling the Rank Margin Tool option in the BIOS, the platform automatically enters the Rank Margin test mode, and the test results are output through the COM port. Its testing method is similar to the shmoo test on ATE: the Vref voltage value is gradually adjusted, and the DQ-DQS skew is gradually adjusted. The memory is read and written at each point to see if there are any errors.

[0036] Traditionally, RMT testing requires multiple server restarts, with the memory slot order on the motherboard changed after a certain number of restarts. This process is then repeated on another motherboard to complete the test. Because servers support large memory sizes (commonly using a 2x8 memory slot configuration), each memory test is time-consuming. Traditionally, testing software is manually activated and connected to the server to collect data. After each test cycle, the memory slots are manually rearranged and re-inserted. However, this time-consuming process of filling the server with memory modules and monitoring the test machine after each test significantly limits the time available for other tasks. This results in a "mechanical" idle state for testers, making it difficult to focus on other work. A hands-off approach further prolongs RMT testing time, potentially impacting subsequent development and verification processes. This results in slow server progress. Therefore, during server RMT testing, the noise generated by the server also affects the testers' work, and if they are far from the testing environment, it is difficult to detect the completion of the corresponding test rounds in a timely manner. Therefore, the testing problems caused by traditional testing methods urgently need to be solved.

[0037] like Figure 1 As shown, to solve the above problems, this invention proposes a memory testing method, including:

[0038] Step S1: Configure the target machine based on the corresponding memory test strategy, and perform multiple rounds of restart tests on the memory on the target machine based on the memory test strategy;

[0039] Step S2: Acquire the test data output by the target machine in each round of restart test in real time, compare the test data with the predetermined data and / or the test data of other rounds, and determine the result of the memory test based on the comparison result.

[0040] In this embodiment, in step S1, the target machine refers to the device used to perform the RMT test; in this invention, a server is used as the test device. The memory test configuration strategy refers to the RMT test strategy, which is a test strategy input or specified by the user. When inputting the test strategy, the user typically has three parameters X, Y, and Z, corresponding to Board Copies, DIMM Shifts, and Repeats, respectively. Board Copies indicates the number of motherboards tested, i.e., how many motherboards are switched during the test. DIMM Shifts refers to the number of times the memory slots are changed. Repeats indicates how many restart tests are performed without changing the motherboards and memory. Taking a 2x5x5 test configuration strategy as an example, 2x5x5 means 2 Board Copies, 5 DIMM Shifts, and 5 Repeats. This requires preparing two server motherboards for testing. First, on one motherboard, perform five rounds of RMT (Real-Time Metrics) testing with all memory slots filled. After each round of RMT testing, restart the server. After five rounds of RMT testing, change the memory modules on the server motherboard. This means changing the memory modules in the memory slots of the next five-round restart test; the memory modules in each slot will be different from those in the previous five-round restart test. In other words, using a 2x5x5 test configuration strategy, the RMT test will collect 50 sets of memory test data.

[0041] Furthermore, for server motherboards used for RMT testing for the first time, it is necessary to confirm whether the BIOS settings of the server motherboard meet the corresponding RMT testing requirements. If they do not meet the RMT testing requirements, the BIOS settings need to be adjusted accordingly.

[0042] Specifically, first, use the SCE tool to export the BIOS option values ​​to bios.txt, obtain the value of the Advanceddebug Function option in the settings, and modify the option value to Disabled to enable hidden BIOS options. Then, use the SCE tool to export the BIOS option values ​​to bios.txt again, obtaining the following option values:

[0043] Serial Debug Message Level;

[0044] System Debug Level;

[0045] Sockets in parallel;

[0046] Attempt Fast Boot;

[0047] Attempt Fast Cold Boot;

[0048] Rank Maigin Tool;

[0049] RMT on Fast Cold Boot;

[0050] It then checks whether the specific parameter values ​​of the above options (which are the corresponding function settings in the BIOS) are as follows: Minimum, Normal, 1, Disable, Disable, Enable, Disable. If any of the above option values ​​do not correspond to the above parameter values, the values ​​of the corresponding options in the exported bios.txt are modified, and the modified bios.txt is re-imported into the BIOS using the SEC tool to make the BIOS take effect. This completes the relevant configuration for the target machine.

[0051] In step S2, the serial port logs output by the RMT test program running in the BIOS are collected through the SOL function of the BMC, and the log information output by the BIOS during the RMT test is saved through the corresponding command of the BMC. Specifically, the serial port log information is saved through the command ipmitool–I lanplus–H IP–U username–P password sol activate.

[0052] Furthermore, based on the saved serial port log information, the corresponding memory test data is parsed and categorized after each round of testing to save the corresponding memory test results from each round of testing. These results are then compared with the corresponding memory test results obtained from the log information in the next round of testing, or with predetermined standard test results. In other words, the test data from the current round is compared with the test data from the next round, or with predetermined standard test data. If the comparison results obtained from multiple restarted tests are all the same and match the predetermined standard test results, it indicates that the RMT test has passed and the status of all memory on the server is normal.

[0053] If the results of multiple restart tests differ, indicating that there is an anomaly in the memory during the test, then the test result is that there is a memory test anomaly.

[0054] Specifically, in this embodiment of the invention, in each round of testing, the collected serial port log data needs to be checked at predetermined intervals. If the serial port log data contains corresponding completion flag information, then a round of RMT testing is considered complete. For example, when "RMT test v3.22.0.complete" is detected, "RMT test v3.22.0.complete" is the end log information output by the RMT test program of version 3.22.0 after the test is completed. After obtaining this end log information, it indicates that a round of memory RMT testing has been completed. Then, the collected log information is parsed, the test data of different memory (multiple memory modules inserted on the target machine of the current test) are classified, and the test data of different memory is used to compare with the test data of the next round.

[0055] Additionally, according to the aforementioned RMT testing strategy, the corresponding BoardCopies, DIMM Shifts, and Repeats test counts are incremented by 1 after each round of test data execution. For example, based on the relationship between BoardCopies, DIMM Shifts, and Repeats, if the user-input test strategy is 2x5x5, then completing 5 rounds of RMT testing on the memory is considered completing one round of DIMM Shifts, requiring a change in the memory slot order on the server. After completing 5 rounds of memory slot changes, the server motherboard needs to be switched for testing. This involves migrating the memory originally on the test server to another server for testing. Specifically, the testing strategy is controlled by the test counts of the corresponding parameters. After each round of memory testing, the Repeats count is incremented by 1. When the Repeats count reaches 5, the memory is switched, the Repeats count is reset to zero, and the DIMM Shifts count is incremented by 1. Similarly, when the DIMM Shifts count reaches 5, the server motherboard is switched. The above process continues on the new motherboard. The test strategy that satisfies user input is complete.

[0056] It should be noted that this embodiment of the invention explains the implementation of the invention from the perspective of collecting test data in the first round. The test data of multiple memory samples obtained after the first round of RMT testing are compared with the predetermined test data. Then, after the subsequent second round of RMT testing, the data is compared with the RMT memory test data from the second round.

[0057] In some embodiments of the present invention, the test data is compared by comparing the test data of the corresponding memory after classification.

[0058] In some embodiments of the present invention, performing multiple rounds of reboot testing on the memory of the target machine based on the memory testing strategy includes:

[0059] In response to the completion of any round of restart tests, the corresponding memory insertion method is changed by modifying the memory slot mapping relationship in the BIOS.

[0060] In this embodiment, for the memory switching operation in the memory testing strategy, the present invention adopts the method of changing the corresponding memory slot mapping relationship in the BIOS. The memory slot mapping relationship refers to the numbering of multiple slots in the physical layer of the server in the software layer of the BIOS. Taking a motherboard with 16 memory slots as an example, assuming that the memory slots on the server from left to right are numbered 1 to 16, each memory slot is connected to the corresponding bus port on the CPU, and there is a fixed one-to-one connection relationship. The corresponding mapping relationship exists in the BIOS firmware. For example, the first memory slot in the physical space corresponds to the number 0 in the default BIOS, and the second memory slot corresponds to the number 1 in the default BIOS. Therefore, when the RMT test reaches the point of changing the memory insertion order, it is not necessary for the tester to manually change the memory for testing. Instead, it is directly achieved by modifying the spatial mapping relationship between the memory slot number in the BIOS and the corresponding physical slot. Thus, the RMT memory testing tool can execute subsequent tests when it detects that the memory module number on the corresponding memory slot has changed. For example, taking a 2x5x5 configuration strategy as an example, when switching the memory insertion method after 5 restart tests, the sixth memory test can be performed by modifying the memory slot mapping relationship in the BIOS to change the corresponding memory insertion method.

[0061] Specifically, modifying the memory slot mapping in the BIOS is accomplished by modifying the BIOS firmware, and then re-flashing the modified BIOS firmware to the BIOS and rebooting for the changes to take effect. This effectively reduces the involvement and workload of maintenance personnel during the RMT testing process.

[0062] In some embodiments of the present invention, performing multiple rounds of restart testing on the memory of the target machine based on the memory testing strategy further includes:

[0063] In response to the completion of the scheduled round of restart tests, the corresponding memory is moved to a different position in the target machine's memory slot to proceed with the next round of restart tests.

[0064] In this embodiment, the operation of switching memory in the memory testing strategy can also be carried out by manually changing the corresponding memory insertion method to achieve physical replacement.

[0065] In some embodiments of the present invention, performing multiple rounds of restart testing on the memory of the target machine based on the memory testing strategy further includes:

[0066] In response to an anomaly in the comparison results, the abnormal memory and the corresponding memory slot number are determined, and the test data corresponding to the abnormal memory is recorded.

[0067] The next round of restart tests is conducted by changing the position of the corresponding memory in the memory slot of the target machine, and the test data corresponding to the abnormal memory and the test data of the new memory in the abnormal memory slot are collected.

[0068] The test data corresponding to the abnormal memory is compared with the test data corresponding to the memory collected in the next round of restart test and the test data corresponding to the new memory on the abnormal memory slot;

[0069] The memory switching method for subsequent restart tests will be determined based on a comparison of the three types of test data.

[0070] In this embodiment, if the comparison between the test data of a certain memory in the current round and the test data of the next round of restart test is abnormal, or if the test data of a certain memory is abnormal compared with the predetermined standard test data, then the RMT memory test is considered to be abnormal. When conducting the next round of restart test, the tester changes the position of the memory and the memory slot by changing the corresponding memory insertion method, so as to confirm whether the problem is caused by the memory slot or the memory module itself through subsequent test data.

[0071] Furthermore, after changing the memory slot configuration, the server was restarted and entered into the BIOS to perform an RMT memory test. The test data after the memory slot change was categorized according to the memory module's unique ID, which is a unique identifier stored by the memory manufacturer in the SPD information. The RMT memory test data from the two rounds were compared based on the memory's unique identifier to verify whether the test data for the corresponding memory module differed between the two tests after changing the memory slot. Simultaneously, the memory test data generated by the memory module in the next RMT memory test for the memory slot that produced abnormal memory test data in the current round of testing was compared with the memory test data generated by the memory module in the current round.

[0072] If the memory test data generated by the same memory module differs after changing the memory slot, it could indicate a problem with the memory module itself, or it could be a problem with the other memory slot. Therefore, comparing the test data of the same memory module in two RMT tests with the corresponding test data of the memory slot in two RMT tests determines the appropriate testing strategy for subsequent tests.

[0073] In some embodiments of the present invention, the method of changing the insertion method and position of the corresponding memory in the target machine's memory slot is adopted by modifying the memory slot mapping relationship in the BIOS. In some cases, this means changing the memory after completing one memory test repeats, and in other cases, it may mean changing the memory after completing 5 repeats, i.e., completing one DIMM Shift. That is, in some embodiments of the present invention, different memory replacement strategies are used based on the currently obtained test data to verify whether the cause of the problem is the memory itself or the memory slot or motherboard on the server motherboard.

[0074] In some embodiments of the present invention, determining the memory switching method for subsequent restart tests based on a comparison of the three types of test data includes:

[0075] If the test data corresponding to the abnormal memory is different from the test data of the abnormal memory collected in the next round of restart test, and the test data of the abnormal memory collected in the next round of restart test is the same as the predetermined data, then for subsequent restart tests, the corresponding memory insertion method is changed by modifying the memory slot mapping relationship in the BIOS, and the test data of different memory are saved with the memory number.

[0076] In this embodiment, if the test data of the corresponding memory in the current round is abnormal, and the test data obtained after the next round of RMT testing is different from the test data of the current round (i.e., the test data obtained from two RMT tests for the same memory module are different, but the test data obtained in the next round of RMT testing is the same as the predetermined standard data), it indicates that the test data of the memory in the current round is abnormal, but it performs normally in the RMT test after changing the memory slot. In this case, it is very likely that the corresponding memory slot is faulty. In subsequent RMT testing, the memory slot mapping relationship in the BIOS can be modified to change the insertion method of the corresponding memory. At the same time, the test data of different memory modules in subsequent RMT testing is saved, and the test data of each memory module is compared. If the comparison results are inconsistent, they are compared with the predetermined standard data to analyze the number of times the corresponding memory is abnormal and the detailed abnormal information.

[0077] In some embodiments of the present invention, determining the memory switching method for subsequent restart tests based on a comparison of the three types of test data further includes:

[0078] If the test data of the new memory corresponding to the memory slot of the abnormal memory in the next round of testing is different from the test data of the new memory in the current round of testing, and the test data of the abnormal memory collected in the next round of restart testing is different from the predetermined data, then the subsequent restart test will be performed by changing the position of the corresponding memory in the memory slot of the target machine.

[0079] In this embodiment, if abnormal RTM test data for the corresponding memory is found during the current round of testing (different from the predetermined standard data or different from the data obtained in the next round of testing), the memory slot corresponding to that memory is identified, and it is determined whether the test data of the memory in the corresponding memory slot in the next round of testing is the same as the test data of the memory in the current round. If the test data of the memory in the corresponding memory slot in the next round of testing is different from the test data of the memory in the current round, the test data of the memory in the corresponding memory slot in the next round of testing is compared with the predetermined standard data. If it is still different from the predetermined standard test data, it indicates that the corresponding test data abnormality still occurs after replacing the memory in that memory slot. However, the test data obtained in the two tests are also different, and the data obtained in the second round (next round of testing) is also different from the predetermined standard test data. This indicates that either of the replaced memory modules may be faulty; or there may be a problem with the circuitry of the memory slot. The uncertainty of the time when the problem occurs in different test scenarios may lead to different ranks of abnormal test data, which is a difficult situation to confirm. In this case, the RMT test is performed by replacing the corresponding memory in subsequent rounds of restart testing. In some embodiments of the present invention, determining the memory switching method for subsequent restart tests based on a comparison of the three types of test data further includes:

[0080] If the test data of the memory slot corresponding to the abnormal memory in the next round of testing is the same as the test data of the new memory in the current round of testing, and the test data of the abnormal memory collected in the next round of restart testing is different from the predetermined data, then the subsequent restart tests will use the method of modifying the memory slot mapping relationship in the BIOS to change the insertion method of the corresponding memory and save the test data of different memory with the memory number.

[0081] In this embodiment, if the test data for the two memory modules in the same memory slot are different in the current round of testing, but the test data in the next round is the same as the predetermined standard test data, it indicates that the test data for the corresponding memory module in that memory slot is normal after the memory module is replaced. This suggests that the abnormal test data is likely caused by an abnormal memory module in the current round, and memory slot issues can be preliminarily ruled out. Therefore, in subsequent RMT tests, the memory slot mapping relationship in the BIOS is modified to change the insertion method of the corresponding memory module and perform multiple rounds of restart tests. Simultaneously, the test data is categorized and saved according to the memory module number. In some embodiments of this invention, the "current round" does not refer to each restart, but can refer to each memory module replacement in the testing strategy, because the RMT test specifies that five restart tests are performed with the memory insertion method and motherboard unchanged. This redundancy verifies the test under the condition that the memory insertion method and motherboard remain unchanged. Therefore, in some embodiments, subsequent multi-round restart tests may refer to switching the corresponding memory (by modifying the BIOS or changing the memory location) after each DIMMShifts (5 or a predetermined number of Repeats), or RMT tests for subsequent multi-round restarts may be performed after each Repeat, following the memory switching mechanism described above.

[0082] The memory testing method proposed in this invention can effectively improve the testing efficiency of memory RMT testing in the server field. It collects test data in real time during testing and compares the results after each round of testing. Based on the comparison results, the test plan can be flexibly configured. Under normal circumstances, almost no manual intervention is required, effectively saving testing manpower. It also avoids errors caused by repeated data collection during manual testing (often dozens of data collections) and avoids omissions in manual testing. It saves time costs, makes testing more flexible, and can effectively replace traditional RMT testing methods.

[0083] like Figure 2 As shown, another aspect of the present invention provides a memory testing system, comprising:

[0084] Test configuration module 1, the test configuration module 1 is configured to configure the target machine based on the corresponding memory test strategy, and perform multiple rounds of restart tests on the memory on the target machine based on the memory test strategy;

[0085] Test module 2 is configured to acquire the test data output by the target machine in each round of restart test in real time, compare the test data with predetermined data and / or test data from other rounds, and determine the result of the memory test based on the comparison result.

[0086] like Figure 3As shown, another aspect of the present invention also provides a computer device comprising:

[0087] At least one processor 21; and

[0088] The memory 22 stores computer instructions 23 that can be executed on the processor 21, the instructions 23 implementing a memory testing method when executed by the processor 21.

[0089] like Figure 4 As shown, another aspect of the present invention provides a computer-readable storage medium 401, which stores a computer program 402, which, when executed by a processor, implements a memory testing method.

[0090] The above are exemplary embodiments disclosed in this invention. However, it should be noted that various changes and modifications can be made without departing from the scope of the embodiments of this invention as defined by the claims. The functions, steps, and / or actions of the methods according to the disclosed embodiments described herein do not need to be performed in any particular order. Furthermore, although the elements disclosed in the embodiments of this invention may be described or claimed individually, they may be understood as multiple unless explicitly limited to a singular number.

[0091] It should be understood that, as used herein, the singular form “a” is intended to include the plural form as well, unless the context clearly supports an exception. It should also be understood that, as used herein, “and / or” refers to any and all possible combinations of one or more of the associated listed items.

[0092] The embodiment numbers disclosed in the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0093] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0094] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the invention (including the claims) is limited to these examples. Within the framework of the invention, technical features of the above embodiments or different embodiments can be combined, and many other variations of the different aspects of the invention as described above exist, which are not provided in the details for the sake of brevity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the protection scope of the invention.

Claims

1. A memory testing method, characterized in that, include: Configure the target machine based on the corresponding memory test strategy, and perform multiple rounds of restart tests on the memory on the target machine based on the memory test strategy, wherein the memory test strategy includes the parameters Broad Copies, DIMM Shifts and Repeatats; The test data output by the target machine in each round of restart test is acquired in real time, and the test data is compared with predetermined data and / or test data in other rounds, and the result of memory test is determined based on the comparison result; The multi-round restart test of the memory on the target machine based on the memory testing strategy includes: In response to the completion of any round of restart tests, the corresponding memory insertion method is changed by modifying the memory slot mapping relationship in the BIOS; In response to the completion of the scheduled round of restart tests, the corresponding memory is moved to a different position in the target machine's memory slot to proceed with the next round of restart tests; In response to an anomaly in the comparison results, the abnormal memory and the corresponding memory slot number are determined, and the test data corresponding to the abnormal memory is recorded. The next round of restart tests is conducted by changing the position of the corresponding memory in the memory slot of the target machine, and the test data corresponding to the abnormal memory and the test data of the new memory in the abnormal memory slot are collected. The test data corresponding to the abnormal memory is compared with the test data corresponding to the memory collected in the next round of restart test and the test data corresponding to the new memory on the abnormal memory slot; The memory switching method for subsequent restart tests will be determined based on a comparison of the three types of test data.

2. The method according to claim 1, characterized in that, The method for determining the memory switching mechanism for subsequent restart tests based on the comparison of the three types of test data includes: If the test data corresponding to the abnormal memory is different from the test data of the abnormal memory collected in the next round of restart test, and the test data of the abnormal memory collected in the next round of restart test is the same as the predetermined data, then for subsequent restart tests, the corresponding memory insertion method is changed by modifying the memory slot mapping relationship in the BIOS, and the test data of different memory are saved with the memory number.

3. The method according to claim 1, characterized in that, The method for determining the memory switching approach for subsequent restart tests based on the comparison of the three types of test data also includes: If the test data of the new memory corresponding to the abnormal memory slot in the next round of restart test is different from the test data of the new memory in the current round of test, and the test data of the abnormal memory collected in the next round of restart test is different from the predetermined data, then the subsequent restart test will be performed by changing the position of the corresponding memory in the target machine's memory slot.

4. The method according to claim 1, characterized in that, The method for determining the memory switching approach for subsequent restart tests based on the comparison of the three types of test data also includes: If the test data of the new memory corresponding to the abnormal memory slot in the next round of restart test is the same as the test data of the new memory in the current round of test, and the test data of the abnormal memory collected in the next round of restart test is different from the predetermined data, then the subsequent restart test will change the insertion method of the corresponding memory by modifying the mapping relationship of the memory slot in the BIOS and save the test data of different memory with the memory number.

5. A memory testing system, characterized in that, include: The test configuration module is configured to configure the target machine based on the corresponding memory test strategy, and to perform multiple rounds of restart tests on the memory on the target machine based on the memory test strategy, wherein the memory test strategy includes the parameters Broad Copies, DIMM Shifts and Repeatats; The testing module is configured to acquire the test data output by the target machine in each round of restart testing in real time, compare the test data with predetermined data and / or test data from other rounds, and determine the result of the memory test based on the comparison result. The test configuration module is also configured to: in response to the completion of any round of restart test, change the insertion method of the corresponding memory by modifying the memory slot mapping relationship in the BIOS; in response to the completion of a predetermined round of restart test, change the position of the corresponding memory in the memory slot of the target machine to perform the next round of restart test; In response to an anomaly in the comparison results, the abnormal memory and its corresponding memory slot number are determined, and the test data corresponding to the abnormal memory is recorded. The next round of restart test is performed by changing the position of the corresponding memory in the target machine's memory slot, and the test data corresponding to the abnormal memory and the test data of the new memory in the abnormal memory slot are collected. The test data corresponding to the abnormal memory is compared with the test data corresponding to the memory collected in the next round of restart test and the test data corresponding to the new memory on the abnormal memory slot; The memory switching method for subsequent restart tests will be determined based on a comparison of the three types of test data.

6. A computer device, characterized in that, include: At least one processor; as well as A memory storing computer instructions executable on the processor, which, when executed by the processor, implement the steps of the method according to any one of claims 1-4.

7. A computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the method according to any one of claims 1-4.

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