A method and system for preventing non-volatile storage data leakage

Abstract

The present application relates to a method and system for preventing non-volatile storage data from being leaked, wherein the method comprises: setting hard protection and soft protection to protect data stored in the non-volatile memory; when the hard protection is in effect, an external emulator device cannot read data from the non-volatile memory or write data to the non-volatile memory; when the soft protection is in effect, the emulator device cannot read data from the non-volatile memory but can write data to the non-volatile memory; and executing programming instructions through the interface of the non-volatile memory to release the hard protection or soft protection. Through the present application, the problem of easy data leakage in the non-volatile memory of the MCU chip is solved, and hard protection and soft protection are implemented to effectively prevent external emulators from easily obtaining data from the non-volatile memory.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a method and system for preventing leakage of non-volatile storage data. Background Art

[0002] Generally, various MCU chips use some internal non-volatile memory to store critical programs and data, ensuring long-term data retention even without power. These protected programs and data cannot be easily read or copied, and are typically accessible only to the CPU. However, some MCU chips support external emulators. This allows users to monitor the CPU's operating status in real time through the emulator interface, and to read and modify the status and data of memory and peripherals in real time. Because the emulator interface allows users to easily read all data in the non-volatile memory, data leakage is a common problem.

[0003] In the prior art, in order to solve the problem of easy leakage of data in the non-volatile memory of the MCU chip, a method of directly disabling the emulator interface is generally adopted.

[0004] Currently, no effective solution has been proposed for the problem of easy data leakage in the non-volatile memory of the MCU chip in the related technology. Summary of the Invention

[0005] The embodiments of the present application provide a method and system for preventing non-volatile storage data leakage, so as to at least solve the problem of easy data leakage of non-volatile memory in MCU chips in the related art.

[0006] In a first aspect, an embodiment of the present application provides a method for preventing non-volatile storage data leakage, the method comprising:

[0007] Set hard protection and soft protection to protect data stored in non-volatile memory;

[0008] When the hard protection is running, an external emulator device cannot read data in the non-volatile memory or write data into the non-volatile memory;

[0009] When the soft protection is running, the emulator device cannot read data in the non-volatile memory, but can write data into the non-volatile memory;

[0010] A programming instruction is executed through the interface of the non-volatile memory to release the hard protection or the soft protection.

[0011] In some embodiments, executing a programming instruction to release the soft protection through an interface of the non-volatile memory includes:

[0012] Unlocking and programming the soft protection in the boot area of ​​the non-volatile memory through the interface of the non-volatile memory;

[0013] Monitor whether an unlock alarm signal is generated; if so, first perform a full chip erase on the non-volatile memory, and then when the non-volatile memory is powered on again, update the data of the soft protection address to release the soft protection; if not, when the non-volatile memory is powered on again, update the data of the soft protection address to release the soft protection.

[0014] In some embodiments, unlocking the soft protection includes:

[0015] Determine whether the executed programming instruction is a soft protection unlock programming instruction. If so, unlock the soft protection and check whether there is a full chip erase completion signal. If so, do not generate an unlock alarm signal. If not, generate an unlock alarm signal.

[0016] In some embodiments, determining whether the executed programming instruction is a soft protection unlock programming instruction includes:

[0017] If the programming address is addr_soft and the programming data is key_soft, the programming instruction is a soft protection unlock programming instruction; if the programming address is not addr_soft and / or the programming data is not key_soft, the programming instruction is a common programming instruction.

[0018] In some embodiments, the method further comprises releasing the soft protection during continuous programming:

[0019] executing a programming instruction through the interface of the non-volatile memory to write programming data for continuous programming into a data buffer;

[0020] Automatically accumulating and writing programming addresses in an address accumulator according to the number and bit width of the programming data;

[0021] Then, according to the programming data and the programming address, it is determined whether the programming instruction is a soft protection unlocking programming instruction. If so, the soft protection is released.

[0022] In some embodiments, automatically accumulating and writing programming addresses in an address accumulator according to the number and bit width of the programming data includes:

[0023] If the programming data is 8 bits wide, the programming address in the address accumulator is incremented by 1.

[0024] If the programming data is 16 bits wide, the programming address in the address accumulator is incremented by 2.

[0025] If the programming data is 32 bits wide, the programming address in the address accumulator is incremented by 4.

[0026] In some embodiments, executing a programming instruction to release the hard protection through an interface of the non-volatile memory includes:

[0027] Unlocking and programming the hard protection in a boot area of ​​the non-volatile memory through an interface of the non-volatile memory;

[0028] When the non-volatile memory is powered on again, the data of the hard protection address is updated to release the hard protection.

[0029] In some embodiments, unlocking the hard protection comprises:

[0030] It is determined whether the executed programming instruction is a hard protection unlocking programming instruction, and if so, the hard protection is unlocked and programmed.

[0031] In some embodiments, determining whether the executed programming instruction is a hard protection unlock programming instruction includes:

[0032] If the programming address is addr_hard and the programming data is key_hard, the programming instruction is a hard protection unlock programming instruction; if the programming address is not addr_hard and / or the programming data is not key_hard, the programming instruction is a common programming instruction.

[0033] In a second aspect, an embodiment of the present application provides a system for preventing leakage of non-volatile storage data, the system comprising a configuration module and an unlocking module;

[0034] The configuration module is used to set hard protection and soft protection to protect data stored in the non-volatile memory; when the hard protection is in operation, an external emulator device cannot read data in the non-volatile memory or write data to the non-volatile memory; when the soft protection is in operation, the emulator device cannot read data in the non-volatile memory but can write data to the non-volatile memory;

[0035] The unlocking module is used to execute a programming instruction through the interface of the non-volatile memory to release the hard protection or the soft protection.

[0036] Compared to related technologies, the embodiments of the present application provide a method and system for preventing non-volatile storage data leakage. The method protects data stored in non-volatile memory by setting hard protection and soft protection. When hard protection is in effect, an external emulator device cannot read data from or write data to the non-volatile memory. When soft protection is in effect, the emulator device cannot read data from the non-volatile memory but can write data to the non-volatile memory. Programming instructions are executed through the interface of the non-volatile memory to remove the hard or soft protection. This solves the problem of data leakage in non-volatile memory in MCU chips and effectively prevents external emulators from easily obtaining data from the non-volatile memory based on hard and soft protection. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0038] Figure 1 is a flowchart of the steps of a method for preventing non-volatile storage data leakage according to an embodiment of the present application;

[0039] Figure 2 is a flowchart of the steps for releasing hard protection according to an embodiment of the present application;

[0040] Figure 3 is a flowchart of the steps for releasing soft protection according to an embodiment of the present application;

[0041] Figure 4 This is a schematic diagram of the system structure of multi-layer unlocking soft protection according to an embodiment of the present application;

[0042] Figure 5 is a structural block diagram of a system for preventing non-volatile storage data leakage according to an embodiment of the present application;

[0043] Figure 6 Schematic diagram of the internal structure of an electronic device according to an embodiment of the present application.

[0044] Description of the accompanying drawings: 51. Configuration module; 52. Unlocking module. DETAILED DESCRIPTION

[0045] In order to make the purpose, technical solutions and advantages of this application more clearly understood, the present application is described and illustrated below in conjunction with the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely used to explain this application and are not intended to limit this application. Based on the embodiments provided in this application, all other embodiments obtained by those of ordinary skill in the art without making any creative efforts are within the scope of protection of this application.

[0046] Obviously, the drawings described below are merely examples or embodiments of the present application. Those skilled in the art can, without inventive effort, apply the present application to other similar scenarios based on these drawings. Furthermore, it is also understood that, although the effort involved in such a development process may be complex and lengthy, for those skilled in the art related to the content disclosed in this application, changes in design, manufacturing, or production based on the technical content disclosed in this application are merely conventional technical means and should not be construed as an insufficiency of the content disclosed in this application.

[0047] References to "embodiments" in this application mean that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it refer to independent or alternative embodiments that are mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described in this application may be combined with other embodiments unless there is a conflict.

[0048] Unless otherwise defined, the technical or scientific terms used in this application should have the ordinary meaning understood by a person of ordinary skill in the technical field to which this application belongs. The words "one", "a", "the" and the like used in this application do not indicate a limit on quantity and may indicate the singular or plural. The terms "include", "comprise", "have" and any variations thereof used in this application are intended to cover non-exclusive inclusions; for example, a process, method, system, product or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units that are not listed, or may also include other steps or units that are inherent to these processes, methods, products or devices. The words "connect", "connected", "coupled" and the like used in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The word "multiple" used in this application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships can exist. For example, "A and / or B" can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after are in an "or" relationship. The terms "first", "second", "third", etc. involved in this application are only used to distinguish similar objects and do not represent a specific order for the objects.

[0049] The inventors have found that in order to solve the problem of easy data leakage in the non-volatile memory of the MCU chip, the following two methods are generally used in the prior art:

[0050] Method 1 directly disables the emulator interface. Although it can prevent data leakage, it also makes it impossible to modify the stored program content through an external emulator again. If the software and hardware in the chip do not support the use of other interfaces to update the program, then the program in this chip can no longer be changed.

[0051] Method 2 combines both hard and soft protection on the emulator interface. Hard protection is emulator interface protection and can be set if you're certain the stored program data doesn't need to be modified. Soft protection is read-only memory protection and can be modified. However, knowing how to modify the protection value to disable hard or soft protection allows easy theft of data in non-volatile memory.

[0052] To address the shortcomings of the two aforementioned methods, the present invention builds on Method 2 by proposing a two-level protection method based on ICE (In-Circuit Estimator) hard protection and soft protection with an unlock warning. Both the ICE hard protection and soft protection can be modified, and unlocking the soft protection triggers an unlock warning. The memory data is first fully erased, the soft protection value is modified, and the update is reloaded after powering on again. This method effectively prevents the in-circuit emulator from easily stealing non-volatile memory contents after learning the unlock method.

[0053] The present invention provides a method for preventing non-volatile storage data from being leaked. Figure 1 FIG is a flowchart of a method for preventing non-volatile storage data leakage according to an embodiment of the present application, such as Figure 1 As shown, the method includes the following steps:

[0054] Step S102, setting hard protection and soft protection to protect data stored in the non-volatile memory;

[0055] It should be noted that if an external emulator device wants to access non-volatile memory data, it needs to go through two levels of protection: ICE hard protection and soft protection. Only when both levels of protection are unlocked can the emulator device successfully read the memory data.

[0056] When hard protection is enabled, the emulator device cannot read or write data from non-volatile memory, and cannot access or obtain any device or status information in the MCU (Microcontroller Unit). Hard protection can be enabled if you are certain that stored program data does not need to be modified. Hard protection is usually unlocked.

[0057] When soft protection is in effect, the emulator device cannot read data from the non-volatile memory, but can write data to the non-volatile memory. That is, ICE soft protection only protects read access to the non-volatile memory area, while write operations can be performed normally.

[0058] Step S104 : executing a programming instruction through the interface of the non-volatile memory to release the hard protection or the soft protection.

[0059] It should be noted that the hard and soft protection values ​​are not fixed and can be changed by programming the corresponding address data in the boot area of ​​the non-volatile memory. Changing the ICE hard and soft protection values ​​is achieved by programming timing. The programming and erasing operations of the non-volatile memory are both performed by the programming and erasing device, which can perform normal programming, continuous programming, page erasure, and full chip erasure of non-volatile stored data. To implement step S102, the device mainly has the following operating states:

[0060] Idle: Waiting for programming and erasing instructions. If it is a page erase instruction, it will enter the page erase sequence; if it is a full chip erase instruction, it will enter the full chip erase sequence; if it is a programming instruction, it will enter the unlock soft protection monitoring.

[0061] Programming timing: Controls the non-volatile storage interface to implement programming timing, can realize programming of the main area and boot area, supports normal programming and continuous programming, and automatically enters the end state after programming is completed.

[0062] Chip erase timing: Controls the non-volatile memory interface to implement chip erase timing, which can fully erase the main area. After the chip erase is completed, a chip erase completion signal is generated and the system automatically enters the end state.

[0063] Page erase timing: Controls the non-volatile storage interface to implement page erase timing, and can implement page erase of the main area and boot area. After the page erase is completed, a page erase completion signal is generated and the system automatically enters the end state.

[0064] End: Indicates that the programming or erasing instruction has been completed and the device automatically enters the idle state.

[0065] Unlock soft protection monitoring: Monitor the unlock alarm signal generated by unlocking the soft protection. If the unlock alarm is detected, the whole chip erase sequence is entered. If the unlock alarm is not generated, the programming sequence is entered. The specific monitoring method is as follows: the input is the programming address, programming data, and chip erase completion signals, and the output is an unlock alarm signal. Determine whether the programming address is addr_soft and the programming data is key_soft. If they are not met at the same time, it is normal programming, no unlock alarm is generated, and the programming sequence is directly entered. If they are met at the same time, it means that the soft protection is to be unlocked. At this time, the chip erase completion signal is checked. If it is 1, it means that the whole chip erase has been completed, no unlock alarm signal is generated, and the programming program is directly entered. If the chip erase completion signal is 0, a release alarm signal needs to be generated, and the whole chip is erased before programming.

[0066] Specifically, Figure 2 This is a flowchart of the steps for releasing hard protection according to an embodiment of the present application. Figure 2 As shown in the figure, changing the hard protection value by programming includes the following steps:

[0067] S21 , the programming and erasing device programs the hard protection in the boot area of ​​the non-volatile memory through the interface of the non-volatile memory.

[0068] S22, determining whether the executed programming instruction is a hard protection unlocking programming instruction.

[0069] S23, if the programming address is addr_hard and the programming data is key_hard, the programming instruction is a hard protection unlock programming instruction, and the process jumps to S25.

[0070] S24: If the programming address is not addr_hard and / or the programming data is not key_hard, the programming instruction is a common programming instruction.

[0071] S25, unlocking and programming the hard protection. When the non-volatile memory is powered on again, the data of the hard protection address is updated to release the hard protection.

[0072] Through the above steps S21 to S25, the programming modification of the ICE hard protection value is realized, and it takes effect after powering on again and loading the boot, thereby enhancing the security of unlocking the soft protection.

[0073] Specifically, Figure 3 This is a flowchart of the steps for releasing soft protection according to an embodiment of the present application. Figure 3 As shown in the figure, changing the soft protection value through programming includes the following steps:

[0074] S31 , programming the soft protection in the boot area of ​​the non-volatile memory through the interface of the non-volatile memory.

[0075] S32, determining whether the executed programming instruction is a soft protection unlocking programming instruction.

[0076] S33, if the programming address is addr_soft and the programming data is key_soft, the programming instruction is an unlock programming instruction, and the process jumps to S35.

[0077] S34: If the programming address is not addr_soft and / or the programming data is not key_soft, the programming instruction is a common programming instruction.

[0078] S35, unlock and program the soft protection, and check whether there is a full chip erase completion signal.

[0079] S36, if it exists, no unlock alarm signal is generated, and the soft protection is unlocked and programmed. When the non-volatile memory is powered on again, the data of the soft protection address is updated to release the soft protection.

[0080] If it does not exist, then an unlock alarm signal is generated, the non-volatile memory is fully erased, and S38 is executed.

[0081] S38, unlocking and programming the soft protection. When the non-volatile memory is powered on again, the data of the soft protection address is updated to release the soft protection.

[0082] Through the above steps S31 to S38, the programming modification of the ICE soft protection value is realized, and it takes effect after power-on boot loading. The unlocked soft protection monitoring and early warning circuit will trigger a full chip erase, which can prevent the data in the non-volatile memory from being easily stolen after knowing the method of modifying the protection value.

[0083] also, Figure 4 is a schematic diagram of the system structure of multi-layer unlocking soft protection according to an embodiment of the present application, such as Figure 4 As shown, in addition to the above-mentioned S31 to S38 in the normal programming to release the soft protection (first layer of protection), it also includes the continuous programming to release the soft protection (second layer of protection)

[0084] The first level of protection is ordinary programming protection. For ordinary programming unlocking soft protection, there are programming address registers and programming data registers. The programming address is written to the programming address register, and the programming data is written to the programming data register. The programming address and programming data are sent to the unlocking soft protection monitor.

[0085] The second level of protection is continuous programming protection. To address the continuous programming unlock soft protection, an address accumulator and data buffer are provided. The data buffer is used to store the continuous programming data written to the programming data register. The address accumulator automatically accumulates the programming address based on the number and bit width of the programming data. If the programming data is 8-bit wide, the address is accumulated by 1; if the programming data is 16-bit wide, the address is accumulated by 2; if the programming data is 32-bit wide, the address is accumulated by 4. The accumulated programming address and programming data are sent to the unlock soft protection monitor.

[0086] The unlocking of soft protection is protected by a two-layer protection mechanism. The first layer of protection mechanism is for ordinary programming unlocking soft protection, and the second layer of protection mechanism is for continuous programming unlocking soft protection, which enhances the security of unlocking soft protection.

[0087] To sum up, through steps S102 to S104 in the embodiment of the present application, the problem of easy leakage of data in the non-volatile memory of the MCU chip is solved, and hard protection and soft protection are implemented to effectively prevent external emulators from easily obtaining data in the non-volatile memory; unlocking the soft protection monitoring and early warning can avoid easily stealing data in the non-volatile memory after knowing the method of modifying the protection value; the two-layer protection mechanism enhances the security of unlocking the soft protection.

[0088] It should be noted that the steps shown in the above process or the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0089] The present invention provides a system for preventing non-volatile storage data from being leaked. Figure 5 is a structural block diagram of a system for preventing non-volatile storage data leakage according to an embodiment of the present application, such as Figure 5 As shown, the system includes a configuration module 51 and an unlocking module 52;

[0090] The configuration module 51 is used to set hard protection and soft protection to protect data stored in the non-volatile memory. When the hard protection is in effect, the external emulator device cannot read data from the non-volatile memory or write data to the non-volatile memory. When the soft protection is in effect, the emulator device cannot read data from the non-volatile memory but can write data to the non-volatile memory.

[0091] The unlocking module 52 is configured to execute a programming instruction to release the hard protection or the soft protection through the interface of the non-volatile memory.

[0092] The configuration module 51 and the unlocking module 52 in the embodiment of the present application solve the problem of easy data leakage of the non-volatile memory in the MCU chip, and implement hard protection and soft protection to effectively prevent external emulators from easily obtaining data in the non-volatile memory.

[0093] It should be noted that the above modules can be functional modules or program modules, and can be implemented through software or hardware. For modules implemented through hardware, the above modules can be located in the same processor; or the above modules can be located in different processors in any combination.

[0094] This embodiment further provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0095] Optionally, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0096] It should be noted that the specific examples in this embodiment can refer to the examples described in the above embodiments and optional implementation modes, and this embodiment will not be repeated here.

[0097] In addition, in conjunction with the method for preventing non-volatile storage data leakage in the above embodiments, embodiments of the present application may provide a storage medium for implementation. The storage medium stores a computer program; when the computer program is executed by a processor, it implements any of the methods for preventing non-volatile storage data leakage in the above embodiments.

[0098] In one embodiment, a computer device is provided, which may be a terminal. The computer device includes a processor, memory, a network interface, a display screen, and an input device connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, a method for preventing the leakage of non-volatile storage data is implemented. The display screen of the computer device may be a liquid crystal display or an electronic ink display screen. The input device of the computer device may be a touch layer covering the display screen, or may be a key, trackball, or touchpad provided on the computer device housing, or may be an external keyboard, touchpad, or mouse.

[0099] In one embodiment, Figure 6 is a schematic diagram of the internal structure of an electronic device according to an embodiment of the present application, such as Figure 6 As shown, an electronic device is provided, which may be a server, and its internal structure diagram may be as shown in FIG. Figure 6 As shown. The electronic device includes a processor, a network interface, an internal memory, and a non-volatile memory connected via an internal bus, wherein the non-volatile memory stores an operating system, a computer program, and a database. The processor is used to provide computing and control capabilities, the network interface is used to communicate with external terminals via a network connection, the internal memory is used to provide an environment for the operation of the operating system and the computer program, and when the computer program is executed by the processor, a method for preventing the leakage of non-volatile storage data is implemented. The database is used to store data.

[0100] Those skilled in the art will understand that Figure 6 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the electronic device to which the solution of the present application is applied. The specific electronic device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0101] Those skilled in the art will appreciate that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing the relevant hardware through a computer program, which can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0102] Those skilled in the art should understand that the various technical features of the above-described embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the various technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0103] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art could make various modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A method for preventing non-volatile storage data leakage, characterized in that: The method comprises: Set hard protection and soft protection to protect data stored in non-volatile memory; When the hard protection is running, an external emulator device cannot read data in the non-volatile memory, and cannot write data to the non-volatile memory; When the soft protection is running, the emulator device cannot read data in the non-volatile memory, but can write data into the non-volatile memory; executing a programming instruction to release the hard protection through an interface of the non-volatile memory; or determining, through the interface of the non-volatile memory, in the boot area of ​​the non-volatile memory whether the executed programming instruction is a soft protection unlock programming instruction, and if so, performing unlock programming on the soft protection, and checking whether there is a full chip erase completion signal; If it exists, no unlock alarm signal will be generated. When the non-volatile memory is powered on again, the soft protection address will be updated to release the soft protection. If it does not exist, an unlock alarm signal is generated and the non-volatile memory is fully erased. When the non-volatile memory is powered on again, the soft protection address is updated to release the soft protection.

2. The method according to claim 1, characterized in that Determining whether the executed programming instruction is a soft protection unlock programming instruction includes: If the programming address is addr_soft and the programming data is key_soft, the programming instruction is a soft protection unlock programming instruction; if the programming address is not addr_soft and / or the programming data is not key_soft, the programming instruction is a common programming instruction.

3. The method according to claim 1, characterized in that The method further includes releasing the soft protection during continuous programming: executing a programming instruction through the interface of the non-volatile memory to write programming data for continuous programming into a data buffer; Automatically accumulating and writing programming addresses in an address accumulator according to the number and bit width of the programming data; Then, according to the programming data and the programming address, it is determined whether the programming instruction is a soft protection unlocking programming instruction. If so, the soft protection is released.

4. The method according to claim 3, characterized in that Automatically accumulating and writing programming addresses in an address accumulator according to the number and bit width of the programming data includes: If the programming data is 8 bits wide, the programming address in the address accumulator is incremented by 1. If the programming data is 16 bits wide, the programming address in the address accumulator is incremented by 2. If the programming data is 32 bits wide, the programming address in the address accumulator is incremented by 4.

5. The method according to claim 1, wherein Executing a programming instruction to release the hard protection through the interface of the non-volatile memory includes: Unlocking and programming the hard protection in a boot area of ​​the non-volatile memory through an interface of the non-volatile memory; When the non-volatile memory is powered on again, the hard protection address is updated to release the hard protection.

6. The method according to claim 5, characterized in that Unlocking the hard protection includes: It is determined whether the executed programming instruction is a hard protection unlocking programming instruction, and if so, the hard protection is unlocked and programmed.

7. The method according to claim 6, characterized in that Determining whether the executed programming instruction is a hard protection unlock programming instruction includes: If the programming address is addr_hard and the programming data is key_hard, the programming instruction is a hard protection unlock programming instruction; if the programming address is not addr_hard and / or the programming data is not key_hard, the programming instruction is a common programming instruction.

8. A system for preventing non-volatile storage data leakage, characterized in that: The system includes a configuration module and an unlocking module; The configuration module is used to set hard protection and soft protection to protect data stored in the non-volatile memory; When the hard protection is running, an external emulator device cannot read data in the non-volatile memory, and cannot write data to the non-volatile memory; When the soft protection is running, the emulator device cannot read data in the non-volatile memory, but can write data into the non-volatile memory; The unlocking module is configured to execute a programming instruction through an interface of the non-volatile memory to release the hard protection; or determining, through the interface of the non-volatile memory, in the boot area of ​​the non-volatile memory whether the executed programming instruction is a soft protection unlock programming instruction, and if so, performing unlock programming on the soft protection, and checking whether there is a full chip erase completion signal; If it exists, no unlock alarm signal will be generated. When the non-volatile memory is powered on again, the soft protection address will be updated to release the soft protection. If it does not exist, an unlock alarm signal is generated and the non-volatile memory is fully erased. When the non-volatile memory is powered on again, the soft protection address is updated to release the soft protection.

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