Circuit Simulation Method for Metal Work Function Fluctuation of Nanoplate Gate-All-Around Field-Effect Transistor
Through the global model and parameter correction based on the BSIM-CMG model, the problem of slow speed and high cost of metal work function fluctuation simulation in ring gate field effect transistors is solved, and fast and accurate device characteristics fluctuation simulation is achieved, which is suitable for device simulation of multiple gate lengths.
Patent Information
- Application Number
- CN202210628379.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-06-06
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2042-06-06
AI Technical Summary
The prior art simulation method of metal work function fluctuations in ring gate field effect transistors has the problem of slow speed and high cost, and cannot be directly applied to ring gate field effect transistors of complex structures, and it is necessary to extract individual intensive models for each gate length, which is time-consuming and labor-intensive.
Using a global model based on the BSIM-CMG model, by correcting the calculation formula of the key parameter PHIG, considering the structural characteristics of the nanosheet ring-gate field effect transistor, the mean and variance of the fluctuations of the metal work function are calculated, and embedded in the simulation netlist of the circuit simulation software for simulation.
It realizes fast and accurate simulation of device characteristics fluctuations and impacts. The results are consistent with TCAD simulation, with small errors and are suitable for device simulations of multiple gate lengths, improving simulation efficiency and accuracy.
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Figure CN115906723B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of microelectronic devices, and particularly relates to a circuit simulation method for metal work function fluctuation of a nanosheet gate-all-around field effect transistor. Background Art
[0002] On the one hand, the gate-all-around field effect transistor is currently one of the research hotspots. Compared with FinFET, the gate-all-around field effect transistor has more excellent performance. Its gate material surrounds the three-dimensional channel region, which can better suppress the short-channel effect to achieve a better on-off ratio, and the carriers in the channel can be transported along the quasi-one-dimensional ballistic to better improve the driving current of the device. At the 3nm technology node, the gate-all-around field effect transistor will become the mainstream device for research.
[0003] On the other hand, because the manufacturing process of the gate-all-around field effect transistor becomes more complex, the influence of random fluctuations in the device becomes more worthy of attention. The random fluctuations of the device are due to the inevitable process uncertainties in the device manufacturing process, which affect the electrical characteristics of the device, such as the fluctuations of parameters such as the threshold voltage. In the gate-all-around field effect transistor, the main sources of random fluctuations are metal work function variation (WFV), line edge roughness (LER), and line width roughness (LWR). For metal work function variation, there is currently an effective compact model, which regards the influence of WFV as the influence on the effective work function of the device, and obtains the fluctuation magnitude of the effective work function of the device according to the diameter D of the metal grains, the gate area S of the device, and the work function distribution of the grains. to obtain the fluctuation magnitude of the effective work function of the device Currently, the simulation of metal work function fluctuation applied to planar MOSFET and FinFET cannot be directly applied to the gate-all-around field effect transistor. This is mainly because the structure of the gate-all-around field effect transistor is more complex, and the original formula cannot be directly applied and needs to be corrected. Secondly, for each gate-all-around field effect transistor with a different gate length, a separate compact model extraction needs to be done, which consumes a lot of time. Using a global model that calibrates multiple gate length devices simultaneously can effectively solve this problem.
[0004] Correctly studying the metal work function fluctuation of the device is very important for improving the electrical performance stability of the device and evaluating the circuit performance of the device. At present, the TCAD simulation used in most metal work function fluctuation research has problems of slow speed and high cost. Therefore, it is very necessary to establish an accurate and predictable metal work function fluctuation circuit simulation method. Summary of the Invention
[0005] The object of the present invention is to provide a circuit simulation method for metal work function fluctuations in a gate-all-around field effect transistor based on a predictable intensive model. This method can accurately obtain the influence of device characteristic fluctuations, is faster than the currently used TCAD simulation, and the simulation results are consistent with the TCAD accuracy with small errors.
[0006] The specific technical solution for achieving the object of the present invention is as follows:
[0007] A circuit simulation method for metal work function fluctuations in a nanosheet gate-all-around field effect transistor, the method comprising the following steps:
[0008] 1) Extract global parameters of the nanosheet gate-all-around field effect transistor based on the BSIM-CMG model to obtain a global model and the key parameter PHIG for all Targets within the industrial error range and applicable to a series of devices with varying channel lengths Lg.
[0009] 2) Modify the key parameter PHIG; metal work function fluctuations mainly affect the core parameter PHIG in the BSIM-CMG model. Using the formula
[0010] μ(PHIG) = PHIG (1)
[0011]
[0012] respectively obtain the mean and variance of the PHIG fluctuations under the influence of the metal work function. In the formula, PHIG is the core parameter PHIG without fluctuations in the extracted global model, is the fluctuation of the effective work function, which can directly reflect the change in PHIG; D is the diameter of the metal grains, nstack is the number of nanosheet layers, W is the channel width, L is the channel length, is the difference in work functions corresponding to two crystal orientations of the metal gate material. Use the difference in work functions corresponding to metal TiN <100> and <111>. According to the statistical distribution results of the grains, the proportions of the two crystal orientations are 60% and 40%, corresponding to the values of the crystal orientation proportions p1 and 1 - p1 in the formula respectively; μ(PHIG) is the mean of the PHIG fluctuations, and σ(PHIG) is the standard deviation of the PHIG fluctuations; the calculation formula used modifies the algorithm for the device gate area and is more in line with the structure of the nanosheet gate-all-around field effect transistor compared with the existing metal work function fluctuation calculation formulas.
[0013] 3) Embed the global model obtained from the global parameter extraction and the mean and variance of the PHIG fluctuations into the simulation netlist of the circuit simulation software, and use the circuit simulation software to perform circuit simulation to obtain the curve of the drain current of the device varying with the gate voltage, the Id-Vg graph, under the influence of metal work function fluctuations.
[0014] Different from the single-length intensive models used in current metal work function fluctuation circuit simulation methods, the present invention uses a global model based on the BSIM-CMG model, which can use the same model to simulate devices with multiple gate lengths without separately extracting intensive models for each length.
[0015] When calculating the core parameter PHIG of the present invention, the variance calculation formula of the main influence value PHIG of metal work function fluctuation is corrected for the structure of the nanosheet gate-all-around field-effect transistor, and the area is calculated by nstack·W·L, making the result closer to the actual metal work function fluctuation result of the device.
[0016] The present invention can accurately obtain the influence of device characteristic fluctuations, is faster than the TCAD simulation used in current metal work function fluctuation research, and the simulation results are consistent with the TCAD accuracy with small errors. Compared with the existing metal work function fluctuation circuit simulation methods, the present invention is more applicable to nanosheet gate-all-around field-effect transistors, and uses a global model instead of a single-length intensive model, which is faster and more efficient. Brief Description of the Drawings
[0017] Figure 1 is a schematic flow diagram of the present invention;
[0018] Figure 2 is a three-dimensional structure of the gate-all-around field-effect transistor used in the present invention;
[0019] Figure 3 is a cross-sectional view of the gate-all-around field-effect transistor used in the present invention along the y direction;
[0020] Figure 4 is a schematic flow diagram of the global model extraction of the present invention;
[0021] Figure 5 is a comparison diagram of the saturation region threshold voltage Vtsat obtained by simulating the device circuit characteristics using traditional TCAD with metal work function fluctuation and the present invention using Hspice at a metal particle diameter of 3 nm;
[0022] Figure 6 is a comparison diagram of the linear region threshold voltage Vtlin obtained by simulating the device circuit characteristics using traditional TCAD with metal work function fluctuation and the present invention using Hspice at a metal particle diameter of 3 nm;
[0023] Figure 7 is a comparison diagram of the saturation region subthreshold swing SS varying with the saturation region threshold voltage Vtsat obtained by simulating the device circuit characteristics using traditional TCAD with metal work function fluctuation and the present invention using Hspice at a metal particle diameter of 3 nm;
[0024] Figure 8Comparison chart of the turn-on current Ion varying with the threshold voltage Vtsat in the saturation region obtained by simulating the circuit characteristics of the device using traditional TCAD considering metal work function fluctuations and Hspice of the present invention at a metal particle diameter of 3 nm;
[0025] Figure 9 Comparison chart of the standard deviation changes of the threshold voltage Vtsat in the saturation region obtained by simulating the circuit characteristics of the device using traditional TCAD considering metal work function fluctuations and Hspice of the present invention at metal particle diameters of 3 nm, 5 nm, 7 nm, and 10 nm;
[0026] Figure 10 It is a comparison chart of the standard deviation changes of the turn-on current Ion obtained by simulating the circuit characteristics of the device using traditional TCAD considering metal work function fluctuations and Hspice of the present invention at metal particle diameters of 3 nm, 5 nm, 7 nm, and 10 nm. Specific implementation method
[0027] The circuit simulation method of the present invention will be described in detail below through embodiments in combination with the accompanying drawings.
[0028] A circuit simulation method for metal work function fluctuations of a nanosheet gate-all-around field effect transistor of the present invention includes the following steps:
[0029] 1) Extract global parameters of the nanosheet gate-all-around field effect transistor based on the BSIM-CMG model to obtain a global model with all Targets meeting the industrial error requirements, and embed the model card without fluctuations into the simulation netlist of the circuit simulation software;
[0030] 2) According to the intensive model established currently, regard the influence of WFV as the influence on the effective work function of the device. According to the diameter D of the metal grains, the gate area S of the device, and the work function distribution of the grains Calculate the fluctuation magnitude of the effective work function of the device according to the following formula:
[0031]
[0032]
[0033] where
[0034] Then it can be obtained that Since the area in the gate-all-around field effect transistor should be changed from WL to nstack·W·L, the formula is rewritten as: Obtain the mean and variance of the fluctuation of the effective work function under the influence of metal work function fluctuations;
[0035] 3) The fluctuations in the effective work function can be directly reflected in the final threshold voltage V th fluctuations, affecting the core parameter PHIG in BSIM-CMG. Using the formula
[0036] μ(PHIG) = PHIG
[0037]
[0038] the mean and variance of the fluctuations in PHIG affected by the metal work function fluctuations are obtained;
[0039] 4) According to the above calculation formula, the mean and variance of the fluctuations in PHIG affected by the metal work function fluctuations are obtained and added to the netlist of the circuit simulation. Circuit simulation is performed using circuit simulation software, and the fluctuations in the electrical characteristics of the device caused by the metal work function fluctuations can be obtained, and then the fluctuations in the circuit performance parameters can be obtained. Embodiment
[0040] This embodiment considers the influence of metal work function fluctuations on the device circuit characteristics in a 3nm gate-all-around field-effect transistor. The overall process is as shown in Figure 1 the schematic flow diagram of the circuit simulation method. The basic structure of the 3nm gate-all-around field-effect transistor is as shown in Figure 2 , and the three-dimensional structure and Figure 3 the cross-sectional view along the y direction of the gate-all-around field-effect transistor used in the present invention are shown.
[0041] Specific steps:
[0042] 1) As shown in Figure 4 the schematic flow diagram of the global model extraction process, global parameter extraction is performed on the nanosheet gate-all-around field-effect transistor based on the BSIM-CMG model to obtain a global model where all Targets meet the industrial error requirements. The model card without fluctuations is embedded into the simulation netlist of the circuit simulation software;
[0043] 2) According to the existing compact model, the fluctuations in the effective work function of the device are calculated by substituting the diameter D of the metal grains, the gate area S of the device, and the work function distribution of the grains into the following formula: The magnitude of the fluctuations is obtained as follows:
[0044]
[0045]
[0046] In this embodiment, the Lg of the gate-all-around field-effect transistor used is from 12nm to 18nm, the W is 21nm, and nstack is three layers. The basic structure of the device is a gate-all-around field-effect transistor with Lg of 15nm as shown in Figure 2As shown; the gate metal is TiN, the grain diameter D is 3nm, TiN <111> (work function is 4.6eV) and TiN <100> (work function is 4.4eV) is about 60% and 40%. Therefore, the calculation yields
[0047] 3) Using the calculation formula of PHIG in the metal work function fluctuation intensive model of the all-around gate field effect transistor and the extracted global model, the mean and variance of PHIG are obtained as follows:
[0048] Mean: μ(PHIG) = 4.652421
[0049] Variance: σ(PHIG) = 0.009562
[0050] 4) The mean and variance of PHIG fluctuations are added to the netlist of circuit simulation, and circuit simulation is performed using circuit simulation software to obtain the fluctuation effect of the device electrical characteristics caused by the fluctuation of the metal work function, and then the fluctuation effect of the circuit performance parameters can be obtained.
[0051] Figure 5 A comparison diagram of the saturation region threshold voltage Vtsat obtained by simulating the device circuit characteristics with traditional TCAD and Hspice when the metal particle diameter is 3nm for adding metal work function fluctuations is shown, wherein the average Vtsat simulated by TCAD is 0.11961V, and the standard deviation is 9.09344E-4V, and the average Vtsat simulated by Hspice is 0.11405V, and the standard deviation is 8.55199E-4V.
[0052] Figure 6 A comparison chart of the linear region threshold voltage Vtlin obtained by simulating the device circuit characteristics with traditional TCAD and Hspice when the metal particle diameter is 3nm for adding metal work function fluctuations is shown, wherein the mean Vtlin simulated by TCAD is 0.13622V, and the standard deviation is 9.09322E-4V, and the mean Vtlin simulated by Hspice is 0.13431V, and the standard deviation is 7.58836E-4V.
[0053] Figure 7 A comparison chart of the saturation region subthreshold swing SS versus saturation region threshold voltage Vtsat obtained by simulating device circuit characteristics with traditional TCAD and Hspice when the metal particle diameter is 3nm by adding metal work function fluctuations, wherein the average SS simulated by TCAD is 66.381, and the average SS simulated by Hspice is 68.377.
[0054] Figure 8Comparison chart of the variation of the turn-on current Ion with the threshold voltage Vtsat in the saturation region obtained by simulating the device circuit characteristics using traditional TCAD considering metal work function fluctuations and Hspice of the present invention at a metal particle diameter of 3 nm. The average value of Ion simulated by TCAD is 1.52E-04, and the average value of Ion simulated by Hspice is 1.52006E-4 A.
[0055] Figure 9 Comparison chart of the variation of the standard deviation of the threshold voltage Vtsat in the saturation region obtained by simulating the device circuit characteristics using traditional TCAD considering metal work function fluctuations and Hspice of the present invention at metal particle diameters of 3 nm, 5 nm, 7 nm, and 10 nm.
[0056] Figure 10 Comparison chart of the variation of the standard deviation of the turn-on current Ion obtained by simulating the device circuit characteristics using traditional TCAD considering metal work function fluctuations and Hspice of the present invention at metal particle diameters of 3 nm, 5 nm, 7 nm, and 10 nm.
Claims
1. A simulation method for metal work function fluctuation circuit of a nanosheet gate-all-around field effect transistor, characterized in that The method includes the following steps: 1) Based on the BSIM-CMG model, globally extract parameters of the nanosheet gate-all-around field-effect transistor, obtaining a global model and the core parameter PHIG for all Targets within the industrial error range and applicable to devices with varying channel lengths Lg; 2) Correct the core parameter PHIG; use formulas (1) and (2) to obtain the mean and variance of the fluctuations of the core parameter PHIG affected by the metal work function respectively: μ(PHIG) = PHIG (1) Among them, in the formula, PHIG is the core parameter PHIG without fluctuations in the obtained global model. is the fluctuation of the effective work function, which can directly reflect the change in PHIG; D is the diameter of the metal grains, nstack is the number of nanosheet layers, W is the channel width, and L is the channel length. is the work function difference corresponding to two crystal orientations of the metal gate material. The work function difference between TiN <100> and <111> of the metal is used. According to the statistical distribution results of the grains, the proportions of the two crystal orientations are 60% and 40%, corresponding to the crystal orientation proportions p1 and 1 - p1 in the formula respectively; μ(PHIG) is the mean value of the PHIG fluctuation, and σ(PHIG) is the standard deviation of the PHIG fluctuation. 3) Embed the global model obtained from global parameter extraction and the mean and variance of the fluctuations of the core parameter PHIG into the simulation netlist of the circuit simulation software, and perform circuit simulation using the circuit simulation software to obtain the curve of the drain current of the device varying with the gate voltage, the Id-Vg graph, under the influence of metal work function fluctuations.
2. The simulation method of the metal work function fluctuation circuit of the nanosheet gate-all-around field effect transistor according to claim 1, wherein For the described global model, the same model can be used to simulate devices with multiple gate lengths.
3. The simulation method of the metal work function fluctuation circuit of the nanosheet gate-all-around field effect transistor according to claim 1, characterized in that When calculating the core parameter PHIG, the calculation formula is corrected according to the structure of the nanosheet gate-all-around field-effect transistor, and the area is calculated by nstack·W·L, making the result closer to the actual result of metal work function fluctuations of the device.
Citation Information
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