A driving circuit, a display device, and a noise reduction method

Abstract

The application discloses a driving circuit, a display device and a noise reduction method. The driving circuit of one embodiment comprises an analog voltage input end for outputting a first voltage signal, an analog voltage output end for outputing a second voltage signal according to the first voltage signal, and a noise reduction circuit between the analog voltage input end and the analog voltage output end. The noise reduction circuit comprises an alternating current sampling module connected with the analog voltage input end for extracting an alternating current ripple signal in the first voltage signal, and a ripple noise reduction module having one end connected with the alternating current sampling module and the other end connected with the analog voltage output end for performing noise reduction processing on the alternating current ripple signal, so that the analog voltage output end outputs the second voltage signal, and a ripple voltage signal of the second voltage signal is smaller than a ripple voltage signal of the first voltage signal.

Description

Technical Field

[0001] This invention relates to the field of display technology. More specifically, it relates to a driving circuit, a display device, and a noise reduction method. Background Technology

[0002] As display products continue to evolve towards higher resolutions, the requirements for noise reduction are becoming increasingly stringent. Currently designed products generally fail to meet customer standards in noise testing. Summary of the Invention

[0003] The purpose of this invention is to provide a driving circuit, a display device, and a noise reduction method to solve at least one of the problems existing in the prior art.

[0004] To achieve the above objectives, the present invention adopts the following technical solution:

[0005] The first aspect of the present invention provides a driving circuit, comprising:

[0006] The analog voltage input terminal is used to output the first voltage signal;

[0007] The analog voltage output terminal is used to output a second voltage signal based on the first voltage signal; and

[0008] A noise reduction circuit located between the analog voltage input terminal and the analog voltage output terminal;

[0009] The noise reduction circuit includes:

[0010] The AC sampling module connected to the analog voltage input terminal is used to extract the AC ripple signal from the first voltage signal.

[0011] The ripple noise reduction module is connected at one end to the AC sampling module and at the other end to the analog voltage output terminal. It is used to perform noise reduction processing on the AC ripple signal so that the analog voltage output terminal outputs the second voltage signal, and the ripple voltage signal of the second voltage signal is less than the ripple voltage signal of the first voltage signal.

[0012] Furthermore, the first voltage signal output from the analog voltage output terminal is the ripple voltage signal.

[0013] The ripple noise reduction module includes a first inverting amplifier and a first resistor:

[0014] The first inverting amplifier includes:

[0015] The first negative input terminal is connected to the AC sampling module;

[0016] The first positive input terminal is used to receive the DC voltage signal from the first voltage signal; and

[0017] The first output terminal is connected to the analog voltage output terminal and is used to generate a second voltage signal based on the DC voltage signal and the AC ripple signal output by the AC sampling module.

[0018] The first end of the first resistor is connected to the potential between the sampling AC module and the first negative input terminal, and the second end is connected to the potential between the first output terminal and the analog voltage output terminal.

[0019] Furthermore, the AC sampling module includes:

[0020] The first sampling capacitor and the first sampling resistor,

[0021] One end of the first sampling capacitor is connected to the analog voltage input terminal, and the other end is connected in series with the first sampling resistor.

[0022] The first sampling resistor is connected to the first negative input terminal, and the second end of the first resistor is connected to the potential between the first sampling resistor and the first negative input terminal.

[0023] Furthermore, the noise reduction circuit also includes a compensation resistor.

[0024] The first end of the compensation resistor is connected to the potential between the analog voltage input terminal and the first sampling capacitor.

[0025] The second end of the compensation resistor is connected to the potential between the analog voltage output terminal and the second end of the first resistor.

[0026] Furthermore, the ripple noise reduction module includes:

[0027] The system comprises a second inverting amplifier, a first compensation unit, a second compensation unit, and a drive transistor group.

[0028] The second inverting amplifier includes:

[0029] The second negative input terminal is connected to the first terminal of the first compensation unit and is connected to the first compensation signal input by the first compensation unit.

[0030] The second positive input terminal is used to connect to the first terminal of the second compensation unit and to receive the second compensation signal input from the second compensation unit; and

[0031] The second output terminal is connected to the gate and drain of the driving transistor group and is used to generate a second voltage signal based on the AC ripple signal, the first compensation signal and the second compensation signal output by the AC sampling module.

[0032] The second terminal of the first compensation unit is located at the potential between the analog voltage output terminals and the AC sampling module, and the third terminal of the first compensation unit is connected to the ground wire.

[0033] The second terminal of the second compensation unit is located at the potential between the analog voltage output terminal and the AC sampling module.

[0034] The source of the driving transistor group is located at the potential between the analog voltage output terminal and the AC sampling module.

[0035] Furthermore, the AC sampling module includes:

[0036] The second sampling resistor unit and the second sampling capacitor,

[0037] The second sampling resistor unit includes: a first terminal connected to the analog voltage input terminal, a second terminal connected to the analog voltage output terminal, and a third terminal connected in series with the second sampling capacitor;

[0038] The second sampling capacitor is connected to the potential between the first compensation unit and the second negative input terminal.

[0039] Furthermore, the first compensation unit includes:

[0040] The first and second sub-compensation resistors are connected in series, and the third sub-compensation resistor has its first terminal connected between the series potentials of the first and second sub-compensation resistors.

[0041] The first terminal of the first sub-compensation resistor is connected to the potential between the analog voltage output terminal and the second terminal of the second sampling resistor unit, and the second terminal is connected to the second terminal of the second sub-compensation resistor.

[0042] The first terminal of the second compensation resistor is connected to the ground wire.

[0043] The second terminal of the third sub-compensation resistor is connected to the second negative input terminal.

[0044] The second sampling capacitor is located at the potential between the third sub-compensation resistor and the second negative input terminal.

[0045] Furthermore, the first compensation unit also includes:

[0046] The fifth sub-compensation resistor is located between the first and second sub-compensation resistors connected in series.

[0047] The fifth sub-compensation resistor is a sliding variable resistor, and the sliding end of the fifth sub-compensation resistor is connected to the second end of the third sub-compensation resistor;

[0048] Furthermore, the second compensation unit includes a fourth sub-compensation resistor, the first end of which is connected to the potential between the analog voltage output terminal and the second terminal of the first compensation unit;

[0049] or,

[0050] The second compensation unit further includes a sixth sub-compensation resistor located between the fourth sub-compensation resistor and the second positive input terminal.

[0051] Furthermore, the second sampling resistor unit includes a first fixed resistor and a first variable resistor connected in series with the first fixed resistor.

[0052] The end of the first fixed resistor connected to the analog voltage input terminal is the first end of the second sampling resistor unit.

[0053] The end of the first variable resistor connected to the analog voltage output terminal is the second end of the second sampling resistor unit.

[0054] The sliding end of the first variable resistor is connected in series with the second sampling capacitor, serving as the third end of the second sampling resistor unit.

[0055] Furthermore, the second sampling resistor unit includes: a second fixed resistor and a third fixed resistor connected in series with the second fixed resistor.

[0056] The end of the second fixed resistor connected to the analog voltage input terminal is the first end of the second sampling resistor unit.

[0057] The end of the third fixed resistor connected to the analog voltage output terminal is the second end of the second sampling resistor unit.

[0058] The third fixed resistor is connected in series with the second sampling capacitor, serving as the third terminal of the second sampling resistor unit.

[0059] Furthermore, the driving circuit also includes a protection circuit, one end of which is connected to the analog voltage input terminal, and the other end is located at the potential between the second terminal of the second sampling unit and the drain of the driving transistor group.

[0060] A second aspect of the present invention provides a display device including the driving circuit of the first aspect of the present invention.

[0061] Furthermore, the display device includes a display panel and a circuit board, wherein the circuit board is provided with the driving circuit.

[0062] A third aspect of the present invention provides a noise reduction method, the method comprising:

[0063] The analog voltage input terminal outputs the first voltage signal;

[0064] The analog voltage output terminal outputs a second voltage signal based on the first voltage signal.

[0065] The AC sampling module of the noise reduction circuit extracts the AC ripple signal from the first voltage signal.

[0066] The ripple noise reduction module of the noise reduction circuit performs noise reduction processing on the AC ripple signal, so that the analog voltage output terminal outputs the second voltage signal, and the ripple voltage signal of the second voltage signal is less than the ripple voltage signal of the first voltage signal.

[0067] The beneficial effects of this invention are as follows:

[0068] This invention provides a noise reduction circuit in the driving circuit. The first voltage signal is extracted using the AC ripple signal, and then the extracted AC ripple signal is denoised using a ripple noise reduction module. This effectively reduces the AC ripple signal in the second voltage signal output by the driving circuit. Attached Figure Description

[0069] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0070] Figure 1 A schematic diagram of the drive circuit according to an embodiment of the present invention is shown;

[0071] Figure 2 A circuit diagram of a driving circuit according to an optional embodiment of the present invention is shown;

[0072] Figure 3 Show Figure 2 The simulation diagram of the first and second voltage signals of the driving circuit shown;

[0073] Figure 4 A circuit diagram illustrating a driving circuit according to another optional embodiment of the present invention is shown;

[0074] Figure 5 Show Figure 4 The simulation diagram of the first and second voltage signals of the driving circuit shown;

[0075] Figure 6 A circuit diagram of a driving circuit according to an optional embodiment of the present invention is shown;

[0076] Figure 7 Show Figure 6 The simulation diagram of the first and second voltage signals of the driving circuit shown;

[0077] Figure 8A circuit diagram of a driving circuit according to an optional embodiment of the present invention is shown;

[0078] Figure 9 Show Figure 8 The simulation diagram of the first and second voltage signals of the driving circuit shown;

[0079] Figure 10 Show Figure 2 and Figure 4 The diagram shows the resistors, capacitors, and voltage values ​​used in each component of the drive circuit.

[0080] Figure 11 Show Figure 6 A schematic diagram showing the resistors, capacitors, and voltage values ​​used in each component of the drive circuit.

[0081] Figure 12 Show Figure 8 The diagram shows the resistors, capacitors, and voltage values ​​used in each component of the drive circuit. Detailed Implementation

[0082] To more clearly illustrate the present invention, the following description, in conjunction with embodiments and accompanying drawings, further explains the invention. Similar components in the drawings are indicated by the same reference numerals. Those skilled in the art should understand that the specific description below is illustrative rather than restrictive and should not be construed as limiting the scope of protection of the present invention.

[0083] Based on existing display products exhibiting noise issues, research, experimentation, and theoretical considerations have led to the proposal of electrostriction, a mechanism based on the piezoelectric effect. Under the influence of an external electric field, all materials undergo stretching and deformation—a process known as electrostriction. For ferroelectric materials with high dielectric constants, the electrostriction effect is intense, termed the piezoelectric effect. Ceramic dielectrics are a major component of multilayer ceramic capacitors (MLCCs), and electrostriction is unavoidable under voltage. If the electrostriction strongly manifests as a piezoelectric effect, then the display (MNT)...

[0084] Noise Generation Mechanism: MNT noise is mainly caused by the alternating ripple voltage of the first voltage signal (AVDD voltage) superimposed on the two ends of its MLCC capacitor to ground. When the load of the back-end display panel (Panel) is charging and discharging with each row, the ripple voltage of the first voltage signal (AVDD Ripple) changes accordingly. Therefore, the changing ripple voltage of the first voltage signal causes a piezoelectric effect on the two ends of the MLCC capacitor to ground, causing the MLCC to deform and vibrate, which is transmitted to the PCB board and causes resonance. When the frequency of the voltage signal is within the range of human hearing (20Hz to 20kHz), the capacitor can be heard whistling, resulting in relatively high noise in the display product.

[0085] Based on the above research, the first embodiment of the present invention proposes a driving circuit, such as... Figure 1 As shown, the driving circuit includes:

[0086] Analog voltage input terminal 10 is used to output the first voltage signal.

[0087] Analog voltage output terminal 20 is used to output voltage according to the first voltage signal, and

[0088] The noise reduction circuit 30 is located between the analog voltage input terminal 10 and the analog voltage output terminal 20.

[0089] The noise reduction circuit 30 includes:

[0090] The AC sampling module 31, connected to the analog voltage input terminal 10, is used to extract the AC ripple signal from the first voltage signal.

[0091] The ripple noise reduction module 32 is connected at one end to the AC sampling module 31 and at the other end to the analog voltage output terminal 20. It is used to perform noise reduction processing on the AC ripple signal so that the analog voltage output terminal 20 outputs the second voltage signal, and the ripple voltage signal of the second voltage signal is less than the ripple voltage signal of the first voltage signal.

[0092] In this embodiment of the invention, a noise reduction circuit 30 is set on the driving circuit. The first voltage signal is extracted using the AC ripple signal, and then the extracted AC ripple signal is reduced using the ripple noise reduction module, so that the AC ripple signal in the second voltage signal output by the display panel can be effectively reduced.

[0093] Based on the noise reduction circuit 30, in this embodiment, the driving circuit also includes a capacitor connected to ground connected to the analog voltage output terminal 20. Therefore, based on the aforementioned noise mechanism explanation, after passing through the noise reduction circuit 30 of this embodiment, the ripple voltage signal of the output second voltage signal is less than the ripple voltage signal of the first voltage signal, which reduces the vibration amplitude of the piezoelectric effect generated by the capacitor to ground according to the second voltage signal, thereby reducing the piezoelectric effect of the capacitor to ground and achieving the purpose of improving the noise of the display product.

[0094] In an optional embodiment, such as Figure 2 As shown, the ripple noise reduction module 32 includes a first inverting amplifier 2321 and a first resistor 2322:

[0095] The first inverting amplifier 2321 includes:

[0096] First negative input terminal ( Figure 2 The "-" terminal shown is connected to the AC sampling module 31;

[0097] First positive input terminal ( Figure 2 The "+" terminal shown is used to connect the DC voltage signal in the first voltage signal; and

[0098] First output terminal ( Figure 2 The terminal marked with a period (.) is connected to the analog voltage output terminal 20 and is used to generate a second voltage signal based on the DC voltage signal and the AC ripple signal output by the AC sampling module 31.

[0099] The first end of the first resistor 2322 is connected to the potential between the AC sampling module 31 and the first negative input terminal, and the second end is connected to the potential between the first output terminal and the analog voltage output terminal 20.

[0100] In this embodiment, the first voltage signal output by the analog voltage output terminal 20 is the ripple voltage signal. The ripple voltage signal is extracted by the AC sampling module 31, and the first inverting amplifier 2321 performs negative feedback amplification correction based on the DC voltage signal input by the first positive input terminal and the ripple voltage signal output by the analog voltage output terminal 20.

[0101] In a specific example, the first inverting amplifier 2321 further includes a first power supply terminal and a second power supply terminal, which respectively receive a positive power supply voltage signal Vacc+ and a negative power supply voltage signal Vacc-.

[0102] In an optional embodiment, such as Figure 2 As shown, the AC sampling module 31 includes:

[0103] The first sampling capacitor C1 and the first sampling resistor R2,

[0104] One end of the first sampling capacitor C1 is connected to the analog voltage input terminal 10, and the other end is connected in series with the first sampling resistor R2.

[0105] The first sampling resistor R2 is connected to the first negative input terminal, and the second terminal of the first resistor 2322 is connected to the potential between the first sampling resistor R2 and the first negative input terminal.

[0106] For example, such as Figure 2 As shown, the first resistor 2322 is a sliding rheostat.

[0107] In the virtual open state, the current i1 flowing through the first sampling resistor R2 is the same as the current i2 flowing through the first resistor 2322.

[0108] In the virtual short state, the voltages at the first positive input terminal and the first negative input terminal are the same, both being the voltage at the first positive input terminal.

[0109] At this point:

[0110]

[0111] Therefore, the first voltage signal V is obtained. avdd Second voltage signal V out The relationship is:

[0112]

[0113] Therefore, based on the ratio of the first resistor 2322 to the first sampling resistor R2, the second voltage signal can be adjusted to reduce the ripple voltage signal of the second voltage signal.

[0114] In a specific example, when the resistance of the first resistor 2322 is 0Ω, such as Figure 3 As shown, the ripple voltage signal Vout Ripple in the second voltage signal is significantly reduced compared to the ripple voltage signal Vavdd Ripple in the first voltage signal. Simulation data shows that Vout Ripple = 40mV < Vavdd Ripple 252mV, which means that the noise reduction circuit 30 in this embodiment can effectively reduce the ripple voltage, thereby improving the noise of the display product.

[0115] In an optional embodiment, such as Figure 2 As shown, the embodiment of the present invention also includes a fourth protection resistor R14 disposed in the circuit, located between the second output terminal 20 and the first resistor 2322, to protect the noise reduction circuit.

[0116] like Figure 4 As shown, another embodiment of the present invention is based on Figure 2 The noise reduction circuit 30 shown presents an alternative design, in which, in one optional embodiment, the noise reduction circuit 30 further includes a compensation resistor 41.

[0117] The first end of the compensation resistor 41 is connected to the potential between the analog voltage input terminal 10 and the first sampling capacitor C1.

[0118] The second end of the compensation resistor 41 is connected to the potential between the analog voltage output terminal 20 and the second end of the first resistor 2322.

[0119] In this embodiment, a compensation resistor 41 is provided at the analog voltage input terminal 10 and the analog voltage output terminal 20, that is, the analog voltage input terminal 10 and the analog voltage output terminal 20 are formed in series. Under this setting, based on the formula of the aforementioned embodiment... When R1 approaches R2, V out =-V avdd ,

[0120] Verification is based on simulation experiments, such as Figure 5 As shown, when the first sampling resistor R2 = 1.0KΩ, the first resistor 2322R1 is adjusted. When the resistance of the sliding rheostat R1 is 36% of 2.55KΩ, the ripple voltage signal in the first voltage signal output from the analog voltage input terminal 10 is out of phase with the ripple voltage signal in the second voltage signal output from the analog voltage output terminal 20. At this time, since the analog voltage input terminal 10 is connected to the analog voltage output terminal through the compensation resistor 41, the AC ripple in the directions of the first voltage signal and the second voltage signal will be neutralized, thereby canceling out the ripple voltage signal in the second voltage signal output from the analog voltage output terminal 20.

[0121] In another embodiment, it is derived from simulation diagrams, such as Figure 5 As shown, when the resistance of the first resistor 2322 is 0Ω, the voltage value Vout Ripple of the ripple voltage signal in the first voltage signal is 246mV, and the voltage value Vavdd Ripple of the ripple voltage signal in the second voltage signal is 252mV. Moreover, the two ripple voltage signals are out of phase. Therefore, the AC ripple of 6mV, which is close to 0V, is neutralized by the ripple voltage signals in the first and second voltage signals. The ripple voltage signal of the output second voltage signal is also greatly reduced.

[0122] In an optional embodiment, such as Figure 4 As shown, the embodiment of the present invention also includes a fourth protection resistor R14 disposed in the circuit, for example, a fourth protection resistor R14 located between the second output terminal 20 and the first resistor 2322.

[0123] Furthermore, the present invention is based on Figure 1 The circuit architecture of the driving circuit shown proposes another noise reduction circuit 30.

[0124] In an optional embodiment, such as Figure 6 As shown, the ripple noise reduction module 32 includes:

[0125] The system comprises a second inverting amplifier 6321, a first compensation unit 6322, a second compensation unit 6323, and a drive transistor group 6324.

[0126] The second inverting amplifier 6321 includes:

[0127] Second negative input terminal ( Figure 6 The terminal “-” shown is connected to the first terminal 6322A of the first compensation unit 6322 and the first compensation signal input by the first compensation unit 6322 is connected.

[0128] Second positive input terminal ( Figure 6The "+" terminal shown is used to connect to the first terminal 6323A of the second compensation unit 6323, and to connect to the second compensation signal input to the second compensation unit 6323; and

[0129] Second output terminal ( Figure 6 The terminal shown (“.”) is connected to the gate 6324G and drain 6324D of the driving transistor group 6324, and is used to generate a second voltage signal based on the AC ripple signal, the first compensation signal and the second compensation signal output by the AC sampling module 31;

[0130] The second terminal 6322B of the first compensation unit 6322 is located at the potential between the analog voltage output terminal 20 and the AC sampling module 31, and the third terminal 6322C of the first compensation unit 6322 is connected to the ground wire.

[0131] The second terminal 6323B of the second compensation unit 6323 is located at the potential between the analog voltage output terminal 20 and the AC sampling module 31.

[0132] The source 6324S of the driving transistor group 6324 is located at the potential between the analog voltage output terminal 20 and the AC sampling module 31.

[0133] In an optional embodiment, such as Figure 6 As shown, the AC sampling module 31 includes:

[0134] The second sampling resistor unit 6311 and the second sampling capacitor 6312

[0135] The second sampling resistor unit 6311 includes: a first terminal 6311A connected to the analog voltage input terminal 10, a second terminal 6311B connected to the analog voltage output terminal 20, and a third terminal 6311C connected in series with the second sampling capacitor 6312;

[0136] The second sampling capacitor 6312 is connected to the potential between the first compensation unit 6322 and the second negative input terminal.

[0137] In an optional embodiment, such as Figure 6 As shown, the second sampling resistor unit 6311 includes: a second fixed resistor R3 and a third fixed resistor R4 connected in series with the second fixed resistor R3.

[0138] The end where the second fixed resistor R3 is connected to the analog voltage input terminal 10 is the first terminal 6311A of the second sampling resistor unit 6311.

[0139] The end where the third fixed resistor R4 is connected to the analog voltage output terminal 20 is the second terminal 6311B of the second sampling resistor unit 6311.

[0140] The third fixed resistor R4 is connected in series with the second sampling capacitor 6312, serving as the third terminal 6311C of the second sampling resistor unit 6311.

[0141] By employing surface-mount fixed resistors, this embodiment of the invention can reduce the cost of the noise reduction circuit 30.

[0142] In an optional embodiment, such as Figure 6 As shown, the first compensation unit 6322 includes:

[0143] The first sub-compensation resistor R5 and the second sub-compensation resistor R6 are connected in series, and the third sub-compensation resistor R7 is connected at its first end between the series potential of the first sub-compensation resistor R5 and the second sub-compensation resistor R6.

[0144] The first terminal of the first sub-compensation resistor R5 is connected to the potential between the analog voltage output terminal 20 and the second terminal of the second sampling resistor unit 6311, and the second terminal is connected to the second terminal of the second sub-compensation resistor R6.

[0145] The first terminal of the second sub-compensation resistor R6 is connected to the ground wire.

[0146] The second terminal of the third sub-compensation resistor R7 is connected to the second negative input terminal.

[0147] The second sampling capacitor 6312 is located at the potential between the third sub-compensation resistor R7 and the second negative input terminal.

[0148] In an optional embodiment, such as Figure 6 As shown, the second compensation unit 6323 includes a fourth sub-compensation resistor R8. The first end of the fourth sub-compensation resistor R8 is connected to the potential between the analog voltage output terminal 20 and the second end of the first compensation unit 6322 to compensate for part of the first voltage signal, serving as input compensation for the second positive input terminal of the second inverting amplifier 6321.

[0149] like Figure 6 As shown, the noise reduction circuit 30 of this embodiment of the invention uses the inputs of the first compensation unit 6322 and the AC sampling module 31 together as the negative input of the second inverting amplifier 6321, and uses the input of the second compensation unit 6323 as the positive input of the second inverting amplifier 6321, so that the operation of the second inverting amplifier 6321 is more accurate, the ripple voltage signal in the first voltage signal is extracted more accurately, and the noise reduction effect can be further improved.

[0150] The simulation diagram of the noise reduction circuit 30 in this embodiment is as follows: Figure 7 As shown, Figure 7 As shown, the ripple voltage signal of the second voltage signal input to the analog voltage output terminal 20 is also reduced compared to the ripple voltage signal in the first voltage signal. The voltage value Vout Ripple of the ripple voltage signal in the first voltage signal is 252mV, and the voltage value Vavdd Ripple of the ripple voltage signal in the second voltage signal is 92mV. The ripple voltage signal of the output second voltage signal is also significantly reduced. Furthermore, the current signal in this embodiment of the invention does not experience overload. Therefore, the stability of the noise reduction circuit 30 in this embodiment is guaranteed.

[0151] In a specific example, such as Figure 6 As shown, the flow direction of the first voltage signal output from the analog voltage input terminal 1010 is as follows:

[0152] The first voltage signal is input to the first terminal 6311A of the second sampling resistor unit 6311. A portion of the first voltage signal is shunt from the second terminal 6311B of the second sampling resistor unit 6311 to the analog voltage output terminal 20, and another portion is shunt from the third terminal 6311C of the second sampling resistor unit 6311 to the second sampling capacitor 6312. The second sampling capacitor 6312 extracts the ripple voltage signal from the input portion of the first voltage signal. The second sampling capacitor 6312 inputs the ripple-extracted first voltage signal to the second negative input terminal of the second inverting amplifier 6321, and the ripple signal extraction of the AC sampling module 31 is completed.

[0153] Furthermore, during the process of a portion of the first voltage signal being output from the second terminal 6311B of the second sampling resistor unit 6311 to the analog voltage output terminal 20, it passes through the second terminal 6322B of the first compensation unit 6322. This portion of the first voltage signal is further divided to the first compensation unit 6322, and then output to the second negative input terminal of the second inverting amplifier 6321 via the first compensation unit 6322.

[0154] Similarly, as a portion of the first voltage signal is output from the two ends of the second sampling resistor unit 6311 to the analog voltage output terminal 20, it passes through the second terminal 6323B of the second compensation unit 6323. After being divided by the first compensation unit 6322, this portion of the first voltage signal is further divided to the second compensation unit 6323, and then output to the second positive input terminal of the second inverting amplifier 6321 via the second compensation unit 6323.

[0155] The second inverting amplifier 6321 performs calculations based on the inputs from the second positive input terminal and the second negative input terminal. The second output terminal outputs the corrected second voltage signal to the gate 6324G and source 6324S of the driving transistor group 6324. After the driving transistor group 6324 is turned on, the signal is output to the analog voltage output terminal 20 through the drain 6324D of the driving transistor group 6324.

[0156] The above process is a schematic diagram of noise reduction processing of the first voltage signal. During the continuous output of the first voltage signal, the above process is repeated. Therefore, the ripple signal in the first voltage signal is continuously extracted, thereby outputting a second voltage signal with less ripple voltage signal.

[0157] In one specific example, the second inverting amplifier 6321 includes a third power supply terminal and a fourth power supply terminal to power the second inverting amplifier 6321. In this embodiment, the third power supply terminal Vacc+ is connected to the analog voltage input terminal 10, and the fourth power supply terminal Vacc- is grounded.

[0158] In an optional embodiment, the present invention further includes protective resistors disposed in the circuit, such as a fifth protective resistor R15 located between the second output terminal and the potential of the gate 6324G of the driving transistor group 6324, a sixth protective resistor R16 located between the fifth protective resistor R15 and the potential of the gate 6324G of the driving transistor group 6324, and a seventh protective resistor R17 located between the analog voltage output terminal 20 and the potential of the drain 6324D of the driving transistor group 6324, to protect the driving circuit.

[0159] It is worth noting that the resistance values ​​of each noise reduction circuit 30 in the embodiments of the present invention are designed according to the actual application of the driving circuit, and will not be described in detail here.

[0160] Furthermore, in Figure 6 Based on the architecture of the noise reduction circuit 30 shown, for example, based on the structure of the ripple noise reduction module 32, the connection structure of the second inverting amplifier 6321, and the structure of the driving transistor group 6324, another embodiment of the present invention proposes another noise reduction circuit 30, such as... Figure 8 As shown, the embodiments of the present invention configure the first compensation unit 6322, the second compensation unit 6323, the second sampling resistor unit 6311, and the ripple noise reduction module 32.

[0161] In an optional embodiment, such as Figure 8 As shown, the first compensation unit 6322 further includes:

[0162] The fifth sub-compensation resistor RS1 is located between the first sub-compensation resistor R5 and the second sub-compensation resistor R6, which are connected in series.

[0163] The fifth sub-compensation resistor RS1 is a sliding variable resistor, and the sliding end of the fifth sub-compensation resistor RS1 is connected to the second end of the third sub-compensation resistor R7.

[0164] In this embodiment, the first compensation unit 6322 is equipped with a fifth sub-compensation resistor RS1, and the fifth sub-compensation resistor RS1 is a sliding resistor. By changing the resistance value of the fifth sub-compensation resistor RS1, the first voltage signal divided to the first compensation unit 6322 can be adjusted, thereby adjusting the voltage signal input to the second inverting input terminal, so as to adjust the calculation accuracy of the second inverting amplifier 6321 on the first voltage signal.

[0165] Furthermore, in an optional embodiment, such as Figure 8 As shown, the second compensation unit 6323 also includes a sixth sub-compensation resistor R9 located between the fourth sub-compensation resistor R8 and the second positive input terminal. In this embodiment, by adding the sixth sub-compensation resistor R9, the first voltage signal divided to the second compensation unit 6323 can be adjusted, thereby adjusting the voltage signal input to the second positive input terminal, so as to adjust the calculation accuracy of the second inverting amplifier 6321 on the first voltage signal.

[0166] In an optional embodiment, such as Figure 8 As shown, the second sampling resistor unit 6311 includes a first fixed resistor R10 and a first variable resistor RS2 connected in series with the first fixed resistor R10.

[0167] The end of the first fixed resistor R10 connected to the analog voltage input terminal 10 is the first end of the second sampling resistor unit 6311.

[0168] The end where the first variable resistor RS2 is connected to the analog voltage output terminal 20 is the second end of the second sampling resistor unit 6311.

[0169] The sliding end of the first variable resistor RS2 is connected in series with the second sampling capacitor 6312, serving as the third end of the second sampling resistor unit 6311.

[0170] In this embodiment, the second sampling resistor unit 6311 is composed of a first variable resistor RS2 and a first fixed resistor R10. With this setting, the first voltage signal divided to the first sampling capacitor C1 can be adjusted, thereby adjusting the voltage signal input to the second inverting input terminal, so as to adjust the calculation accuracy of the second inverting amplifier 6321 on the first voltage signal.

[0171] like Figure 8As shown, the noise reduction circuit 30 of this embodiment of the invention utilizes the inputs of the first compensation unit 6322 and the AC sampling module 31 as the negative input of the second inverting amplifier 6321, and utilizes the input of the second compensation unit 6323 as the positive input of the second inverting amplifier 6321, making the operation of the second inverting amplifier 6321 more accurate. Furthermore, the compensation amount of the first compensation unit 6322 and the extraction amount of the AC sampling module 31 can be adjusted, making the extraction of the ripple voltage signal in the first voltage signal more accurate and the adjustment more convenient, thereby further improving the noise reduction effect.

[0172] The simulation diagram of the noise reduction circuit 30 in this embodiment is as follows: Figure 9 As shown, Figure 9 As shown, the ripple voltage signal of the second voltage signal input to the analog voltage output terminal 20 is also reduced compared to the ripple voltage signal in the first voltage signal. Based on the simulation diagram, it can be seen that the ripple voltage signal in the first voltage signal is reduced from 232mV to 74mV in the second voltage signal after passing through the noise reduction circuit 30. This also reduces the ripple voltage signal and effectively improves the noise of the display product.

[0173] In a specific example, such as Figure 8 As shown, the flow direction of the first voltage signal output from the analog voltage input terminal 1010 is as follows:

[0174] The first voltage signal is input to the first terminal of the second sampling resistor unit 6311. A portion of the first voltage signal is shunt from the second terminal of the second sampling resistor unit 6311 and output to the analog voltage output terminal 20. Another portion is shunt from the third terminal of the second sampling resistor unit 6311 and enters the second sampling capacitor 6312. The second sampling capacitor 6312 extracts the ripple voltage signal from the input portion of the first voltage signal. The second sampling capacitor 6312 inputs the ripple-extracted first voltage signal to the second negative input terminal of the second inverting amplifier 6321. The ripple signal extraction of the AC sampling module is completed.

[0175] Furthermore, during the process of a portion of the first voltage signal being output from the two ends of the second sampling resistor unit 6311 to the analog voltage output terminal 20, it passes through the second end of the first compensation unit 6322. This portion of the first voltage signal is further divided and sent to the first compensation unit 6322, and then output to the second negative input terminal of the second inverting amplifier 6321.

[0176] Similarly, as a portion of the first voltage signal is output from the two ends of the second sampling resistor unit 6311 to the analog voltage output terminal 20, it passes through the second end of the second compensation unit 6323. After being divided by the first compensation unit 6322, this portion of the first voltage signal is further divided to the second compensation unit 6323, and then output to the second positive input terminal of the second inverting amplifier 6321 via the second compensation unit 6323.

[0177] The second inverting amplifier 6321 performs calculations based on the inputs from the second positive input terminal and the second negative input terminal. The second output terminal outputs the corrected second voltage signal to the gate 6324G and source 6324S of the driving transistor group 6324. After the driving transistor group 6324 is turned on, the signal is output to the analog voltage output terminal 20 through the drain 6324D of the driving transistor group 6324.

[0178] The above process is a schematic diagram of noise reduction processing of the first voltage signal. During the continuous output of the first voltage signal, the above process is repeated. Therefore, the ripple signal in the first voltage signal is continuously extracted, thereby outputting a second voltage signal with less ripple voltage signal.

[0179] In an optional embodiment, such as Figure 8 As shown, the driving circuit also includes a protection circuit 81. One end of the protection circuit 81 is connected to the analog voltage input terminal 10, and the other end is located at the potential between the second terminal of the second sampling resistor unit 6311 and the drain 6324D of the driving transistor group 6324.

[0180] In a specific example, such as Figure 8 As shown, the protection circuit 81 includes:

[0181] The connections of the first protection resistor R11, the second protection resistor R12, the third protection resistor R13, and the third driving transistor T3 are as follows:

[0182] The first protection resistor R11, the second protection resistor R12, and the third protection resistor R13 are connected in series.

[0183] In this configuration, the first terminal of the first protection resistor R11 is connected to the analog voltage input terminal 10, and the second terminal is connected to the first terminal of the second protection resistor R12.

[0184] The second terminal of the second protective resistor R12 is connected to the first terminal of the third protective resistor R13.

[0185] The second terminal of the third protection resistor R13 is connected to the second terminal of the AC sampling module 31;

[0186] The third driving transistor T3 includes a third gate T3G, a third source T3S, and a third drain T3D. The third gate T3G is located at the potential between the first end of the second protection resistor R12 and the second end of the first protection resistor R11. The third source T3S is connected to the second output terminal of the second inverting amplifier 6321. The third drain T3D is connected to the potential between the second terminal of the AC sampling module 31 and the second terminal of the third protection resistor R13.

[0187] With this configuration, the present invention embodiment utilizes the protection circuit 81 to construct a noise reduction circuit 30 with current feedback overload protection characteristics.

[0188] In a specific example, if the design of the first protection resistor R11 is omitted,

[0189] At this time, the output current is limited by the resistance value of the third protection resistor R13. The maximum output current is: Imax = Vb3 - Ve3 / 12. In the formula, Vb3 - Ve3 is the voltage of the emitter junction (source) when the third driving transistor is normally turned on. This plays an overcurrent protection role. It can prevent damage to the third driving transistor when the load is momentarily short-circuited. However, if the short circuit continues, the third driving transistor will still be damaged due to excessive temperature.

[0190] Therefore, the present invention further designs the structure of the protection circuit 81 by adding a first protection resistor R11.

[0191] The maximum output current is: Imax = Vb3 - Ve3 - (V1 - V0)R12 / R13. When an overload occurs, the output voltage drops, and the current through resistor R9 increases. Therefore, the output current will decrease and tend to stabilize at a fixed value I1, at which point I1 = Vb3 - Ve3 - V1 * R12 / R13. As can be seen from the formula, I1 is smaller than Imax. Therefore, through this setting, even if the analog voltage output terminal 20 in the noise reduction circuit 30 is short-circuited for a long time, the third driving transistor will not be damaged. Furthermore, when the short circuit at the analog voltage output terminal 20 is repaired, the second voltage signal output by the analog voltage output terminal 20 can immediately return to the normal voltage level.

[0192] Therefore, the noise reduction circuit 30 of this embodiment of the invention not only has a good noise reduction effect, but also has good overload protection characteristics and a wide adjustable range of output voltage.

[0193] In an optional embodiment, such as Figure 6 and Figure 8As shown, the noise reduction circuit 30 also includes a first filter capacitor C2. The first end of the first filter capacitor C2 is located at the potential between the analog voltage input terminal 10 and the third power supply, and the other end is connected to the ground wire, thereby filtering the first voltage signal to reduce noise interference of the input first voltage signal.

[0194] In an optional embodiment, such as Figure 6 As shown, the noise reduction circuit 30 also includes a second filter capacitor C3. The first end of the second filter capacitor C3 is located at the X-end of the second compensation unit 6323 and the first positive input end of the first inverting amplifier 2321, and the second end is connected to the ground wire.

[0195] In another alternative embodiment, such as Figure 8 As shown, the noise reduction circuit 30 also includes a third filter capacitor C4. The first end of the third filter capacitor C4 is located at the potential between the fifth sub-compensation resistor RS1 and the sixth sub-compensation resistor R9 of the second compensation unit 6323, and the second end is connected to the ground wire.

[0196] In an optional embodiment, the drive transistor group 6324 further includes a first drive transistor T1 and a second drive transistor T2.

[0197] The second gate of the second driving transistor T2 serves as the gate 6324G of the driving transistor group 6324.

[0198] The second source of the second driving transistor T2 is connected to the first source of the first driving transistor T1, serving as the source 6324S of the driving transistor group 6324.

[0199] The second drain of the second driving transistor T2 is connected to the first gate of the first driving transistor T1.

[0200] The first drain of the first driving transistor T1 serves as the drain 632D of the driving transistor group 6324.

[0201] The present invention utilizes the structural design of the drive transistor group 6324 with a common drain, which can prevent leakage and improve the electrical stability of the noise reduction circuit 30.

[0202] In an optional embodiment, the present invention further includes a protective resistor disposed in the circuit, for example...

[0203] The fifth protection resistor R15 is located between the potential of the second output terminal and the gate 6324G of the drive transistor group 6324.

[0204] It is worth noting that the resistance values ​​of each noise reduction circuit 30 in the embodiments of the present invention are designed according to the actual application of the driving circuit, and will not be described in detail here.

[0205] In a specific example Figure 2 and Figure 4 The resistors, capacitors, and voltage values ​​used in each component of the noise reduction circuit shown are as follows: Figure 10 As shown, in a specific example, Figure 6 The resistors, capacitors, and voltage values ​​used in each component of the noise reduction circuit shown are as follows: Figure 11 As shown, in a specific example, Figure 8 The resistors, capacitors, and voltage values ​​used in each component of the noise reduction circuit shown are as follows: Figure 12 As shown in the figure, the values ​​are for illustrative purposes only and will not be elaborated upon further.

[0206] Another embodiment of the present invention provides a display device including the driving circuit of the above embodiment. The display device includes the driving circuit of the above embodiment of the present invention. The display device can be any product or component with display function, such as electronic paper, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator; this embodiment does not limit this.

[0207] In an optional embodiment, the display device includes a display panel and a circuit board, the circuit board being provided with the driving circuit, and the circuit board and the display panel being electrically connected to drive the display panel using the noise-reduction driving circuit of this embodiment. Another embodiment of the present invention provides a noise reduction method, the method comprising:

[0208] The analog voltage input terminal outputs the first voltage signal;

[0209] The analog voltage output terminal outputs a second voltage signal based on the first voltage signal.

[0210] The AC sampling module of the noise reduction circuit extracts the AC ripple signal from the first voltage signal.

[0211] The ripple noise reduction module of the noise reduction circuit performs noise reduction processing on the AC ripple signal, so that the analog voltage output terminal outputs the second voltage signal, and the ripple voltage signal of the second voltage signal is less than the ripple voltage signal of the first voltage signal.

[0212] In the description of this invention, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, without necessarily requiring or implying any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0213] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. For those skilled in the art, other variations or modifications can be made based on the above description. It is impossible to exhaustively list all the implementation methods here. All obvious variations or modifications derived from the technical solutions of the present invention are still within the protection scope of the present invention.

Claims

1. A driving circuit, characterized in that, The driving circuit includes: The analog voltage input terminal is used to output the first voltage signal; An analog voltage output terminal is used to output a second voltage signal based on the first voltage signal; and A noise reduction circuit located between the analog voltage input terminal and the analog voltage output terminal; The noise reduction circuit includes: The AC sampling module connected to the analog voltage input terminal is used to extract the AC ripple signal from the first voltage signal. The ripple noise reduction module is connected at one end to the AC sampling module and at the other end to the analog voltage output terminal. It is used to perform noise reduction processing on the AC ripple signal so that the analog voltage output terminal outputs the second voltage signal, and the ripple voltage signal of the second voltage signal is less than the ripple voltage signal of the first voltage signal. The ripple noise reduction module includes: The system comprises a second inverting amplifier, a first compensation unit, a second compensation unit, and a drive transistor group. The second inverting amplifier includes: The second negative input terminal is connected to the first terminal of the first compensation unit and is connected to the first compensation signal input by the first compensation unit. The second positive input terminal is used to connect to the first terminal of the second compensation unit and to receive the second compensation signal input from the second compensation unit; and The second output terminal is connected to the gate and drain of the driving transistor group and is used to generate a second voltage signal based on the AC ripple signal, the first compensation signal and the second compensation signal output by the AC sampling module. The second terminal of the first compensation unit is located at the potential between the analog voltage output terminals and the AC sampling module, and the third terminal of the first compensation unit is connected to the ground wire. The second terminal of the second compensation unit is located at the potential between the analog voltage output terminal and the AC sampling module. The source of the driving transistor group is located at the potential between the analog voltage output terminal and the AC sampling module.

2. The driving circuit according to claim 1, characterized in that, The second voltage signal output from the analog voltage output terminal is the ripple voltage signal. The ripple noise reduction module includes a first inverting amplifier and a first resistor: The first inverting amplifier includes: The first negative input terminal is connected to the AC sampling module; The first positive input terminal is used to receive the DC voltage signal from the first voltage signal; and The first output terminal is connected to the analog voltage output terminal and is used to generate a second voltage signal based on the DC voltage signal and the AC ripple signal output by the AC sampling module. The first end of the first resistor is connected to the potential between the AC sampling module and the first negative input terminal, and the second end is connected to the potential between the first output terminal and the analog voltage output terminal.

3. The driving circuit according to claim 2, characterized in that, The AC sampling module includes: The first sampling capacitor and the first sampling resistor, One end of the first sampling capacitor is connected to the analog voltage input terminal, and the other end is connected in series with the first sampling resistor. The first sampling resistor is connected to the first negative input terminal, and the second end of the first resistor is connected to the potential between the first sampling resistor and the first negative input terminal.

4. The driving circuit according to claim 3, characterized in that, The noise reduction circuit also includes a compensation resistor. The first end of the compensation resistor is connected to the potential between the analog voltage input terminal and the first sampling capacitor. The second end of the compensation resistor is connected to the potential between the analog voltage output terminal and the second end of the first resistor.

5. The driving circuit according to claim 1, characterized in that, The AC sampling module includes: The second sampling resistor unit and the second sampling capacitor, The second sampling resistor unit includes: a first terminal connected to the analog voltage input terminal, a second terminal connected to the analog voltage output terminal, and a third terminal connected in series with the second sampling capacitor; The second sampling capacitor is connected to the potential between the first compensation unit and the second negative input terminal.

6. The driving circuit according to claim 5, characterized in that, The first compensation unit includes: The first and second sub-compensation resistors are connected in series, and the third sub-compensation resistor has its first terminal connected between the series potentials of the first and second sub-compensation resistors. The first terminal of the first sub-compensation resistor is connected to the potential between the analog voltage output terminal and the second terminal of the second sampling resistor unit, and the second terminal is connected to the second terminal of the second sub-compensation resistor. The first terminal of the second compensation resistor is connected to the ground wire. The second terminal of the third sub-compensation resistor is connected to the second negative input terminal. The second sampling capacitor is located at the potential between the third sub-compensation resistor and the second negative input terminal.

7. The driving circuit according to claim 6, characterized in that, The first compensation unit further includes: The fifth sub-compensation resistor is located between the first and second sub-compensation resistors connected in series. The fifth sub-compensation resistor is a sliding variable resistor, and the sliding end of the fifth sub-compensation resistor is connected to the second end of the third sub-compensation resistor.

8. The driving circuit according to claim 1, characterized in that, The second compensation unit includes a fourth sub-compensation resistor, the first end of which is connected to the potential between the analog voltage output terminal and the second end of the first compensation unit; or, The second compensation unit further includes a sixth sub-compensation resistor located between the fourth sub-compensation resistor and the second positive input terminal.

9. The driving circuit according to claim 5, characterized in that, The second sampling resistor unit includes a first fixed resistor and a first variable resistor connected in series with the first fixed resistor. The end of the first fixed resistor connected to the analog voltage input terminal is the first end of the second sampling resistor unit. The end of the first variable resistor connected to the analog voltage output terminal is the second end of the second sampling resistor unit. The sliding end of the first variable resistor is connected in series with the second sampling capacitor, serving as the third end of the second sampling resistor unit.

10. The driving circuit according to claim 5, characterized in that, The second sampling resistor unit includes: a second fixed resistor and a third fixed resistor connected in series with the second fixed resistor. The end of the second fixed resistor connected to the analog voltage input terminal is the first end of the second sampling resistor unit. The end of the third fixed resistor connected to the analog voltage output terminal is the second end of the second sampling resistor unit. The third fixed resistor is connected in series with the second sampling capacitor, serving as the third terminal of the second sampling resistor unit.

11. The driving circuit according to claim 5, characterized in that, The driving circuit also includes a protection circuit, one end of which is connected to the analog voltage input terminal, and the other end is located at the potential between the second terminal of the second sampling resistor unit and the drain of the driving transistor group.

12. A display device, characterized in that, The driving circuit includes any one of claims 1 to 11.

13. The display device according to claim 12, characterized in that, The display device includes a display panel and a circuit board, the circuit board being provided with the driving circuit, and the circuit board and the display panel being electrically connected.

14. A noise reduction method applied to the driving circuit according to any one of claims 1 to 11, characterized in that, The method includes: The analog voltage input terminal outputs the first voltage signal; The analog voltage output terminal outputs a second voltage signal based on the first voltage signal. The AC sampling module of the noise reduction circuit extracts the AC ripple signal from the first voltage signal. The ripple noise reduction module of the noise reduction circuit performs noise reduction processing on the AC ripple signal, so that the analog voltage output terminal outputs the second voltage signal, and the ripple voltage signal of the second voltage signal is less than the ripple voltage signal of the first voltage signal.

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