Multilayer circuit board and method of manufacturing the same

Abstract

A manufacturing method of a multilayer circuit board, comprising the following steps: providing a first circuit substrate, comprising an insulating layer and a first conductive layer which are arranged in a stack, wherein the first conductive layer comprises an unpatterned region; providing a first single-sided board, comprising a first base layer and a first metal layer which are arranged in a stack, wherein the first single-sided board is provided with a window which penetrates through the first base layer and the first metal layer; providing a second single-sided board, comprising a second base layer and a second metal layer; laminating the first base layer of the first single-sided board and the second base layer of the second single-sided board on opposite sides of the first circuit substrate, wherein at least a part of the unpatterned region is exposed from the window; providing a through hole on the first circuit substrate and the second single-sided board, the through hole penetrating through the first conductive layer and the second metal layer and communicating with the window; and performing electroplating treatment on the through hole to form a conductive hole which electrically connects the first conductive layer and the second metal layer. The application further provides a multilayer circuit board manufactured by the above method.

Description

Technical Field

[0001] This invention relates to the field of circuit boards, and more particularly to a multilayer circuit board and its manufacturing method. Background Technology

[0002] Consumer electronics are increasingly trending towards thinner, smaller, and smarter designs, with fully functional printed circuit boards (FPCs) playing a crucial role. This leads to increasingly stringent requirements for different functional stacks within the same FPC. Consequently, different areas on the same FPC are designed with different traces and layers. Multilayer circuit boards have exposed inner-layer circuitry areas. A common method for creating a through-type circuit board connecting an inner and outer layer in this exposed area involves first providing the inner-layer circuit board, then bonding two copper-clad laminates to it with adhesive, and finally exposing part of the inner-layer circuitry on one of the copper-clad laminates. Through-holes are then created on both the inner and outer layers in the exposed area, and electroplating is used to form conductive vias. However, this method results in a problem: because of the circuitry surrounding the vias, the current during electroplating can only flow from the outer layer to the inner layer, creating a potential difference between them. This results in an uneven copper plating thickness along the thickness direction of the circuit board, with the metal plating of the conductive vias exhibiting a gradually tapering profile. Summary of the Invention

[0003] In view of the above, the present invention provides a method for manufacturing a multilayer circuit board that solves the above-mentioned technical problems, and a multilayer circuit board formed by the method.

[0004] The first aspect of this application provides a method for manufacturing a multilayer circuit board, comprising the following steps:

[0005] A first circuit board is provided, comprising an insulating layer and a first conductive layer stacked thereon, wherein the first conductive layer includes a patterned region and an unpatterned region;

[0006] A first single panel is provided, comprising a first base layer and a first metal layer stacked together, wherein the first single panel has an opening that penetrates the first base layer and the first metal layer;

[0007] Provide a second single-sided panel, including a second base layer and a second metal layer;

[0008] The first base layer of the first single-sided panel and the second base layer of the second single-sided panel are pressed onto opposite sides of the first circuit board, wherein at least a portion of the unpatterned area of ​​the first conductive layer is exposed from the opening;

[0009] Through holes are formed on the first circuit board and the second single-sided board, the through holes penetrating the first conductive layer and the second metal layer and being connected to the window opening;

[0010] Electroplating is performed on the through hole to form a conductive hole, and the first conductive layer and the second metal layer are electrically connected through the conductive hole.

[0011] A second aspect of this application provides a multilayer circuit board, including a first circuit board and a second and a third circuit board disposed on opposite sides of the first circuit board. The second circuit board has a window that exposes a portion of the first circuit board. Conductive holes are formed on the first and third circuit boards. The conductive holes are connected to and electrically connected to the window. The walls of the conductive holes are formed with a metal plating layer, and the thickness of the metal plating layer is consistent at all points along the thickness direction of the multilayer circuit board.

[0012] The method for manufacturing a multilayer circuit board provided in this application does not perform circuit fabrication on the portion of the first conductive layer exposed in the opening of the second circuit substrate when forming the first conductive layer, so that a metal plating layer with uniform thickness can be formed when electroplating to form conductive holes that penetrate the first and third circuit substrates. Attached Figure Description

[0013] Figures 1 to 5 This is a cross-sectional schematic diagram of the fabrication process of the multilayer circuit board according to the first embodiment of this application.

[0014] Explanation of main component symbols

[0015] First circuit board 10

[0016] Insulation layer 11

[0017] First conductive layer 12

[0018] Second conductive layer 13

[0019] Unpatterned area 121

[0020] Patterned area 122

[0021] First single-sided panel 200

[0022] Second single-sided panel 300

[0023] First grassroots level 21

[0024] First metal layer 22

[0025] Window 201

[0026] Second grassroots level 31

[0027] Second metal layer 32

[0028] Adhesive layer 40

[0029] Through hole 110

[0030] Conductive hole 101

[0031] Metal plating 111

[0032] First conductive circuit layer 23

[0033] Second conductive circuit layer 33

[0034] Second circuit board 20

[0035] Third circuit board 30

[0036] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0037] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0039] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined or substituted with each other.

[0040] Please see Figures 1 to 5 The first embodiment of this application provides a method for manufacturing a multilayer circuit board, which includes the following steps:

[0041] Step S1, please refer to Figure 1 A first circuit board 10 is provided, including an insulating layer 11 and a first conductive layer 12 and a second conductive layer 13 disposed on opposite surfaces of the insulating layer 11.

[0042] The first conductive layer 12 includes a patterned region 122 and an unpatterned region 121. Circuits are formed on the patterned region 122, while no circuits are formed on the unpatterned region 121. The position of the unpatterned region 121 corresponds to the position of the opening in the multilayer circuit board. In this embodiment, the unpatterned region 121 is located in the middle region of the first conductive layer 12, and the unpatterned region 121 is a complete metal plate. Apart from the region containing the unpatterned region 121, the other regions of the first conductive layer 12 are patterned regions 122.

[0043] The insulating layer 11 is made of dielectric materials commonly used in the art, such as polyimide and epoxy resin. The materials of the second conductive layer 13 and the first conductive layer 12 may include, but are not limited to, copper, gold, and silver.

[0044] The first circuit board 10 can be manufactured by the following steps: providing a substrate, the substrate including an insulating layer 11 and metal layers disposed on two opposite surfaces of the insulating layer; fabricating circuits in the entire area of ​​one of the metal layers to form a second conductive layer 13; fabricating circuits in a portion of the other metal layer to form a first conductive layer 12.

[0045] The first conductive layer 12 and the second conductive layer 13 are formed using image transfer and etching processes.

[0046] During circuit fabrication, the remaining area on another metal layer is not etched to form the unpatterned area 121.

[0047] For step S2, please refer to [link / reference]. Figure 2 A first single-panel 200 and a second single-panel 300 are provided, and the first single-panel 200 and the second single-panel 300 are respectively laminated onto the first conductive layer 12 and the second conductive layer 13.

[0048] The first single-sided panel 200 includes a first base layer 21 and a first metal layer 22 stacked together. The first single-sided panel 200 has a window 201 that penetrates the first base layer 21 and the first metal layer 22. The size of the window 201 is less than or equal to the size of the unpatterned area 121, such that at least a portion of the unpatterned area 121 can be exposed through the window 201, while the patterned area 122 on the first conductive layer 12, which has circuitry, is not exposed through the window.

[0049] In this embodiment, the opening 201 is pre-formed on the first single-sided panel 200. Before lamination, the first single-sided panel 200 and the first circuit board 10 are aligned so that the opening 201 is aligned with the unpatterned area 121. In other embodiments, the opening 201 can be formed after the first single-sided panel 200 is laminated onto the first circuit board 10, for example, through a cover-up process.

[0050] The second single-sided panel 300 includes a second base layer 31 and a second metal layer 32 stacked together. The second single-sided panel 300 covers the second conductive layer 13.

[0051] The second base layer 31 and the first base layer 21 are respectively bonded to the second conductive layer 13 and the first conductive layer 12 by an adhesive layer 40. The adhesive layer 40 is a commonly used adhesive in the art, such as thermally conductive pressure-sensitive adhesive.

[0052] The materials of the first base layer 21 and the second base layer 31 are commonly used dielectric materials in the art, such as polyimide and epoxy resin. The materials of the first metal layer 22 and the second metal layer 32 may include, but are not limited to, copper, gold, silver, etc.

[0053] Step S3, please refer to Figure 3 Through holes 110 are formed on the first circuit board 10 and the second single-sided board 300.

[0054] The through-hole 110 penetrates the unpatterned area 121 of the first conductive layer 12 and the second metal layer 32 along the thickness direction of the multilayer circuit board, and is connected to the opening 201. In this application, the thickness direction of the multilayer circuit board refers to the stacking direction of the first single-sided board 200, the first circuit board 10, and the second single-sided board 300.

[0055] The through hole 110 can be formed by mechanical drilling or laser drilling.

[0056] For step S4, please refer to [link / reference]. Figure 4 The through-hole 110 is electroplated to form a conductive hole 101. The conductive hole 101 is connected to the unpatterned area 121 of the first conductive layer 12 and the second metal layer 32.

[0057] During electroplating, a metal plating layer 111 is deposited on the wall of the through hole 110 to form the conductive hole 101. The metal plating layer 111 is connected to the unpatterned area 121 of the first conductive layer 12 and the second metal layer 32. The material of the metal plating layer 111 may include, but is not limited to, copper, gold, silver, etc.

[0058] Since both the unpatterned region 121 of the first conductive layer 12 and the second metal layer 32 are complete metal plates, during electroplating of the via 110, current flows bidirectionally from the unpatterned region 121 of the first conductive layer 12 to the second metal layer 32 and from the second metal layer 32 back to the unpatterned region 121 of the first conductive layer 12. This prevents a potential difference from forming between the second metal layer 32 and the unpatterned region 121 of the first conductive layer 12, resulting in a uniform thickness of the deposited metal plating 111 along the thickness direction of the multilayer circuit board. That is, the thickness of the metal plating 111 is consistent throughout the thickness direction of the multilayer circuit board. In this application, the thickness of the metal plating 111 refers to the distance between the surface of the metal plating 111 away from the wall of the via 110 and the wall of the via 110.

[0059] Step S5, please refer to Figure 5 Circuitry is fabricated on the first metal layer 22 and the second metal layer 32 to form a first conductive circuit layer 23 and a second conductive circuit layer 33, resulting in a multilayer circuit board.

[0060] The first conductive line layer 23 and the first base layer 21 constitute the second circuit substrate 20. The second conductive line layer 33 and the second base layer 31 constitute the third circuit substrate 30. The first conductive line layer 23 and the second conductive line layer 33 can be formed by image transfer process and etching process.

[0061] While fabricating circuits on the first metal layer 22 and the second metal layer 32, circuits are also fabricated on the unpatterned area 121 of the first conductive layer 12 to form a portion of the circuits in the first conductive layer 12.

[0062] Please see Figure 5 This application provides a multilayer circuit board, including a first circuit board 10 and a second circuit board 20 and a third circuit board 30 disposed on opposite sides of the first circuit board 10. The second circuit board 20 has a window 201 through which a portion of the first circuit board 10 is exposed. The first circuit board 10 and the third circuit board 30 have conductive vias 101, which pass through and electrically connect the first circuit board 10 and the third circuit board 30 and communicate with the window 201. The sidewalls of the conductive vias 101 are provided with a metal plating layer 111, and the thickness of the metal plating layer 111 is uniform throughout the thickness direction of the multilayer circuit board.

[0063] The method for manufacturing a multilayer circuit board provided in this application does not perform circuit fabrication on the portion of the first conductive layer exposed to the opening of the second circuit substrate when forming the first conductive layer. This allows a metal plating layer with uniform thickness to be formed when electroplating conductive holes that penetrate the first and third circuit substrates. Furthermore, when forming the circuits of the second and third circuit substrates, the circuits are formed simultaneously on the unpatterned area of ​​the first conductive layer, simplifying the process flow.

[0064] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above as a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A method for manufacturing a multilayer circuit board, characterized in that, Includes the following steps: A first circuit board is provided, comprising an insulating layer and a first conductive layer stacked thereon, wherein the first conductive layer includes a patterned region and an unpatterned region; A first single panel is provided, comprising a first base layer and a first metal layer stacked together, wherein the first single panel has an opening that penetrates the first base layer and the first metal layer; A second single-sided panel is provided, including a second base layer and a second metal layer, wherein the second metal layer is a complete unpatterned metal plate; The first base layer of the first single-sided panel and the second base layer of the second single-sided panel are pressed onto opposite sides of the first circuit board, wherein at least a portion of the unpatterned area of ​​the first conductive layer is exposed from the opening; Through holes are formed on the first circuit board and the second single-sided board, the through holes passing through the unpatterned area of ​​the first conductive layer and the second metal layer and being connected to the opening; Electroplating is performed on the through hole to form a conductive hole, and the first conductive layer and the second metal layer are electrically connected through the conductive hole.

2. The method for manufacturing a multilayer circuit board as described in claim 1, characterized in that, The steps of "providing the first circuit board" include: A substrate is provided, comprising an insulating layer and a metal layer stacked thereon; A portion of the metal layer is etched to form circuits, while the remaining portion of the metal layer is not etched, to obtain a first circuit substrate.

3. The method for manufacturing a multilayer circuit board as described in claim 1, characterized in that, The size of the opening is less than or equal to the size of the unpatterned area of ​​the first conductive layer, so that the lines of the first conductive layer will not be exposed from the opening during lamination.

4. The method for manufacturing a multilayer circuit board as described in claim 1, characterized in that, It also includes the following steps: A first conductive circuit layer and a second conductive circuit layer are formed by fabricating circuits on the first metal layer and the second metal layer.

5. The method for manufacturing a multilayer circuit board as described in claim 4, characterized in that, While forming the first conductive circuit layer and the second conductive circuit layer, circuits are fabricated in the unpatterned area of ​​the first conductive layer to form a circuit.

6. The method for manufacturing a multilayer circuit board as described in claim 1, characterized in that, The first substrate and the second substrate are respectively bonded to opposite sides of the first circuit board by adhesive layer.

7. The method for manufacturing a multilayer circuit board as described in claim 1, characterized in that, Before the step of "pressing the first base layer of the first single-sided panel and the second base layer of the second single-sided panel onto opposite sides of the first circuit board", the following step is included: aligning the first single-sided panel and the first circuit board so that the opening is aligned with the unpatterned area of ​​the first conductive layer.

8. The method for manufacturing a multilayer circuit board as described in claim 1, characterized in that, The first circuit board further includes a second conductive layer, which is disposed on the side of the insulating layer away from the first conductive layer, and the first base layer and the second base layer are respectively pressed onto the first conductive layer and the second conductive layer.

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