A method and device for detecting scale layer of equalizing electrode in main water circuit of converter valve cooling system

Abstract

The application discloses a kind of main waterway equalizing electrode scale layer detection method and device of converter valve cooling system, and the present application includes obtaining the ultrasonic echo signal of the detected equalizing electrode under ultrasonic excitation signal, and the ultrasonic excitation signal is generated based on the hanning window modulation sine wave signal with amplitude above 100V;The ultrasonic echo signal is denoised, the scale layer thickness feature is extracted, and the scale layer thickness of the detected equalizing electrode is identified using neural network model.The present application can solve the problem that current equalizing electrode adopts artificial disassembly method detection blindness, and the problem of complicated operation, and the ultrasonic guided wave under the ultrasonic excitation signal generated based on the hanning window modulation sine wave signal with amplitude above 100V has the characteristics of signal energy concentration, long propagation distance and small attenuation, and the present application can realize wireless monitoring at a long distance in the upper end, improve the convenience of work, and is suitable for non-disassembly detection of main waterway equalizing electrode scale layer in converter valve cooling system.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of detection of a converter valve cooling system, and particularly relates to a detection method and device for scale layer of a voltage-sharing electrode in a main water path of a converter valve cooling system. BACKGROUND

[0002] The voltage-sharing electrode installed in the main water path of the valve cooling system of the converter valve can effectively clamp the potential and the electrolytic current generated after the metal elements in different potentials in the water path are cooled, reduce the heat generated by the converter valve, and effectively discharge to the valve hall, thereby prolonging the service life of each element. However, after being electrified, the metal component ions are prone to move to the surface of the voltage-sharing electrode to produce chemical reactions and scale, which is easy to cause scale to fall off and block the water pipe, electrolytic corrosion to be aggravated, and other hazards, causing the water cooling system of the converter valve to fail. At present, the converter valve is mainly shut down, and the electrodes are cleaned or replaced one by one by manual method to eliminate the influence of the scale of the voltage-sharing electrode. This method has great blindness, and the voltage-sharing electrode is not only troublesome to operate, but also easy to cause a water leakage fault, which seriously affects the safe operation of the equipment. Therefore, it is of great significance to develop a non-disassembly detection device for the scale layer of the voltage-sharing electrode. The Chinese patent application with the publication number CN114111657A discloses a voltage-sharing electrode scale thickness detection system and an operating method. In the system, an integrated drive chip HV7355 is used to drive a high-frequency ultrasonic probe to generate ultrasonic waves. The HV7355 is a single-pole ultrasonic pulse generator, which has the problem that it can only generate a single-polarity square wave pulse excitation, and it is difficult to adapt to the detection requirements in different detection environments. Compared with a bipolar modulation signal excitation, the ultrasonic signal under the condition of a single-polarity pulse excitation decays greatly with the propagation distance, and the effective scale layer detection information carried by the echo signal is less, and the requirements for the scale layer detection algorithm are more stringent. SUMMARY

[0003] The technical problem to be solved by the present application is to provide a detection method and device for scale layer of a voltage-sharing electrode in a main water path of a converter valve cooling system, which can solve the problems of great blindness and complicated operation of the current manual disassembly method for detecting the voltage-sharing electrode in the main water path of the converter valve cooling system. The ultrasonic excitation signal is generated based on a Hann window modulation sine wave signal with an amplitude of 100V or more. The ultrasonic guided wave under the excitation of the signal has the characteristics of concentrated signal energy, long propagation distance, and small attenuation. The present application can realize wireless monitoring at a long distance at the upper end, improve the work convenience, and is suitable for non-disassembly detection of the scale layer of the voltage-sharing electrode in the main water path of the converter valve cooling system.

[0004] To solve the above technical problems, the technical scheme adopted by the present application is as follows:

[0005] A detection method for scale layer of a voltage-sharing electrode in a main water path of a converter valve cooling system, comprising:

[0006] S101, acquire an ultrasonic echo signal of the detected equalizing electrode under an ultrasonic excitation signal, the ultrasonic excitation signal being generated based on a Hanning window modulated sinusoidal wave signal with an amplitude of 100 V or more;

[0007] S102, denoise the ultrasonic echo signal;

[0008] S103, extract a scale layer thickness feature from the denoised ultrasonic echo signal;

[0009] S104, identify the scale layer thickness of the detected equalizing electrode using a neural network model.

[0010] Optionally, step S102 comprises:

[0011] S201, perform N-layer wavelet packet transform on the ultrasonic echo signal ψ(t) to obtain 2 N decomposition signals of sub-bands, denoting the decomposition signal corresponding to any i-layer j-node as S i,j , and the decomposition coefficient as X i,j .

[0012] S202, reconstruct the reconstruction energy E k of each sub-band according to the decomposition coefficient X i,j ; and compose a feature vector T with the reconstruction energies E k of the 2 N sub-bands.

[0013] S203, denoise the feature vector T using a genetic-ant colony denoising algorithm to obtain a denoised ultrasonic echo signal V(t).

[0014] Optionally, in step S202, the function expression of the reconstruction energy E k of each sub-band reconstructed according to the decomposition coefficient X i,j is:

[0015]

[0016] In the above formula, E i,j is the energy of the i-layer j-node, and has:

[0017]

[0018] In the above formula, S i,j and X i,j are the decomposition signal and the decomposition coefficient corresponding to the i-layer j-node, respectively.

[0019] Optionally, step S203 comprises:

[0020] S301, initializing a population X according to a feature vector T, constructing a fitness function according to a difference between reconstructed energy of each sub-band and energy of the de-noised ultrasonic echo signal;

[0021] S302, performing crossover, mutation and heredity on individuals in the population X;

[0022] S303, exchanging pheromones between individuals in the population X;

[0023] S304, updating a pheromone table of the population X and the fitness function of each individual;

[0024] S305, judging whether the fitness function is less than or equal to a preset value, if the fitness function is less than or equal to the preset value, jumping to step S202; otherwise, taking the current population X as the de-noised ultrasonic echo signal V(t).

[0025] Optionally, step S103 comprises:

[0026] S401, performing Hilbert transform on the de-noised ultrasonic echo signal V(t);

[0027] S402, calculating a modulus value of a result of the Hilbert transform to obtain an envelope D(t);

[0028] S403, extracting a feature vector M composed of amplitude, first wave packet points, second wave packet points, wave packet number and wave packet amplitude rising rate of the envelope D(t) as the scale layer thickness feature.

[0029] Optionally, a function expression for performing the Hilbert transform in step S401 is:

[0030]

[0031] In the above formula, is a result of the Hilbert transform, V(t) is the de-noised ultrasonic echo signal, H represents the Hilbert transform, and t and τ are time.

[0032] Optionally, the neural network model in step S104 is a BP neural network, the BP neural network comprises an input layer, a hidden layer and an output layer connected in sequence, the input layer contains a same number of neurons as a dimension of the scale layer thickness feature, and the output layer contains one neuron for outputting the scale layer thickness of the equalizing electrode.

[0033] Further, the application also provides a detection device for scale layer of equalizing electrode of main water circuit of converter valve cooling system, comprising an ultrasonic excitation source, an excitation transducer, a receiving transducer, an ultrasonic receiver and a control unit, the control end of the ultrasonic excitation source is connected with the control unit to generate a Hann window modulated sinusoidal wave signal with an amplitude of 100 V or above, and the output end of the ultrasonic excitation source is connected with the excitation transducer to output an ultrasonic emission signal through the excitation transducer, and the output end of the receiving transducer is connected with the ultrasonic receiver and the control unit to obtain an ultrasonic echo signal of the detected equalizing electrode under the ultrasonic excitation signal.

[0034] Further, the application also provides a detection system for scale layer of equalizing electrode of main water circuit of converter valve cooling system, characterized in that comprising a detection device for scale layer of equalizing electrode of main water circuit of converter valve cooling system and an upper computer connected with each other, the upper computer comprises a microprocessor and a memory connected with each other, the detection device for scale layer of equalizing electrode of main water circuit of converter valve cooling system is the detection device for scale layer of equalizing electrode of main water circuit of converter valve cooling system, and the microprocessor is programmed or configured to execute the detection method for scale layer of equalizing electrode of main water circuit of converter valve cooling system.

[0035] Further, the application also provides a computer readable storage medium, wherein a computer program is stored in the computer readable storage medium, and the computer program is used for programming or configuring a microprocessor to execute the detection method for scale layer of equalizing electrode of main water circuit of converter valve cooling system.

[0036] Compared with the prior art, the application mainly has the following advantages:

[0037] 1. The application can realize automatic detection of scale layer of equalizing electrode of main water circuit of converter valve cooling system without disassembly, thereby solving the problems of great blindness and complicated operation of the manual disassembly method for detecting the equalizing electrode of main water circuit of converter valve cooling system.

[0038] 2. The ultrasonic excitation signal in the ultrasonic detection method used in the application is generated based on a Hann window modulated sinusoidal wave signal with an amplitude of 100 V or above, the ultrasonic excitation signal has strong load capacity, is suitable for piezoelectric transducers under low impedance conditions (200 Ω or below), the ultrasonic guided wave under the excitation of the ultrasonic excitation signal has the characteristics of concentrated signal energy, long propagation distance and small attenuation, and is beneficial to improving the accuracy of scale layer detection.

[0039] 3. The automatic detection of scale layer of equalizing electrode of main water circuit of converter valve cooling system by using the ultrasonic detection method can realize efficient, accurate and real-time transmission of signals, and can realize remote monitoring at a long distance at the upper end, can quickly monitor scale layer information of the equalizing electrode, and improve the convenience of detection work. BRIEF DESCRIPTION OF DRAWINGS

[0040] Figure 1 is a basic flowchart of the method of the embodiment of the present application.

[0041] Figure 2 is a detailed flowchart of the method of the embodiment of the present application.

[0042] Figure 3 is a schematic diagram of the module structure of the device of the embodiment of the present application.

[0043] Figure 4 is a circuit schematic diagram of the power amplification circuit in the device of the embodiment of the present application.

[0044] Figure 5 is a circuit schematic diagram of the power supply of the power amplification circuit in the device of the embodiment of the present application.

[0045] Figure 6 is a partial circuit diagram of data acquisition in the device of the embodiment of the present application.

[0046] Figure 7 is a partial circuit diagram of data storage in the device of the embodiment of the present application.

[0047] Figure 8 is a work flowchart of the detection end FPGA data acquisition and storage in the device of the embodiment of the present application.

[0048] Figure 9 is a work flowchart of the upper end FPGA data acquisition and storage in the device of the embodiment of the present application. DETAILED DESCRIPTION

[0049] As shown in Figure 1 the present embodiment, the method for detecting scale layer of the equalizing electrode of the main waterway of the converter valve cooling system comprises the following steps:

[0050] S101, obtaining an ultrasonic echo signal of the detected equalizing electrode under an ultrasonic excitation signal, the ultrasonic excitation signal being generated based on a Hann window modulated sinusoidal signal with an amplitude of 100V or above;

[0051] S102, denoising the ultrasonic echo signal;

[0052] S103, extracting scale layer thickness features from the denoised ultrasonic echo signal;

[0053] S104, identifying the scale layer thickness of the detected equalizing electrode by using a neural network model.

[0054] In the present embodiment, let the ultrasonic echo signal be ψ(t), and step S102 comprises:

[0055] S201, performing N-layer wavelet packet transform on the ultrasonic echo signal ψ(t) to obtain 2 Ndecomposition signal of the i-th sub-band, and the decomposition signal corresponding to the j-th node of the i-th layer is denoted as S i,j , and the decomposition coefficient is X i,j ;

[0056] S202, reconstructing the reconstruction energy E i,j of each sub-band according to the decomposition coefficient X k ; and taking 2 N the reconstruction energy E k of each sub-band as a feature vector T.

[0057] S203, performing noise reduction on the feature vector T by using a genetic-ant colony noise reduction algorithm to obtain a noise-reduced ultrasonic echo signal V(t).

[0058] In the embodiment, the function expression of the reconstruction energy E i,j of each sub-band reconstructed according to the decomposition coefficient X k in step S202 is as follows:

[0059]

[0060] In the above formula, E i,j is the energy of the j-th node of the i-th layer, and has:

[0061]

[0062] In the above formula, S i,j and X i,j are the decomposition signal and the decomposition coefficient corresponding to the j-th node of the i-th layer, respectively.

[0063] As shown in FIG. 3, step S203 in the embodiment includes: Figure 2

[0064] S301, initializing a population X according to the feature vector T, and constructing a fitness function according to the difference between the reconstruction energy of each sub-band and the energy of the noise-reduced ultrasonic echo signal;

[0065] S302, performing crossover, mutation and genetic operations on the individuals in the population X;

[0066] S303, exchanging pheromones between the individuals in the population X;

[0067] S304, updating the pheromone table of the population X and the fitness function of each individual;

[0068] S305, determining whether the fitness function is less than or equal to a preset value, if the fitness function is less than or equal to the preset value, jumping to step S202; otherwise, taking the current population X as the noise-reduced ultrasonic echo signal V(t).

[0069] As shown in FIG. 3, step S203 in the embodiment includes:​Figure 2 As shown in the figure, step S103 in the embodiment includes:

[0070] S401, Hilbert transform is performed on the noise-reduced ultrasonic echo signal V(t);

[0071] S402, the modulus of the result of the Hilbert transform is calculated to obtain an envelope D(t);

[0072] S403, the feature vector M composed of the amplitude of the envelope D(t), the first wave packet point, the second wave packet point, the wave packet number, and the wave packet amplitude rising rate is extracted as the scale layer thickness feature.

[0073] In the embodiment, the function expression for performing Hilbert transform in step S401 is:

[0074]

[0075] In the above formula, is the result of the Hilbert transform, V(t) is the noise-reduced ultrasonic echo signal, H represents the Hilbert transform, and t and τ are time.

[0076] As Figure 2 shown in the figure, the neural network model in step S104 in the embodiment is a BP neural network, which includes an input layer, a hidden layer, and an output layer connected in sequence, the input layer contains the same number of neurons as the dimension of the scale layer thickness feature, and the output layer contains one neuron for outputting the scale layer thickness of the equalizing electrode.

[0077] As Figure 3 shown in the figure, the embodiment also provides a scale layer detection device for an equalizing electrode of a main waterway of a converter valve cooling system, which includes an ultrasonic excitation source 1, an excitation transducer 2, a receiving transducer 3, an ultrasonic receiver 4, and a control unit 5. The control end of the ultrasonic excitation source 1 is connected to the control unit 5 to generate a Hann window modulated sinusoidal wave signal with an amplitude of 100 V or more, and the output end of the ultrasonic excitation source 1 is connected to the excitation transducer 2 to output an ultrasonic emission signal through the excitation transducer 2. The output end of the receiving transducer 3 is connected to the ultrasonic receiver 4 and the control unit 5 to obtain an ultrasonic echo signal of the detected equalizing electrode under the ultrasonic excitation signal. Referring to Figure 3 It can be known that the control unit 5 is also connected to an upper end (an upper computer) through a communication module, and the communication module can select the required communication mode according to the needs. In the embodiment, a wireless communication mode is preferred.

[0078] The ultrasonic excitation source 1 is controlled by the control unit 5, generates a Hanning window modulated sinusoidal signal with an amplitude of 100V or more through a digital-to-analog conversion circuit, ensures the transmission effect of the signal through excitation end signal conditioning and power amplification, and generates an ultrasonic emission signal through the excitation transducer 2; the receiving transducer 3 converts the ultrasonic echo signal into an electrical signal, ensures signal accuracy through receiving end signal conditioning, data acquisition, data storage, and can be sent to the upper end through wireless transmission for noise reduction and feature recognition by the intelligent algorithm of the electrode scale layer thickness (the main waterway equalizing electrode scale layer detection method of the converter cooling system in this embodiment).

[0079] In this embodiment, the ultrasonic excitation source 1 is composed of a digital-to-analog conversion circuit, an excitation end signal conditioning circuit and a power amplification circuit. After the digital-to-analog conversion circuit synthesizes the window modulated signal, it is transmitted to the excitation end signal conditioning circuit to complete signal filtering and conversion, and the power amplification circuit realizes linear power amplification of the excitation signal of 100V or more to ensure the transmission effect of the signal.

[0080] In this embodiment, the digital-to-analog conversion circuit selects DAC902 chip as the D / A conversion chip, which has an update rate of 165MSPS, a resolution of 12 bits, and a relatively high signal-to-noise ratio, and is suitable for synthesis of ultrasonic excitation signals.

[0081] In this embodiment, the excitation end signal conditioning circuit is composed of a low-pass filter and a differential signal to single-ended signal circuit. The low-pass filter is realized by using DAC902 chip and a seventh-order Butterworth low-pass filter. The output pins IOUT and IOUT# of the DAC902 chip are connected to the seventh-order Butterworth low-pass filter with a bandwidth of 40MHz to effectively reduce high-frequency stray components. The differential signal to single-ended signal circuit is a preamplifier circuit composed of two pieces of AD8056 dual-channel voltage feedback amplifier, which is used to preamplify the output of the low-pass filter and convert the differential signal output by the low-pass filter to a single-ended signal.

[0082] As shown in Figure 4 , the power amplification circuit of this embodiment is mainly realized based on the PA85 high-voltage operational amplifier chip (U4) produced by APEX company. The PA85 high-voltage operational amplifier chip can realize linear amplification of any signal. When double-ended power supply is used, the maximum output voltage can reach ±225V, and the maximum voltage swing rate can reach 1000V / us, Figure 4Resistor R13 and capacitor C18 form the external RC network of the PA85 high-voltage operational amplifier chip. Choosing appropriate parameters can increase the stability and bandwidth of the operational amplifier. According to the datasheet of the PA85 high-voltage operational amplifier chip, when the phase compensation capacitor and resistor are 3.3pF and 100Ω respectively, the closed-loop bandwidth can reach 1MHz. Resistor R14 is a current-limiting resistor with a value of 2.2Ω. The maximum output current of the circuit is 200mA. Therefore, to improve the output load capacity of the chip, a subsequent current amplification circuit is connected to the output of the PA85 high-voltage operational amplifier chip. A push-pull circuit is formed using NPN and PNP Darlington transistors Q1 and Q2 to achieve current amplification. In this embodiment, the NPN and PNP Darlington transistors Q1 and Q2 are selected with a withstand voltage of 250V, specifically models MJH11021 and MJH11022. (See also...) Figure 4 Fast recovery diodes D1 and D2 are connected between the output of the PA85 high-voltage operational amplifier chip and the base input terminals Q1 and Q2 of the Darlington transistor. Fast recovery diodes D3 and D4 are connected between the output of the subsequent current amplifier circuit and the power supply terminal to protect the output of the operational amplifier and the overall circuit. Diodes D5 and D6 are connected to the positive and negative input terminals of the PA85 chip as input protection diodes, which can effectively clamp the differential input voltage and prevent excessive differential input voltage from damaging the internal components of the amplifier. Two transient suppression diodes Z7 and Z8 are connected in the power supply bypass to prevent transient high voltage signals from damaging the power supply. C39, C43, C44, and C45 are used as decoupling capacitors to filter out noise interference from the power supply to the operational amplifier chip.

[0083] like Figure 5As shown, in the power supply of the power amplification circuit, the power frequency alternating current is first isolated and reduced by the transformer T1, and then filtered by the full-bridge rectifier D7, the capacitor C36 and the capacitor C41 to generate a direct current voltage with opposite polarity; in the positive polarity, the Darlington tube Q3 of MJH11022 type and the positive polarity voltage stabilizer U18 of LM317 type are connected; in the negative polarity, the Darlington tube Q4 of MJH11021 type and the negative polarity voltage stabilizer U19 of LM337 type are connected; the voltage stabilizer adjustment end is filtered by connecting C38, R52 and C42, R62; R55, C37 are connected at the positive output end, and R59, C40 are connected at the negative output end to filter the output voltage. In order to improve the power supply quality and protect the circuit, the voltage reference sources Z1 and Z2 are connected at the voltage stabilizer adjustment end, the voltage difference of the two input ends of the internal amplifier of the voltage stabilizer is improved, the voltage stabilizing effect is improved, and the temperature stability is improved; the Zener voltage stabilizing tube Z3 and Z4 are added at the base of the Darlington tube and the output end of the voltage stabilizer, the voltage drop between the voltage stabilizer and the current limiting resistor is limited, and the voltage stabilizer is prevented from being burned out due to overvoltage; the transient suppression diodes Z5 and Z6 are added at the collector of the Darlington tube and the output end of the voltage stabilizer, and the voltage stabilizer and the Darlington tube are prevented from being burned out due to overvoltage during power-on; the freewheeling diodes D 20 and D 21 The voltage stabilizer adjustment end filtering capacitor can be reliably discharged, and the voltage stabilizer is prevented from being damaged due to the voltage at the adjustment end being higher than that at the input end.

[0084] In the embodiment, the excitation transducer 2 and the receiving transducer 3 are existing devices, which can be directly purchased.

[0085] In the embodiment, the ultrasonic receiver 4 includes a receiving end signal conditioning circuit, a data acquisition circuit and a data storage circuit connected in sequence.

[0086] In the embodiment, the receiving end signal conditioning circuit includes three parts of isolation buffer, bias amplification and low-pass filter, and all the selected chips are AD8065. Among them, the isolation buffer part is a voltage follower composed of the AD8065 operational amplifier chip; the bias amplification converts the analog signal to a voltage range of 0-2.5V, providing reliable signal input for AD sampling; the low-pass filter circuit is a four-order Butterworth active low-pass filter with a cutoff frequency of 1MHz composed of two AD8065, reducing the influence of stray components in the collected signal.

[0087] Figure 6The shown is the structural schematic diagram of the data acquisition circuit in the embodiment. The data acquisition circuit selects AD7484 as the A / D sampling chip; the AD7484 chip is a 14-bit, high-speed, low-power ADC, the highest throughput rate of which can reach 3MSPS, the input bandwidth of which is 40MHz, the chip is powered by 4.75-5.25V, and the analog input voltage range is 0-2.5V; it should be noted that in the case of a sampling frequency higher than 2.5MSPS, mode 2 should be selected, that is, the MODE1 pin is grounded, and the MODE2 pin is connected to high level; the control unit 5 controls the CONVST pin to start conversion, and the ADC automatically outputs the BUSY signal; when the rising edge of the BUSY signal appears, it represents that the conversion is completed; when working in mode 2, the sampling value is saved in the output register at the next CONVST falling edge, the signal RD is pulled down, so that the ADC chip is in the reading state, and the sampling value is read out and sent to the control unit 5.

[0088] Figure 7 The shown is the structural schematic diagram of the data storage circuit in the embodiment. The data storage circuit selects the M25P16 of 16Mbit capacity of ST company as the Flash storage chip, the interface clock rate of which can reach 50MHz, and the control unit 5 operates or reads and writes the Flash through the SPI interface mode of 4 signal lines; specifically, Figure 5 FLASH_CLK is the serial clock of the SPI interface work, and the control unit 5 controls the time sequence of communication through FLASH_CLK; FLASH_S is the chip selection signal, which is effective at low level; when FLASH_S is high level, the control of the Flash chip is abandoned; FLASH_IN is used to send the execution command and data of the control unit 5 to the Flash; and flash_OUT is the data signal of the Flash to the control unit 5, which is used to store the data signal sent by the Flash.

[0089] In the embodiment, the control unit 5 is used to be responsible for signal generation, module control, data buffering, storage and wireless transmission control, and specifically selects the FPGA of Cyclone IV series of Altera company, the specific model of which is EP4CE6F17C8, and in addition, other controllers can also be selected according to the needs. The FPGA switches the working mode of nRF2401 through the control of the power-up end PWR_UP, the working state enable end CE and the chip selection end CS, which are respectively the transceiver mode (110), the configuration mode (101), the idle mode (100) and the shutdown mode (0XX); the ShockBurst TMtransmission mode, the mode uses the FIFO stack area in nRF2401 chip, the FPGA sends data at low speed and transmits at high speed, which can reduce the system power consumption to the maximum, and in the mode, all high-speed signal processing related to the radio frequency protocol is carried out in the chip, and the FPGA does not need to participate in the related operation of the radio frequency signal, which fully liberates the internal resources of the FPGA; nRF2401 has the same hardware circuit structure in data transmission and reception, uses channel 1 for sending and receiving work, and the detection end FPGA realizes data transmission through the control ports CE, CLK1 and DATA; the upper end FPGA realizes data reception through the control ports CE, DR1, CLK1 and DATA. Specifically, first, the nRF2401 is initialized and configured, and 15 bytes of configuration words are used to complete the ShockBurst TM transmission mode configuration, which is completed by the three pins of CS, CLK1 and DATA to configure the data width, address width, address and CRC related parameters. The data transmission software control process is as follows: after the address of the receiver and the data to be sent are sent to nRF2401 in time sequence, the CONFIG register is configured to enter the transmission mode; the FPGA is high CE, and the nRF2401 is excited to perform ShockBurst TM transmission: power supply for radio frequency, adding header and CRC check code to the data packet to be sent, and then transmitting the data packet. The data reception software control process is as follows: complete the configuration of the receiver address and the size of the received data packet; configure the CONFIG register to enter the receiving mode, so that the CE is at high level, and after a delay, the nRF2401 starts to monitor the arrival of the data packet; when the data packet is received and verified that the address and CRC check code are correct, the nRF2401 will actively remove the verification information such as header and CRC check code, and retain the useful data; the nRF2401 sets the RX_DR of the STATUS register, and notifies the FPGA to read the data; after all the data is read, the STATUS register is cleared; the nRF2401 enters the listening state again, and waits for the next time to receive data.

[0090] As Figure 8 shown, the work flow of the detection end for data collection and storage is as follows:

[0091] Step 1, after the FPGA system is initialized, valid trigger signal is waited, and after the valid trigger signal is received, step 2 is executed;

[0092] Step 2, start data collection and initialize data conversion circuit;

[0093] Step 3, set nRF2401 to wait state, ultrasonic excitation source 1, excitation transducer 2, receiving transducer 3 and ultrasonic receiver 4 start data conversion and output to FPGA;

[0094] Step 4, judge whether the data acquisition is completed, if not, jump to step 3; otherwise, execute step 5;

[0095] Step 5, data framing is performed for the ultrasonic echo signal;

[0096] Step 6, the data is stored in the write FIFO of the FPGA at the detection end, and when the write FPGA half-full signal is valid, it is stored in the Flash, if the data transmission request is valid, the read FIFO of the FPGA is stored, and then when the read FPGA half-full signal is valid, the data is transmitted through the nRF2401, and the process is ended and exited.

[0097] As shown in Figure 9 the workflow of the data acquisition and storage of the FPGA at the host end is as follows:

[0098] Step 1, after system initialization, wait for a valid trigger signal, and when the valid trigger signal is received, execute step 2;

[0099] Step 2, receive the data transmitted by the nRF2401 until the data reception is completed;

[0100] Step 3, data framing is performed, and the data is stored in the write FIFO of the FPGA at the host end, and when the write FPGA half-full signal is valid, it is stored in the read FIFO of the FPGA at the host end, and then when the read FPGA half-full signal is valid, the data is transmitted to the host computer through the UART communication to process the ultrasonic echo data using the intelligent algorithm (the cooling system main waterway equalizing electrode scale layer detection method of the converter valve in this embodiment), display the real-time echo waveform, and obtain the equalizing electrode scale layer recognition result.

[0101] In addition, in this embodiment, the data acquisition, storage and data transmission communication between the detection end and the host end need to pass through the FIFO buffer module inside the FPGA to achieve data buffering and matching of different data transmission rates between communication chips, so as to reduce the data loss rate and improve the overall communication performance; wherein the buffer used is an asynchronous FIFO with a data bit width of 12 bits and a storage depth of 512 bits, which can effectively avoid stack overflow under this capacity. The chip model used for wireless transmission between the detection end and the host end in this embodiment is nRF2401, which supports transmission rates of 1 Mbps and 250 Kbps, and has built-in special voltage stabilizing circuit, CRC checking hardware circuit and protocol, without complex control logic and peripheral circuit, good communication effect can be achieved; in order to achieve a wireless transmission rate of 1 Mbps, a 16 MHz crystal oscillator is connected; in order to ensure the wireless communication distance and minimize the influence of electromagnetic interference in the detection environment, an antenna matching circuit is connected, and a inverted-F antenna design is adopted.

[0102] The use method of the converter valve cooling system main waterway equalizing electrode scale layer detection device is as follows: step one: the corresponding output of the control unit 5 of the detection end is connected to the input of the ultrasonic excitation source 1, the output of the ultrasonic excitation source 1 is connected to the excitation transducer 2, the excitation transducer 2 is installed on a wedge with an inclination angle of 30°, and the wedge is tightly attached to the waterway pipe wall at a distance of 60 mm from the equalizing electrode through ultrasonic coupling agent; step two: the receiving transducer 3 is installed on the symmetric side waterway pipe wall of the excitation transducer 2, the output of the receiving transducer 3 is connected to the input of the ultrasonic receiver 4, and the output of the ultrasonic receiver 4 is connected to the corresponding input of the control unit 5 of the detection end, that is, through the control of the control unit 5, the ultrasonic echo signal data is collected and stored; step three: the detection end circuit is powered on and works, the control unit 5 of the detection end controls the wireless transmission module to transmit the echo data to the upper end in real time; step four: the ultrasonic echo data is processed by the intelligent algorithm (the converter valve cooling system main waterway equalizing electrode scale layer detection method in the embodiment) in the upper end, the real-time echo waveform is displayed, and the equalizing electrode scale layer identification result is obtained.

[0103] In addition, the embodiment further provides a converter valve cooling system main waterway equalizing electrode scale layer detection system, which comprises a converter valve cooling system main waterway equalizing electrode scale layer detection device and an upper computer connected with each other, the upper computer comprises a microprocessor and a memory connected with each other, the converter valve cooling system main waterway equalizing electrode scale layer detection device is the aforementioned converter valve cooling system main waterway equalizing electrode scale layer detection device, and the microprocessor is programmed or configured to execute the converter valve cooling system main waterway equalizing electrode scale layer detection method.

[0104] In addition, the embodiment further provides a computer readable storage medium, which stores a computer program for being programmed or configured by a microprocessor to execute the converter valve cooling system main waterway equalizing electrode scale layer detection method.

[0105] Those skilled in the art will appreciate that embodiments of the application can be readily used as software, hardware, or a combination of software and hardware. In a software embodiment, various software modules in accordance with embodiments of the application are stored in a memory such as a computer program product (e.g., a disk storage, memory, etc.) and executed by a processor. As such, various program modules in accordance with embodiments of the application can include program instructions (e.g., machine-readable instructions) that, when executed by a processor, cause the processor to perform operations in accordance with embodiments of the application. The program instructions can be stored in a computer readable medium, which can include a memory, a disk storage, etc. The program instructions can be executed by a processor to cause the processor to perform operations in accordance with embodiments of the application. Figure 1 one or more functions specified by any individual or combination of flows or blocks Figure 1 one or more functions specified by any individual or combination of flows or blocks Figure 1 one or more functions specified by any individual or combination of flows or blocks Figure 1 one or more functions specified by any individual or combination of flows or blocks Figure 1 one or more functions specified by any individual or combination of flows or blocks Figure 1 one or more functions specified by any individual or combination of flows or blocks

[0106] The above description is only preferred embodiments of the application, the protection scope of the application is not limited to the above-mentioned embodiments, and any technical scheme falling within the idea of the application shall fall within the protection scope of the application. It should be noted that, for ordinary skilled in the art, some improvements and refinements without departing from the principles of the application, these improvements and refinements should also be considered as the protection scope of the application.

Claims

1. A method for detecting a scale layer of a pressure equalizing electrode of a main water path of a cooling system of a converter valve, characterized by, The method comprises the following steps: S101, acquiring an ultrasonic echo signal of the detected equalizing electrode under an ultrasonic excitation signal, wherein the ultrasonic excitation signal is generated based on a Hann window modulated sinusoidal wave signal with an amplitude of 100 V or more; S102, performing noise reduction on the ultrasonic echo signal; S103, extracting the scale layer thickness feature from the de-noised ultrasonic echo signal, comprising: S401, extracting the scale layer thickness feature from the de-noised ultrasonic echo signal V (t) performing a Hilbert transform; S402, calculate the modulus of the result of the Hilbert transform to obtain the envelope D (t); S403, extract the amplitude of the envelope D (t) as the feature vector M composed of the first wave packet point, the second wave packet point, the wave packet number, and the wave packet amplitude rising rate S104, identifying the scale layer thickness of the detected equalizing electrode by using a neural network model.

2. The method according to claim 1, characterized in that, Step S102 comprises: S201, performing N-layer wavelet packet transform decomposition on the ultrasonic echo signal to obtain 2 N decomposition signals of sub-bands, and recording the decomposition signal corresponding to any i-layer j-node as S i,j , and the decomposition coefficient as X i,j ; S202, according to the decomposition coefficient X i,j The reconstruction energy of each sub-band is obtained ; and the reconstruction energy of 2 N sub-bands is composed into a feature vector T; S203, the feature vector T is denoised by a genetic-ant colony denoising algorithm to obtain a denoised ultrasonic echo signal V ( t ).

3. The method according to claim 2, characterized in that, In step S202, the function expression of the decomposed coefficient X i,j The reconstructed energy of each sub-band is obtained by reconstruction The function expression is: ， In the above formula, is the energy of the jth node in the ith layer, and has: ， In the above formulae, and are the decomposition signal and decomposition coefficients corresponding to the i-th layer j-th node, respectively.

4. The method according to claim 3, characterized in that, Step S203 comprises: S301, initializing a population X according to a feature vector T, constructing a fitness function according to the difference between the reconstructed energy of each sub-band and the energy of the noise-reduced ultrasonic echo signal; S302, performing crossover, mutation and inheritance on the individuals in the population X; S303, exchanging pheromones between the individuals in the population X; S304, updating the pheromone table of the population X and the fitness function of each individual; S305, judging whether the fitness function is less than or equal to a preset value, if the fitness function is less than or equal to the preset value, jumping to step S202; otherwise, taking the current population X as the de-noised ultrasonic echo signal V ( t ).

5. The method according to claim 1, characterized in that, The function expression for performing Hilbert transform in step S401 is: ， In the above formulae, is the result of a Hilbert transform, is the denoised ultrasound echo signal, denotes a Hilbert transform, and is time.

6. The method according to claim 1, wherein The neural network model in step S104 is a BP neural network, which comprises an input layer, a hidden layer and an output layer connected in sequence, the input layer contains a number of neurons equal to the dimension of the scale layer thickness feature, and the output layer contains one neuron for outputting the scale layer thickness of the equalizing electrode.

7. A converter cooling system main waterway equalizing electrode scale layer detection device for applying the converter cooling system main waterway equalizing electrode scale layer detection method according to any one of claims 1 to 6, characterized by The device comprises an ultrasonic excitation source (1), an excitation transducer (2), a receiving transducer (3), an ultrasonic receiver (4) and a control unit (5), the control end of the ultrasonic excitation source (1) is connected with the control unit (5) to generate a Hann window modulated sinusoidal wave signal with an amplitude of 100 V or more, and the output end of the ultrasonic excitation source (1) is connected with the excitation transducer (2) to output an ultrasonic emission signal through the excitation transducer (2), the output end of the receiving transducer (3) is connected with the control unit (5) through the ultrasonic receiver (4) to acquire an ultrasonic echo signal of the detected equalizing electrode under the ultrasonic excitation signal.

8. A detection system for detecting a scale layer of pressure equalizing electrodes of a main water circuit of a cooling system of a converter valve, characterized in that The device comprises a converter valve cooling system main waterway equalizing electrode scale layer detection device and an upper computer connected with each other, the upper computer comprises a microprocessor and a memory connected with each other, the converter valve cooling system main waterway equalizing electrode scale layer detection device is the converter valve cooling system main waterway equalizing electrode scale layer detection device of claim 7, and the microprocessor is programmed or configured to execute the converter valve cooling system main waterway equalizing electrode scale layer detection method of any one of claims 1-6.

9. A computer-readable storage medium having stored therein a computer program, characterized in that, The computer program is used for programming or configuring the microprocessor to execute the converter valve cooling system main waterway equalizing electrode scale layer detection method of any one of claims 1-6.

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