LED chip and manufacturing method thereof

Abstract

The application provides an LED chip and a manufacturing method thereof, which comprises the following steps: a metal bonding layer, an insulating layer, a metal connecting layer, an adhesive layer, a metal reflecting layer and a dielectric layer are arranged between the substrate and the epitaxial stack; the dielectric layer is arranged on the side of the epitaxial stack facing the substrate and extends to the through hole sidewall of the epitaxial stack; the dielectric layer has a dielectric hole exposing the second type semiconductor layer; the metal reflecting layer is formed on the horizontal surface of the epitaxial stack by being stacked on the surface of the dielectric layer; the adhesive layer is arranged at the edge of the metal reflecting layer; and the metal connecting layer is in contact with the metal reflecting layer by covering the adhesive layer. Thus, the material layer with limiting effect on the upper and lower surfaces of the edge of the metal reflecting layer is realized, the metal reflecting layer can be prevented from being eroded by chemical reagents, and the pattern integrity of the metal reflecting layer and the dielectric layer at the edge is well protected.

Description

Technical Field

[0001] This invention relates to the field of light-emitting diodes, and more particularly to an LED chip and its manufacturing method. Background Technology

[0002] Existing light-emitting diodes (LEDs) include horizontal and vertical types. Vertical LEDs are obtained by transferring a semiconductor barrier layer onto another substrate, such as silicon, silicon carbide, or a metal substrate, and removing the original epitaxial substrate. Compared to horizontal LEDs, this effectively improves the technical problems of light absorption, current congestion, or poor heat dissipation caused by the epitaxial substrate. The substrate transfer typically employs a bonding process, primarily metal-to-metal high-temperature, high-pressure bonding, forming a metal bonding layer between one side of the semiconductor barrier layer and the substrate. The other side of the semiconductor barrier layer provides the light-emitting side, which is equipped with a wire bonding electrode to provide current injection or outflow. The substrate below the semiconductor barrier layer provides current inflow or outflow, thus forming an LED where current flows vertically through the semiconductor barrier layer.

[0003] For LED light-emitting devices, improving the external quantum efficiency and heat dissipation capacity of the chip is a perpetual pursuit for researchers; among them, the design of reflectors is a key area of ​​focus in the structural design of vertical LED chips. Currently, high-reflectivity metals are typically used as both current spreading layers and reflective metal layers, with metals including one or more of Ag, Au, Al, Mg, Ni, and Ti. However, the reflectivity of high-reflectivity metals is still some distance from 100%. This has led to the development of ODR (Optical Deflector) reflectors as an optimized solution for improving reflectivity. This involves depositing reflective metal on a dielectric film layer, and the reflectivity is improved through the interaction between the dielectric film and the reflective metal. However, due to the poor adhesion between the reflective metal and the dielectric film, the reflective metal is prone to detachment defects.

[0004] In view of this, the inventor has specifically designed an LED chip and its manufacturing method, which leads to this invention. Summary of the Invention

[0005] The purpose of this invention is to provide an LED chip and its manufacturing method to solve the problem of metal reflective layer peeling off in existing vertical structure LED chips.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] An LED chip, comprising:

[0008] A substrate and an epitaxial stack disposed above the substrate; the epitaxial stack includes at least a second type semiconductor layer, an active region and a first type semiconductor layer stacked sequentially along a first direction, and the epitaxial stack has a through-hole exposing a portion of the surface of the first type semiconductor layer; the first direction is perpendicular to the substrate and extends from the substrate toward the epitaxial stack.

[0009] A metal bonding layer, an insulating layer, a metal connection layer, an adhesive layer, a metal reflective layer, and a dielectric layer are provided between the substrate and the epitaxial stack.

[0010] The dielectric layer is disposed on the side of the epitaxial stack facing the substrate and extends to the through-hole sidewall of the epitaxial stack; and the dielectric layer has a dielectric hole exposing the second type semiconductor layer.

[0011] The metal reflective layer is formed on the horizontal surface of the epitaxial stack by being stacked on the surface of the dielectric layer;

[0012] The adhesive layer is disposed at the edge of the metal reflective layer;

[0013] The metal bonding layer forms contact with the metal reflective layer by covering the adhesive layer, and the metal bonding layer has an exposed surface on the side facing the epitaxial stack.

[0014] The insulating layer extends to the sidewall of the through hole by covering the metal connection layer and the metal reflective layer;

[0015] The substrate is bonded to the epitaxial stack by embedding the through-hole in the metal bonding layer to form an integral unit.

[0016] Preferably, the adhesion layer comprises a dielectric film layer.

[0017] Preferably, the adhesive layer comprises a metal adhesive layer.

[0018] Preferably, the dielectric layer and / or dielectric film layer includes one or more of SiO2, Al2O3, MgF2, and ZnO.

[0019] Preferably, the metal adhesion layer comprises one or more of TiW, Ni, Ti, Pt, and Au.

[0020] Preferably, the insulating layer comprises an insulating material layer with high thermal conductivity.

[0021] Preferably, the metal reflective layer comprises one or more of indium, tin, aluminum, gold, platinum, zinc, silver, titanium, lead, and nickel.

[0022] Preferably, the sidewalls of the metal connection layer are covered by the insulating layer.

[0023] Preferably, the substrate includes a conductive substrate.

[0024] This invention also provides a method for manufacturing an LED chip, comprising the following steps:

[0025] S01, Provide a growth substrate;

[0026] S02. An epitaxial stack is stacked on the surface of the growth substrate, the epitaxial stack comprising a first type semiconductor layer, an active region and a second type semiconductor layer stacked sequentially along the growth direction;

[0027] S03. Through-holes and light-emitting mesa are formed on the epitaxial stack by etching process, and the through-holes expose part of the surface of the first type semiconductor layer;

[0028] S04. Fabricate a dielectric layer, wherein the dielectric layer covers the light-emitting mesa and the via, and the dielectric layer has a dielectric hole that exposes the second type semiconductor layer;

[0029] S05. Deposit a metal reflective layer, wherein the metal reflective layer is embedded in the dielectric hole and forms contact with the second type semiconductor layer by being stacked on the surface of the dielectric layer, and extends to the via;

[0030] S06. Fabricate an adhesion layer and use a photolithography patterning process to retain the adhesion layer above the edge of the dielectric hole;

[0031] S07. Using the adhesive layer as a mask for the metal reflective layer, perform spin coating, exposure and development to remove the metal reflective layer around the dielectric hole;

[0032] S08. Deposit a metal bonding layer, wherein the metal bonding layer is stacked on the surface of the metal reflective layer;

[0033] S09. Fabricate an insulating layer, wherein the insulating layer fills the through hole and extends to the light-emitting platform to cover the metal connection layer;

[0034] S10. Etch along the via location until the first type of semiconductor layer is exposed, while retaining the insulating layer on the sidewall of the via;

[0035] S11. A substrate is provided, and the substrate is bonded to the epitaxial stack by means of a bonding process, wherein the substrate is embedded in the through hole through a metal bonding layer to form an integral unit;

[0036] S12, peel off the growth substrate;

[0037] S13. Through photolithography and etching processes, the LED chip has an exposed surface of the metal interconnect layer.

[0038] As can be seen from the above technical solution, the LED chip provided by the present invention comprises: a metal bonding layer, an insulating layer, a metal connection layer, an adhesive layer, a metal reflective layer, and a dielectric layer disposed between the substrate and the epitaxial stack; wherein the dielectric layer is disposed on the side of the epitaxial stack facing the substrate and extends to the through-hole sidewall of the epitaxial stack; and the dielectric layer has a dielectric hole exposing the second type semiconductor layer; the metal reflective layer is formed on the horizontal surface of the epitaxial stack by being stacked on the surface of the dielectric layer; the adhesive layer is disposed at the edge of the metal reflective layer; and the metal connection layer forms contact with the metal reflective layer by covering the adhesive layer. Thus, a material layer with a limiting effect on both the upper and lower surfaces of the edge of the metal reflective layer is achieved, which can prevent chemical reagents from corroding the metal reflective layer, thereby effectively protecting the pattern integrity of the metal reflective layer and the dielectric layer at the edge.

[0039] The LED chip manufacturing method provided by this invention achieves the above-mentioned beneficial effects while being simple, convenient, and easy to mass-produce.

[0040] Furthermore, this fabrication method uses the adhesive layer as a mask for the metal reflective layer, performing spin coating, exposure, and development to remove the metal reflective layer around the dielectric aperture. Due to the adhesive layer, the precision requirements for exposing the metal reflective layer are very low, thereby improving the yield of the fabrication process. Simultaneously, because the metal reflective layer is adhered to the upper edge by the adhesive layer (dielectric layer or metal layer) and bound to the lower edge by the dielectric layer, it is not easily eroded by chemical solutions during the etching process, thus providing protection. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0042] Figure 1 This is a schematic diagram of the LED chip structure provided in Embodiment 1 of the present invention;

[0043] Figures 2.1 to 2.15 This is a schematic diagram of the structure corresponding to the steps of the LED chip manufacturing method provided in the embodiments of the present invention;

[0044] Symbols in the figure: 1. Growth substrate, 2. Epitaxial stack, 21. Type I semiconductor layer, 22. Active region, 23. Type II semiconductor layer, 3. Through hole, 4. Light-emitting mesa, 5. Dielectric layer, 51. Dielectric hole, 6. Metal reflective layer, 7. Adhesion layer, 8. Metal interconnect layer, 9. Insulating layer, 10. Metal bonding layer, 11. Substrate, 12. Photoresist. Detailed Implementation

[0045] To make the content of this invention clearer, the following description, in conjunction with the accompanying drawings, further illustrates the invention. This invention is not limited to this specific embodiment. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention.

[0046] like Figure 1 As shown, an LED chip includes:

[0047] The substrate 11 and the epitaxial stack 2 disposed above the substrate 11; the epitaxial stack 2 includes at least a second type semiconductor layer 23, an active region 22 and a first type semiconductor layer 21 stacked sequentially along a first direction, and the epitaxial stack 2 has a through hole 3 exposing a portion of the surface of the first type semiconductor layer 21; the first direction is perpendicular to the substrate 11 and points from the substrate 11 to the epitaxial stack 2;

[0048] A metal bonding layer 10, an insulating layer 9, a metal connection layer 8, an adhesion layer 7, a metal reflective layer 6, and a dielectric layer 5 are provided between the substrate 11 and the epitaxial stack 2.

[0049] The dielectric layer 5 is disposed on the side of the epitaxial stack 2 facing the substrate 11 and extends to the sidewall of the via 3 of the epitaxial stack 2; and the dielectric layer 5 has a dielectric hole 51 exposing the second type semiconductor layer 23.

[0050] The metal reflective layer 6 is formed on the horizontal surface of the epitaxial stack 2 by being stacked on the surface of the dielectric layer 5;

[0051] The adhesive layer 7 is disposed at the edge of the metal reflective layer 6;

[0052] The metal bonding layer 8 forms contact with the metal reflective layer 6 by covering the adhesive layer 7, and the metal bonding layer 8 has an exposed surface on the side facing the epitaxial stack 2;

[0053] The insulating layer 9 extends to the sidewall of the through hole 3 by covering the metal connection layer 8 and the metal reflective layer 6;

[0054] The substrate 11 is bonded to the epitaxial stack 2 by means of the metal bonding layer 10 being embedded in the through hole 3 to form an integral structure.

[0055] It is worth mentioning that the types of the first type semiconductor layer 21, the active region 22 and the second type semiconductor layer 23 of the epitaxial stack 2 are not limited in this embodiment. For example, the first type semiconductor layer 21 can be, but is not limited to, an N-type gallium nitride layer, and correspondingly, the second type semiconductor layer 23 can be, but is not limited to, a P-type gallium nitride layer.

[0056] It should be noted that this embodiment does not limit the coverage area of ​​the adhesive layer 7 over the metal reflective layer 6, as long as sufficient contact between the metal connecting layer 8 and the metal reflective layer 6 is ensured. Meanwhile, the thickness of the adhesive layer 7 is generally controlled to be between 0.5 and 6 times the thickness of the metal reflective layer 6; this embodiment does not impose any limitation on this.

[0057] In this embodiment, the adhesion layer 7 includes a dielectric film layer.

[0058] In this embodiment, the adhesion layer 7 includes a metal adhesion layer 7.

[0059] In this embodiment, the dielectric layer 5 and / or dielectric film layer includes one or more of SiO2, Al2O3, MgF2, and ZnO.

[0060] In this embodiment, the metal adhesion layer 7 includes one or more of TiW, Ni, Ti, Pt, and Au.

[0061] In this embodiment, the insulating layer 9 comprises an insulating material layer with high thermal conductivity.

[0062] In this embodiment, the metal reflective layer 6 includes a high reflectivity material layer.

[0063] In this embodiment, the metal reflective layer 6 includes one or more of indium, tin, aluminum, gold, platinum, zinc, silver, titanium, lead, and nickel.

[0064] In this embodiment, the metal bonding layer 8 includes one or more of gold, titanium, nickel, and chromium.

[0065] In this embodiment, the sidewalls of the metal connection layer 8 are covered by the insulating layer 9.

[0066] In this embodiment, the substrate 11 includes a conductive substrate 11.

[0067] This invention also provides a method for manufacturing an LED chip, comprising the following steps:

[0068] S01, such as Figure 2.1 As shown, a growth substrate 1 is provided;

[0069] S02, such as Figure 2.2 As shown, an epitaxial stack 2 is stacked on the surface of the growth substrate 1. The epitaxial stack 2 includes a first type semiconductor layer 21, an active region 22 and a second type semiconductor layer 23 stacked sequentially along the growth direction.

[0070] S03, such as Figure 2.3 As shown, through-holes 3 and light-emitting mesa 4 are formed on the epitaxial stack 2 by etching process, and the through-holes 3 expose part of the surface of the first type semiconductor layer 21;

[0071] S04, such as Figure 2.4 As shown, a dielectric layer 5 is fabricated, which covers the light-emitting mesa 4 and the via 3, and the dielectric layer 5 has a dielectric hole 51 that exposes the second type semiconductor layer 23;

[0072] S05, such as Figure 2.5 As shown, a metal reflective layer 6 is deposited, which is embedded in the dielectric hole 51 and forms contact with the second type semiconductor layer 23 by being stacked on the surface of the dielectric layer 5, and extends to the through hole 3;

[0073] S06, such as Figure 2.6 As shown, an adhesion layer 7 is fabricated, and the adhesion layer 7 is retained above the edge of the dielectric hole 51 by photolithography patterning process;

[0074] S07. Using the adhesive layer 7 as a mask for the metal reflective layer 6, perform homogenization, exposure and development to remove the metal reflective layer 6 around the dielectric hole 51.

[0075] In this embodiment, due to the design of the adhesion layer 7, the precision requirement for exposing the metal reflective layer 6 is very low. Specifically, this can be achieved through methods such as... Figure 2.7 or Figure 2.8 The homogenizing photoresist 12 shown is exposed and developed to finally obtain the following: Figure 2.9 The metal reflective layer 6 is shown in the graphic structure.

[0076] S08, such as Figure 2.10 As shown, a metal bonding layer 8 is deposited, which is stacked on the surface of the metal reflective layer 6;

[0077] S09, such as Figure 2.11 As shown, an insulating layer 9 is fabricated, which fills the through hole 3 and extends to the light-emitting platform 4 to cover the metal connection layer 8;

[0078] S10, such as Figure 2.12 As shown, etching is performed along the via 3 to expose the first type semiconductor layer 21, while retaining the insulating layer 9 on the sidewall of the via 3;

[0079] S11, such as Figure 2.13 As shown, a substrate 11 is provided, and the substrate 11 is bonded to the epitaxial stack 2 by means of a metal bonding layer 10 embedded in the through hole 3 to form an integral structure.

[0080] S12, such as Figure 2.14 As shown, the growth substrate 1 is peeled off;

[0081] S13, such as Figure 2.15 As shown, the LED chip has an exposed surface of the metal interconnect layer 8 through photolithography and etching processes.

[0082] As can be seen from the above technical solution, the LED chip provided by the present invention comprises: a metal bonding layer 10, an insulating layer 9, a metal connection layer 8, an adhesive layer 7, a metal reflective layer 6, and a dielectric layer 5 disposed between the substrate 11 and the epitaxial stack 2; and the dielectric layer 5 disposed between the substrate 11 and the epitaxial stack 2; wherein the dielectric layer 5 is disposed on the side of the epitaxial stack 2 facing the substrate 11 and extends to the sidewall of the via 3 of the epitaxial stack 2; and the dielectric layer 5 has a dielectric hole 51 exposing the second type semiconductor layer 23; the metal reflective layer 6 is formed on the horizontal surface of the epitaxial stack 2 by being stacked on the surface of the dielectric layer 5; the adhesive layer 7 is disposed on the edge of the metal reflective layer 6; and the metal connection layer 8 forms contact with the metal reflective layer 6 by covering the adhesive layer 7. Thus, a material layer with a limiting effect on both the upper and lower surfaces of the edge of the metal reflective layer 6 is achieved, which can prevent chemical reagents from corroding the metal reflective layer 6 and thus effectively protect the pattern integrity of the metal reflective layer 6 and the dielectric layer 5 at the edge.

[0083] The LED chip manufacturing method provided by this invention achieves the above-mentioned beneficial effects while being simple, convenient, and easy to mass-produce.

[0084] Furthermore, this fabrication method uses the adhesive layer 7 as a mask for the metal reflective layer 6, performing spin coating, exposure, and development to remove the metal reflective layer 6 surrounding the dielectric aperture 51. Due to the adhesive layer 7, the precision requirements for exposing the metal reflective layer 6 are very low, thereby improving the yield of the fabrication process. Simultaneously, because the metal reflective layer 6 is adhered to the upper edge by the adhesive layer 7 (dielectric layer 5 or metal layer) and bound to the lower edge by the dielectric layer 5, it is not easily eroded by chemical solutions during the etching process, thus providing protection.

[0085] The apparatus provided in this embodiment of the invention operates on the same principle and produces the same technical effects as the aforementioned method embodiments. For the sake of brevity, any parts not mentioned in the apparatus embodiments can be referred to the corresponding content in the aforementioned method embodiments. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, apparatuses, and units described above can all be referred to the corresponding processes in the aforementioned method embodiments, and will not be repeated here.

[0086] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0087] It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.

[0088] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED chip, characterized in that, include: A substrate and an epitaxial stack disposed above the substrate; the epitaxial stack includes at least a second type semiconductor layer, an active region and a first type semiconductor layer stacked sequentially along a first direction, and the epitaxial stack has a through-hole exposing a portion of the surface of the first type semiconductor layer; The first direction is perpendicular to the substrate and points from the substrate to the epitaxial stack; A metal bonding layer, an insulating layer, a metal connection layer, an adhesive layer, a metal reflective layer, and a dielectric layer are provided between the substrate and the epitaxial stack. The dielectric layer is disposed on the side of the epitaxial stack facing the substrate and extends to the through-hole sidewall of the epitaxial stack; and the dielectric layer has a dielectric hole exposing the second type semiconductor layer. The metal reflective layer is formed on the horizontal surface of the epitaxial stack by being stacked on the surface of the dielectric layer; The adhesive layer is disposed at the edge of the metal reflective layer; The metal bonding layer forms contact with the metal reflective layer by covering the adhesive layer, and the metal bonding layer has an exposed surface on the side facing the epitaxial stack. The insulating layer extends to the sidewall of the through hole by covering the metal connection layer and the metal reflective layer; The substrate is bonded to the epitaxial stack by embedding the through-hole in the metal bonding layer to form an integral unit.

2. The LED chip according to claim 1, characterized in that, The adhesion layer includes a dielectric film layer.

3. The LED chip according to claim 1, characterized in that, The adhesive layer includes a metal adhesive layer.

4. The LED chip according to claim 2, characterized in that, The dielectric layer and / or dielectric film layer includes one or more of SiO2, Al2O3, MgF2, and ZnO.

5. The LED chip according to claim 3, characterized in that, The metal adhesion layer includes one or more of TiW, Ni, Ti, Pt, and Au.

6. The LED chip according to claim 1, characterized in that, The insulating layer comprises an insulating material layer with high thermal conductivity.

7. The LED chip according to claim 1, characterized in that, The metal reflective layer includes one or more of indium, tin, aluminum, gold, platinum, zinc, silver, titanium, lead, and nickel.

8. The LED chip according to claim 1, characterized in that, The sidewalls of the metal connection layer are covered by the insulating layer.

9. The LED chip according to claim 1, characterized in that, The substrate includes a conductive substrate.

10. A method for manufacturing an LED chip, characterized in that, Includes the following steps: S01, Provide a growth substrate; S02. An epitaxial stack is stacked on the surface of the growth substrate, the epitaxial stack comprising a first type semiconductor layer, an active region and a second type semiconductor layer stacked sequentially along the growth direction; S03. Through-holes and light-emitting mesa are formed on the epitaxial stack by etching process, and the through-holes expose part of the surface of the first type semiconductor layer; S04. Fabricate a dielectric layer, wherein the dielectric layer covers the light-emitting mesa and the via, and the dielectric layer has a dielectric hole that exposes the second type semiconductor layer; S05. Deposit a metal reflective layer, wherein the metal reflective layer is embedded in the dielectric hole and forms contact with the second type semiconductor layer by being stacked on the surface of the dielectric layer, and extends to the via; S06. Fabricate an adhesion layer and use a photolithography patterning process to retain the adhesion layer above the edge of the dielectric hole; S07. Using the adhesive layer as a mask for the metal reflective layer, perform spin coating, exposure and development to remove the metal reflective layer around the dielectric hole; S08. Deposit a metal bonding layer, wherein the metal bonding layer is stacked on the surface of the metal reflective layer; S09. Fabricate an insulating layer, wherein the insulating layer fills the through hole and extends to the light-emitting platform to cover the metal connection layer; S10. Etch along the via location until the first type of semiconductor layer is exposed, while retaining the insulating layer on the sidewall of the via; S11. A substrate is provided, and the substrate is bonded to the epitaxial stack by means of a bonding process, wherein the substrate is embedded in the through hole through a metal bonding layer to form an integral unit; S12, peel off the growth substrate; S13. Through photolithography and etching processes, the LED chip has an exposed surface of the metal interconnect layer.

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