Method, apparatus and silicon wafer for wire cutting silicon rod

Abstract

Embodiments of the present invention disclose a method, equipment and silicon wafers for wire cutting silicon rods. The method includes: wire cutting a first silicon rod with a first set of wire cutting process parameters to obtain a plurality of sample silicon wafers; obtaining the undulation angle of the wire cutting marks on the sample silicon wafers; judging whether there is an offset trend of the wire cutting marks from the high-efficiency cutting surface to the low-efficiency cutting surface based on the undulation angle; based on the judgment result, adjusting one or more wire cutting process parameters in the first set of wire cutting process parameters according to the size of the undulation angle to form a second set of wire cutting process parameters; and wire cutting a second silicon rod with the second set of wire cutting process parameters.

Description

Technical Field

[0001] Embodiments of the present invention relate to the technical field of wafer processing, and in particular, to a method, equipment, and silicon wafers for wire cutting silicon rods. Background Art

[0002] As a carrier for semiconductor circuit manufacturing processes, the quality of silicon wafers has a decisive impact on the formation of integrated circuits. Currently, the main processes in the initial forming process of silicon wafers include: silicon rod cutting, physical and chemical grinding, chemical etching, physical and chemical polishing, etc. Silicon rod cutting is one of the core processes in the silicon wafer forming process, which mainly includes multi-wire slurry (SiC) cutting and internal circle cutting. The currently adopted mainstream process is multi-wire cutting because, compared with internal circle cutting, multi-wire cutting has advantages such as high efficiency, good quality, and high wafer yield.

[0003] Multi-wire cutting is an advanced slicing processing technology at present. Its principle is to wind the cutting wire in the guiding grooves formed on the circumferential surface of the wire spool at intervals in sequence so that the cutting wire forms an array of cutting line segments. Under the guiding action of the guiding grooves, the abrasive is carried into the processing area of the material to be cut (such as a silicon rod) by the high-speed reciprocating movement of the cutting wire for grinding, and the workpiece to be cut realizes vertical feeding through the lifting of the workbench, thereby cutting the workpiece into several thin slices (such as wafers) of the required size and shape at the same time.

[0004] There are many factors affecting the quality of wire cutting, including: the tension of the cutting wire, the descending speed of the workpiece to be cut, the composition, viscosity, and concentration of the abrasive, etc. During the cutting process, in order to ensure the quality of wire cutting, it is necessary to adjust the wire cutting process parameters according to the specific operating conditions. Currently, in this field, the judgment of the quality of wire cutting process parameters is only based on the detection result of the surface damage depth of the workpiece, without considering the dynamic position change of the cutting wire relative to the surface to be cut during the cutting process. Therefore, it is difficult to appropriately control the wire cutting process parameters, resulting in unstable wire cutting quality. Summary of the Invention

[0005] In view of this, embodiments of the present invention are expected to provide a method, equipment, and silicon wafers for wire cutting silicon rods; it can optimize the wire cutting process parameters according to the trend of the wire cutting trace shifting from the high-efficiency cutting surface to the low-efficiency cutting surface, so that the cutting trace remains on the high-efficiency cutting surface, thereby improving the wire cutting efficiency while ensuring the quality of wire cutting.

[0006] The technical solution of the embodiments of the present invention is realized as follows:

[0007] In a first aspect, embodiments of the present invention provide a method for wire cutting a silicon rod, the method including:

[0008] Wire cutting a first silicon rod with a first set of wire cutting process parameters to obtain a plurality of sample silicon wafers;

[0009] Obtain the undulation angle of the wire cutting marks on the sample silicon wafer;

[0010] Based on the undulation angle, determine whether there is an offset trend of the wire cutting marks from the high-efficiency cutting surface to the low-efficiency cutting surface;

[0011] Based on the judgment result, according to the magnitude of the undulation angle, adjust one or more wire cutting process parameters in the first wire cutting process parameter group to form a second wire cutting process parameter group;

[0012] Wire cut the second silicon rod using the second wire cutting process parameter group.

[0013] In a second aspect, an embodiment of the present invention provides a wire cutting device, and the wire cutting device is used to execute the method according to the first aspect.

[0014] In a third aspect, an embodiment of the present invention provides a silicon wafer, and the silicon wafer is made by using the method according to the first aspect.

[0015] An embodiment of the present invention provides a wire cutting method, which optimizes wire cutting process parameters based on the offset of cutting marks. The method includes measuring the undulation angle of the wire cutting marks on a sample silicon wafer, and adjusting the wire cutting process parameters based on the obtained undulation angle for subsequent wire cutting operations. Since the undulation angle of the wire cutting marks formed on the silicon wafer is actually the offset angle of the actual cutting surface relative to the standard cutting surface, that is, the angle of the wire cutting marks offset from the high-efficiency cutting surface to the low-efficiency wire cutting surface, therefore, this undulation angle can characterize the offset trend of the wire cutting marks from the high-efficiency cutting surface to the low-efficiency wire cutting surface. Interfering with the wire cutting process parameters based on the undulation angle can keep the cutting marks on or near the high-efficiency cutting surface and inhibit their offset to the low-efficiency cutting surface. Thus, while ensuring the wire cutting quality, the efficiency of the wire cutting operation can be improved, and further the production capacity can be increased. Description of the Drawings

[0016] Figure 1 Is a schematic diagram of a conventional wire cutting device.

[0017] Figure 2 Is a schematic diagram of another conventional wire cutting device.

[0018] Figure 3 Is a flowchart of a conventional wire cutting method.

[0019] Figure 4 Is a microscopic image of the surface of a sample silicon wafer after wire cutting.

[0020] Figure 5 Is a flowchart of the method for wire cutting a silicon rod provided by an embodiment of the present invention.

[0021] Figure 6 Schematic perspective view of the surface of a sample silicon wafer cut by a warp.

[0022] Figure 7 Schematic diagram of the crystal plane of a silicon wafer.

[0023] Figure 8 Schematic perspective view of the surface of a sample silicon wafer processed by the method provided in the embodiment of the present invention. Detailed implementation manners

[0024] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention.

[0025] Refer to Figure 1 , which shows a schematic diagram of a conventional wire cutting device 1. It can be understood that Figure 1 the structure shown is only for illustrative purposes of the principle, and does not mean that those skilled in the art will not add or subtract components based on the specific implementation state on Figure 1 the shown composition structure. The embodiments of the present invention do not make specific restrictions on this. As shown by Figure 1 , the wire cutting device 1 may include a wire cutting unit 11 and a carrying unit 12; the wire cutting unit 11 may be placed below the carrying unit 12 in the vertical direction in some examples as Figure 1 shown, or may be placed above the carrying unit 12 in the vertical direction in some examples as Figure 2 shown. Specifically, the wire cutting unit 11 may include a plurality of wire spools 111 and a cutting wire 112, and the cutting wire 112 is wound around the wire spools 111 to form an array composed of mutually parallel cutting line segments; in Figure 1 , the number of wire spools 111 is taken as an example of 2 for illustration, and the reciprocating movement direction of the wire spools 111 and the cutting wire 112 towards and away from the carrying unit 12 is as shown by the solid arrows in Figure 1 , and the reciprocating movement speed may be, for example, 10 m / s to 15 m / s. The carrying unit 12 is used to load and fix the silicon rod 2 to be processed. In the examples shown in Figure 1 and Figure 2 , the carrying unit 12 may include a base 121 and an intermediate member 122. The intermediate member 122 may fix the silicon rod 2 to be processed to the base 121. For example, the silicon rod to be processed may be fixed to the base through its circumferential surface by resin bonding to the lower surface of the base ( Figure 1 ) or the upper surface ( Figure 2 ) so as to be fixed to the base.

[0026] For Figure 1 , 2The wire cutting device 1 shown in the figure can move the wire cutting unit 11 or the bearing unit 12 to cause the opposite movement in the vertical direction between the cutting wire 112 and the silicon rod 2 to be processed. After the cutting wire 112 and the silicon rod 2 to be processed come into contact with each other, the cutting of the silicon rod 2 to be processed is realized by the movement of the cutting wire 112 along its extending direction. As shown in Figure 1 In the example shown, the wire cutting unit 11 can be moved along the direction indicated by the black arrow, or the bearing unit 12 can be moved along the direction of the dotted white arrow to realize the opposite movement in the vertical direction between the cutting wire 112 and the silicon rod 2 to be processed. As shown in Figure 2 In the example shown, the bearing unit 12 can be moved along the direction indicated by the black arrow, or the wire cutting unit 11 can be moved along the direction of the dotted white arrow to realize the opposite movement in the vertical direction between the cutting wire 112 and the silicon rod 2 to be processed. It should be noted that in the embodiment of the present invention, the movement of the wire cutting unit 11 or the bearing unit 12 is realized by adding a lifting device (not shown in the figure). It can be understood that those skilled in the art can also realize the movement of the wire cutting unit 11 or the bearing unit 12 in other ways according to actual needs and implementation scenarios, and the embodiment of the present invention will not elaborate on this.

[0027] In the conventional solution, a plurality of guiding grooves for guiding the cutting wire 112 are provided on the wire spool 111, and the cutting wire 112 is wound around each guiding groove of each wire spool 111 in sequence, so that the cutting wire 112 forms an array composed of a plurality of cutting line segments. In this array, the cutting line segments are parallel to each other to cut the silicon rod into a plurality of silicon wafers at one time.

[0028] The surface of the silicon wafer obtained by wire cutting is not completely flat, but there is surface damage caused by cutting line marks. At present, the "angle polishing method" is usually used to detect the depth of surface damage, and then the wire cutting process parameters are adjusted according to the detection results to ensure the wire cutting quality. Among them, the "angle polishing method" means: the mechanical damage layer is magnified by grinding a smooth inclined plane from the vertical mechanical damage layer to match the measurement accuracy of the microscope; after measuring with the microscope, it is geometrically converted into the actual damage depth.

[0029] Specifically, referring to Figure 3 , the conventional wire cutting method includes:

[0030] S101. Bond the silicon wafer sample obtained by wire cutting the silicon rod on a table inclined at a known angle;

[0031] S102. Use a polishing device to polish a part of the surface of the silicon wafer sample into an inclined plane inclined at a known angle, so that the surface damage layer of the silicon wafer sample can be exposed on this inclined plane;

[0032] S103. Observe the interface or demarcation line between the polished surface portion and the unpolished surface portion through a microscope, measure the length of the damage at the demarcation line on the inclined plane of the known angle to obtain the length of the damage on the inclined plane of the known angle, and calculate the depth of the damaged layer through the length and the sine value of the known angle;

[0033] S104. Judge the quality of the wire cutting process parameters according to the obtained damage depth.

[0034] However, the damage depth cannot reflect the dynamic changes of the actual cutting surface. The crystal structure of silicon is a diamond structure. In this structure, the density, hardness, and wear resistance of the (111) crystal plane are the highest, the grinding rate is the lowest, but it is most easily cleaved between two adjacent crystal planes; the grinding rate of the (110) crystal plane is the highest (i.e., it is most easily damaged and ground); the density of the (001) crystal plane is the lowest, its hardness is low and its strength is high. That is, for the cutting efficiency: (110) crystal plane > (001) crystal plane > (111) crystal plane. Therefore, in the silicon wafer manufacturing industry, the (110) crystal plane with better grinding performance is selected as the silicon wafer surface, that is, as the standard cutting surface, and is also considered to be an efficient cutting surface. In contrast, the (001) crystal plane is considered to be an inefficient cutting surface. However, in actual operation, through microscopic detection of the cutting line marks, it is found that the actual cutting surface will shift relative to the standard cutting surface, that is, the wire cutting line marks will shift from the efficient cutting surface to the inefficient cutting surface. See Figure 4 , which shows a microscopic image of the surface of a sample silicon wafer S after wire cutting. From Figure 4 it can be seen that the cutting line marks are in a periodically changing shape, which means that the wire cutting line marks have a periodic shift from the efficient cutting surface to the inefficient cutting surface. Therefore, the difficulty of cutting is also changing periodically. In this case, in order to ensure the cutting quality and cutting efficiency, it is necessary to adjust the wire cutting process parameters to keep the actual cutting surface on the efficient cutting surface and suppress its shift to the inefficient cutting surface.

[0035] Based on this, the embodiments of the present invention propose a wire cutting method, device, and silicon wafer; it can optimize the wire cutting process parameters according to the trend of the wire cutting line marks shifting from the efficient cutting surface to the inefficient cutting surface, so that the cutting line marks are kept on the efficient cutting surface, thereby improving the wire cutting efficiency while ensuring the wire cutting quality.

[0036] See Figure 5 , which shows a method for wire cutting a silicon rod provided by an embodiment of the present invention. The method includes:

[0037] S201. Wire cut a first silicon rod with a first set of wire cutting process parameters to obtain a plurality of sample silicon wafers;

[0038] S202. Obtain the undulation angle of the wire cutting line marks on the sample silicon wafers;

[0039] S203. Determine whether there is a tendency for the wire cutting line marks to shift from the high-efficiency cutting surface to the low-efficiency cutting surface based on the undulation angle;

[0040] S204. Based on the judgment result, adjust one or more wire cutting process parameters in the first wire cutting process parameter group according to the magnitude of the undulation angle to form a second wire cutting process parameter group;

[0041] S205. Wire cut the second silicon rod using the second wire cutting process parameter group.

[0042] An embodiment of the present invention provides a wire cutting method. This method optimizes wire cutting process parameters based on the offset situation of wire cutting line marks. The method includes measuring the undulation angle of the wire cutting line marks on a sample silicon wafer, and adjusting the wire cutting process parameters based on the obtained undulation angle for application to subsequent wire cutting operations. Since the undulation angle of the wire cutting line marks formed on the silicon wafer is actually the offset angle of the actual cutting surface relative to the standard cutting surface, that is, the angle at which the wire cutting line marks shift from the high-efficiency cutting surface to the low-efficiency wire cutting surface, therefore, this undulation angle can characterize the tendency for the wire cutting line marks to shift from the high-efficiency cutting surface to the low-efficiency wire cutting surface. Interfering with the wire cutting process parameters based on the undulation angle can keep the wire cutting line marks on or near the high-efficiency cutting surface and inhibit their shift to the low-efficiency cutting surface. Thus, while ensuring the quality of wire cutting, the efficiency of wire cutting operations can be improved, and further the production capacity can be increased.

[0043] In Figure 4 an example of the undulation angle of the wire cutting line marks is shown. In this example, the undulation angle of the wire cutting line marks is 160°, which means that the wire cutting line marks shift 20° from the high-efficiency cutting surface to the low-efficiency wire cutting surface. To better determine the undulation angle of the wire cutting line marks, according to a preferred embodiment of the present invention, referring to Figure 6 , the undulation angle of the wire cutting line marks is the angle γ between the plane where the adjacent negative line marks NL and positive line marks PL are located and the standard cutting surface SC.

[0044] As Figure 6 shown, it shows a schematic three-dimensional view of the surface of a sample silicon wafer S after wire cutting. Among them, the wire cutting line marks have a periodically undulating shape. The connection line formed by the most convex part of the wire cutting line marks along the direction perpendicular to the wire cutting direction X can be called the positive line PL, and the connection line formed by the most concave part of the wire cutting line marks along the direction perpendicular to the wire cutting direction X can be called the negative line NL. The positive line PL and the negative line NL are arranged alternately, and the plane where the adjacent positive line PL and negative line NL are located is the actual cutting surface AC. According to Figure 6 it can be seen that the actual cutting surface AC forms an angle γ relative to the standard cutting surface SC, and this angle γ is the undulation angle of the wire cutting line marks.

[0045] During the actual production process, it is difficult for the cutting line marks to always be on the highly efficient cutting surface, but they will deviate from the highly efficient cutting surface more or less. Considering cost - effectiveness, the undulation angle of the cutting line marks is allowed to fluctuate within a certain range. Only when the undulation angle of the cutting line marks exceeds this range is it determined that there is a deviation trend of the wire - cut line marks from the highly efficient cutting surface to the low - efficient cutting surface. Preferably, when the obtained undulation angle is less than 160°, it is determined that there is a deviation trend of the cutting line marks from the highly efficient cutting surface to the low - efficient cutting surface. See Figure 7 , which shows the (001) crystal plane, (111) crystal plane and (110) crystal plane of the silicon wafer. As Figure 7 shown, set the coordinates of four points A, B, C, and D as follows: A(1,0,0); B(0,1,0); C(0,1,1); D(0,0,1). Then, the vectors AB = (-1,1,0) and BC = (0,0,1) are in the (110) crystal plane, and the vectors AB = (-1,1,0) and BC = (0, - 1,1) are in the (111) crystal plane. Let n1=(x1,y1,z1) be the normal vector of the (110) crystal plane. Then, from n1 being perpendicular to AB and perpendicular to BC, it can be calculated that n1=(1,1,0); let n2=(x2,y2,z2) be the normal vector of the (111) crystal plane. Then, from n2 being perpendicular to AB and perpendicular to BD, it can be calculated that n2=(1,1,1). Then, the included angle between the (110) crystal plane and the (111) crystal plane is arccos <n1,n2> = 54.7°≈55°. In addition, since the included angle between the (110) crystal plane and the (001) crystal plane is 90°, the included angle between the (111) crystal plane and the (001) crystal plane is 90° - 55° = 35°.

[0046] Based on the above, it can be understood that when cutting along the (110) crystal plane, when the undulation angle of the line marks <180° - 55° = 125°, the actual cutting surface will turn into the (111) crystal plane with the lowest grinding efficiency. Generally speaking, the undulation angle of the line marks from 180° to 125° and then to 90° corresponds to the process of cutting efficiency from high to low and then to average.

[0047] On the other hand, when the line mark angle deviates slightly, the crystal plane will turn into a high - index crystal plane, and at this time, it can be considered that the change in grinding efficiency is not significant. Therefore, it can be considered that when the undulation angle of the line marks is between 180° and 153°, it is the grinding rate of the (110) crystal plane, and when the undulation angle of the line marks is between 153° and 125°, it is the grinding rate of the (111) crystal plane. Therefore, 153° can be used as the theoretical threshold. Combining with actual production experience, the threshold can finally be set to 160°.

[0048] Through Figure 4 and Figure 6It can be seen that the larger the undulation angle is, the less the cutting line mark deviates from the high-efficiency cutting surface to the low-efficiency cutting surface. Therefore, when the undulation angle is greater than the threshold value, it can be considered as the normal fluctuation of the allowed cutting line. When the undulation angle is less than the threshold value, the wire cutting parameters need to be optimized to ensure the wire cutting quality and efficiency.

[0049] According to the method provided by the embodiment of the present invention, once it is determined that there is a tendency for the wire cutting line mark to deviate from the high-efficiency cutting surface to the low-efficiency cutting surface, the wire cutting process parameters can be adjusted to suppress this tendency. Preferably, the wire cutting process parameter group at least includes: the tension of the cutting wire, the feeding speed of the silicon rod relative to the cutting wire, and the concentration of the cutting fluid.

[0050] During the actual cutting process, there is a strong coupling effect among the three parameters of the tension of the cutting wire, the feeding speed of the silicon rod relative to the cutting wire, and the concentration of the cutting fluid, resulting in a complex law between the wire cutting rate and the process conditions. According to the method provided by the embodiment of the present invention, by adjusting one or more of the above three parameters, the undulation angle of the wire cutting line mark can be correspondingly adjusted to suppress the deviation tendency of the wire cutting line mark from the high-efficiency cutting surface to the low-efficiency cutting surface. For example, when the undulation angle of the wire cutting line mark is in the range of 150° - 160°, the tension of the cutting wire can be adjusted in the range of 2.6N - 3.8N, the feeding speed of the silicon rod relative to the cutting wire can be adjusted in the range of 15mm / h - 16mm / h, and the mortar concentration can be adjusted in the range of 2.55kg / L - 2.7kg / L.

[0051] In order to accurately measure the undulation angle of the cutting line mark, preferably, obtaining the undulation angle of the wire cutting line mark on the sample silicon wafer includes:

[0052] Polishing a part of the surface of the sample silicon wafer to an inclined mirror surface at a set angle;

[0053] Using a microscope to measure the undulation angle of the wire cutting line mark at the boundary between the unpolished part and the polished part on the surface of the sample silicon wafer.

[0054] See Figure 8 , a part of the surface of the sample silicon wafer S is polished to an inclined mirror surface PC, where the mirror surface PC forms an angle θ with the standard cutting surface SC. Thus, the cutting line mark can be exposed at the boundary BL between the inclined mirror surface PC and the unpolished part. Then, the undulation angle of the cutting line mark can be measured at the boundary BL using a microscope.

[0055] In order to improve the test efficiency, the polishing of the surface of the sample silicon wafer can be completed in two stages. Preferably, the step of polishing a part of the surface of the sample silicon wafer to a set-angle inclined mirror surface includes: performing the polishing of the first stage and the polishing of the second stage using a first polishing pad and a second polishing pad respectively, wherein the polishing amount of the first polishing pad on the silicon wafer is greater than the polishing amount of the second polishing pad on the silicon wafer. Thus, the wire marks on the surface of the sample silicon wafer can be removed through the rough polishing of the first stage, and then the surface can reach the mirror surface through the fine polishing of the second stage.

[0056] Preferably, the duration of the polishing in the first stage is less than the duration of the polishing in the second stage.

[0057] More preferably, when polishing with the first polishing pad, the rotation speed of the first polishing pad is between 20 r / min and 40 r / min; when polishing with the second polishing pad, the rotation speed of the second polishing pad is between 50 r / min and 70 r / min.

[0058] An embodiment of the present invention also provides a wire cutting device, and the wire cutting device is used to execute the method described above.

[0059] An embodiment of the present invention also provides a silicon wafer, and the silicon wafer is made by using the method described above.

[0060] It should be noted that: among the technical solutions recorded in the embodiments of the present invention, without conflict, they can be combined arbitrarily.

[0061] As mentioned above, it is only the specific implementation manners of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A method for wire cutting silicon rods, characterized in that, The method includes: Wire-cutting a first silicon rod using a first wire-cutting process parameter set to obtain a plurality of sample wafers; Obtaining the undulating angle of the wire-cutting marks on the sample wafers; Based on the undulating angle, determining whether there is an offset trend of the wire-cutting marks from the high-efficiency cutting surface to the low-efficiency cutting surface; Based on the determination result, adjusting one or more wire-cutting process parameters in the first wire-cutting process parameter set according to the magnitude of the undulating angle to form a second wire-cutting process parameter set; Wire-cutting a second silicon rod using the second wire-cutting process parameter set; Wherein, obtaining the undulating angle of the wire-cutting marks on the sample wafers includes: Polishing a part of the surface of the sample wafer to an inclined mirror surface at a set angle; Measuring the undulating angle of the wire-cutting marks at the boundary between the unpolished part and the polished part of the surface of the sample wafer using a microscope.

2. The method according to claim 1, wherein The undulating angle of the wire-cutting marks is the angle between the plane where the adjacent negative wire-cutting marks and positive wire-cutting marks are located and the standard cutting surface.

3. The method according to claim 1, wherein When the obtained undulating angle is less than 160°, it is determined that there is an offset trend of the wire-cutting marks from the high-efficiency cutting surface to the low-efficiency cutting surface.

4. The method according to any one of claims 1 to 3, characterized in that, The wire-cutting process parameter set at least includes: the tension of the cutting wire, the feeding speed of the silicon rod relative to the cutting wire, and the concentration of the cutting fluid.

5. The method according to claim 1, characterized in that Polishing a part of the surface of the sample wafer to an inclined mirror surface at a set angle includes: performing the first-stage polishing and the second-stage polishing using a first polishing pad and a second polishing pad respectively, wherein the polishing amount index of the first polishing pad for the wafer is greater than that of the second polishing pad for the wafer.

6. The method according to claim 5, characterized in that The duration of the first-stage polishing is less than the duration of the second-stage polishing.

7. The method according to claim 5, wherein When polishing using the first polishing pad, the rotation speed of the first polishing pad is between 20 r / min and 40 r / min; When polishing using the second polishing pad, the rotation speed of the second polishing pad is between 50 r / min and 70 r / min.

8. A wire cutting device, characterized in that, The wire-cutting equipment is used to execute the method according to any one of claims 1 to 7.

9. A silicon wafer, characterized in that, The wafer is made by using the method according to any one of claims 1 to 7.

Images