Light-emitting diode epitaxial wafer and preparation method thereof, and light-emitting diode

Abstract

The present invention discloses a light-emitting diode epitaxial wafer, a method for preparing the same, and a light-emitting diode, relating to the field of semiconductor optoelectronic devices. The light-emitting diode epitaxial wafer comprises a substrate and, sequentially grown on the substrate, a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer, and a P-type GaN layer. The active layer has a periodic structure, with each period comprising a sequentially stacked well layer, a transition layer, and a barrier layer. The transition layer comprises a WS2 layer. Implementing the present invention can improve the light-emitting diode's luminous efficiency, antistatic capability, and wavelength uniformity.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor optoelectronic devices, and in particular to a light-emitting diode epitaxial wafer and a preparation method thereof, and a light-emitting diode. Background Art

[0002] At present, GaN-based light-emitting diodes are the most widely used light-emitting diodes. Their active regions are generally composite structures composed of periodic stacking of InGaN potential well layers and GaN barrier layers. The traditional active regions have the following problems: (1) Due to the high In content in the active region, the In atoms are large, and the growth temperature of the active region is low, resulting in poor lattice quality in the active region, forming leakage channels, affecting the anti-static ability, and defects will act as non-radiative recombination centers, affecting the luminous efficiency. (2) Due to the serious lattice mismatch between the InGaN material of the potential well layer and the GaN material of the barrier layer heterojunction, the potential well layer is subjected to piezoelectric polarization and produces band tilt, which causes the separation of electrons and holes in space, affecting the luminous efficiency, and causing large differences in the emission wavelength under different injection currents. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a light-emitting diode epitaxial wafer and a preparation method thereof, which can effectively improve the luminous efficiency, antistatic ability and wavelength uniformity of the light-emitting diode.

[0004] Another technical problem to be solved by the present invention is to provide a light emitting diode with high luminous efficiency, strong antistatic ability and high wavelength uniformity.

[0005] In order to solve the above problems, the present invention discloses a light-emitting diode epitaxial wafer, which includes a substrate and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer grown in sequence on the substrate; the active layer is a periodic structure, and each period includes a potential well layer, a transition layer and a barrier layer stacked in sequence; the transition layer includes a WS2 layer.

[0006] As an improvement of the above technical solution, the thickness of the WS2 layer is 1-10 nm.

[0007] As an improvement of the above technical solution, the transition layer includes In x Ga 1-x N layer and WS2 layer;

[0008] The potential well layer is In y Ga 1-y N layers, x<y.

[0009] As an improvement of the above technical solution, x is 0.01-0.3, and y is 0.1-0.5;

[0010] In x Ga 1-x The thickness of the N layer is 0.1-3 nm.

[0011] As an improvement of the above technical solution, the thickness of the potential well layer is 2-5 nm, and the thickness of the potential barrier layer is 6-12 nm.

[0012] Correspondingly, the present invention also discloses a method for preparing a light-emitting diode epitaxial wafer, which is used to prepare the above-mentioned light-emitting diode epitaxial wafer, and comprises:

[0013] A substrate is provided, and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer are sequentially grown on the substrate; the active layer is a periodic structure, and each period includes a potential well layer, a transition layer and a barrier layer stacked in sequence; the transition layer includes a WS2 layer.

[0014] As an improvement of the above technical solution, the WS2 layer is grown by CVD at a growth temperature of 700-1000°C; during growth, the molar ratio of the tungsten source to the sulfur source is 1:(1-3), a mixed gas of Ar and H2 is used as the carrier gas, and the volume ratio of Ar to H2 is 1:(1-5).

[0015] As an improvement of the above technical solution, the transition layer also includes In x Ga 1-x N layer, the potential well layer is In y Ga 1-y N-layer;

[0016] In x Ga 1-x The growth temperature of the N layer is greater than that of the In y Ga 1-y Growth temperature of the N layer.

[0017] As an improvement of the above technical solution, the In x Ga 1-x The growth temperature of the N layer is 800-850°C, and the growth temperature of the potential well layer is 700-800°C.

[0018] Correspondingly, the present invention also discloses a light emitting diode, which includes the light emitting diode epitaxial wafer mentioned above.

[0019] The implementation of the present invention has the following beneficial effects:

[0020] 1. A transition layer is provided between the potential well layer and the potential barrier layer of the active layer of the present invention, and the transition layer includes a WS2 layer. First, the S atoms in the WS2 layer can simultaneously form van der Waals bonds and metal atom covalent bonds. The van der Waals bond binding force is weak, and there is no need to consider lattice mismatch restrictions. The WS2 layer reduces the lattice mismatch between the heterojunction active layers, reduces the dislocation density in the active region, reduces the defect leakage channel introduced by the high In component, improves the lattice quality of the light-emitting diode device, and thus improves its antistatic capability. Secondly, because the transition layer reduces the lattice mismatch between the potential well layer and the potential barrier layer, it reduces the formation of non-radiative recombination caused by defects in the potential well layer, and reduces the compressive stress on the potential well layer, significantly reducing the piezoelectric polarization effect, and increasing the wave function overlap of carriers in the active region, thereby greatly increasing the luminous efficiency. Furthermore, the WS2 layer can reduce the interface stress at the heterojunction interface and reduce the band tilt of the active region, thereby improving the problem of large differences in luminous wavelengths in the active region with a high In component when injected with different currents. Finally, due to the high mobility of carriers in WS2 materials, the expansion of carriers in the active area is promoted, thereby improving the luminous efficiency and luminous uniformity of the active area.

[0021] 2. A transition layer is provided between the potential well layer and the potential barrier layer of the active layer of the present invention. The transition layer comprises In x Ga 1-x N layer and WS2 layer. x Ga 1-x The N layer can realize the potential well layer (In y Ga 1-y N layer) and WS2 layer, without introducing defects and stress. At the same time, it also avoids the WS2 layer and the potential well layer (In y Ga 1-y N layer), resulting in atomic diffusion and non-radiative recombination, which reduces the luminous efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 1 is a schematic structural diagram of a light emitting diode epitaxial wafer according to an embodiment of the present invention;

[0023] Figure 2 1 is a schematic structural diagram of an active layer in one embodiment of the present invention;

[0024] Figure 3 is a schematic structural diagram of an active layer in another embodiment of the present invention;

[0025] Figure 4 This is a flow chart of a method for preparing a light-emitting diode epitaxial wafer in one embodiment of the present invention. DETAILED DESCRIPTION

[0026] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention is described in further detail below.

[0027] refer to Figure 1 The present invention discloses a light-emitting diode epitaxial wafer, comprising a substrate 1 and a nucleation layer 2, an intrinsic GaN layer 3, an N-type GaN layer 4, an active layer 5, an electron blocking layer 6 and a P-type GaN layer 7 sequentially grown on the substrate 1. The active layer 5 is a periodic structure with a period number ≥ 2, preferably, a period number of 3-15. Each period includes a potential well layer 51, a transition layer 52 and a barrier layer 53 stacked in sequence. Specifically, in one embodiment of the present invention, the transition layer 52 is a WS2 layer, which can reduce the dislocation density in the active region, reduce defect leakage channels, and improve antistatic ability. At the same time, reducing the lattice mismatch also reduces non-radiative recombination, piezoelectric polarization effect and band tilt, thereby improving the luminous efficiency of the light-emitting diode and solving the problem of large differences in luminous wavelength when different currents are injected. In addition, the carrier expansion rate in the WS2 layer is relatively fast, which also improves the luminous efficiency and luminous uniformity.

[0028] Specifically, the thickness of the transition layer 52 (WS2 layer) is 0.5-15nm. When its thickness is less than 0.5nm, although the luminous efficiency and luminous uniformity can be improved, it is difficult to effectively improve the antistatic ability. When its thickness is greater than 15nm, although the luminous uniformity and antistatic ability can be greatly improved, the atoms in WS2 diffuse into the potential well layer 51, which will increase non-radiative recombination, and the carriers are too far away from the potential well layer 51, which will reduce the luminous efficiency. Preferably, the thickness of the transition layer 52 (WS2 layer) is 1-10nm, exemplarily 2nm, 4nm, 6nm, 8nm or 9nm, but not limited thereto.

[0029] Specifically, the potential well layer 51 may be an AlGaN layer or an InGaN layer, but is not limited thereto. Preferably, in one embodiment of the present invention, the potential well layer 51 is an InGaN layer. y Ga 1-y N layer, wherein y is 0.1-0.5. The thickness of the potential well layer 51 is 1-6 nm, exemplarily 1.5 nm, 2.5 nm, 3 nm, 3.5 nm, 4 nm or 5.5 nm, but not limited thereto. Preferably, the thickness of the potential well layer 51 is 2-5 nm.

[0030] Specifically, the barrier layer 53 may be a GaN layer or an AlGaN layer, but is not limited thereto. Preferably, in one embodiment of the present invention, the barrier layer 53 is a GaN layer. The thickness of the barrier layer 53 is 3-20 nm, and is exemplarily 4 nm, 6 nm, 8 nm, 10 nm, 12 nm, 14 nm, 16 nm, or 18 nm, but is not limited thereto. Preferably, the thickness of the barrier layer 53 is 6-12 nm.

[0031] Preferably, reference Figure 3In another embodiment of the present invention, the transition layer 52 includes sequentially stacked In x Ga 1-x N layer 521 and WS2 layer 522. The potential well layer 51 is In y Ga 1-y N layer, x<y. Based on this embodiment, the potential well layer 51 (In y Ga 1-y N layer) and WS2 layer 522, without introducing defects and stress. At the same time, it also avoids the WS2 layer 522 and the potential well layer 51 (In y Ga 1-y N layer), resulting in atomic diffusion and non-radiative recombination, which reduces the luminous efficiency.

[0032] Specifically, in this embodiment, x is 0.01-0.3, and is exemplified by, but not limited to, 0.05, 0.07, 0.1, 0.14, 0.22, or 0.28. y is 0.1-0.5, and is exemplified by, but not limited to, 0.15, 0.2, 0.25, 0.3, 0.35, 0.4, or 0.45.

[0033] Specifically, in this embodiment, In x Ga 1-x The thickness of the N layer 521 is 0.1-4 nm. If the thickness of the N layer 521 is greater than 4 nm, the distance between the potential well layer 51 and the WS2 layer 522 will be increased, thereby weakening the effect of the WS2 layer 522. x Ga 1-x The thickness of the N layer 521 is 0.3 nm, 0.8 nm, 1.2 nm, 1.6 nm, 2 nm, 2.4 nm, 3 nm or 3.5 nm, but is not limited thereto. x Ga 1-x The thickness of the N layer 521 is 0.1-3 nm.

[0034] Specifically, in this embodiment, the thickness of the WS2 layer 522 is 1-12 nm, exemplarily 2 nm, 4 nm, 6 nm, 9 nm or 11 nm, but not limited thereto. Preferably, the thickness of the WS2 layer 522 is 1-10 nm.

[0035] The substrate 1 may be a sapphire substrate, a silicon substrate, a silicon carbide substrate, or a GaN substrate, but is not limited thereto. A sapphire substrate is preferred.

[0036] The nucleation layer 2 may be an AlN layer or an AlGaN layer, but is not limited thereto. The thickness of the nucleation layer 2 is 20-100 nm, and is exemplarily 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, or 80 nm, but is not limited thereto.

[0037] The thickness of the intrinsic GaN layer 3 is 300-800 nm, and exemplarily is 350 nm, 400 nm, 450 nm, 500 nm, 550 nm, 600 nm, 650 nm, 700 nm or 750 nm, but is not limited thereto.

[0038] The doping element of the N-type GaN layer 4 is Si, but not limited thereto. The doping concentration of the N-type GaN layer 4 is 5×10 18 -1×10 19 cm -3 , and its thickness is 1-3 μm, exemplified by 1.2 μm, 1.6 μm, 1.8 μm, 2.2 μm, 2.4 μm, 2.6 μm, 2.8 μm or 2.9 μm, but not limited thereto.

[0039] The electron blocking layer 6 is Al α Ga 1-α N layer and In β Ga 1-β The periodic structure of the N layer is alternately grown, and the number of periods is 3-15. Among them, α is 0.05-0.2, and β is 0.1-0.5. Specifically, a single Al α Ga 1-α The thickness of the N layer is 1-8nm, and the thickness of a single In β Ga 1-β The thickness of the N layer is 1-8 nm, and the total thickness of the electron blocking layer 6 is 20-150 nm.

[0040] The doping element in the P-type GaN layer 7 is Mg, but not limited thereto. The doping concentration of Mg in the P-type GaN layer 7 is 5×10 17 -1×10 20 cm -3 The thickness of the P-type GaN layer 7 is 200-300 nm, exemplified by 210 nm, 230 nm, 250 nm, 270 nm, 280 nm, or 290 nm, but not limited thereto.

[0041] Accordingly, reference Figure 4 The present invention also discloses a method for preparing a light-emitting diode epitaxial wafer, which is used to prepare the above-mentioned light-emitting diode epitaxial wafer; the method specifically comprises:

[0042] S1: providing a substrate;

[0043] Preferably, in one embodiment of the present invention, the substrate is annealed at 1000-1200° C., 200-600 torr, and H 2 atmosphere for 5-8 minutes.

[0044] S2: sequentially growing a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer, and a P-type GaN layer on the substrate;

[0045] Specifically, S2 includes:

[0046] S21: growing a nucleation layer on the substrate;

[0047] Among them, an AlN layer can be grown by PVD as a nucleation layer; or an AlGaN layer or an AlN layer can be grown by MOCVD as a nucleation layer, but it is not limited thereto. Preferably, in one embodiment of the present invention, an AlGaN layer is grown by MOCVD as a nucleation layer, and its growth temperature is 500-700°C and the growth pressure is 200-400 torr. During the growth process, N2 is used as a carrier gas, or a mixed gas of N2 and H2 is used as a carrier gas, TMGa or TEGa is used as a Ga source, NH3 is used as a N source, and TMAl is used as an Al source.

[0048] S22: growing an intrinsic GaN layer on the nucleation layer;

[0049] Specifically, in one embodiment of the present invention, an intrinsic GaN layer is grown using MOCVD at a growth temperature of 1100-1150°C and a growth pressure of 100-500 Torr. During the growth process, N2 or a mixture of N2 and H2 is used as the carrier gas, TMGa is used as the Ga source, and NH3 is used as the N source.

[0050] S23: growing an N-type GaN layer on the intrinsic GaN layer;

[0051] Specifically, in one embodiment of the present invention, an N-type GaN layer is grown using MOCVD at a growth temperature of 1100°C to 1150°C and a growth pressure of 100 torr to 500 torr. During the growth process, N2 or a mixture of N2 and H2 is used as the carrier gas, TMGa is used as the Ga source, NH3 is used as the N source, and SiH4 is used as the Si source.

[0052] S24: growing an active layer on the N-type GaN layer;

[0053] Specifically, S24 includes:

[0054] S241: growing a potential well layer;

[0055] Specifically, in one embodiment of the present invention, an InGaN layer is grown using MOCVD as the potential well layer. The growth temperature is 700-800°C and the growth pressure is 100-500 Torr. During the growth process, N2 or Ar is used as a carrier gas to enhance In incorporation. TMGa or TEGa is used as the Ga source, NH3 is used as the N source, and TMIn is used as the In source.

[0056] S242: growing a transition layer on the potential well layer;

[0057] Specifically, in one embodiment of the present invention, a WS2 layer can be grown by CVD or PVT as a transition layer, but is not limited thereto. Preferably, in one embodiment of the present invention, the WS2 layer is grown by CVD at a growth temperature of 700-1000°C. During growth, the molar ratio of the tungsten source to the sulfur source is 1:(1-3), a mixed gas of Ar and H2 is used as the carrier gas, and the volume ratio of Ar to H2 is 1:(1-5). The WS2 crystals in the WS2 layer grown under such conditions are single crystal structures with consistent orientations and good thermal and chemical stability. Specifically, sodium thiosulfate can be used as the sulfur source, but is not limited thereto. Tungsten disulfide can be used as the tungsten source, but is not limited thereto.

[0058] In another embodiment of the present invention, In is sequentially grown on the potential well layer. x Ga 1-x N layer and WS2 layer, as transition layer. x Ga 1-x The N layer can be grown by MOCVD, but is not limited thereto. x Ga 1-x The growth temperature of the N layer is 800-850°C, the growth pressure is 100-500 torr, and during the growth process, N2 or Ar is used as the carrier gas, TMGa or TEGa is used as the Ga source, NH3 is used as the N source, and TMIn is used as the In source. x Ga 1-x The growth temperature of the N layer is greater than the growth temperature of the potential well layer, which can avoid defects introduced by low-temperature growth from forming non-recombination centers and reducing luminous efficiency.

[0059] S243: growing a barrier layer on the transition layer;

[0060] Specifically, in one embodiment of the present invention, a GaN layer is grown using MOCVD as a potential well layer. The growth temperature is 800-900°C and the pressure is 100-500 Torr. During the growth process, N2 or a mixture of N2 and H2 is used as the carrier gas. TMGa or TEGa is used as the Ga source, and NH3 is used as the N source.

[0061] S244: Periodically repeat steps S241 to S243 until an active layer is obtained.

[0062] S25: growing an electron blocking layer on the active layer;

[0063] In one embodiment of the present invention, an electron blocking layer is grown in MOCVD. Specifically, Al is grown alternately on the active layer. α Ga 1-α N layer and In β Ga 1-β The electron blocking layer is formed by repeating 3-15 cycles. The growth temperature of both layers is 900-1000°C. During the growth process, N2 is used as the carrier gas, TMGa or TEGa is used as the Ga source, TMIn is used as the In source, TMAl is used as the Al source, and NH3 is used as the N source.

[0064] S26: growing a P-type GaN layer on the electron blocking layer;

[0065] In one embodiment of the present invention, a p-type GaN layer is grown using MOCVD at a growth temperature of 800-1000°C and a growth pressure of 100-300 Torr. During the growth process, N2 or a mixture of N2 and H2 is used as the carrier gas, TMGa or TEGa is used as the Ga source, NH3 is used as the N source, and CP2Mg is used as the Mg source.

[0066] The present invention will be further described below with specific embodiments:

[0067] Example 1

[0068] This embodiment provides a light emitting diode epitaxial wafer, referring to Figure 1 and Figure 2 It includes a substrate 1 and a nucleation layer 2, an intrinsic GaN layer 3, an N-type GaN layer 4, an active layer 5, an electron blocking layer 6 and a P-type GaN layer 7 grown in sequence on the substrate 1.

[0069] The substrate 1 is a sapphire substrate. The nucleation layer 2 is an AlGaN layer with a thickness of 30 nm. The intrinsic GaN layer 3 has a thickness of 400 nm. The Si doping concentration in the N-type GaN layer 4 is 9×10 18 cm -3 , and its thickness is 2μm.

[0070] Among them, the active layer 5 is a potential well layer 51 (In 0.3 Ga 0.7The structure has a periodicity of 10, consisting of a GaN layer, a transition layer 52, and a barrier layer 53 (GaN layer). The thickness of a single well layer is 3 nm, the thickness of a single transition layer is 3.5 nm, and the thickness of a single barrier layer is 10 nm. The transition layer is a WS2 layer.

[0071] The electron blocking layer 6 is Al α Ga 1-α N layer (α=0.08) and In β Ga 1-β The periodic structure of the alternating growth of N layers (β=0.35) has 8 periods. α Ga 1-α The thickness of the N layer is 3nm, and the single In β Ga 1-β The thickness of the N layer is 6 nm.

[0072] The Mg doping concentration in the P-type GaN layer 7 is 5×10 20 cm -3 , with a thickness of 260nm.

[0073] The method for preparing a light-emitting diode epitaxial wafer in this embodiment includes the following steps:

[0074] (1) Provide a substrate, load the substrate into an MOCVD reaction chamber, and anneal at 1150° C., 400 torr, and H 2 atmosphere for 6 minutes.

[0075] (2) growing a nucleation layer on the substrate;

[0076] Specifically, an AlGaN layer was grown as a nucleation layer using MOCVD at a growth temperature of 650°C and a growth pressure of 250 Torr. During the growth process, a mixture of N2 and H2 was used as the carrier gas, TMGa was used as the Ga source, NH3 was used as the N source, and TMAl was used as the Al source.

[0077] (3) growing an intrinsic GaN layer on the nucleation layer;

[0078] Specifically, an intrinsic GaN layer was grown in MOCVD at a growth temperature of 1140°C and a growth pressure of 300 Torr. During the growth process, N2 was used as a carrier gas, TMGa was used as a Ga source, and NH3 was used as a N source.

[0079] (4) growing an N-type GaN layer on the intrinsic GaN layer;

[0080] Specifically, an N-type GaN layer is grown in MOCVD at a growth temperature of 1140° C. and a growth pressure of 300 torr, with N 2 and H 2 as carrier gases, TMGa as a Ga source, NH 3 as a N source, and SiH 4 as a Si source.

[0081] (5) growing a potential well layer;

[0082] Specifically, In was grown by MOCVD. 0.3 Ga 0.7 The N layer is grown at a temperature of 780°C and a pressure of 300 Torr. During growth, NH3 is introduced into the MOCVD reaction chamber as the N source, TMGa is introduced as the Ga source, N2 is introduced as the carrier gas, and TMIn is introduced as the In source.

[0083] (6) growing a transition layer on the potential well layer;

[0084] Specifically, a WS2 layer was grown as a transition layer by CVD at a growth temperature of 750°C. During the growth, the molar ratio of the tungsten source to the sulfur source was 1:2.2, and a mixture of Ar and H2 (volume ratio 1:3) was used as the carrier gas. The tungsten source was tungsten disulfide, and the sulfur source was sodium thiosulfate.

[0085] (7) growing a barrier layer on the transition layer;

[0086] Specifically, a GaN layer is grown as a barrier layer in MOCVD at a growth temperature of 850° C., a growth pressure of 300 Torr, a mixture of N 2 and H 2 as a carrier gas, TMGa as a Ga source, and NH 3 as a N source.

[0087] (8) Repeat steps (5) to (7) periodically until an active layer is obtained;

[0088] (9) growing an electron blocking layer on the active layer;

[0089] Specifically, Al is grown periodically in MOCVD. α Ga 1-α N layer and In β Ga 1-β N layer, as an electron blocking layer. α Ga 1-α The growth temperature of the N layer is 950℃, the growth pressure is 300torr, a mixture of N2 and H2 is used as the carrier gas, TMGa is used as the Ga source, TMAl is used as the Al source, and NH3 is used as the N source. β Ga 1-β The growth temperature of the N layer is 950°C, the growth pressure is 300 torr, a mixed gas of N2 and H2 is used as the carrier gas, TMGa is used as the Ga source, TMIn is used as the In source, and NH3 is used as the N source.

[0090] (10) growing a P-type GaN layer on the electron blocking layer;

[0091] Specifically, the growth temperature is 950° C., the growth pressure is 220 torr, N 2 and H 2 are used as carrier gases, TMGa is used as a Ga source, NH 3 is used as a N source, and CP 2 Mg is used as a Mg source.

[0092] Example 2

[0093] This embodiment provides a light emitting diode epitaxial wafer, referring to Figure 1 and Figure 2 It includes a substrate 1 and a nucleation layer 2, an intrinsic GaN layer 3, an N-type GaN layer 4, an active layer 5, an electron blocking layer 6 and a P-type GaN layer 7 grown in sequence on the substrate 1.

[0094] The substrate 1 is a sapphire substrate. The nucleation layer 2 is an AlGaN layer with a thickness of 30 nm. The intrinsic GaN layer 3 has a thickness of 400 nm. The Si doping concentration in the N-type GaN layer 4 is 9×10 18 cm -3 , and its thickness is 2μm.

[0095] Among them, the active layer 5 is a potential well layer 51 (In 0.3 Ga 0.7 N layer), a transition layer 52 and a barrier layer 53 (GaN layer) with a periodic structure of 10. Each transition layer 52 includes In x Ga 1-x N layer 521 (x=0.3) and WS2 layer 522, In x Ga 1-x The thickness of the N layer is 0.5 nm, the thickness of the WS2 layer is 3 nm, the thickness of a single well layer is 3 nm, and the thickness of a single barrier layer is 10 nm.

[0096] The electron blocking layer 6 is Al α Ga 1-α N layer (α=0.08) and In β Ga 1-β The periodic structure of the alternating growth of N layers (β=0.35) has 8 periods. α Ga 1-α The thickness of the N layer is 3nm, and the single In β Ga 1-β The thickness of the N layer is 6 nm.

[0097] The Mg doping concentration in the P-type GaN layer 7 is 5×10 20 cm -3 , with a thickness of 260nm.

[0098] The method for preparing a light-emitting diode epitaxial wafer in this embodiment includes the following steps:

[0099] (1) Provide a substrate, load the substrate into an MOCVD reaction chamber, and anneal at 1150° C., 400 torr, and H 2 atmosphere for 6 minutes.

[0100] (2) growing a nucleation layer on the substrate;

[0101] Specifically, an AlGaN layer was grown as a nucleation layer using MOCVD at a growth temperature of 650°C and a growth pressure of 250 Torr. During the growth process, a mixture of N2 and H2 was used as the carrier gas, TMGa was used as the Ga source, NH3 was used as the N source, and TMAl was used as the Al source.

[0102] (3) growing an intrinsic GaN layer on the nucleation layer;

[0103] Specifically, an intrinsic GaN layer was grown in MOCVD at a growth temperature of 1140°C and a growth pressure of 300 Torr. During the growth process, N2 was used as a carrier gas, TMGa was used as a Ga source, and NH3 was used as a N source.

[0104] (4) growing an N-type GaN layer on the intrinsic GaN layer;

[0105] Specifically, an N-type GaN layer is grown in MOCVD at a growth temperature of 1140° C. and a growth pressure of 300 torr, with N 2 and H 2 as carrier gases, TMGa as a Ga source, NH 3 as a N source, and SiH 4 as a Si source.

[0106] (5) growing a potential well layer;

[0107] Specifically, In was grown by MOCVD. 0.3 Ga 0.7 The N layer is grown at a temperature of 780°C and a pressure of 300 Torr. During growth, NH3 is introduced into the MOCVD reaction chamber as the N source, TMGa is introduced as the Ga source, N2 is introduced as the carrier gas, and TMIn is introduced as the In source.

[0108] (6) Growing In on the potential well layer x Ga 1-x N-layer;

[0109] Specifically, MOCVD growth MOCVD growth In x Ga 1-x The N layer is grown at a temperature of 800°C and a pressure of 300 Torr. During growth, NH3 is introduced into the MOCVD reaction chamber as the N source, N2 is used as the carrier gas, and TMIn is introduced as the In source.

[0110] (7)In x Ga 1-x A WS2 layer is grown on the N layer;

[0111] Specifically, a WS2 layer was grown as a transition layer by CVD at a growth temperature of 750°C. During the growth, the molar ratio of the tungsten source to the sulfur source was 1:2.2, and a mixture of Ar and H2 (volume ratio 1:3) was used as the carrier gas. The tungsten source was tungsten disulfide, and the sulfur source was sodium thiosulfate.

[0112] (8) growing a barrier layer on the WS2 layer;

[0113] Specifically, a GaN layer is grown as a barrier layer in MOCVD at a growth temperature of 850° C., a growth pressure of 300 Torr, a mixture of N 2 and H 2 as a carrier gas, TMGa as a Ga source, and NH 3 as a N source.

[0114] (9) Repeat steps (5) to (8) periodically until an active layer is obtained;

[0115] (10) growing an electron blocking layer on the active layer;

[0116] Specifically, Al is grown periodically in MOCVD. α Ga 1-α N layer and In β Ga 1-β N layer, as an electron blocking layer. α Ga 1-α The growth temperature of the N layer is 950℃, the growth pressure is 300torr, a mixture of N2 and H2 is used as the carrier gas, TMGa is used as the Ga source, TMAl is used as the Al source, and NH3 is used as the N source. β Ga 1-β The growth temperature of the N layer is 950°C, the growth pressure is 300 torr, a mixed gas of N2 and H2 is used as the carrier gas, TMGa is used as the Ga source, TMIn is used as the In source, and NH3 is used as the N source.

[0117] (11) growing a P-type GaN layer on the electron blocking layer;

[0118] Specifically, the growth temperature is 950° C., the growth pressure is 220 torr, N 2 and H 2 are used as carrier gases, TMGa is used as a Ga source, NH 3 is used as a N source, and CP 2 Mg is used as a Mg source.

[0119] Example 3

[0120] This embodiment provides a light emitting diode epitaxial wafer, referring to Figure 1 and Figure 2 It includes a substrate 1 and a nucleation layer 2, an intrinsic GaN layer 3, an N-type GaN layer 4, an active layer 5, an electron blocking layer 6 and a P-type GaN layer 7 grown in sequence on the substrate 1.

[0121] The substrate 1 is a sapphire substrate. The nucleation layer 2 is an AlGaN layer with a thickness of 30 nm. The intrinsic GaN layer 3 has a thickness of 400 nm. The Si doping concentration in the N-type GaN layer 4 is 9×10 18 cm -3 , and its thickness is 2μm.

[0122] Among them, the active layer 5 is a potential well layer 51 (In 0.3 Ga 0.7 N layer), a transition layer 52 and a barrier layer 53 (GaN layer) with a periodic structure of 10. Each transition layer 52 includes In x Ga 1-x N layer 521 (x=0.1) and WS2 layer 522, In x Ga 1-x The thickness of the N layer is 0.5 nm, the thickness of the WS2 layer is 3 nm, the thickness of a single well layer is 3 nm, and the thickness of a single barrier layer is 10 nm.

[0123] The electron blocking layer 6 is Al α Ga 1-α N layer (α=0.08) and In β Ga 1-β The periodic structure of the alternating growth of N layers (β=0.35) has 8 periods. α Ga 1-α The thickness of the N layer is 3nm, and the single In β Ga 1-β The thickness of the N layer is 6 nm.

[0124] The Mg doping concentration in the P-type GaN layer 7 is 5×10 20 cm -3 , with a thickness of 260nm.

[0125] The method for preparing a light-emitting diode epitaxial wafer in this embodiment includes the following steps:

[0126] (1) Provide a substrate, load the substrate into an MOCVD reaction chamber, and anneal at 1150° C., 400 torr, and H 2 atmosphere for 6 minutes.

[0127] (2) growing a nucleation layer on the substrate;

[0128] Specifically, an AlGaN layer was grown as a nucleation layer using MOCVD at a growth temperature of 650°C and a growth pressure of 250 Torr. During the growth process, a mixture of N2 and H2 was used as the carrier gas, TMGa was used as the Ga source, NH3 was used as the N source, and TMAl was used as the Al source.

[0129] (3) growing an intrinsic GaN layer on the nucleation layer;

[0130] Specifically, an intrinsic GaN layer was grown in MOCVD at a growth temperature of 1140°C and a growth pressure of 300 Torr. During the growth process, N2 was used as a carrier gas, TMGa was used as a Ga source, and NH3 was used as a N source.

[0131] (4) growing an N-type GaN layer on the intrinsic GaN layer;

[0132] Specifically, an N-type GaN layer is grown in MOCVD at a growth temperature of 1140° C. and a growth pressure of 300 torr, with N 2 and H 2 as carrier gases, TMGa as a Ga source, NH 3 as a N source, and SiH 4 as a Si source.

[0133] (5) growing a potential well layer;

[0134] Specifically, In was grown by MOCVD. 0.3 Ga 0.7 The N layer is grown at a temperature of 780°C and a pressure of 300 Torr. During growth, NH3 is introduced into the MOCVD reaction chamber as the N source, TMGa is introduced as the Ga source, N2 is introduced as the carrier gas, and TMIn is introduced as the In source.

[0135] (6) Growing In on the potential well layer x Ga 1-x N-layer;

[0136] Specifically, MOCVD growth MOCVD growth In x Ga 1-x The N layer is grown at a temperature of 800°C and a pressure of 300 Torr. During growth, NH3 is introduced into the MOCVD reaction chamber as the N source, N2 is used as the carrier gas, and TMIn is introduced as the In source.

[0137] (7)In x Ga 1-x A WS2 layer is grown on the N layer;

[0138] Specifically, a WS2 layer was grown as a transition layer by CVD at a growth temperature of 750°C. During the growth, the molar ratio of the tungsten source to the sulfur source was 1:2.2, and a mixture of Ar and H2 (volume ratio 1:3) was used as the carrier gas. The tungsten source was tungsten disulfide, and the sulfur source was sodium thiosulfate.

[0139] (8) growing a barrier layer on the WS2 layer;

[0140] Specifically, a GaN layer is grown as a barrier layer in MOCVD at a growth temperature of 850° C., a growth pressure of 300 Torr, a mixture of N 2 and H 2 as a carrier gas, TMGa as a Ga source, and NH 3 as a N source.

[0141] (9) Repeat steps (5) to (8) periodically until an active layer is obtained;

[0142] (10) growing an electron blocking layer on the active layer;

[0143] Specifically, Al is grown periodically in MOCVD. α Ga 1-α N layer and In β Ga 1-β N layer, as an electron blocking layer. α Ga 1-α The growth temperature of the N layer is 950℃, the growth pressure is 300torr, a mixture of N2 and H2 is used as the carrier gas, TMGa is used as the Ga source, TMAl is used as the Al source, and NH3 is used as the N source. β Ga 1-β The growth temperature of the N layer is 950°C, the growth pressure is 300 torr, a mixed gas of N2 and H2 is used as the carrier gas, TMGa is used as the Ga source, TMIn is used as the In source, and NH3 is used as the N source.

[0144] (11) growing a P-type GaN layer on the electron blocking layer;

[0145] Specifically, the growth temperature is 950° C., the growth pressure is 220 torr, N 2 and H 2 are used as carrier gases, TMGa is used as a Ga source, NH 3 is used as a N source, and CP 2 Mg is used as a Mg source.

[0146] Comparative Example 1

[0147] This comparative example provides a light-emitting diode epitaxial wafer, which differs from Example 1 in that the active layer does not include a transition layer; accordingly, the preparation method does not include the step of preparing this layer (i.e., step (6)), and the rest is the same as Example 1.

[0148] Comparative Example 2

[0149] This comparative example provides a light emitting diode epitaxial wafer, which differs from Example 1 in that the transition layer is In x Ga 1-x N layer (x = 0.1); accordingly, the preparation method of the transition layer is the same as that of In in Example 3 x Ga 1-x The preparation method of the N layer is the same.

[0150] The epitaxial wafers obtained in Examples 1-3 and Comparative Examples 1-2 were tested for luminous uniformity, and then processed into 10×24 mil LED chips with a vertical structure, and their antistatic ability and brightness were tested;

[0151] The specific test method is:

[0152] (1) The luminescence wavelength of the prepared epitaxial wafer at 1 mA and 5 mA was measured using an IM-1130 PL spectrometer, and the luminescence wavelength difference was calculated as the luminescence uniformity.

[0153] (2) Antistatic performance test: The antistatic performance of the chip is tested using an electrostatic meter under the HBM (Human Body Model) model to test the pass rate of the chip that can withstand reverse 6000V static electricity;

[0154] (3) Brightness: When the current is 120mA, the brightness of the chip is tested;

[0155] The specific test results are shown in the following table:

[0156] Wavelength uniformity (nm) Brightness (mW) Antistatic performance (6000V) Example 1 3.2 192.5 90.6％ Example 2 2.1 194.2 91.1％ Example 3 1.9 196.8 91.3％ Comparative Example 1 6.1 171.5 78.5％ Comparative Example 2 6.5 173.9 79.3％

[0157] It can be seen from the table that when the active layer of the present invention is adopted, the wavelength uniformity, brightness and antistatic performance of the epitaxial wafer are significantly improved.

[0158] The above is a preferred embodiment of the invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A light-emitting diode epitaxial wafer, characterized in that: The invention comprises a substrate and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer sequentially grown on the substrate; the active layer is a periodic structure with a period number of ≥2; each period comprises a potential well layer, a transition layer and a barrier layer stacked in sequence; the transition layer comprises a WS2 layer, the potential well layer is an In y Ga 1-y N layer, y is 0.1-0.5, and the barrier layer is a GaN layer.

2. The light emitting diode epitaxial wafer according to claim 1, wherein: The thickness of the WS2 layer is 1-10 nm.

3. The light emitting diode epitaxial wafer according to claim 1 or 2, wherein: The transition layer includes sequentially stacked In x Ga 1-x N layer and WS2 layer; x<y.

4. The light emitting diode epitaxial wafer according to claim 3, wherein: x is 0.01-0.3; x Ga 1-x The thickness of the N layer is 0.1-3 nm.

5. The light emitting diode epitaxial wafer according to claim 1, wherein: The thickness of the potential well layer is 2-5 nm, and the thickness of the potential barrier layer is 6-12 nm.

6. A method for preparing a light emitting diode epitaxial wafer, for preparing the light emitting diode epitaxial wafer according to any one of claims 1 to 5, characterized in that: include: A substrate is provided, and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer are sequentially grown on the substrate; the active layer is a periodic structure, and each period includes a potential well layer, a transition layer and a barrier layer stacked in sequence; the transition layer includes a WS2 layer, and the potential well layer is In y Ga 1-y N layer, y is 0.1-0.5, and the barrier layer is a GaN layer.

7. The method for preparing a light emitting diode epitaxial wafer according to claim 6, wherein: The WS2 layer is grown by CVD at a growth temperature of 700-1000°C. During growth, the molar ratio of the tungsten source to the sulfur source is 1:(1-3), a mixed gas of Ar and H2 is used as a carrier gas, and the volume ratio of Ar to H2 is 1:(1-5).

8. The method for preparing a light emitting diode epitaxial wafer according to claim 6, wherein: The transition layer also includes In x Ga 1-x N layer; the In x Ga 1-x The growth temperature of the N layer is greater than that of the In y Ga 1-y Growth temperature of the N layer.

9. The method for preparing a light emitting diode epitaxial wafer according to claim 8, wherein: In x Ga 1-x The growth temperature of the N layer is 800-850°C, and the growth temperature of the potential well layer is 700-800°C.

10. A light emitting diode, characterized in that: The light emitting diode epitaxial wafer comprises the light emitting diode epitaxial wafer according to any one of claims 1 to 5.

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