Resolution Control Method, Device and Storage Medium

Abstract

The present application provides a resolution control method, apparatus, and storage medium, which relate to the field of display technologies and can be applied to an LED video wall controller. The method includes: obtaining a preset effective display width and a preset effective display height of one or more output interfaces of a video source; determining, according to the preset effective display width and the preset effective display height of each output interface, a target resolution corresponding to each output interface in a resolution database; the resolution database includes resolutions corresponding to at least one standard clock, the standard clock is the clock in a standard resolution, and one standard clock corresponds to multiple resolutions; sending the target resolution corresponding to each output interface to the video source, so that the video source outputs a video image according to the target resolution corresponding to each output interface. This method is applicable to the process of video wall display and is used to solve the compatibility problem between the video source and the video wall controller.

Description

Technical Field

[0001] This application relates to the field of display technologies, and in particular, to a resolution control method, apparatus, and storage medium. Background Art

[0002] A light emitting diode (LED) splicing display system includes a video source, a splicing controller connected to the video source, and one or more LED display components connected to the splicing controller.

[0003] The video source can output multiple video images. The splicing controller can splice the multiple video images output by the video source into one video image and then divide it into multiple video images, and send the divided multiple video images to one or more LED display components respectively. Each LED display component can display the respective received video image, and the video images displayed by the one or more LED display components are combined together to form a video image spliced by the splicing controller.

[0004] Since the final display width and height of each LED display component are designed according to actual requirements, the resolutions of LED display components are also various. In the traditional display method, only the effective width and height of the video image output by the video source can be scaled by a certain ratio with the effective width and height of the LED display component. This kind of scaling will cause loss of the content of the video image, especially when the scaling ratio is large, the loss of content is particularly serious. In order to make the content of the video image displayed by one or more LED display components complete without loss, the splicing controller needs to adjust the resolution of the video image output by the video source.

[0005] However, there are compatibility problems in the current solutions for the splicing controller to adjust the resolution of the video image output by the video source. Summary of the Invention

[0006] Based on the above technical problems, this application provides a resolution control method, apparatus, and storage medium, which can generate a set of resolutions (detailed timings) that meet the clocks in the standard resolution for each potential display width, height, frame rate (W*H P / I FPS), and send the generated resolution to the video source, so as to control the video source to automatically output video images according to the resolution that meets the clocks in the standard resolution, thereby avoiding compatibility problems.

[0007] In a first aspect, the present application provides a resolution control method, which is applied to a video wall controller, and the video wall controller is connected to a video source; the method includes: obtaining a preset effective display width and a preset effective display height of one or more output interfaces of the video source; determining a target resolution corresponding to each output interface in a resolution database according to the preset effective display width and the preset effective display height of each output interface; the resolution database includes resolutions corresponding to at least one standard clock, the standard clock is the clock in the standard resolution, and one standard clock corresponds to multiple resolutions; sending the target resolution corresponding to each output interface to the video source, so that the video source outputs video images according to the target resolution corresponding to each output interface.

[0008] It should be understood that the video wall controller is usually configured to prioritize compatibility with the standard clock in the standard resolution. When the video source outputs video images using a non-standard clock in a non-standard resolution, the video wall controller may not support the non-standard clock, resulting in compatibility issues. The resolution control method provided by the present application can select the target resolution corresponding to each output interface from multiple resolutions corresponding to the standard clock based on the preset effective display width and the preset effective height of one or more output interfaces of the video source, and control the video source to output video images from one or more output interfaces according to their respective corresponding target resolutions. All one or more target resolutions meet the standard clock, thus avoiding compatibility issues and improving the versatility of the video wall display solution.

[0009] Optionally, the effective width in the target resolution corresponding to any one output interface is greater than or equal to the preset effective display width of the output interface; the effective height in the target resolution corresponding to any one output interface is greater than or equal to the preset effective display height of the output interface.

[0010] Optionally, the method further includes: obtaining a preset frame rate of one or more output interfaces of the video source; obtaining at least one initial standard clock; generating a resolution database based on the at least one initial standard clock and the preset frame rate of one or more output interfaces of the video source.

[0011] In a possible implementation, obtaining at least one initial standard clock includes: determining a plurality of candidate clocks from a plurality of initial clocks according to a preset clock step accuracy; the clock step accuracy is used to indicate the minimum interval for selecting candidate clocks from the initial clocks in a preset order; selecting the clocks that overlap with the clocks in the standard resolution from the plurality of candidate clocks as the standard clocks.

[0012] In one possible implementation, at least one standard clock includes a first standard clock, one or more output interfaces include a first output interface, and a preset frame rate of the first output interface is a first frame rate. Based on multiple standard clocks and the preset frame rates of one or more output interfaces of a video source, a resolution database is generated, including: dividing the first standard clock by the first frame rate to obtain a first area; performing one or more factorizations on the first area, each time decomposing the first area into two factors; for each factorization, taking one of the two factors obtained from the factorization as the maximum width and the other of the two factors obtained from the factorization as the maximum height; determining an effective width according to the maximum width; determining an effective height according to the maximum height; generating a resolution in the resolution database based on the maximum width, the maximum height, the effective width, and the effective height.

[0013] Optionally, one or more output interfaces include a first output interface; after determining the target resolution corresponding to each output interface according to the resolution database, the preset effective display width, and the preset effective display height of each output interface, the method further includes: generating resolution information of the first output interface according to the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the target resolution corresponding to the first output interface. Sending the target resolution corresponding to each output interface to the video source includes: sending the resolution information of the first output interface to the video source.

[0014] Optionally, when the effective width or the effective height in the target resolution of the first output interface is less than 4096, generating the resolution information of the first output interface according to the target resolution corresponding to the first output interface includes: generating an extended display identification data EDID of the first output interface according to the target resolution corresponding to the first output interface, the EDID of the first output interface including the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the EDID of the first output interface.

[0015] Optionally, when the effective width or the effective height in the target resolution of the first output interface is greater than or equal to 4096, generating the resolution information of the first output interface according to the target resolution corresponding to the first output interface includes: generating a second-generation display identification data DisplayID of the first output interface according to the target resolution corresponding to the first output interface, the DisplayID of the first output interface including the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the DisplayID of the first output interface.

[0016] It should be understood that the parameter bit width of the 18-byte detailed timing in the EDID supports a maximum effective width and maximum effective height of only 4095 for transmission, and it cannot adapt to any resolution above 4K. In the resolution control method provided in this application, when the effective width or effective height in the target resolution corresponding to the generated output interface is greater than or equal to 4096, the type VII detailed timing description with a 20-byte parameter bit width in the DisplayID can also be used to send the target resolution to the video source, thereby breaking through the parameter bit width limitation of the EDID and improving the generality of the resolution control scheme.

[0017] Optionally, the method further includes: multiplying at least one initial standard clock by a preset coefficient to obtain at least one near-standard clock; the preset coefficient is a positive number; generating a near-standard clock resolution database based on at least one near-standard clock and the preset frame rate of one or more output interfaces of the video source.

[0018] Optionally, one or more output interfaces include a first output interface, and the method further includes: when the resolution database does not include the target resolution corresponding to the first output interface, determining the target resolution corresponding to the first output interface in the near-standard clock resolution database according to the preset effective display width and preset effective display height of the first output interface.

[0019] It should be understood that the clock is used to represent the total number of pixels included in the video image within a unit time. When the clock of the video image output by the video source is the standard clock supported by the video wall controller, the number of pixels output by the video source within a unit time matches the number of pixels output by the video wall controller within a unit time, thereby avoiding compatibility problems between the video source and the video wall controller. When the clock of the video image output by the video source is a preset coefficient multiple of the standard clock supported by the video wall controller, the video wall controller can perform corresponding operations such as delayed output or early output on the video image output by the video source according to the preset coefficient, and it can also achieve the matching of the number of pixels output within a unit time, avoiding compatibility problems between the video source and the video wall controller. In the resolution control method provided in this application, when the target resolution cannot be selected from the resolution database generated with the standard clock, the target resolution is selected from the near-standard clock resolution database generated with the near-standard clock. While avoiding compatibility problems between the video source and the video wall controller, it can also increase the types of preset effective display widths and preset effective display heights supported, improving the generality of the video wall display scheme.

[0020] For example, taking the standard clock supported by the video wall controller as A and the clock in the target resolution corresponding to the first output interface as 0.5A as an example, the video wall controller can output a video image at a certain moment and output the same video image as that moment in the next second, that is, delay the output of the video image output by the video source to match the 0.5A clock of the video source, thereby avoiding compatibility problems.

[0021] In a second aspect, the present application provides a resolution control device, which is connected to a video source and includes various modules for the method described in the first aspect above.

[0022] In a third aspect, the present application provides a resolution control device, which includes a processor and a memory; the memory stores instructions executable by the processor; when the processor is configured to execute the instructions, the resolution control device implements the method described in the first aspect above.

[0023] In a fourth aspect, the present application provides a computer program product, which, when running on a resolution control device, causes the resolution control device to execute the steps of the related method described in the first aspect above to implement the method described in the first aspect above.

[0024] In a fifth aspect, the present application provides a readable storage medium, which includes: software instructions; when the software instructions run in a resolution control device, the resolution control device implements the method described in the first aspect above.

[0025] In a sixth aspect, the present application provides a video wall display system, which includes a video source and a video wall controller; the video source and the video wall controller are connected; the video wall controller is configured to obtain the preset effective display width and preset effective display height of one or more output interfaces of the video source; determine the target resolution corresponding to each output interface in a resolution database according to the preset effective display width and preset effective display height of each output interface, the resolution database includes resolutions corresponding to at least one standard clock, the standard clock is the clock in the standard resolution, and one standard clock corresponds to multiple resolutions; send the target resolution corresponding to each output interface to the video source; the video source is configured to receive the target resolution corresponding to each output interface sent by the video wall controller and output a video image according to the target resolution corresponding to each output interface.

[0026] In a seventh aspect, the present application provides a chip, which includes a processor and an interface, the processor is coupled to a memory through the interface, and when the processor executes a computer program in the memory or the resolution control device executes instructions, the method described in the first aspect above is executed.

[0027] The beneficial effects of the second to seventh aspects above can be referred to those described in the first aspect and will not be elaborated here. Brief Description of the Drawings

[0028] To more clearly illustrate the technical solutions in the embodiments of the present application, the accompanying drawings required for the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other accompanying drawings can be obtained based on these drawings without creative efforts.

[0029] Figure 1 It is a schematic diagram of the video wall control and display;

[0030] Figure 2 It is a schematic diagram of the composition of the LED video wall display system provided by the embodiment of the present application;

[0031] Figure 3 It is a schematic diagram of the composition of the video wall controller provided by the embodiment of the present application;

[0032] Figure 4 It is a schematic flowchart of the resolution control method provided by the embodiment of the present application;

[0033] Figure 5 It is another schematic flowchart of the resolution control method provided by the embodiment of the present application;

[0034] Figure 6 It is another schematic flowchart of the resolution control method provided by the embodiment of the present application;

[0035] Figure 7 It is another schematic flowchart of the resolution control method provided by the embodiment of the present application;

[0036] Figure 8 It is a schematic diagram of the structure of the design constraints provided by the embodiment of the present application;

[0037] Figure 9 It is a schematic diagram of the composition of the resolution control device provided by the embodiment of the present application. Detailed Description of the Embodiments

[0038] Hereinafter, the terms "first", "second", "third", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", or "third", etc. may explicitly or implicitly include one or more of such features.

[0039] First, the terms related to the embodiments of the present application will be introduced.

[0040] 1. Resolution (or also known as detailed timing): A property of digital video, including a combination of data information describing the pixel transmission and display process. Part of the resolution parameters are the (effective) width of a single-frame digital image, the (effective) height of a single-frame digital image, and the frame rate (i.e., the number of frames refreshed per second). This part of the parameters is generally described by (effective) width (width, W) × (effective) height (height, H), progressive scan (progressive, P) / interlaced scan (interlaced, I), and frames per second (frames per second, FPS). Among them, the width is represented by the number of effective pixel points included in a row of a single-frame digital image, and the height is represented by the number of effective pixel points (or the number of rows) included in a column of the digital image. For example, 1920*1080P60 means that the video image consists of 1920 effective pixel points per row and 1080 effective rows, using progressive scan, and the refresh frame rate is 60 frames per second. Another part of the resolution parameters are the relevant parameters of the blanking part. For example, horizontal front porch (horizon front porch, HFP), horizontal back porch (horizon back porch, HBP), horizontal synchronization (horizon synchronization, HSYNC) period, vertical front porch (vertical front porch, VFP), vertical back porch (vertical back porch, VBP), and vertical synchronization (vertical synchronization, VSYNC) period, etc.

[0041] 2. Standard resolution: The resolution standardized by the Video Electronics Standards Association (VESA), etc. Multiple standard resolutions are given in its standard documents. For example, 640*350P85 and its relevant parameters of the blanking part, 720*400P85 and its relevant parameters of the blanking part, 800*600P100 and its relevant parameters of the blanking part, 1600*1200P60 and its relevant parameters of the blanking part, and 1920*1400P60 and its relevant parameters of the blanking part, etc. The video wall controller needs to give priority to ensuring compatibility with the clocks in the standard resolution.

[0042] 3. Clock (or also known as pixel clock or pixel frequency): Used to express the total number of pixels included in a video image (digital image) per unit time, which can be calculated according to the total width of a single-frame digital image (effective width + blanking width) × the total height of a single-frame digital image (effective height + blanking height) × the frame rate.

[0043] The LED splicing display system includes a video source, a video controller connected to the video source, and one or more LED display components connected to the video controller. The video source can output multiple video images (i.e., the above digital images). The video controller can splice the multiple video images output by the video source into one video image and then divide it into multiple video images, and send the divided multiple video images to one or more LED display components respectively. Each LED display component can display the video image received by itself respectively, and the video images displayed by one or more LED display components are combined together to form a video image spliced by the video controller.

[0044] Exemplarily, Figure 1 is a schematic diagram of video controller display. As Figure 1 shown, taking the example that the user needs to display a video image of 9920×1440, the video source can output two video images of 4960×1440. The video controller can splice the two video images of 4960×1440 output by the video source into one video image of 9920×1440, and divide the video image of 9920×1440 into 4 video images of 1920×900, 2 video images of 3840×540, 1 video image of 2240×900, and 1 video image of 2240×540 respectively, and send the divided video images to their corresponding LED display components respectively. The video images displayed by multiple LED display components are combined together to form a video image of 9920×1440 spliced by the video controller.

[0045] With the development of display technology, people's requirements for display effects are getting higher and higher, and point-to-point display is the best way to display images to users without loss. Generally speaking, for an LED display component with fixed pixels, the lamp beads of its imaging device are fixed. Only when the resolution of the video image output by the video source is exactly the same as the resolution of the video image received by the LED display component, can the pixels of the video image output by the video source and the pixels of the video image displayed by the LED display component show a one-to-one mapping, that is, point-to-point display.

[0046] Since the final display width and height of each LED display component are designed according to actual needs, the resolutions of LED display components are also various. The traditional display method can only scale the effective width and height of the video image output by the video source by a certain ratio with the effective width and height of the LED display component. This kind of scaling will cause the loss of the content of the video image, especially when the scaling ratio is large, the loss of content is particularly serious.

[0047] To ensure that the content of the video image displayed by the LED display component is complete without loss, the video wall controller can obtain an instruction to modify the resolution parameters, calculate a clock based on the effective width, effective height, and frame rate in the instruction to modify the resolution parameters, and determine the detail timing in the extended display identification data (EDID) according to the calculated clock. The video wall controller can send the EDID to the video source through the hot plug mechanism, so that the video source outputs a video image according to the resolution required by the user.

[0048] However, when calculating the clock based on the effective width, effective height, and frame rate in the instruction to modify the resolution parameters, the video wall controller usually uses fixed blanking widths and blanking heights, resulting in the calculated clock may not match the clock in the standard resolution, thus causing compatibility problems between the video source and the video wall controller due to clock mismatch.

[0049] For example, the video wall controller can calculate the clock according to the following formula (1):

[0050] Pixel Clock=(H active +168)×(V active +45)×V freq Formula (1)

[0051] Among them, Pixel Clock represents the clock. H active represents the effective height in the instruction to modify the resolution parameters. 168 is the above-mentioned fixed blanking height. V active represents the effective width in the instruction to modify the resolution parameters. 45 is the above-mentioned fixed blanking width. V freq represents the frame rate in the instruction to modify the resolution parameters.

[0052] To solve the above problems, the embodiments of the present application provide a resolution control method, device, video wall controller, storage medium, and system, which can generate a set of resolutions (detailed timings) that meet the clocks in the standard resolution for each potential display width, height, frame rate (W*H P / I FPS), and send the generated resolutions to the video source, thereby controlling the video source to automatically output video images according to the generated resolutions.

[0053] The following is an introduction with reference to the accompanying drawings.

[0054] Figure 2 It is a schematic diagram of the composition of the LED video wall display system provided by the embodiments of the present application. As Figure 2As shown, the splicing display system includes: a video source 100 and a splicing controller 200. The video source 100 and the splicing controller are connected through a wired network or a wireless network.

[0055] Optionally, the splicing display system may further include one or more LED display components 300 connected to the splicing controller.

[0056] Among them, the video source 100 may be a computing device with computing and processing functions such as a computer or a server. Among them, the server may be a single server, or may also be a server cluster composed of multiple servers. In some embodiments, the server cluster may also be a distributed cluster. The video source 100 may also be implemented on a cloud platform. For example, the cloud platform may include a private cloud, a public cloud, a hybrid cloud, a community cloud, a distributed cloud, an inter-cloud, or a multi-cloud, etc., or any combination thereof.

[0057] For example, the video source 100 may be an ultra-high resolution server / super high resolution server.

[0058] The video source 100 is used to obtain video images. For example, the video source 100 may be connected to an image acquisition device, and the video source 100 may receive the video images sent by the image acquisition device.

[0059] In some embodiments, the video source 100 is further used to send one or more video images to the splicing controller 200 through one or more output interfaces ( Figure 2 illustrated by taking the video source 100 as an example of sending three video images to the splicing controller 200 through three output interfaces).

[0060] As described above, the video source 100, the splicing controller 200, and one or more LED display components 300 may be connected through a wired network or a wireless network. The wired network or wireless network may include one or more media or devices capable of transmitting video images from the video source 100 to the splicing controller 200.

[0061] In some embodiments, a wired network or a wireless network may include one or more communication media that enable the video source 100 to directly transmit video images to the video wall controller 200 in real time. In this embodiment, the video source 100 may modulate the video images according to a communication standard (such as a wireless communication protocol) and transmit the modulated video images to the video wall controller 200. The one or more communication media may include wireless and / or wired communication media, such as the radio frequency (RF) spectrum or one or more physical transmission lines. Optionally, the one or more communication media may form part of a packet-based network, which may be, for example, a local area network, a wide area network, or a global network (such as the Internet). Optionally, the one or more communication media may include routers, switches, base stations, or other devices that facilitate communication from the video source 100 to the video wall controller 200.

[0062] The video wall controller 200 may also be referred to as a splicing controller or a resolution control device, and its specific form may be referred to the related art and will not be elaborated here.

[0063] The video wall controller 200 may be used to obtain the preset effective display width and the preset effective display height of one or more output interfaces of the video source 100, generate a target resolution for each output interface according to the preset effective display width and the preset effective display height of each output interface, and send the generated target resolution to the video source 100. The specific process may be referred to the resolution control method in the following method embodiments and will not be elaborated here.

[0064] In some embodiments, the video wall controller 200 may be used to receive the video images sent by the video source 100, splice and segment the video images sent by the video source 100 to obtain the video images corresponding to each LED display component, obtain the resolution corresponding to each LED display component, and send the video images to each LED display component according to the resolution corresponding to each LED display component.

[0065] There may be multiple LED display components 300, and each LED display component 300 may include a transmitting card, multiple receiving cards, and multiple LED lamp bead modules.

[0066] The transmitting card is a video protocol conversion system. The transmitting card can strip out the video data sent by the video wall controller, internally process it, and send it to the receiving card. The receiving card can control the LED lamp bead modules to emit light and display images according to the internally processed video data sent by the transmitting card.

[0067] The data transmission between the video wall controller 200 and the transmitting card in the LED display component 300 can be referred to the data transmission between the above-mentioned video source 100 and the video wall controller 200, which will not be elaborated here.

[0068] The execution subject of the resolution control method provided in the embodiments of the present application can be the above-mentioned video wall controller 200, or an application (APP) installed in the video wall controller 200 that provides the function of obtaining the resolution; or, a processor (such as a central processing unit (CPU)) in the video wall controller 200; or, a functional module in the video wall controller 200 for executing the method of obtaining the resolution, etc. The embodiments of the present application do not limit this.

[0069] For the sake of convenient description, hereinafter, the video wall controller will be taken as an example of the execution subject of the resolution control method provided in the embodiments of the present application for introduction.

[0070] Figure 3 It is a schematic diagram of the composition of the video wall controller provided in the embodiments of the present application. As Figure 3 shown, the video wall controller may include: a processor 10, a memory 20, a communication line 30, a communication interface 40, and an input / output interface 50.

[0071] Among them, the processor 10, the memory 20, the communication interface 40, and the input / output interface 50 can be connected through the communication line 30.

[0072] The processor 10 is configured to execute the instructions stored in the memory 20 to implement the resolution control method provided in the following embodiments of the present application. The processor 10 can be a CPU, a general-purpose processor, a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 10 can also be any other device with processing functions, such as a circuit, a device, or a software module. The embodiments of the present application do not limit this. In one example, the processor 10 may include one or more CPUs, such as Figure 3 the CPU0 and CPU1 in Figure 3 shown by the dotted line. As an optional implementation manner, the electronic device may include multiple processors. For example, in addition to the processor 10, it may also include a processor 60 (

[0073] A memory 20 for storing instructions. For example, the instructions can be a computer program. Optionally, the memory 20 can be a read-only memory (ROM) or other types of static storage devices that can store static information and / or instructions, or it can be a random access memory (RAM) or other types of dynamic storage devices that can store information and / or instructions. It can also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM), or other optical disc storage, optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), magnetic disk storage media, or other magnetic storage devices, etc. The embodiments of the present application do not limit this.

[0074] It should be noted that the memory 20 can exist independently of the processor 10 or be integrated with the processor 10. The memory 20 can be located inside the splicing controller or outside the splicing controller. The embodiments of the present application do not limit this.

[0075] A communication line 30 for transmitting information between the various components included in the splicing controller. The communication line 30 can be an industry standard architecture (ISA) line, a peripheral component interconnect (PCI) line, or an extended industry standard architecture (EISA) line, etc. The communication line 30 can be divided into an address line, a data line, a control line, etc. For the sake of convenience of representation, Figure 3 only a solid line is used to represent it in the figure, but it does not mean that there is only one line or one type of line.

[0076] A communication interface 40 for communicating with other devices (such as the above-mentioned video source 100, or the LED display component 300, etc.) or other communication networks. For example, the communication interface 40 can be a digital video interface (DVI) or a video interface such as HDMI.

[0077] Optionally, other communication networks communicating with the communication interface 40 may be Ethernet, radio access network (RAN), wireless local area networks (WLAN), etc. The communication interface 40 may be a module, a circuit, a transceiver, or any device capable of implementing communication.

[0078] The input / output interface 50 is used to implement the human-computer interaction between the user and the video wall controller. For example, it realizes the action interaction, text interaction, or voice interaction between the user and the video wall controller, etc.

[0079] Exemplarily, the input / output interface 50 may be a mouse, a keyboard, a display screen, or a touch display screen, etc. Through the keyboard, mouse, display screen, or touch display screen, etc., the work interaction or text interaction between the user and the video wall controller can be realized.

[0080] It should be noted that Figure 3 the structure shown in Figure 3 does not constitute a limitation on the video wall controller. In addition to

[0081] the components shown, the video wall controller may include more or fewer components than those shown in the figure, or a combination of certain components, or a different component arrangement.

[0081] Next, the resolution control method provided by the embodiments of the present application will be introduced with reference to the accompanying drawings.

[0082] Figure 4 is a schematic flowchart of the resolution control method provided by the embodiments of the present application. Optionally, this method may be executed by a video wall controller having the above Figure 3 shown hardware structure. As Figure 4 shown, this method includes S101 to S103.

[0083] S101. The video wall controller obtains the preset effective display width and preset effective display height of one or more output interfaces of the video source.

[0084] Among them, the preset effective display width and preset effective display height of one or more output interfaces output by the video source refer to the effective width and effective height of the video image that the user expects the video source to output simultaneously at one or more output interfaces at a certain moment. For example, for the two 4960×1440 video images output by the video source in the video wall display schematic diagram as shown above Figure 1 shown. The video wall controller can specifically obtain the preset effective display width and preset effective display height of one or more video images output by the above video source by receiving user input.

[0085] For example, as described above, the video wall controller may include an input / output interface, which may be a mouse, a keyboard, or a touch display screen, etc. The video wall controller may receive the preset effective display width and the preset effective display height of one or more output interfaces input by the user through the mouse, the keyboard, or the touch display screen, etc.

[0086] S102. The video wall controller determines the target resolution corresponding to each output interface in the resolution database according to the preset effective display width and the preset effective display height of each output interface.

[0087] Among them, the resolution database may include the resolutions corresponding to at least one standard clock. The standard clock refers to the clock in the standard resolution. One standard clock may correspond to multiple resolutions. The effective width in the target resolution corresponding to any one output interface is greater than or equal to the preset effective display width of the output interface; the effective height in the target resolution corresponding to any one output interface is greater than or equal to the preset effective display height of the output interface.

[0088] Exemplarily, the resolution database may be as shown in Table 1 below.

[0089] Table 1

[0090] Resolution ID Clock Total Width Total Height Effective Width Effective Height Frame Rate Resolution 1 Clock 1 Total Width 1 Total Height 1 Effective Width 1 Effective Height 1 Frame Rate 1 Resolution 2 Clock 1 Total Width 2 Total Height 2 Effective Width 2 Effective Height 2 Frame Rate 2 Resolution 3 Clock 2 Total Width 3 Total Height 3 Effective Width 3 Effective Height 3 Frame Rate 3

[0091] As shown in Table 1, the resolution database may include a resolution ID item, a clock item, a total width item, a total height item, an effective width item, an effective height item, and a frame rate item. Among them, the resolution ID item may include Resolution 1, Resolution 2, and Resolution 3. The clock item may include Clock 1 and Clock 2. The total width item may include Total Width 1, Total Width 2, and Total Width 3. The total height item may include Total Height 1, Total Height 2, and Total Height 3. The effective width item may include Effective Width 1, Effective Width 2, and Effective Width 3. The effective height item may include Effective Height 1, Effective Height 2, and Effective Height 3. The frame rate item may include Frame Rate 1, Frame Rate 2, and Frame Rate 3. Resolution 1, Clock 1, Total Width 1, Total Height 1, Effective Width 1, Effective Height 1, and Frame Rate 1 have a corresponding relationship. Resolution 2, Clock 1, Total Width 2, Total Height 2, Effective Width 2, Effective Height 2, and Frame Rate 2 have a corresponding relationship. Resolution 3, Clock 2, Total Width 3, Total Height 3, Effective Width 3, Effective Height 3, and Frame Rate 3 have a corresponding relationship.

[0092] In a possible implementation manner, the video wall controller may sort the resolutions in the resolution database in a certain order, such as the order of the clock from small to large, to obtain a first sorting result, and select the target resolution according to the first sorting result. Figure 5 Another schematic flowchart of the resolution control method provided by the embodiments of the present application. AsFigure 5 As shown, taking the example that one or more output interfaces of the video source include a first output interface, the above S102 may specifically include S201 to S211.

[0093] S201. The video wall controller obtains the preset effective display width and preset effective display height of the first output interface.

[0094] S201 may refer to S101 described above and will not be elaborated here.

[0095] S202. The video wall controller sorts multiple resolutions in the resolution database in ascending order of clock to obtain a first sorting result.

[0096] S203. The video wall controller determines whether the number of times the currently selected resolution is greater than or equal to the number of resolutions in the first sorting result.

[0097] If so, execute S204; if not, execute S205.

[0098] S204. The video wall controller issues a first message.

[0099] Among them, the first message is used to indicate the failure of selection.

[0100] For example, as described above, the video wall controller may include an input / output interface, which may be a touch display screen. The video wall controller may display a first interface on the touch display screen, and the first interface includes the above first message.

[0101] S205. The video wall controller determines whether the effective width of the currently selected resolution is greater than or equal to the preset effective display width of the first output interface, and whether the effective height of the currently selected resolution is greater than or equal to the preset effective display height of the first output interface.

[0102] If so, execute S206; if not, execute S207.

[0103] S206. The video wall controller takes the currently selected resolution as the target resolution of the first output interface.

[0104] S207. The video wall controller determines whether the effective width of the currently selected resolution is greater than or equal to the preset target effective width of the first output interface, and whether the effective height of the currently selected resolution is less than the preset target effective height of the first output interface.

[0105] If so, execute S208 and S209 and then return to S202; if not, execute S210.

[0106] S208. The video wall controller selects the resolution before the currently selected resolution in the first sorting result for judgment.

[0107] S209. The video wall controller increments the count of the currently selected resolution by 1.

[0108] S210. The video wall controller determines whether the effective width of the currently selected resolution is less than the preset effective display width of the first output interface, and whether the effective height of the currently selected resolution is greater than or equal to the preset effective display height of the first output interface.

[0109] If so, execute S211 and then return to S202 after S209; if not, execute S204.

[0110] S211. The video wall controller selects the resolution after the currently selected resolution in the first sorting result for judgment.

[0111] Optionally, before S102, the video wall controller can also obtain a standard clock and generate a resolution database according to the standard clock. Figure 6 Another flowchart of the resolution control method provided by the embodiment of the present application is shown in Figure 6 As shown, before S102, the method may further include S301 to S303.

[0112] S301. The video wall controller obtains the preset frame rates of one or more output interfaces of the video source.

[0113] S301 can be referred to as described in S101 above and will not be elaborated here.

[0114] S302. The video wall controller obtains at least one initial standard clock.

[0115] Optionally, the video wall controller can determine multiple candidate clocks from multiple initial clocks according to the preset clock step accuracy in a preset order.

[0116] Among them, the clock step accuracy can be preset by the administrator in the video wall controller. The clock step accuracy is used to select the minimum interval of candidate clocks from the initial clocks in a preset order. For example, the clock step accuracy can be 1 kilohertz (kHz), or 1 MHz, etc. The embodiment of the present application does not limit the specific value of the clock step accuracy. The initial clock refers to the clock between the minimum clock and the maximum clock. The minimum clock can also be preset by the administrator in the video wall controller. The embodiment of the present application does not limit the specific value of the minimum clock. The maximum clock can also be preset by the administrator in the video wall controller. Alternatively, the video wall controller can first determine the maximum limit bandwidth of the current scene according to the user input, and then the video wall controller can determine the maximum limit clock corresponding to the maximum limit bandwidth of the current scene as the above maximum clock according to the maximum limit bandwidth and the corresponding relationship between the preset maximum limit bandwidth and the maximum limit clock. The embodiment of the present application does not limit the specific value of the maximum clock.

[0117] For example, the stitching controller may start from the minimum clock, select a candidate clock every other clock step accuracy until it traverses from the minimum clock to the maximum clock. Alternatively, the stitching controller may start from the maximum clock, select a candidate clock every other clock step section until it traverses from the maximum clock to the minimum clock.

[0118] For example, taking the case where the stitching controller traverses from the minimum clock to the maximum clock as an example, assuming the minimum clock is 100Mhz, the clock step accuracy is 1Mhz, and the maximum limit bandwidth of the current scenario is 10.2 gigabits per second (Gbps) (that is, the video image data is transmitted using the transmission link of the HDMI1.4 standard in the current scenario), then the stitching controller can determine the maximum clock as the maximum limit clock 340Mhz corresponding to 10.2 (Gbps) according to the corresponding relationship between the maximum limit bandwidth and the maximum limit clock, and traverse the minimum clock 100Mhz and the maximum clock 340Mhz with 1Mhz as the step accuracy to obtain multiple candidate clocks 101Mhz, 102Mhz, 103Mhz, …, 339Mhz, and 340Mhz, and determine multiple initial standard clocks from the multiple candidate clocks.

[0119] Optionally, the stitching controller may also obtain the capability information of the video source, determine the clocks supported by the video source and the clocks supported by the stitching controller according to the capability information of the video source and the preset capability information of the stitching controller, and delete the clocks outside the union of the clocks supported by the video source and the clocks supported by the stitching controller among the multiple standard clocks.

[0120] S303. The stitching controller generates a resolution database based on at least one standard clock and the preset frame rate of one or more output interfaces of the video source.

[0121] Optionally, still taking the first output interface among one or more output interfaces of the above video source as an example, assuming the preset frame rate of the first output interface is the first frame rate, then the stitching controller may divide the first standard clock by the first frame rate to obtain the first area, perform one or more factorizations on the first area, each time decompose the first area into two factors, for each factorization, take one of the two factors obtained by the factorization (for example, the larger one) as the maximum width, take the other of the two factors obtained by the factorization (for example, the smaller one) as the maximum height, determine the effective width according to the maximum width, determine the effective height according to the maximum height, and generate the resolution in the resolution database based on the maximum width, maximum height, effective width, and effective height.

[0122] For example, the splicing controller can subtract 80 from the maximum width to obtain the effective width. Similarly, taking the above first standard clock, first frame rate, and first area as examples, the splicing controller can calculate a first value according to the VESA-coordinated video timings (VESA-CVT) standard for the first standard clock, first frame rate, and first area, etc., and subtract the first value from the maximum height to obtain the effective height.

[0123] Among them, the first standard clock refers to the standard clock that can divide the first frame rate evenly.

[0124] Optionally, after determining the target resolution corresponding to each output interface, the splicing controller can also correct the target resolution according to the resolution standard. For example, correct the target resolution according to the VESA-CVT standard or the VESA-graphics interchange format (GIF) standard, so that the target resolution meets the above resolution standard, better ensuring the compatibility between the video source and the splicing controller.

[0125] Optionally, after determining the target resolution corresponding to each output interface, the splicing controller can also correct the target resolution according to the hardware bit width limit of the transmission link, so that when the splicing controller sends the target resolution to the video source, the bit widths of the parameters in the sent target resolution are less than the hardware bit width limit of the transmission link. In this case, taking the clock in the target resolution as an example, the method may further include: the splicing controller obtains the bit width information of the video source; the splicing controller modifies the clock in the target resolution corresponding to each output interface according to the bit width information of the video source and the bit width information of the splicing controller, so that the bit width of the clock in the target resolution corresponding to each output interface is less than or equal to the minimum value of the maximum bit width of the transmission clock indicated by the bit width information of the video source and the maximum bit width of the transmission clock of the splicing controller indicated by the bit width information of the splicing controller.

[0126] Among them, the bit width information of the splicing controller can be preset in the splicing controller. For example, preset in the memory of the splicing controller. The specific content of the bit width information of the splicing controller and the numerical value of the indicated maximum bit width are not limited in the embodiments of the present application.

[0127] Optionally, the splicing controller can first correct the target resolution according to the resolution standard, and then correct the target resolution according to the hardware bit width limit of the transmission link. In this case, Figure 7 Another flowchart of the resolution control method provided by the embodiments of the present application. As Figure 7 shown, after S102, the method may further include S401 to S405.

[0128] S401. The video wall controller obtains the bit width information of the video source.

[0129] Among them, the bit width information of the video source is used to indicate the maximum bit width of the transmission clock of the transmission link between the video wall controller and the video source. For example, the video wall controller can obtain it by receiving the bit width information sent by the video source.

[0130] S402. The video wall controller corrects the target resolution corresponding to each output interface according to the resolution standard.

[0131] Among them, the specific correction process can be referred to the related technology of the resolution standard, which will not be elaborated here.

[0132] S403. The video wall controller determines whether the bit width of the clock in the target resolution corresponding to each output interface is less than or equal to the minimum value of the maximum bit width of the transmission clock of the transmission link indicated by the bit width information of the video source and the maximum bit width of the transmission clock of the video wall controller indicated by the bit width information of the video wall controller.

[0133] If so, execute S404; if not, execute S405 and then execute S404.

[0134] S404. The video wall controller outputs the target resolution.

[0135] S405. The video wall controller adjusts the target resolution corresponding to each output interface so that the bit width of the target clock in the target resolution corresponding to each output interface is less than or equal to the minimum value of the maximum bit width of the transmission clock of the transmission link indicated by the bit width information of the video source and the maximum bit width of the transmission clock of the video wall controller indicated by the bit width information of the video wall controller.

[0136] It should be noted that the above introduces the correction process taking the clock in the target resolution as an example. The correction processes of other parameters in the target resolution, such as the maximum width, maximum height, effective width, effective height, etc., can also be referred to the above S401 to S405, which will not be elaborated here.

[0137] It should be noted that the above introduces the generation process of the resolution database taking the standard clock as an example. Optionally, the video wall controller can also generate a near-standard clock resolution database based on the near-standard clock. The specific process can be referred to the above S301 to S303, which will not be elaborated here. In this case, when the video wall controller cannot determine the target resolution from the resolution database (that is, the resolution database does not include the target resolution corresponding to a certain output interface), the video wall controller can select the target resolution from the above non-standard database. The specific selection process can be referred to the above S201 to S211, which will not be elaborated here.

[0138] Among them, the near-standard clock refers to the clock obtained by multiplying the standard clock by a preset coefficient, and the preset coefficient is a positive number. For example, the preset coefficient can be 0.1, 0.5, 1, or 2, etc. The embodiments of the present application do not limit the specific value of the preset coefficient.

[0139] For example, still taking the above first output interface as an example, when the resolution database does not include the target resolution corresponding to the first output interface, the method may further include: the video wall controller multiplies at least one standard clock by a preset coefficient to obtain at least one near-standard clock; the video wall controller generates a near-standard clock resolution database based on at least one near-standard clock and the preset frame rate of one or more output interfaces of the video source; the video wall controller determines the target resolution corresponding to the first output interface in the near-standard clock resolution database according to the preset effective display width and preset effective display height of the first output interface.

[0140] It should be understood that the clock is used to represent the total number of pixels included in the video image within a unit time. When the clock of the video image output by the video source is the standard clock supported by the video wall controller, the number of pixels output by the video source within a unit time matches the number of pixels output by the video wall controller within a unit time, thereby avoiding compatibility problems between the video source and the video wall controller. When the clock of the video image output by the video source is a multiple of the preset coefficient of the standard clock supported by the video wall controller, the video wall controller can perform corresponding operations such as delaying or advancing the output of the video image output by the video source according to the preset coefficient, and can also achieve the matching of the number of pixels output within a unit time, avoiding compatibility problems between the video source and the video wall controller. In the resolution control method provided by the embodiments of the present application, when the target resolution cannot be selected from the resolution database generated by the standard clock, the target resolution is selected from the near-standard clock resolution database generated by the near-standard clock. While avoiding compatibility problems between the video source and the video wall controller, it can also increase the types of preset effective display widths and preset effective display heights supported, improving the versatility of the video wall display solution.

[0141] For example, taking the standard clock supported by the video wall controller as A and the clock in the target resolution corresponding to the first output interface as 0.5A, the video wall controller can output a video image at a certain moment and output the same video image as that at the moment in the next second of that moment, that is, delay the output of the video image output by the video source, so as to match the clock of 0.5A of the video source, thereby avoiding compatibility problems.

[0142] S103. The video wall controller sends the target resolution corresponding to each output interface to the video source so that the video source outputs video images according to the target resolution corresponding to each output interface.

[0143] In a possible implementation, the video wall controller can interact with the video source through a hot plug mechanism in a handshake protocol-like manner, and send the resolution information of one or more output interfaces to the video source during the interaction.

[0144] Among them, the resolution information corresponding to one or more output interfaces respectively includes the target resolution corresponding to one or more output interfaces respectively.

[0145] Optionally, still taking the first output interface as an example above, after S102 and before S103, the method may further include: the video wall controller generates the resolution information of the first output interface according to the target resolution corresponding to the first output interface, and the resolution information of the first output interface includes the target resolution corresponding to the first output interface.

[0146] Optionally, still taking the first output interface as an example above, the video wall controller can determine the resolution information of the first output interface according to the target resolution corresponding to the first output interface, write it into the EEPROM of the video wall controller, and reset the hot plug according to the high or low level state of the hot plug pin of the video interface of the video wall controller.

[0147] For example, if the hot plug of the video interface of the video wall controller is high, the video wall controller can first pull down the hot plug, delay for about 200 microseconds, and then pull up the hot plug; if the hot plug of the video interface of the video wall controller is low, the video wall controller can first pull up the hot plug, delay for about 200 microseconds, and then pull down the hot plug.

[0148] Optionally, still taking the first output interface as an example above, when the effective width in the target resolution corresponding to the first output interface is less than or equal to 4096, or when the effective height in the resolution corresponding to the first output interface is less than 4096, the video wall controller can determine the detail timing in the EDID of the first output interface according to the target resolution corresponding to the first output interface, and send the EDID of the first output interface as the resolution information of the first output interface to the video source.

[0149] Among them, EDID is a VESA standard data format, which contains parameter information such as vendor information, maximum image size, color settings, manufacturer presets, and frequency range.

[0150] Exemplarily, the storage address of the detail timing in the EDID can be as shown in Table 2 below.

[0151] Table 2

[0152]

[0153] Refer to Table 2, which shows the storage addresses of 18 - byte parameters of the detailed timing in an EDID, exemplified by bold and underlined in Table 2.

[0154] Exemplarily, also taking the storage addresses shown in Table 2 above as an example, the specific calculation rules for the storage addresses of this detailed timing can be as shown in Table 3 below.

[0155] Table 3

[0156]

[0157]

[0158] As shown in Table 3, the meanings of the parameters stored at each specific storage address of the detailed timing in the EDID can be referred to the related technology and will not be elaborated here.

[0159] Optionally, also taking the first output interface above as an example, when the effective width in the target resolution corresponding to the first output interface is greater than or equal to 4096, or when the effective height in the resolution corresponding to the first output interface is greater than or equal to 4096, the splicing controller can determine the Type Ⅶ detailed timing data block in the second - generation display identification data (DisplayID) of the first output interface according to the target resolution corresponding to the first output interface, and send the DisplayID of the first output interface as the resolution information of the first output interface to the video source.

[0160] Exemplarily, the Type Ⅶ detailed timing description in the DisplayID can be as shown in Table 4 below.

[0161] Table 4

[0162]

[0163]

[0164]

[0165] As shown in Table 4, the specific meanings of the 20 - byte parameters in the Type Ⅶ detailed timing description can be referred to the related technology and will not be elaborated here.

[0166] It should be understood that the parameter bit width of the 18 bytes of the detailed timing in the EDID supports a maximum effective width and a maximum effective height of up to 4095 for transmission, and it is impossible to adapt to any resolution above 4K. In the resolution control method provided by the embodiments of the present application, when the effective width or the effective height in the target resolution corresponding to the generated output interface is greater than or equal to 4096, the type VII detailed timing description with a parameter bit width of 20 bytes in the DisplayID can also be used to send the target resolution to the video source, thereby breaking through the parameter bit width limitation of the EDID and improving the generality of the resolution control scheme.

[0167] It should be understood that the video wall controller is usually configured to give priority to ensuring compatibility with the standard clock in the standard resolution. When the video source outputs video images using a non-standard clock in a non-standard resolution, the video wall controller may not support the non-standard clock, resulting in compatibility problems. The resolution control method provided by the embodiments of the present application can select the target resolution corresponding to each output interface from multiple resolutions corresponding to the standard clock based on the preset effective display width and the preset effective display height of one or more output interfaces of the video source, and control the video source to output video images from one or more output interfaces according to their respective corresponding target resolutions. All one or more target resolutions meet the standard clock, thereby avoiding compatibility problems and improving the generality of the video wall display scheme.

[0168] As can be seen from the above resolution control method, the design constraints of the present application mainly include two aspects: clock compatibility constraints and transmission link constraints.

[0169] ​ It is a schematic structural diagram of the design constraints provided by the embodiments of the present application. As ​ shown, the design constraints of the present application include clock compatibility constraints and transmission link constraints.

[0170] Among them, the clock compatibility constraint means that the video source often gives priority to supporting the resolution of the standard clock, and there may be compatibility problems with the resolution corresponding to the non-standard clock. Therefore, the clock corresponding to the generated target resolution needs to be selected according to the following strategy:

[0171] (1) Give priority to selecting the standard clock in the standard resolution;

[0172] (2) When the standard clock cannot meet the preset effective display width and the preset effective display height of one or more output interfaces of the video source obtained by the video wall controller, give priority to selecting the near-standard clock obtained by multiplying the standard clock by the preset coefficient;

[0173] (3) If neither (1) nor (2) above can be satisfied, select a non-standard clock to generate the target resolution.

[0174] The transmission link constraints mainly refer to the constraints on the maximum (ultimate) bandwidth, hardware bit length, and clock holes of the transmission link.

[0175] The constraints on the maximum (ultimate) bandwidth mainly depend on the video interface protocol version between the video source and the video wall controller. For example, in the high definition multimedia interface (HDMI) 1.4 protocol standard, it is clearly stipulated that the maximum supported clock is 340 megahertz (MHz), and in the HDMI 2.0 protocol standard, the maximum supported clock is 600 MHz, etc.

[0176] Among the constraints on the hardware bit length, the video wall controller completes the parsing of the video protocol through the video interface chip. The registers inside these chips often have bit length limitations for each component of the resolution (such as the above-mentioned HFP, HSYNC, HBP, VFP, VSYNC, and VBP, etc.). The bit length of each component in the generated target resolution should be less than the bit length limitation of the registers inside the chip.

[0177] Among the constraints on the clock holes, the chip manufacturer may have some clock holes inside during the hardware or software design. The clock holes are also the unsupported clocks. Therefore, when determining the clocks in the resolution database from the candidate clocks, this part of the unsupported candidate clocks can also be excluded.

[0178] The above mainly introduces the solution provided by the embodiments of the present application from the perspective of the method. To implement the above functions, it includes the corresponding hardware structure and / or software module for executing each function. Those skilled in the art should easily realize that, combining the units and algorithm steps of each example described in the embodiments disclosed in this article, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed in the way of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods for each specific application to implement the described function, but this implementation should not be considered to exceed the scope of the present application.

[0179] In an exemplary embodiment, the embodiments of the present application further provide a resolution control device, and this device can apply the above-mentioned video wall controller. ​ It is a schematic diagram of the composition of the resolution control device provided by the embodiments of the present application. As ​ shown, this device includes an acquisition module 901, a processing module 902, and a sending module 903.

[0180] The acquisition module 901 is used to acquire the preset effective display width and preset effective display height of one or more output interfaces of the video source.

[0181] A processing module 902, configured to determine a target resolution corresponding to each output interface in a resolution database according to a preset effective display width and a preset effective display height of each output interface; the resolution database includes resolutions corresponding to at least one standard clock, the standard clock is the clock in the standard resolution, and one standard clock corresponds to multiple resolutions.

[0182] A sending module 903, configured to send the target resolution corresponding to each output interface to a video source, so that the video source shows a video image according to the target resolution corresponding to each output interface.

[0183] In some possible embodiments, the effective width in the target resolution corresponding to any one output interface is greater than or equal to the preset effective display width of the output interface; the effective height in the target resolution corresponding to any one output interface is greater than or equal to the preset effective display height of the output interface.

[0184] In some other possible embodiments, an obtaining module 901 is further configured to obtain a preset frame rate of one or more output interfaces of the video source; obtain at least one initial standard clock; the processing module 902 is further configured to generate a resolution database based on the at least one initial standard clock and the preset frame rate of one or more output interfaces of the video source.

[0185] In some other possible embodiments, the processing module 902 is specifically configured to determine a plurality of candidate clocks from a plurality of initial clocks according to a preset clock step precision; the clock step precision is used to indicate the minimum interval for selecting candidate clocks from the initial clocks in a preset order; select a clock that overlaps with the clock in the standard resolution from the plurality of candidate clocks as the standard clock.

[0186] In some other possible embodiments, at least one standard clock includes a first standard clock, one or more output interfaces include a first output interface, and the preset frame rate of the first output interface is a first frame rate. The processing module 902 is specifically configured to divide the first standard clock by the first frame rate to obtain a first area; perform one or more factorizations on the first area, and each time decompose the first area into two factors; for each factorization, use one of the two factors obtained by the factorization as the maximum width and the other as the maximum height; determine the effective width according to the maximum width; determine the effective height according to the maximum height; generate the resolutions in the resolution database based on the maximum width, the maximum height, the effective width, and the effective height.

[0187] In some other possible embodiments, one or more output interfaces include a first output interface; after the processing module 902 determines the target resolution corresponding to each output interface according to the resolution database, as well as the preset effective display width and preset effective display height of each output interface, the processing module 902 is further configured to generate resolution information of the first output interface according to the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the target resolution corresponding to the first output interface; the sending module 903 is specifically configured to send the resolution information of the first output interface to the video source;

[0188] In some other possible embodiments, when the effective width or effective height in the target resolution of the first output interface is less than 4096, the processing module 902 is specifically configured to generate extended display identification data EDID of the first output interface according to the target resolution corresponding to the first output interface, and the EDID of the first output interface includes the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the EDID of the first output interface.

[0189] In some other possible embodiments, when the effective width or effective height in the target resolution of the first output interface is greater than or equal to 4096, the processing module 902 is specifically configured to generate second-generation display identification data DisplayID of the first output interface according to the target resolution corresponding to the first output interface, and the DisplayID of the first output interface includes the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the DisplayID of the first output interface.

[0190] In some other possible embodiments, the processing module 902 is further configured to multiply at least one initial standard clock by a preset coefficient to obtain at least one near-standard clock; the preset coefficient is a positive number; based on at least one near-standard clock and the preset frame rate of one or more output interfaces of the video source, a near-standard clock resolution database is generated.

[0191] In some other possible embodiments, when the resolution database does not include the target resolution corresponding to the first output interface, the processing module 9% is further configured to determine the target resolution corresponding to the first output interface in the near-standard clock resolution database according to the preset effective display width and preset effective display height of the first output interface.

[0192] It should be noted that ​ The division of the modules herein is illustrative only, and is only a logical function division. In actual implementation, there may be other division methods. For example, two or more functions may also be integrated into one processing module. The above integrated modules may be implemented in the form of hardware or in the form of software function modules.

[0193] In an exemplary embodiment, the embodiment of the present application further provides a readable storage medium, including execution instructions, which, when running on a splicing controller (resolution control device), cause the splicing controller (resolution control device) to execute any one of the methods provided in the above embodiments.

[0194] In an exemplary embodiment, the embodiment of the present application further provides a computer program product including computer execution instructions, which, when running on a splicing controller (resolution control device), cause the splicing controller (resolution control device) to execute any one of the methods provided in the above embodiments.

[0195] In an exemplary embodiment, the embodiment of the present application further provides a chip, including: a processor and an interface, where the processor is coupled to a memory through the interface, and when the processor executes a computer program in the memory or the splicing controller (resolution control device) executes instructions, any one of the methods provided in the above embodiments is caused to be executed.

[0196] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using a software program, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer execution instructions. When the computer execution instructions are loaded and executed on a computer, the processes or functions according to the embodiments of the present application are generated in whole or in part. The computer can be a general-purpose computer, a dedicated computer, a computer network, or other programmable devices. The computer execution instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer execution instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center in a wired manner (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or a wireless manner (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or a data center that includes one or more integrated media. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a magnetic tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid state disk (SSD)), etc.

[0197] Although the present application has been described in connection with various embodiments, those skilled in the art will understand and realize other variations of the disclosed embodiments by referring to the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the singular "a" or "an" does not exclude a plurality. A single processor or other unit may implement several functions recited in the claims. Certain measures are recited in mutually different dependent claims, but this does not mean that these measures cannot be combined to produce a good effect.

[0198] Although the present application has been described in connection with specific features and their embodiments, it is obvious that various modifications and combinations can be made without departing from the spirit and scope of the present application. Accordingly, the present specification and the drawings are merely exemplary illustrations of the present application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of the present application. Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these changes and modifications.

[0199] As described above, the above are only specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A resolution control method, characterized in that, The method is applied to a video controller, and the video controller is connected to a video source; the method includes: Obtaining a preset frame rate of one or more output interfaces of the video source; Determining a plurality of candidate clocks from a plurality of initial clocks according to a preset clock step accuracy in a preset order; the clock step accuracy is used to indicate the minimum interval for selecting candidate clocks from the initial clocks in the preset order; Selecting, from the plurality of candidate clocks, a clock that overlaps with the clock in the standard resolution as the standard clock to obtain at least one initial standard clock; Generating a resolution database based on the at least one initial standard clock and the preset frame rate of one or more output interfaces of the video source; Obtaining a preset effective display width and a preset effective display height of one or more output interfaces of the video source; Determining, according to the preset effective display width and the preset effective display height of each output interface, a target resolution corresponding to each output interface in the resolution database; the resolution database includes resolutions corresponding to at least one standard clock, the standard clock is the clock in the standard resolution, and one standard clock corresponds to multiple resolutions; the effective width in the target resolution corresponding to any one output interface is greater than or equal to the preset effective display width of the output interface; the effective height in the target resolution corresponding to any one output interface is greater than or equal to the preset effective display height of the output interface; Sending the target resolution corresponding to each output interface to the video source so that the video source outputs a video image according to the target resolution corresponding to each output interface.

2. The method according to claim 1, wherein The at least one standard clock includes a first standard clock, the one or more output interfaces include a first output interface, and the preset frame rate of the first output interface is a first frame rate; The generating a resolution database based on the at least one initial standard clock and the preset frame rate of one or more output interfaces of the video source includes: Dividing the first standard clock by the first frame rate to obtain a first area; Performing one or more factorizations on the first area, each time decomposing the first area into two factors; For each factorization, taking one of the two factors obtained by the factorization as the maximum width and the other of the two factors obtained by the factorization as the maximum height; Determining the effective width according to the maximum width; Determining the effective height according to the maximum height; Generating the resolutions in the resolution database based on the maximum width, the maximum height, the effective width, and the effective height.

3. The method according to claim 1 or 2, characterized in that, The one or more output interfaces include a first output interface; After determining, according to the preset effective display width and the preset effective display height of each output interface, the target resolution corresponding to each output interface in the resolution database, the method further includes: Generating resolution information of the first output interface according to the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the target resolution corresponding to the first output interface; The sending the target resolution corresponding to each output interface to the video source includes: Send the resolution information of the first output interface to the video source.

4. The method according to claim 3, wherein When the effective width or effective height in the target resolution of the first output interface is less than 4096, generating the resolution information of the first output interface according to the target resolution corresponding to the first output interface includes: Generating the Extended Display Identification Data (EDID) of the first output interface according to the target resolution corresponding to the first output interface, where the EDID of the first output interface includes the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the EDID of the first output interface; Or, When the effective width or effective height in the target resolution of the first output interface is greater than or equal to 4096, generating the resolution information of the first output interface according to the target resolution corresponding to the first output interface includes: Generating the Display Identification (DisplayID) of the second generation of the first output interface according to the target resolution corresponding to the first output interface, where the DisplayID of the first output interface includes the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the DisplayID of the first output interface.

5. The method according to claim 1, characterized in that, The one or more output interfaces include a first output interface, and the method further includes: Multiplying the at least one initial standard clock by a preset coefficient to obtain at least one near-standard clock; the preset coefficient is a positive number; Generating a near-standard clock resolution database based on the at least one near-standard clock and the preset frame rate of one or more output interfaces of the video source; When the resolution database does not include the target resolution corresponding to the first output interface, determining the target resolution corresponding to the first output interface in the near-standard clock resolution database according to the preset effective display width and preset effective display height of the first output interface.

6. A resolution control device, characterized in that, The device is connected to the video source; the device includes: an acquisition module, a processing module, and a sending module; The acquisition module is configured to acquire the preset frame rate of one or more output interfaces of the video source; determine a plurality of candidate clocks from a plurality of initial clocks in a preset order according to a preset clock step precision; the clock step precision is used to indicate the minimum interval for selecting candidate clocks from the initial clocks in the preset order; select a clock that overlaps with the clock in the standard resolution from the plurality of candidate clocks as the standard clock to obtain at least one initial standard clock; the processing module is further configured to generate a resolution database based on the at least one initial standard clock and the preset frame rate of one or more output interfaces of the video source; acquire the preset effective display width and preset effective display height of one or more output interfaces of the video source; The processing module is configured to determine a target resolution corresponding to each output interface in the resolution database according to the preset effective display width and preset effective display height of each output interface; the resolution database includes resolutions corresponding to at least one standard clock, where the standard clock is the clock in the standard resolution, and one standard clock corresponds to multiple resolutions; the effective width in the target resolution corresponding to any one output interface is greater than or equal to the preset effective display width of the output interface; the effective height in the target resolution corresponding to any one output interface is greater than or equal to the preset effective display height of the output interface. The sending module is configured to send the target resolution corresponding to each output interface to the video source, so that the video source shows a video image according to the target resolution corresponding to each output interface.

7. The apparatus according to claim 6, wherein the at least one standard clock includes a first standard clock, the one or more output interfaces include a first output interface, and the preset frame rate of the first output interface is a first frame rate; the processing module is specifically configured to divide the first standard clock by the first frame rate to obtain a first area; perform one or more factorizations on the first area, and each time decompose the first area into two factors; for each factorization, use one of the two factors obtained by the factorization as the maximum width and the other as the maximum height; determine the effective width according to the maximum width; determine the effective height according to the maximum height; generate the resolutions in the resolution database based on the maximum width, the maximum height, the effective width, and the effective height.

8. The apparatus according to claim 6 or 7, wherein the one or more output interfaces include a first output interface; after the processing module determines the target resolution corresponding to each output interface in the resolution database according to the preset effective display width and preset effective display height of each output interface, the processing module is further configured to generate resolution information of the first output interface according to the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the target resolution corresponding to the first output interface; the sending module is specifically configured to send the resolution information of the first output interface to the video source.

9. The apparatus according to claim 8, wherein When the effective width or effective height in the target resolution of the first output interface is less than 4096, the processing module is specifically configured to generate the extended display identification data EDID of the first output interface according to the target resolution corresponding to the first output interface, and the EDID of the first output interface includes the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the EDID of the first output interface; or, when the effective width or effective height in the target resolution of the first output interface is greater than or equal to 4096, the processing module is specifically configured to generate the second-generation display identification data DisplayID of the first output interface according to the target resolution corresponding to the first output interface, and the DisplayID of the first output interface includes the target resolution corresponding to the first output interface; the resolution information of the first output interface includes the DisplayID of the first output interface.

10. The device according to claim 6, wherein the one or more output interfaces include a first output interface, and the processing module is further configured to multiply the at least one initial standard clock by a preset coefficient to obtain at least one near-standard clock; the preset coefficient is a positive number; generate a near-standard clock resolution database based on the at least one near-standard clock and the preset frame rate of one or more output interfaces of the video source; when the resolution database does not include the target resolution corresponding to the first output interface, determine the target resolution corresponding to the first output interface in the near-standard clock resolution database according to the preset effective display width and preset effective display height of the first output interface.

11. A resolution control device, characterized in that, The video wall controller includes: a processor and a memory; the memory stores instructions executable by the processor; when the processor is configured to execute the instructions, the resolution control device implements the method according to any one of claims 1-5.

12. A readable storage medium, characterized in that, The readable storage medium includes: software instructions; when the software instructions run in the video wall controller, the video wall controller implements the method according to any one of claims 1-5.

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