Crystal oscillator supporting compass clock synchronization and self-keeping time

Abstract

The application discloses a crystal oscillator supporting Beidou clock synchronization and self time keeping, which comprises a power supply module, a PPS input module, an FPGA module, a PPS output module, a PPS measurement module, an MCU module, a DAC module, a crystal oscillator module, a frequency output module and an output module. The application automatically adjusts and controls the voltage of the voltage control end in real time to perform frequency calibration. According to the complementary characteristics of the Beidou satellite clock signal and the constant temperature crystal oscillator clock signal, random errors and cumulative errors are greatly eliminated, and the output frequency of the constant temperature crystal oscillator module of the application is changed by adjusting and controlling the voltage control end, so that the short-term and long-term time accuracy and stability are maintained. The application can be widely applied to the field of clock frequency modulation.

Description

Technical Field

[0001] This invention relates to the field of clock frequency modulation technology, and in particular to a crystal oscillator that supports BeiDou clock synchronization and self-keeping time. Background Technology

[0002] Clock technology has wide applications in modern science and technology. Many fields, such as power, communications, military, and aerospace, have increasingly stringent time requirements, necessitating high-precision synchronous clocks as references to coordinate the normal operation of the entire system. High-precision frequency standards currently mainly include atomic clocks such as rubidium clocks, cesium clocks, and hydrogen clocks, as well as high-precision crystal oscillators. Among these, high-precision crystal oscillators have gained widespread use due to their long lifespan and relatively low cost. However, crystal oscillators are prone to frequency drift due to factors such as temperature and aging, resulting in poor long-term stability. The BeiDou system's pulse-per-second (1PPS) time accuracy is better than 20ns, but it suffers from significant random errors and lacks cumulative errors. While the random error of a temperature-controlled crystal oscillator clock signal is smaller, it exhibits frequency drift due to its own aging and external temperature factors, resulting in significant cumulative errors. Summary of the Invention

[0003] In view of this, embodiments of the present invention provide a crystal oscillator that supports BeiDou clock synchronization and self-timekeeping, which is stable over a long period of time and has relatively small random and cumulative errors.

[0004] One aspect of this invention provides a crystal oscillator that supports BeiDou clock synchronization and self-timekeeping, comprising:

[0005] A power supply module is used to supply power to the crystal oscillator and provide a reference voltage to the DAC module;

[0006] The PPS input module is used to receive the PPS input signal of the Beidou clock, enhance the signal strength and driving capability of the PPS input signal, obtain the PPS_IN signal, and output the PPS_IN signal to the FPGA module and the PPS measurement module respectively.

[0007] The FPGA module is used to monitor the PPS_IN signal in real time; it receives the first 10M signal input from the frequency output module, divides and counts the first 10M signal to obtain the PPS_Pre signal, and outputs the PPS_Pre signal to the PPS measurement module; it receives the PPS phase modulation signal input from the MCU module to control the first PPS_OUT signal output to the PPS output module to be in phase with the PPS_IN signal;

[0008] The PPS output module is used to receive the first PPS_OUT signal, enhance the signal strength and driving capability of the first PPS_OUT signal, and output the first PPS_OUT signal to the external device of the crystal oscillator.

[0009] The PPS measurement module is used to receive the PPS_Pre signal and the PPS_IN signal, measure the time deviation between the PPS_Pre signal and the PPS_IN signal in real time, and send the time deviation to the MCU module through SPI communication.

[0010] The MCU module is used to receive the time deviation, calculate the adjustment weight, and send the adjustment weight to the DAC module via SPI communication; and output the signal status information obtained by real-time monitoring of the PPS_Pre signal to the output module via UART and GPIO.

[0011] The DAC module is used to receive the reference power supply; receive the adjustment weight to adjust the VCO voltage of the VCO pin, and output it to the crystal oscillator module.

[0012] A crystal oscillator module is used to receive the VCO voltage to adjust the second 10MHz signal output to the frequency output module;

[0013] A frequency output module is used to receive the second 10M signal, enhance the signal strength and driving capability of the second 10M signal, and obtain a second PPS_OUT signal; output the second PPS_OUT signal to the external device of the crystal oscillator, and the second PPS_OUT signal output to the FPGA module is used as the first 10M signal;

[0014] The output module is used to receive the signal status information output by the MCU module to determine the input status and phase status of the PPS input signal, and to determine the operating status and output deviation of the crystal oscillator.

[0015] Preferably, the PPS input module is also used to receive external PPS input signals from other clock devices.

[0016] Preferably, the output module is used to receive the signal status information output by the MCU module to determine the input status and phase status of the PPS input signal, and to determine the operating status and output deviation of the crystal oscillator, including:

[0017] The output module is used to receive serial port message information and GPIO status information output by the MCU module, so as to determine the input status of the PPS input signal according to the LOCK_CON signal of the GPIO status information, determine the phase status of the PPS input signal according to the LOCK_STA signal of the GPIO status information, and determine the working status and output deviation of the crystal oscillator according to the serial port message information.

[0018] Another aspect of this invention provides a clock signal control method supporting BeiDou clock synchronization and self-timekeeping, applied to an MCU module in a crystal oscillator supporting BeiDou clock synchronization and self-timekeeping, comprising:

[0019] The time deviation between the PPS_Pre and PPS_IN signals detected by the PPS measurement module is obtained through SPI communication.

[0020] The adjustment weights that meet the set performance index requirements are calculated based on the preset initial weights and the time deviation.

[0021] The adjustment weights are sent to the DAC module via SPI communication so that the DAC module can adjust the 10M signal output by the crystal oscillator module.

[0022] The signal status information obtained from real-time monitoring of the PPS_Pre signal is output to the output module via UART and GPIO.

[0023] Preferably, it further includes:

[0024] Read locally pre-recorded historical adjustment weights;

[0025] The historical adjustment weights are sent to the DAC module via SPI communication, so that the DAC module can adjust the 10M signal output by the crystal oscillator module corresponding to the historical adjustment weights.

[0026] Preferably, it further includes:

[0027] A PPS phase modulation signal is sent to the FPGA module so that the FPGA module can adjust the phase of the PPS_Pre signal according to the PPS phase modulation signal, so that the phase of the PPS_Pre signal is the same as the phase of the PPS_IN signal.

[0028] Another aspect of this invention provides a clock signal control device that supports BeiDou clock synchronization and self-timekeeping, comprising:

[0029] The time deviation acquisition unit is used to acquire the time deviation detected by the PPS measurement module for the PPS_Pre signal and the PPS_IN signal via SPI communication.

[0030] The weighting calculation unit is used to calculate the adjustment weights that meet the set performance index requirements based on the preset initial weights and the time deviation.

[0031] The adjustment weight distribution unit is used to distribute the adjustment weight to the DAC module via SPI communication, so that the DAC module can adjust the 10M signal output by the crystal oscillator module;

[0032] The signal status information output unit is used to output the signal status information obtained from real-time monitoring of the PPS_Pre signal to the output module via UART and GPIO.

[0033] Another aspect of the present invention provides an electronic device, including a processor and a memory;

[0034] The memory is used to store programs;

[0035] The processor executes the program to implement the above-described method.

[0036] Another aspect of this invention provides a computer-readable storage medium storing a program that is executed by a processor to implement the above-described method.

[0037] This invention also discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium and execute the computer instructions, causing the computer device to perform the method described above.

[0038] The beneficial effects of this invention include: if the temperature-controlled crystal oscillator operates continuously for a long period, its frequency cannot meet the required accuracy and stability. Therefore, this invention uses the MCU module to automatically adjust the voltage at the voltage control terminal in real time for frequency calibration. Based on the complementary accuracy of the BeiDou satellite clock signal and the temperature-controlled crystal oscillator clock signal, random and cumulative errors are greatly eliminated. Furthermore, by adjusting the voltage control terminal of the temperature-controlled crystal oscillator module, the output frequency is changed accordingly to maintain short-term and long-term time accuracy and stability. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1A system framework diagram of a crystal oscillator supporting BeiDou clock synchronization and self-timekeeping is provided for an embodiment of the present invention;

[0041] Figure 2 A flowchart illustrating a clock signal control method supporting BeiDou clock synchronization and self-timekeeping, provided in an embodiment of the present invention;

[0042] Figure 3 This is a structural block diagram of a clock signal control device that supports BeiDou clock synchronization and self-timekeeping, provided as an embodiment of the present invention. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0044] Reference Figure 1 This invention provides a crystal oscillator that supports BeiDou clock synchronization and self-timekeeping, specifically including:

[0045] 1) Power supply module: provides power to the crystal oscillator of the present invention, with an input voltage of 5Vdc; it can also provide a reference voltage for the DAC module.

[0046] 2) PPS Input Module: Receives the PPS input signal from the BeiDou clock or the external PPS input signal from other clock devices, processes the input PPS signal through the driver to increase the signal strength and driving capability, and finally outputs the PPS_IN signal for use by the FPGA module and the PPS measurement module.

[0047] 3) FPGA Module: The FPGA module receives the PPS_IN signal from the PPS input module and monitors the PPS_IN signal in real time; it also outputs the PPS_Pre signal, which is obtained by frequency division of the first 10MHz signal input from the frequency output module, to the PPS measurement module; at the same time, the FPGA module receives the PPS phase modulation signal sent by the MCU module and controls the output of the PPS_OUT signal to ensure that PPS_OUT and PPS_IN are in phase; simultaneously, the FPGA module counts the first 10MHz signal in real time and reflects the corresponding result on the PPS_Pre signal obtained by frequency division of the first 10MHz signal.

[0048] 4) PPS Output Module: Receives the PPS_IN signal input from the FPGA module, processes the input PPS_IN signal through the driver to increase the signal strength and driving capability, and finally outputs the PPS_OUT signal.

[0049] 5) PPS Measurement Module: Receives the PPS_Pre signal input from the FPGA module and the PPS_IN signal input from the PPS input module, measures the time deviation between the two PPS signals in real time, and sends the measurement data to the MCU module via SPI communication.

[0050] 6) MCU module:

[0051] 1. Self-learning process.

[0052] a) The MCU module and the PPS measurement module communicate via SPI to detect the time deviation between the two signals PPS_Pre and PPS_IN in real time.

[0053] b) The MCU continuously calculates the time deviation and performs self-learning calculations. It presets the initial weights, bias values, and self-learning rate. After passing through the activation function and the established dataset, it iterates according to the Delta learning rule. After calculating the squared error, the weight vector, and taking the derivative of the squared error with respect to the weight vector, the final adjusted weights are obtained.

[0054] c) Based on different time deviations, continuously calculate and adjust the weights until the time deviations meet the performance requirements.

[0055] d) The MCU module will record the entire self-learning process. The performance of each crystal oscillator module is different, which means that the self-learning process of each MCU module is different. Recording the self-learning process makes it easier to quickly complete the self-learning process of this self-timer crystal oscillator in the future.

[0056] e) The PPS_Pre signal is obtained by frequency division of the 10M signal. Adjusting the PPS_Pre signal is equivalent to adjusting the 10M signal synchronously.

[0057] 2. The MCU module and DAC module communicate via SPI. The DAC module sends the time deviation in real time, and the MCU module sends the adjustment weight in real time. This enables the DAC module to adjust the frequency output accuracy of the crystal oscillator module in real time.

[0058] 3. The MCU module can send phase modulation commands to the FPGA module in real time. The FPGA module adjusts the phase of the PPS_Pre signal according to the phase modulation command to ensure that the PPS_Pre signal is in phase with the PPS_IN signal.

[0059] 4. The MCU module can monitor the PPS_Pre signal status in real time and output the relevant status to the output module through UART and GPIO.

[0060] 7) DAC Module: The DAC module receives a stable reference power supply from the power supply module. The DAC module is a 16-bit sampling module. After accurately sampling the reference voltage, the MCU module learns the digital quantity required to adjust the fixed voltage through SPI communication. At the same time, the MCU module can control the DAC module to adjust a certain digital quantity through SPI communication, thereby changing a certain voltage value of the VCO pin of the DAC module, and thus achieving the purpose of adjusting the frequency output of the crystal oscillator module.

[0061] 8) Crystal oscillator module: The crystal oscillator module outputs a stable frequency signal and receives VCO control from the ADC module. By continuously adjusting the VCO value, the stability of the frequency output can be guaranteed. The voltage-controlled crystal oscillator used in this invention outputs a 10MHz signal when the VCO pin is 2.5V. Adjusting the VCO pin can fine-tune the output frequency.

[0062] 9) Frequency output module: Receives the second 10M signal input from the crystal oscillator module, processes the input second 10M signal through the driver to increase the signal strength and driving capability, and finally outputs the PPS_OUT signal; another output is provided for FPGA module monitoring.

[0063] 10) Output Module: Receives serial port message information and GPIO status information from the MCU module. GPIO status information includes two signals: LOCK_STA and LOCK_CON. LOCK_CON is the input signal; when the input is high, the module attempts to lock onto the PPS input signal; when the input is low, it is in free oscillation state. LOCK_STA is the output signal; when the output is low, the PPS_OUT signal fails to maintain phase with the PPS input signal; when the output is high, the PPS_OUT signal maintains phase with the PPS input signal. The serial port message outputs the operating status and deviation information of the crystal oscillator during autosynchronization, etc. The specific message format and related status interpretations are as follows:

[0064] The message format is a data frame that begins with $ and ends with #.

[0065] $, <1> , <2> , <3> , <4> , <5> , <6> , <7> , <8> , <9> ,#

[0066] $: Frame header;

[0067] <1> Status: F = freeRun (zeroed before GPS signal arrives);

[0068] S = StepRun detects GPS signal stability and quickly reduces clock bias;

[0069] R1 = RUN_ONE (Rapid Taming State);

[0070] R2 = The tamed state after RUN_TWO is locked;

[0071] H = HoldOver timed state;

[0072] <2> Raw clock bias: Real-time clock bias value, in nanoseconds (ns);

[0073] <3> Filtered clock bias: The clock bias value after filtering, in nanoseconds (ns);

[0074] <4> Clock rate: how many nanoseconds drift per second, measured in nanoseconds per second (ns / s);

[0075] <5> Linear fit: 1 = 100%; the higher the percentage, the better the fit.

[0076] <6> Voltage change: The amount of change in the voltage register value during the taming process;

[0077] <7> Voltage register value: The current value of the voltage register (0-65535);

[0078] <8> Temperature: The current internal temperature of the time synchronization module, in degrees Celsius (°C);

[0079] <9> Time: The running time of the time synchronization module, reset to zero upon power failure, in seconds (s).

[0080] Reference Figure 2 This invention provides a clock signal control method supporting BeiDou clock synchronization and self-timekeeping, applied to the MCU module in the aforementioned crystal oscillator, comprising:

[0081] Step S100: Obtain the time deviation detected by the PPS measurement module for the PPS_Pre signal and the PPS_IN signal via SPI communication.

[0082] Step S110: Calculate the adjustment weight that meets the set performance index requirements based on the preset initial weight and the time deviation.

[0083] Step S120: The adjustment weights are sent to the DAC module via SPI communication so that the DAC module can adjust the 10M signal output by the crystal oscillator module.

[0084] Step S130: Output the signal status information obtained from real-time monitoring of the PPS_Pre signal to the output module via UART and GPIO.

[0085] To adapt to the self-synchronization of different crystal oscillator modules, the MCU module in the method of the present invention can also read the locally pre-recorded historical adjustment weights; and then send the historical adjustment weights to the DAC module through SPI communication, so that the DAC module can adjust the 10M signal output by the crystal oscillator module corresponding to the historical adjustment weights.

[0086] In addition, to ensure that the PPS_Pre signal and the PPS_IN signal are in phase, the MCU module in the method of the present invention can also send a PPS phase modulation signal to the FPGA module, so that the FPGA module can adjust the phase of the PPS_Pre signal according to the PPS phase modulation signal, so that the phase of the PPS_Pre signal is the same as the phase of the PPS_IN signal.

[0087] Reference Figure 3 This invention provides a clock signal control device that supports BeiDou clock synchronization and self-timekeeping, comprising:

[0088] The time deviation acquisition unit is used to acquire the time deviation detected by the PPS measurement module for the PPS_Pre signal and the PPS_IN signal via SPI communication.

[0089] The weighting calculation unit is used to calculate the adjustment weights that meet the set performance index requirements based on the preset initial weights and the time deviation.

[0090] The adjustment weight distribution unit is used to distribute the adjustment weight to the DAC module via SPI communication, so that the DAC module can adjust the 10M signal output by the crystal oscillator module;

[0091] The signal status information output unit is used to output the signal status information obtained from real-time monitoring of the PPS_Pre signal to the output module via UART and GPIO.

[0092] This invention also discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, causing the computer device to perform... Figure 2 The method shown.

[0093] In some alternative embodiments, the functions / operations mentioned in the block diagrams may not occur in the order shown in the operation diagrams. For example, depending on the functions / operations involved, two consecutively shown blocks may actually be executed substantially simultaneously, or the blocks may sometimes be executed in reverse order. Furthermore, the embodiments presented and described in the flowcharts of this invention are provided by way of example to provide a more comprehensive understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is altered and sub-operations described as part of a larger operation are executed independently.

[0094] Furthermore, although the invention has been described in the context of functional modules, it should be understood that, unless otherwise stated, one or more of the described functions and / or features may be integrated into a single physical device and / or software module, or one or more functions and / or features may be implemented in a separate physical device or software module. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the invention. Rather, given the properties, functions, and internal relationships of the various functional modules in the apparatus disclosed herein, the actual implementation of the module will be understood within the scope of conventional skill of an engineer. Therefore, those skilled in the art can implement the invention as set forth in the claims using ordinary techniques without excessive experimentation. It is also understood that the specific concepts disclosed are merely illustrative and not intended to limit the scope of the invention, which is determined by the full scope of the appended claims and their equivalents.

[0095] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0096] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device.

[0097] More specific examples of computer-readable media (a non-exhaustive list) include: electrical connections (electronic devices) having one or more wires, portable computer disk drives (magnetic devices), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Furthermore, computer-readable media can even be paper or other suitable media on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in computer memory.

[0098] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0099] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0100] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

[0101] The above is a detailed description of the preferred embodiments of the present invention. However, the present invention is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention. All such equivalent modifications or substitutions are included within the scope defined by the claims of the present invention.

Claims

1. A crystal oscillator supporting BeiDou clock synchronization and self-timekeeping, characterized in that, include: A power supply module is used to supply power to the crystal oscillator and provide a reference voltage to the DAC module; The PPS input module is used to receive the PPS input signal of the Beidou clock, enhance the signal strength and driving capability of the PPS input signal, obtain the PPS_IN signal, and output the PPS_IN signal to the FPGA module and the PPS measurement module respectively. The FPGA module is used to monitor the PPS_IN signal in real time; it receives the first 10M signal input from the frequency output module, divides and counts the first 10M signal to obtain the PPS_Pre signal, and outputs the PPS_Pre signal to the PPS measurement module; it receives the PPS phase modulation signal input from the MCU module to control the first PPS_OUT signal output to the PPS output module to be in phase with the PPS_IN signal; The PPS output module is used to receive the first PPS_OUT signal, enhance the signal strength and driving capability of the first PPS_OUT signal, and output the first PPS_OUT signal to the external device of the crystal oscillator. The PPS measurement module is used to receive the PPS_Pre signal and the PPS_IN signal, measure the time deviation between the PPS_Pre signal and the PPS_IN signal in real time, and send the time deviation to the MCU module through SPI communication. The MCU module is used to receive the time deviation, calculate the adjustment weight, and send the adjustment weight to the DAC module via SPI communication; and outputs the signal status information obtained by real-time monitoring of the PPS_Pre signal to the output module via UART and GPIO. A DAC module is used to receive the reference voltage; The adjustment weight is received to adjust the VCO voltage of the VCO pin and output to the crystal oscillator module. A crystal oscillator module is used to receive the VCO voltage to adjust the second 10MHz signal output to the frequency output module; A frequency output module is used to receive the second 10M signal, enhance the signal strength and driving capability of the second 10M signal, and obtain a second PPS_OUT signal; output the second PPS_OUT signal to the external device of the crystal oscillator, and the second PPS_OUT signal output to the FPGA module is used as the first 10M signal; The output module is used to receive the signal status information output by the MCU module to determine the input status and phase status of the PPS input signal, and to determine the operating status and output deviation of the crystal oscillator.

2. A crystal oscillator supporting BeiDou clock synchronization and self-timekeeping as described in claim 1, characterized in that, The PPS input module is also used to receive external PPS input signals from other clock devices.

3. A crystal oscillator supporting BeiDou clock synchronization and self-timekeeping as described in claim 1, characterized in that, The output module is used to receive the signal status information output by the MCU module to determine the input status and phase status of the PPS input signal, and to determine the operating status and output deviation of the crystal oscillator, including: The output module is used to receive serial port message information and GPIO status information output by the MCU module, so as to determine the input status of the PPS input signal according to the LOCK_CON signal of the GPIO status information, determine the phase status of the PPS input signal according to the LOCK_STA signal of the GPIO status information, and determine the working status and output deviation of the crystal oscillator according to the serial port message information.

4. A clock signal control method supporting BeiDou clock synchronization and self-timekeeping, characterized in that, An MCU module applied in a crystal oscillator supporting BeiDou clock synchronization and self-timekeeping as described in any one of claims 1-3, comprising: The time deviation between the PPS_Pre and PPS_IN signals detected by the PPS measurement module is obtained through SPI communication. The adjustment weights that meet the set performance index requirements are calculated based on the preset initial weights and the time deviation. The adjustment weights are sent to the DAC module via SPI communication so that the DAC module can adjust the second 10M signal output by the crystal oscillator module. The signal status information obtained from real-time monitoring of the PPS_Pre signal is output to the output module via UART and GPIO.

5. A clock signal control method supporting BeiDou clock synchronization and self-timekeeping as described in claim 4, characterized in that, Also includes: Read locally pre-recorded historical adjustment weights; The historical adjustment weights are sent to the DAC module via SPI communication, so that the DAC module can adjust the second 10M signal output by the crystal oscillator module corresponding to the historical adjustment weights.

6. A clock signal control method supporting BeiDou clock synchronization and self-timekeeping as described in claim 4, characterized in that, Also includes: A PPS phase modulation signal is sent to the FPGA module so that the FPGA module can adjust the phase of the PPS_Pre signal according to the PPS phase modulation signal, so that the phase of the PPS_Pre signal is the same as the phase of the PPS_IN signal.

7. A clock signal control device supporting BeiDou clock synchronization and self-timekeeping, characterized in that, The clock signal control device is applied to a crystal oscillator supporting BeiDou clock synchronization and self-timekeeping as described in claim 1, wherein the clock signal control device comprises: The time deviation acquisition unit is used to acquire the time deviation detected by the PPS measurement module for the PPS_Pre signal and the PPS_IN signal via SPI communication. The weighting calculation unit is used to calculate the adjustment weights that meet the set performance index requirements based on the preset initial weights and the time deviation. The adjustment weight distribution unit is used to distribute the adjustment weight to the DAC module via SPI communication, so that the DAC module can adjust the second 10M signal output by the crystal oscillator module; The signal status information output unit is used to output the signal status information obtained from real-time monitoring of the PPS_Pre signal to the output module via UART and GPIO.

8. An electronic device, characterized in that, Including the processor and memory; The memory is used to store programs; The processor executes the program to implement the method as described in any one of claims 4 to 6.

9. A computer-readable storage medium, characterized in that, The storage medium stores a program that is executed by a processor to implement the method as described in any one of claims 4 to 6.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 4 to 6.

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